User's Guide
SLVU450 – March 2011
TPS3860xxEVM-736 Evaluation Modules
This user's guide describes the evaluation modules (EVM) for the TPS386000 (TPS386000EVM-736) and
TPS386040 (TPS386040EVM-736). The TPS386000 and TPS386040 are quad supervisors with built-in
watchdog timer (WDT), manual reset, programmable delay, and a windowed or positive and negative
monitor.
1
2
3
4
5
6
Contents
Description ................................................................................................................... 2
1.1
General Features .................................................................................................. 2
1.2
Orderable Options ................................................................................................. 2
Schematic .................................................................................................................... 3
EVM Input/Output Connectors ............................................................................................ 4
General Operation and Functionality ..................................................................................... 4
4.1
Input Power ......................................................................................................... 4
4.2
Supervisor Inputs .................................................................................................. 4
4.3
RESET Outputs .................................................................................................... 5
4.4
RESET Timing Delay .............................................................................................. 6
4.5
Watchdog Timer Function ........................................................................................ 7
EVM Assembly Drawings and Layout Guidelines ...................................................................... 8
5.1
PCB Drawings ...................................................................................................... 8
5.2
Layouts Guidelines ............................................................................................... 10
Bill of Materials ............................................................................................................. 11
List of Figures
1
TPS3860xxEVM-736 Schematic .......................................................................................... 3
2
RESET1 Timing for VCC1 From 0 V to 3.3 V ........................................................................... 6
3
WDT Timing and Operation
4
Top-Side Placement/Routing .............................................................................................. 8
5
Top-Side Layout/Routing................................................................................................... 9
6
Bottom-Side Layout/Routing ............................................................................................. 10
...............................................................................................
7
List of Tables
1
2
............................................................................................
TPS3860xxEVM-736 Bill of Materials ..................................................................................
EVM Input/Output Connectors
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11
1
Description
1
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Description
The TPS3860xxEVM-736 can be used to evaluate the various features of the TPS3860xx family of
supervisors. Through resistor dividers, each supervisor can be individually configured to monitor voltages
as low as 0.4 V with the EVM initially being set up for 3.3 V - 12%, 2.5 V - 6%, and 1.8 V - 7 % for
supervisors 1 through 3, respectively. The fourth supervisor (SENSE4L and SENSE4H) can be configured
for either windowed or positive and negative monitoring, with the EVM default being set as a 1.2 V ± 7%
windowed supervisor. The delays for each supervisor can also be individually set through timing
capacitors. An input and output are provided for the WDT as well as an input for the manual reset.
1.1
General Features
•
•
•
•
•
1.2
Orderable Options
•
•
2
Inputs provided for all four supervisors, including a negative supply input for the fourth supervisor
Placeholders to configure supervisor 4 for positive and negative monitoring
Watchdog timer input and output
Manual reset input
Replaceable timing capacitors to independently program the delay of each supervisor
TPS386000EVM-736 - 4-channel supervisor/sequencer with open-drain RESET outputs
TPS386040EVM-736 - 4-channel supervisor/sequencer with push-pull RESET outputs
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Schematic
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Schematic
3
2
1
1
1
1
3
2
2
2
2
2
2
Figure 1. TPS3860xxEVM-736 Schematic
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EVM Input/Output Connectors
3
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EVM Input/Output Connectors
Table 1. EVM Input/Output Connectors
Connector
4
Description
J1
Supervisor-1 input and GND (default: 3.3 V - 12%)
J2
Supervisor-2 input and GND (Default: 2.5 V - 6%)
J3
Supervisor-3 input and GND (Default: 1.8 V - 7%)
J4
Supervisor-4 window and positive supply input and GND (default: 1.2 V ± 7%)
J5
Supervisor-4 negative supply input and GND (default: not configured)
J6
Watchdog timer input and GND
J7
VCC connector (1.8 V – 5.5 V)
J8
RESET1 output and GND
J9
RESET2 output and GND
J10
RESET3 output and GND
J11
RESET4 output and GND
J12
Watchdog timer output and GND
J13
Manual reset input and GND
J14
GND
J15
GND
General Operation and Functionality
The following paragraphs describe the functionality and operation of the TPS3860xxEVM-736.
4.1
Input Power
The TPS3860xx family of supervisors requires a VCC voltage between 1.8 V and 5.5 V. This voltage can
be supplied through J7 and its return through J14. The chip itself only requires 12 µA to operate.
4.2
Supervisor Inputs
The TPS3860xx supervisor inputs (SENSE1, SENSE2, SENSE3, SENSE4L, and SENSE4H) can be used
to monitor voltages down to 0.4 V. The default EVM configuration monitors 3.3 V - 12%, 2.5 V - 6%, 1.8 V
- 7%, and 1.2 V ± 7% through supervisors 1 through 4, respectively. If voltages other than the defaults are
desired, the SENSE input trip points can be adjusted by changing the resistor dividers using the following
equations as given in the data sheet (RU is the upper resistor, RL is the lower):
4
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General Operation and Functionality
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VITN = 400 mV
æV
RU = RL ´ çç CC _ TARGET
VITN
è
ö
÷÷ - 1
ø
æR
ö
VCC _ ACTUAL = VITN ´ çç U + 1÷÷
è RL
ø
Example for 3.3 V - 12% :
VCC _ TARGET = 2.904 V, Choose RL = 34.0 kW
æ 2.904 V ö
- 1÷÷ = 212.84 kW (Choose 215 kW)
RU = 34.0 kW ´ çç
è 0. 4 V
ø
æ 215 kW
ö
+ 1÷÷ = 2.929 V
VCC _ ACTUAL = 0.4 V ´ çç
è 34.0 kW ø
(1)
Additionally, the SENSE4H input can be used along with VREF to monitor negative voltages applied at J5.
The EVM is not configured by default for negative voltage monitoring. In order to use this feature, R10 and
R11 need to be removed and R7, R9, and R12 need to be installed. The values for the resistor dividers
can be calculated using the equations from the data sheet, including the equations for using a windowed
supervisor. The following is an example of setting up a positive and negative supervisor for a -5-V supply
(RU is the resistor from VREF to SENSE4H, and RL is the resistor from SENSE4H to VCC4-):
VREF = 1.2 V, VITP = 400 mV
RL = RU ´
VITP - VCC _ TARGET
VREF - VITP
VCC _ ACTUAL = VITP -
RL
´ (VREF - VITP )
RU
Example for - 5 V - 12% :
VCC _ t arg et = - 4.4 V, Choose RU = 49.9 kW
RL = 49.9 kW ´
0. 4 V - ( - 4. 4 V )
= 299.4 kW (Choose 301 kW)
1. 2 V - 0. 4 V
VCC _ ACTUAL = 0.4 V -
301 kW
´ (1.2 V - 0.4 V ) = - 4.426 V
49.9 kW
(2)
4.3
RESET Outputs
The TPS3860xxEVM-736 RESET outputs can be used to reset power supplies or processors when the
power supply voltage drops below the setpoint. They can also be used to sequence power supplies to
avoid violating the maximum voltage ratings of devices. The TPS386000 has open-drain outputs and are
pulled up by 10-kΩ resistors installed as R13–R16 by default on the TPS386000EVM-736. The
TPS386040 has push-pull outputs, and R13–R16 are not installed on the TPS386040EVM-736.
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General Operation and Functionality
4.4
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RESET Timing Delay
The time delay for each supervisor can be adjusted by the capacitor at the CT1–CT4 pins. The EVM has
been configured with 0.1-µF capacitors on each of these pins for a nominal delay of 413.7 ms. Figure 2
shows the operation of the RESET output with respect to the supervised voltage. The top trace shows
VCC1 as it ramps up from 0 V to 3.3 V and the bottom trace shows the delay before RESET1 goes high.
To change this delay, the following equations from the data sheet can be used to calculate a new timing
capacitor:
CCT (nF) = [t DELAY (ms ) - 0.5 (ms )]´ 0.242
t DELAY _ ACTUAL (ms ) =
CCT (nF)
+ 0.5 (ms )
0.242
Example for 200 ms :
t DELAY _ TARGET = 200 ms
CCT (nF) = [200 - 0.5]´ 0.242 = 48.279 nF (Choose 0.047 mF)
t DELAY _ ACTUAL (ms ) =
47
+ 0.5 = 194.7 ms
0.242
(3)
Figure 2. RESET1 Timing for VCC1 From 0 V to 3.3 V
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General Operation and Functionality
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4.5
Watchdog Timer Function
The TPS3860xx contains a watchdog timer (WDT) which can be evaluated using the
TPS3860xxEVM-736. The watchdog timer times out approximately 600 ms after the last rising or falling
edge seen at WDI (J6), and WDO (J12) is asserted. Once WDO has been asserted, RESET1 must be
asserted in order to reset WDO. This is accomplished when manual reset (J13) is asserted, the SENSE1
voltage drops below the setpoint, or VCC is reset. Figure 3 shows the operation of the watchdog timer.
WDO starts low, indicating a timeout condition, but goes high when RESET1 is asserted by using the MR
input. The WDO pin goes low again 600 ms after the last edge seen at WDI.
Figure 3. WDT Timing and Operation
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EVM Assembly Drawings and Layout Guidelines
5
EVM Assembly Drawings and Layout Guidelines
5.1
PCB Drawings
www.ti.com
The following figures show component placement and layout.
Figure 4. Top-Side Placement/Routing
8
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EVM Assembly Drawings and Layout Guidelines
Figure 5. Top-Side Layout/Routing
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EVM Assembly Drawings and Layout Guidelines
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Figure 6. Bottom-Side Layout/Routing
5.2
Layouts Guidelines
Thermal Pad
The thermal pad provides a thermal and mechanical interface between the device and the printed-circuit
board (PCB). Connect the exposed thermal pad of the PCB to the device VSS pins and provide at least a
3 x 3 pattern of PCB vias to connect the thermal pad and GND pin to the circuit ground on other PCB
layers.
Supply Voltage Decoupling
Provide power supply pin bypass to the device as follows:
• 0.1-µF, X5R ceramic at pin 15 (VCC)
• 1-nF, X7R ceramic at pins 6–10 (SENSE1, SENSE2, SENSE3, SENSE4L, and SENSE4H) although
not required can provide noise filtering in noisy power supply systems.
10
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Bill of Materials
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6
Bill of Materials
Table 2. TPS3860xxEVM-736 Bill of Materials
EVM Count
RefDes
Value
Description
Size
Part Number
MFR
TPS386000 TPS386040
5
5
C1, C2, C3, C4, C5 0.1 µF
Capacitor, Ceramic, Low Inductance, 6.3V,
X5R, 20%
0603
Std
Std
15
15
J1, J2, J3, J4, J5,
J6, J7, J8, J9, J10,
J11, J12, J13, J14,
J15
PEC02SAAN
Header, Male 2-pin, 100mil spacing
0.100 in x 2
PEC02SAAN
Sullins
5
5
R1, R3, R4, R6,
R18
100k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
1
R10
7.15k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
1
R11
48.7k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
5
0
R13, R14, R15,
R16, R17
10k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
1
R2
16.2k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
1
R5
20.5k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
0
0
R7, R9, R12
DNI
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
1
R8
31.6k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
0
U1
TPS386000RGP
IC, Quad Supply Voltage Supervisors
--
TPS386000RGP
TI
0
1
U1
TPS386040RGP
IC, Quad Supply Voltage Supervisors
--
TPS386040RGP
TI
1
1
--
--
Label
1.25 x 0.25 inch
THT-13-457-10
Brady
1
1
--
HPA736
2.200 x 1.560 x 0.062 inch 2 layer 2oz. PCB
2.200 x 1.560 inch
HPA736
Any
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It is important to operate this EVM within the input voltage range of 0 V to 7 V and the output voltage range of 0 V to 7 V .
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