TPS5102IDBT

TPS5102IDBT

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP30

  • 描述:

    TPS5102 适用于笔记本电脑电源的 4.5V 至 25V 双路输出同步降压控制器

  • 数据手册
  • 价格&库存
TPS5102IDBT 数据手册
TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 D D D D D D D D D D D DBT PACKAGE (TOP VIEW) Dual, Step-Down for Notebook System Power 4.5 V to 25 V Input Voltage Range Adjustable Output Voltage 95% Efficiency Achievable PWM/Skip Mode Control Maintains High Efficiency Under Light Load Conditions Fixed-Frequency Operation Resistorless Current Protection Fixed High-Side Driver Voltage Low Quiescent Current (0.6 mA, 2.5 V, No switching, Vin = 4.5 – 25 V Iccs Stand-by current Both STBY < 0.5 V, Vin = 4.5 – 25 V MIN UNIT oscillator PARAMETER fosc Frequency RT fdv Timing resistor fdt TEST CONDITIONS MIN PWM operation 56 Vcc = 4.5 V to 25 V fosc change VoscH H H level output voltage H-level VoscL L L level output voltage L-level kΩ 0.1% TA = -40°C to 85°C DC, includes internal comparator error 2% 1 Fosc = 200 kHz, Includes internal comparator error Includes internal comparator error 1.1 1.2 1.17 0.4 Fosc = 200 kHz, Includes internal comparator error 0.5 0.6 0.43 V V error amp PARAMETER TEST CONDITIONS Vio Input offset voltage Av Open-loop voltage gain GB Unity-gain bandwidth Isnk Output sink current Vo = 0.4 V Isrc Output source current Vo = 1 V MIN TA = 25°C TYP MAX UNIT ±2 ±10 mV 50 30 dB 0.8 MHz 45 µA 300 µA skip comparator PARAMETER Vhys† Hysteresis window Vhoff Offset voltage Ihbias Bias current TEST CONDITIONS TLHT Propagation delay‡ from INV to OUTxU TLH † Vhys is assured by design. ‡ The total delay in the table includes the driver delay. MIN TYP MAX 6 9.5 13 UNIT mV 2 mV 10 pA TTL input signal 0.7 µs 10 mV overdrive on hysteresis band signal 1.2 µs POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 electrical characteristics over recommended operating free-air temperature range, VCC = 7 V (unless otherwise noted) (continued) driver deadtime PARAMETER TDRVLH TDRVHL TEST CONDITIONS MIN TYP MAX UNIT Low side to high side 70 nS High side to low side 85 nS standby PARAMETER VIH VIL H-level input voltage Tturnon Tturnoff Propagation delay L-level input voltage Propagation delay TEST CONDITIONS MIN TYP MAX 2.5 STBY1 STBY2 STBY1, 0.5 1.5 STBY to driver output UNIT V µs 1.8 5V regulator PARAMETER TEST CONDITIONS MIN TYP 4.7 MAX UNIT VO Regin Output voltage I = 10 mA 5.3 V Line regulation Vcc = 5.5 V, 25 V, I = 10 mA 20 mV Regl Load regulation I = 1 V, 10 mA, Vcc = 5.5 V 40 mV Ios Short-circuit output current Vref = 0 V 80 mA 5-V internal switch PARAMETER VTLH VTHL Threshold voltage Vhys Hysteresis TEST CONDITIONS MIN TYP MAX UNIT 4.2 4.8 V 4.1 4.7 V 30 150 mV MAX UNIT UVLO PARAMETER VTLH VTHL Threshold voltage Vhys Hysteresis TEST CONDITIONS MIN TYP 3.7 4.2 V 3.6 4.1 V 10 40 150 mV UNIT current limit PARAMETER Internal current source MIN TYP MAX PWM mode TEST CONDITIONS 10 15 20 Skip mode 3 5 7 Input offset voltage 2.5 µA mV driver output PARAMETER OUT_u sink current OUT_d sink current OUT_u source current OUT_d source current 8 TEST CONDITIONS Vo = 3 V Vo = 3 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN TYP 0.5 1.2 0.5 1.2 –1 –1.7 –1 –1.5 MAX UNIT A A TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 electrical characteristics over recommended operating free-air temperature range, VCC = 7 V (unless otherwise noted) (continued) softstart PARAMETER ICTRL TEST CONDITIONS Soft-start current MIN 1.8 Maximum discharge current VTLH VTHL TYP MAX 2.5 3 0.92 Threshold voltage (skip mode) UNIT µA mA 3.4 3.9 4.7 1.8 2.6 3.4 MIN TYP MAX 0.9 1.1 1.3 V output voltage protection (COMP) PARAMETER TEST CONDITIONS Threshold voltage Progagation delay†, 50% duty cycle, No capacitor on COMP or OUT_u pin, Frequency = 200 kHz UNIT V Turnon 900 ns Turnoff (with channel on) 400 ns † The delay time in the table includes the driver delay. PWM/SKIP PARAMETER Threshold Delay TEST CONDITIONS MIN TYP High to low 0.5 Low to high 2 High to low 550 Low to high 400 POST OFFICE BOX 655303 MAX • DALLAS, TEXAS 75265 UNIT V ns 9 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 TYPICAL CHARACTERISTICS QUIESCENT CURRENT (BOTH CHANNELS ON) vs INPUT VOLTAGE QUIESCENT CURRENT (BOTH CHANNELS STANDBY) vs INPUT VOLTAGE 800 160 TJ = 125°C 140 IOff – Quiescent Current – nA IQ – Quiescent Current –µ A 700 600 500 TJ = 25°C TJ = -40°C 400 300 200 100 120 100 TJ = 125°C 80 60 40 TJ = -40°C TJ = 25°C 20 0 0 10 20 VCC - Supply Voltage - V 0 30 20 7 10 15 VCC - Supply Voltage - V 4.5 Figure 1 Figure 2 DRIVE CURRENT (SOURCE) vs DRIVE VOLTAGE DRIVE CURRENT (SINK) vs DRIVE VOLTAGE 3.5 3 5 TJ = -40°C 4 TJ = 25°C TJ = 125°C 3 2 1 0 0.1 0.5 1 I(src) - Driver Source Current - A V(snk) – Driver Output Voltage – V V(src) – Driver Output Voltage – V 6 2.5 TJ = 125°C 2 TJ = 25°C 1.5 1 TJ = -40°C 0.5 0 0.1 Figure 3 10 1 0.5 I(snk) - Driver Sink Current - A Figure 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 TYPICAL CHARACTERISTICS CURRENT PROTECTION SOURCE CURRENT (SKIP MODE) vs INPUT VOLTAGE CURRENT PROTECTION SOURCE CURRENT (PWM MODE) vs INPUT VOLTAGE 14 5.2 13.8 5 I (trip) – Source Current – µ A I (protec)– Source Current – µ A TJ = 125°C TJ = 125°C 5.1 4.9 4.8 4.7 4.6 TJ = 25°C 4.5 13.6 TJ = 25°C 13.4 13.2 TJ = -40°C 13 TJ = -40°C 4.4 12.8 4.3 12.6 4.2 0 20 10 VCC - Supply Voltage - V 4.5 30 7 10 15 20 VCC - Supply Voltage - V Figure 6 Figure 5 PWM/SKIP THRESHOLD VOLTAGE vs INPUT VOLTAGE 1 Vref5 VOLTAGE vs CURRENT 5.1 TJ = -40°C 0.9 TJ = 25°C 0.7 TJ = 125°C V ref5 – Voltage – V V T – Threshold Voltage – V TJ = 125°C 5 0.8 25 0.6 0.5 0.4 0.3 0.2 4.9 TJ = 25°C 4.8 TJ = -40°C 4.7 4.6 0.1 0 0 10 20 VI - Supply Voltage - V 30 4.5 0 Figure 7 –10 –20 –30 Ir - Current - mA –40 –50 Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 TYPICAL CHARACTERISTICS SOFT START CHARGE CURRENT vs JUNCTION TEMPERATURE MAXIMUM OUTPUT VOLTAGE vs SWITCHING FREQUENCY –3 2.5 –2.5 Soft Start Charge Current Maximum Output Voltage 2 1.5 1 0.5 –2 –1.5 –1 –0.5 0 0 1 100 10 –40 1000 Switching Frequency – kHz Figure 9 –20 0 25 50 70 95 TJ - Junction Temperature - °C Figure 10 SWITCHING FREQUENCY vs TIMING RESISTOR 1000 Switching Frequency Ct = 47 pF 100 Ct = 100 pF Ct = 150 pF Ct = 220 pF Ct = 330 pF 10 10 100 Timing Resistor - kΩ Figure 11 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1000 125 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 TYPICAL CHARACTERISTICS timing diagram 1.17 V Typ. Err. Amplifier Output 0.43 V Typ. High Oscillator Output Delay OUTx_u (100 nS Typ.) Delay Low Duty High OUTx_d Low (100 nS Typ.) Detected Over Current Over-Current Protection High Low Current Limit Inductor Current IL = 0 TRIPx Voltage LLx Voltage GND -Vf POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 APPLICATION INFORMATION The design shown in this application report is a reference design for notebook applications. An evaluation module (EVM), TPS5102EVM-135 (SLVP135), is available for customer testing and evaluation. The intent is to allow a customer to fully evaluate the given design using the plug-in EVM supply shown here. For subsequent customer board revisions, the EVM design can be copied onto the users’ PCB to shorten design cycle. The following key design procedures will aid in the design of the notebook power supply using the TPS5102: TP27 C6 R3 R5 SLVP135 EVM Q1 TP26 R17 R4 L1 TP1 TP24 TP2 TP23 D1 C4 J5 TP21 R18 TP8 TP20 R19 TP9 TP19 TP6 TP7 C11 R10 R11 C19 J6 J15 J16 R21 TP10 C1 J7 J8 GND J9 J10 GND J11 TP11 R12 C12 TP12 C13 TP13 J12 TP18 C5 C15 D2 C21 TP14 Q4 TP17 TP15 TP16 D4 R13 C14 C20 Vo1 Vo1 Vo1GND Vo1GND Vin Vin Input GND Input GND Vo2GND Vo2GND Vo2 Vo2 RS2 C3 TP25 R14 J14 RS1 R2 L2 R20 R15 + J13 C23 + JP2 J4 C18 TP5 R9 J3 C22 TP22 TP4 C10 J2 + C9 J1 Q2 C17 TP3 R8 R1 D3 + C7 JP1 C2 + C8 R6 Q3 TP28 R16 C16 Vin Iin Vo1 Io1 Vo2 6 V to 15 V 6 A 3.3 V 4 A 5 V 4 A 3.3 V 2.5 A 5V 2.5 A 16 V to 25 V Io2 output voltage setpoint calculation The output voltage is set by the reference voltage and the voltage divider. In the TPS5102, the reference voltage is 1.185-V, and the divider is composed of two resistors in the EVM design that are R4 and R5, or R14 and R15. The equation for the setpoint is: R2 1 Vr + RVo–Vr Where R1 is the top resistor (kΩ) ( R4 or R15); R2 is the bottom resistor (kΩ) ( R5 or R14); Vo is the required output voltage (V); Vr is the reference voltage (1.185 V in TPS5102). Example: R1 = 1 kΩ; Vr = 1.185 V; Vo = 3.3 V, then R2 = 560 Ω. Some of the most popular output voltage setpoints are calculated in the table below: VO 14 1.3 V 1.5 V 1.8 V 2.5 V 3.3 V 5V R1 (top) (kΩ) 1V 1V 1V 1V 1V 1V R2 (bottom) (kΩ) 10 V 3.7 V 1.9 V 0.9 V 0.56 V 0.31 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 APPLICATION INFORMATION output voltage setpoint calculation (continued) If a higher precision resistor is used, the voltage setup can be more accurate. In some applications, the output voltage is required to be lower than the reference voltage. With a few extra components, the lower voltage can be easily achieved. The drawing below shows the method. VCC VO R(top) Rz1 INV Rz2 TPS5102 R(bottom) Zener In the schematic, the Rz1, the Rz2, and the zener are the extra components. Rz1 is used to give the zener enough current to build up the zener voltage. The zener voltage is added to INV through Rz2. Therefore, the voltage on the INV is still equal to the IC internal voltage (1.185 V) even if the output voltage is regulated at a lower setpoint. The equation for setting up the output voltage is shown below: ( Vz – Vr ) Rz 2 = ( Vr –Vo) Vr Rtop + Rbtm When Rz2 is the adjusting resistor for low output voltage; Vz is the zener voltage; Vr is the internal reference voltage; Rtop is the resistor of the voltage sensing network; Rbtm is the bottom resistor of the sensing network;VO is the required output voltage setpoint. Example: Assuming the required output voltage setpoint is VO = 0.8 V, VZ = 5 V; Rtop = 1 kΩ; Rbottom = 1 kΩ, Then the Rz2 = 2.43 kΩ. output inductor ripple current The output inductor current ripple can affect not only the efficiency, but also the output voltage ripple. The equation is exhibited below: Iripple + Vin * Vout * Iout Lout (Rdson )R ) L D Ts Where Iripple is the peak-to-peak ripple current (A) through the inductor; Vin is the input voltage (V); Vout is the output voltage (V); Iout is the output current; Rdson is the on-time resistance of MOSFET (Ω); D is the duty cycle; and Ts is the switching cycle (S). From the equation, it can be seen that the current ripple can be adjusted by changing the output inductor value. Example: Vin = 5 V; Vout = 1.8 V; Iout = 5 A; Rdson = 10 mΩ; RL = 5 mΩ; D = 0.36; Ts = 10 µS; Lout = 6 µH Then, the ripple Iripple = 2 A. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 APPLICATION INFORMATION output capacitor RMS current Assuming the inductor ripple current totally goes through the output capacitor to ground, the RMS current in the output capacitor can be calculated as: Iorms + ǸD12I Where Io(rms) is the maximum RMS current in the output capacitor (A); ∆I is the peak-to-peak inductor ripple current (A). Example: ∆I = 2 A, so Io(rms) = 0.58 A input capacitor RMS current Assuming the input ripple current totally goes into the input capacitor to the power ground, the RMS current in the input capacitor can be calculated as: Iirms + Ǹ Io 2 D (1–D) ) 121 D Iripple 2 Where Ii(rms) is the input RMS current in the input capacitor (A); Io is the output current (A); Iripple is the peak-to-peak output inductor ripple current; D is the duty cycle. From the equation, it can be seen that the highest input RMS current usually occurs at the lowest input voltage, so it is the worst case design for input capacitor ripple current. Example: Io = 5 A; D = 0.36; Iripple = 2 A, Then, Ii(rms) = 2.42 A soft-start The soft-start timing can be adjusted by selecting the soft-start capacitor value. The equation is C soft +2 T soft Where Csoft is the soft-start capacitance (µF) (C9 or C13 in EVM design); Tsoft is the start-up time (S). Example: Tsoft = 5 mS, so Csoft = 0.01 µF. 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 APPLICATION INFORMATION current protection The current limit in TPS5102 on each channel is set using an internal current source and an external resistor (R18 or R19). The sensed high side MOSFET drain-to-source voltage drop is compared to the set point, if the voltage drop exceeds the limit, the internal oscillator is activated, and it continuously reset the current limit until the over-current condition is removed. The equation below should be used for calculating the external resistor value for current protection setpoint: Rcl + Rds(on) In skip mode, Rcl + Rds(on) ) ń ) ń (Itrip Iind(p-p) 2) 0.000015 (Itrip Iind(p-p) 2) 0.000005 Where Rcl is the external current limit resistor (R10 or R11); Rds(on) is the high side MOSFET (Q1 or Q3) on-time resistance. Itrip is the required current limit; Iind(p-p) is the peak-to-peak output inductor current. Example for voltage mode: Rds(on) = 10 mΩ, Itrip = 5 A, Iind = 2 A, so Rcl = 4 kΩ. loop-gain compensation Voltage mode control is used in this controller for the output voltage regulation. To achieve fast, stabilized control, two parts are discussed in this section: the power stage small signal modeling and the compensation circuit design. For the buck converter, the small signal modeling circuit is shown below: a ZL ∧ d Vap D + ia VO C ∧ Ic d VI L ic D 1 + RL c R ZRC RC p From this equivalent circuit, several control transfer functions can be derived: input-to-output, output impedance, and control-to-output. Typically the control-to-output transfer function is used for the feedback control design. Assuming Rc and RL are much smaller than R, the simplified small signal control-to-output transfer function is: Vod ∧ Vo ∧ d + + 1 ƪ )s C ) sCRc) ǒRc ) RLǓ ) RL ) s LC (1 ƫ 2 Where C is the output capacitance; Rc is the equivalent serial resistance (ESR) in the output capacitor; L is the output inductor; RL is the equivalent serial resistance (DCR) in the output inductor; R is the load resistance. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 TPS5102 DUAL, HIGH-EFFICIENCY CONTROLLER FOR NOTEBOOK PC POWER SLVS239 - SEPTEMBER 1999 APPLICATION INFORMATION loop-gain compensation (continued) To achieve fast transient response and the better output voltage regulation, a compensation circuit is added to improve the feedback control. The whole system is shown: Power Stage PWM Vref Compensation The typical compensation circuit used as an option in the EVM design is a part of the output feedback circuit. The circuitry is displayed below: R1 R2 R4 C3 C1 _ R3 C2 To PWM + Vref This circuit is composed of one integrator, two poles, and two zeros: Assuming R1
TPS5102IDBT 价格&库存

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TPS5102IDBT
  •  国内价格 香港价格
  • 60+59.8167560+7.67270

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TPS5102IDBT
  •  国内价格
  • 1+52.70200
  • 10+38.98490
  • 50+33.41550
  • 100+27.84630

库存:0