TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
D
D
D
D
D
D
D
D
D
D
Step-Down DC-DC Converter
Three Operation-Modes
– Heavy Load:
– Fixed Frequency PWM
– Hysteretic (User Selectable)
– Light Load:
– Skip Mode
4.5-V to 25-V Input Voltage Range
Adjustable Output Voltage Down to 1.2 V
95% Efficiency
Standby Control
Overcurrent Protection
UVLO for Internal 5-V Regulation
Low-Standby Current . . . 0.5 mA Typical
TA = –40°C to 85°C
DB PACKAGE
(TOP VIEW)
SOFTSTART
INV
FB
CT
RT
GND
REF
COMP
PWM/SKIP
STBY
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
LH
OUT_u
LL
OUT_d
OUTGND
TRIP
VCC_SENSE
VCC
VREF5
VREG5V_IN
description
The TPS5103 is a synchronous buck dc/dc controller, designed for notebook PC system power. The controller
has three user-selectable operation modes available: hysteretic mode, fixed-frequency PWM control, or SKIP
control.
In high-current applications, where fast transient response is advantageous for reducing bulk capacitance, the
hysteretic mode is selected by connecting the RT pin to VREF5. Selecting the PWM/SKIP modes for less
demanding transient applications is ideal for conserving notebook battery life under light load conditions. The
device includes high-side and low-side MOSFET drivers capable of driving low rds(on) N-channel MOSFETs.
The user-selectable overcurrent protection (OCP) threshold is set by an external TRIP-pin resistor in order to
protect the system. The TPS5103 is configured so that a current-sense resistor is not required, improving the
operating efficiency.
C4
5V
R1
C1
R2
C2
U1
TPS5103
1
2
3
4
5
6
7
8
9
10
SOFTSTART
LH
INV
OUT_u
FB
LL
CT
OUT_d
RT
OUTGND
GND
TRIP
REF
VCC_SENSE
COMP
VCC
PWM/SKIP
VREF5
STBY
VREG5V_IN
D1
20
19
18
17
16
15
14
13
12
11
Q1
C3
OUTPUT
L1
R3
C5
+
Q2
R4
Figure 1. Typical Design
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
functional block diagram
SOFTSTART
Softstart
_
+
FB
PWM Comp.
_
_
INV
+
LH
OUT_u
+
Error Amp
LL
1.185 V
OUT_d
OUTGND
One Shot ON
PWM/SKIP
_
TRIP
+
CT
RT
OSC
Disable
_
VCC_SENSE
+
_
1.185 V
UVLO
+
VREF5
Comp
GND
VCC
VREF
_
STBY
REF
+
1.185 V
VREG5V_IN
AVAILABLE OPTIONS
TA
–40°C
40°C to 85°C
2
PACKAGE
SSOP(DB)
EVM
TPS5103IDB
TPS5103EVM–136
TPS5103IDBR
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
COMP
8
I
Comparator input for voltage monitor
CT
4
I/O
External capacitor from CT to GND for adjusting the triangle oscillator and decreasing the current-limiting
voltage
FB
3
O
Feedback output of error amp
GND
6
INV
2
I
LH
20
I/O
Bootstrap. Connect a 1 µF, low-ESR capacitor from LH to LL.
LL
18
I/O
Bootstrap low. High-side gate driving return and output-current protection. Connect to the junction of the
high-side and low-side FETs for a floating drive configuration.
OUT_d
17
I/O
Gate-drive output for low-side power switching FETs
OUTGND
16
OUT_u
19
O
Gate-drive output for high-side power switching FETs
PWM/SKIP
9
I
PWM/SKIP mode select
L:PWM mode
H:SKIP mode
REF
7
O
1.185-V reference voltage output
RT
SOFTSTART
5
I/O
External resistor connection for adjusting the triangle oscillator.
1
I
External capacitor from SOFTSTART to GND for soft-start control
STBY
10
I
Standby control
TRIP
15
I
External resistor connection for output-current control
VCC
VCC_SENSE
13
I
Supply-voltage input
14
I
Supply voltage sense for current protection
VREF5
12
O
5-V internal regulator output
VREG5V_IN
11
I
External 5-V input (input voltage range = 4.5 V to 25 V)
Control GND
Inverting input of both error amp and hysteretic comparator
Ground for FET drivers
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• DALLAS, TEXAS 75265
3
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
detailed description
REF
The reference voltage is used for the output voltage setting and the voltage protection(COMP). The tolerance
is 1.5% typically.
VREF5
An internal linear voltage regulator is used for the high-side driver bootstrap voltage. Since the input voltage
range is from 4.5 V to 25 V, this voltage offers a fixed voltage for the bootstrap voltage so that the design for
the bootstrap is much easier. The tolerance is 6%.
hysteretic comparator
The hysteretic comparator is used to regulate the output voltage of the synchronous-buck converter. The
hysteresis is set internally and is typically 9.7 mV. The total delay time from the comparator input to the driver
output is typically 400 ns for going both high and low.
error amplifier
The error amplifier is used to sense the output voltage of the synchronous buck converter. The negative input
of the error amplifier is connected to the VREF (1.185 V) with a resistive divider network. The output of the error
amplifier is brought out to the FB terminal to be used for loop-gain compensation.
low-side driver
The low-side driver is designed to drive low-rds(on) n-channel MOSFETs. The maximum drive voltage is 5 V from
VREF5. The current rating of the driver is typically 1.2 A at sink current, and –1.5 A at source current.
high-side driver
The high-side driver is designed to drive low-rds(on) n-channel MOSFETs. The current rating of the driver is 1.2 A
at sink current, and –1.7 A at source current. When configured as a floating driver, the bias voltage to the driver
is developed from VREF5, limiting the maximum drive voltage between OUT_u and LL to 5 V. The maximum
voltage that can be applied between LH and OUTGND is 30 V.
driver deadtime control
The deadtime control prevents shoot-through current from flowing through the main power FETs. During
switching transitions the deadtime control actively controls the turnon time of the MOSFET drivers. The typical
deadtime from the low-side-driver-off to the high-side-driver-on is 90 ns, and 110 ns from high-side-driver-off
to low-side-driver-on.
COMP
COMP is designed for use with a regulation-output monitor. COMP also functions as an internal comparator
used for any voltage protection such as the input under voltage protection. If the input voltage is lower than the
setpoint, the comparator turns off and prevents external parts from being damaged. The investing terminal of
the comparator is internally connected to REF (1.185 V).
current protection
Current protection is achieved by sensing the high-side power MOSFET drain-to-source voltage drop during
on-time through VCC_SENSE and LL terminals. An external resistor between VREG5V_IN and TRIP, with the
an internal current source connected to the current comparator negative input, adjusts the current limit. The
typical internal current source value is 15 µA in PWM mode, and 5 µA in SKIP mode. When the voltage on the
positive terminal is lower than the negative terminal, the current comparator turns on the trigger, and then
activates the oscillator. This oscillator repeatedly resets the trigger until the overcurrent condition is removed.
The capacitor on the CT terminal can be open or added to adjust the reset frequency.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
detailed description (continued)
softstart
SOFTSTART sets the sequencing of the output for any possibility. The capacitor value for a start-up time can
be calculated by the following equation:
C = 2 x T (µF)
Where C is the external capacitor value, and T is the required start-up time in (ms).
standby
The controller can be switched into the standby mode by grounding the STBY terminal. When it is in standby
mode, the quiescent current is less than 1.0 µA.
UVLO
The under-voltage lockout (ULVO) threshold is approximately 3.8 V. The typical hysteresis is 55 mV.
5-V switch
If the internal 5-V switch senses a 5-V input from REG5V, the internal 5-V linear regulator will be disconnected
from the MOSFET drivers. The external 5 V will be used for both the low-side driver and the high-side bootstrap,
thus, increasing the efficiency.
PWM/SKIP switch
The PWM/SKIP switch selects the output operating mode. This controller has three operational modes, PWM,
SKIP, and hysteretic. The PWM and SKIP mode control should be used for slower-transient applications.
oscillator
The oscillator gives a triangle wave by connecting an external resistor to RT and an external capacitor to CT.
The voltage amplitude is 0.43 V ~ 1.17 V. This wave is connected to the noninverting input of the PWM
comparator.
Table 1. Comparison Table Between PWM Mode and Hysteretic Mode
MODE
PWM
HYSTERETIC
Frequency
Fixed
Not fixed
Transient response
Normal
Very fast
Feed back compensation
Need
Needless
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• DALLAS, TEXAS 75265
5
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 27 V
Input voltage, VI, INV, CT, RT, PWM/SKIP, SOFTSTART, COMP . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
Input voltage, VREG5V_IN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
Input voltage, STBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 15 V
Input voltage, TRIP, VCC_SENSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 27 V
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A
Low-level output voltage, VOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 27 V
High-level output voltage, VOH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 32 V
Reference voltage, Vref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 3 V
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. See Dissipation Rating Table for free-air temperature range above 25°C.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 85°C
POWER RATING
DB
801 mW
6.408mW/°C
416 mW
recommended operating conditions
MIN
VCC
Supply voltage
NOM
4.5
25
INV, CT, RT, COMP, PWM/SKIP, SOFTSTART
VI
Input voltage
C(T)
5.5
STBY
12
f
TA
6
Timing capacitor
Frequency
V
82
kΩ
100
pF
200
Operating temperature range
– 40
POST OFFICE BOX 655303
V
25
Timing register
Oscillator frequency
UNIT
6
VREG5V_IN
TRIP, VCC_SENSE
R(T)
MAX
• DALLAS, TEXAS 75265
kHz
85
°C
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
electrical characteristics over recommended operating free-air temperature range, VCC = 7 V
(unless otherwise noted)
reference voltage
PARAMETER
Vreff
Reference voltage
Regin†
Regl†
Line regulation
Load regulation
† Not a JEDEC symbol.
TEST CONDITIONS
TA = 25°C,
Ivref = 50 µA
Ivref = 50 µA
VCC = 4.5 V to 25 V,
I = 1 µA to 1 mA
I = 50 µA
MIN
TYP
MAX
1.167
1.185
1.203
1.155
1.215
UNIT
V
0.2
12
mV
0.5
10
mV
TYP
MAX
UNIT
500
kHz
oscillator
PARAMETER
f
Frequency
R(T)
fdv†
Timing resistor
fdt†
TEST CONDITIONS
MIN
PWM mode
47
Frequency change
VOH
High level output voltage‡
High-level
VOL
Low level output voltage‡
Low-level
VCC = 4.5 V to 25 V
TA = – 40°C to 85°C
kΩ
0.1%
2%
DC includes internal comparator error
1
f = 200 kHz, includes internal comparator error
DC includes internal comparator error
1.1
1.2
1.17
0.4
f = 200 kHz, includes internal comparator error
0.5
0.6
0.43
V
V
† Not a JEDEC symbol.
‡ The output voltages of oscillator (f = 200 kHz) are ensured by design.
error amp
PARAMETER
VIO
Av†
Input offset voltage
GB†
Unity-gain bandwidth
IO
IS
Output sink current
TEST CONDITIONS
MIN
TA = 25°C
Open-loop voltage gain
TYP
MAX
2
10
50
VO = 0.4 V
VO = 1 V
Output source current
30
UNIT
mV
dB
0.8
MHz
45
µA
300
µA
† Not a JEDEC symbol.
hysteresis comparator§
PARAMETER
TEST CONDITIONS
Hysteretic mode
MIN
TYP
MAX
6
9.7
13
UNIT
Vhys
Vp-VS
Hysteresis window
I
Bias current
tPHL
tPLH
Propagation delay from INV to OUT_U
TTL input signal
Propagation delay time, low-to-high
10-mV overdrive on hysteresis band signal
400
ns
Offset voltage
mV
2
mV
10
pA
230
ns
§ The numbers in the table include the driver delay. All numbers are ensured by design.
control
PARAMETER
VIHA
High level input voltage
High-level
VILA
Low level input voltage
Low-level
TEST CONDITIONS
STBY
PWM/SKIP
POST OFFICE BOX 655303
MIN
TYP
MAX
2.5
V
2
STBY
0.5
PWM/SKIP
0.5
• DALLAS, TEXAS 75265
UNIT
V
7
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
electrical characteristics over recommended operating free-air temperature range, VCC = 7 V
(unless otherwise noted) (continued)
5-V regulator
PARAMETER
TEST CONDITIONS
VO
Regin†
Output voltage
I = 10 mA
Line regulation
Regl†
Load regulation
VCC = 5.5 V to 25 V,
I = 1 mA to 10 mA,
IOS
Short-circuit output current
† Not a JEDEC symbol.
MIN
TYP
4.7
MAX
UNIT
5.3
V
I = 10 mA
20
mV
VCC = 5.5 V
40
mV
Vref = 0 V
70
mA
5-V switch
PARAMETER
VIT(high)
VIT(low)
Threshold voltage
Vhys
Hysteresis
TEST CONDITIONS
MIN
TYP
MAX
4.2
4.9
4.1
4.8
UNIT
V
50
150
250
mV
MIN
TYP
MAX
UNIT
UVLO
PARAMETER
VIT(high)
VIT(low)
Threshold voltage
Vhys
Hysteresis
TEST CONDITIONS
3.6
4.2
3.5
4.1
10
150
mV
MAX
UNIT
V
output
PARAMETER
IO
IS
OUT_u sink current
IO
IS
OUT_d sink current
I
OUT_u source current
OUT_d source current
TRIP terminal current
MIN
TYP
VO = 3 V
VO = 2 V
TEST CONDITIONS
0.5
1.2
A
–1
–1.7
A
VO = 3 V
VO = 2 V
0.5
1.2
A
–1
–1.5
10
15
20
3
5
7
PWM mode,
SKIP mode,
V(TRIP) = 7 V
V(TRIP) = 7 V
A
µA
High-side driver is GND referenced.
Input: INV = 0 – 3V
tr
Rise time
tr/tf = 10 ns,
CL = 2200 pF
ns
Frequency = 200 kHz
28
CL = 3300 pF
39
High-side driver is GND referenced.
Input: INV = 0 – 3 V
tf
Fall time
tr/tf = 10 ns,
CL = 2200 pF
CL = 3300 pF
8
POST OFFICE BOX 655303
ns
Frequency = 200 kHz
• DALLAS, TEXAS 75265
30
38
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
electrical characteristics over recommended operating free-air temperature range, VCC = 7 V
(unless otherwise noted) (continued)
softstart
PARAMETER
I(CTRL)
VIT(high)
Softstart current
VIT(low)
Threshold voltage (SKIP mode)
TEST CONDITIONS
MIN
TYP
MAX
1.9
2.5
3
3.9
UNIT
µA
V
2.6
output voltage monitor
PARAMETER
VIT
TEST CONDITIONS
Threshold voltage
MIN
TYP
MAX
UNIT
1.08
1.18
1.28
V
MIN
TYP
MAX
UNIT
driver deadtime section
PARAMETER
T(DRVLH)
T(DRVHL)
TEST CONDITIONS
Low side to high side
90
ns
High side to low side
110
ns
whole device
PARAMETER
ICC
IO(sd)
TEST CONDITIONS
MIN
Supply current
Shutdown current
STBY = 0 V
SOFTSTART
0.1 µF
OUT_u
FB
LL
CT
OUT_d
RT
OUTGND
GND
TRIP
REF
VCC_SENSE
PWM/SKIP
STBY
MAX
UNIT
0.5
1.2
mA
0.01
10
µA
LH
INV
COMP
TYP
VCC
VREF5
0.1 µF
7V
VREG5V_IN
5V
Figure 2. Test Circuit
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
QUIESCENT CURRENT
vs
JUNCTION TEMPERATURE
QUIESCENT CURRENT
vs
JUNCTION TEMPERATURE
700
50
45
600
VCC = 25 V
550
VCC = 7 V
500
VCC = 4.5 V
450
400
I CC– Quiescent Current – µ A
I CC – Quiescent Current – µ A
650
VCC = 25 V
40
35
VCC = 7 V
30
25
VCC = 4.5 V
20
15
10
350
5
300
–40
85
–20
25
TJ – Junction Temperature – °C
0
125
–40
–20
Figure 3
125
DRIVE OUTPUT VOLTAGE
vs
DRIVE SOURCE CURRENT
5.5
3
VCC = 7 V,
TJ = 25°C
VO(OUT_u)– Drive Output Voltage – V
VO(OUT_u)– Drive Output Voltage – V
85
Figure 4
DRIVE OUTPUT VOLTAGE
vs
DRIVE SOURCE CURRENT
5
4.5
4
3.5
3
1
0.7
IS(OUT_source) – Drive Source Current – A
0.1
VCC = 7 V,
TJ = 25°C
2.5
2
1.5
1
0.5
0
1
0.1
0.7
IS(OUT_sink) – Drive Source Current – A
Figure 5
10
25
TJ – Junction Temperature – °C
Figure 6
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• DALLAS, TEXAS 75265
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
DRIVE OUTPUT VOLTAGE
vs
DRIVE SOURCE CURRENT
DRIVE OUTPUT VOLTAGE
vs
DRIVE SOURCE CURRENT
4.5
6
TJ = 25°C
VO(OUT_d)– Drive Output Voltage – V
VO(OUT_d)– Drive Output Voltage – V
TJ = 25°C
5
4
3
2
1
4
3.5
3
2.5
2
1.5
1
0.5
0
0
1
0.1
0.7
IS(OUT_sink) – Drive Source Current – A
1
0.7
IS(OUT_source) – Drive Source Current – A
0.1
Figure 7
Figure 8
OSCILLATOR OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
OSCILLATOR OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
500
VO(osch) – Oscillator Output Voltage – V
VO(osch) – Oscillator Output Voltage – V
1.125
1.115
1.105
1.095
VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V
1.085
495
490
VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V
485
480
1.075
–40
–20
25
85
125
TJ – Junction Temperature – °C
–40
Figure 9
85
125
–20
25
TJ – Junction Temperature – °C
Figure 10
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• DALLAS, TEXAS 75265
11
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
ERROR AMPLIFIER INPUT OFFSET VOLTAGE
vs
JUNCTION TEMPERATURE
ERROR AMPLIFIER OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
2.5
VO – Error Amplifier Output Voltage – mV
VIO – Error Amplifier Input Offset Voltage – mV
2.5
2
1.5
VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V
1
0.5
2
1.5
1
0.5
0
–40
VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V
0
85
125
–20
25
TJ – Junction Temperature – °C
–40
85
125
–20
25
TJ – Junction Temperature – °C
Figure 12
ERROR AMPLIFIER OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
VO – Error Amplifier Output Voltage – mV
6.2
6
5.8
VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V
5.6
5.4
5.2
5
4.8
4.6
4.4
–40
–20
25
85
125
TJ – Junction Temperature – °C
Vhys– Hysteresis Comparator Hysteresis Voltage – mV
Figure 11
HYSTERESIS COMPARATOR HYSTERESIS VOLTAGE
vs
JUNCTION TEMPERATURE
10.5
VCC = 7 V
10.25
10
9.75
9.5
9.25
9
–40
Figure 13
12
–20
25
85
125
TJ – Junction Temperature – °C
Figure 14
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
VREF5 OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
2.5
5.2
VCC = 4.5 V,
VCC = 7 V
2
VCC = 25 V
1.5
VCC = 25 V
1
VCC = 4.5 V
VCC = 7 V
0.5
TJ = –40°C
5.1
VO – VREF5 Output Voltage – V
VIH,VIL – Standby Switch Threshold Voltage – V
STANDBY SWITCH THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
5
TJ = 125°C
4.9
TJ = 25°C
4.8
4.7
4.6
4.5
4.4
4.3
0
95
–25
25
TJ – Junction Temperature – °C
–45
4.2
135
20
10
VCC – Supply Voltage – V
0
Figure 15
Figure 16
VREF5 OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VREF5 SHORT CURRENT
vs
JUNCTION TEMPERATURE
6
–100
TJ = 125°C
VCC = 25 V
I OS– VREF5 Short Current – mA
VO – VREF5 Output Voltage – V
5
TJ = 25°C
4
3
TJ = –40°C
2
1
0
0
–10
–20 –30
–40 –50
IO – Output Current – mA
–60
–70
–80
–60
VCC = 4.5 V
VCC = 7 V
–40
–20
0
–40
Figure 17
–20
25
85
TJ – Junction Temperature – °C
125
Figure 18
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
UVLO HYSTERESIS VOLTAGE
vs
JUNCTION TEMPERATURE
UVLO THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
80
Vhys– UVLO Hysteresis Voltage – mV
VTHL,VTLH – UVOL Threshold Voltage – V
4
3.95
VTLH
3.90
3.85
VTHL
3.80
3.75
70
60
50
40
30
20
10
0
3.70
–40
85
–20
25
TJ – Junction Temperature – °C
–40
125
Figure 19
5 VSW HYSTERESIS VOLTAGE
vs
JUNCTION TEMPERATURE
200
4.75
180
Vhys – 5 VSW Hysteresis Voltage – mV
VTHL,VTLH – 5 VSW Threshold Voltage – V
4.80
VTLH
4.65
4.60
VTHL
4.55
4.50
4.45
4.40
160
140
120
100
80
60
40
20
0
4.35
–45
95
–25
25
TJ – Junction Temperature – °C
135
–45
Figure 21
14
125
Figure 20
5 VSW THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
4.70
85
–20
25
TJ – Junction Temperature – °C
–25
25
95
TJ – Junction Temperature – °C
Figure 22
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
SOFTSTART THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
SOFTSTART CURRENT
vs
JUNCTION TEMPERATURE
4.5
VTLH – Softstart Threshold Voltage – V
I CTRL – Softstart Current – µ A
–2.45
–2.40
–2.35
VCC = 4.5 V
VCC = 7 V
–2.30
VCC = 25 V
–2.25
4
3.5
3
2.5
VCC = 7 V,
VCC = 25 V
2
1.5
1
0.5
0
–2.20
–40
85
–20
25
TJ – Junction Temperature – °C
–40
125
Figure 23
–20
25
85
125
TJ – Junction Temperature – °C
Figure 24
OUTPUT VOLTAGE MONITOR COMPARATOR
THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
SOFTSTART THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
3.5
1.195
VTH– Output Voltage Monitor Comparator
Threshold Voltage – V
VTHL – Softstart Threshold Voltage – V
VCC = 4.5 V
3
VCC = 7 V,
VCC = 25 V
2.5
2
VCC = 4.5 V
1.5
1
–40
–20
25
85
TJ – Junction Temperature – °C
125
1.193
1.190
1.188
VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V
1.185
1.183
1.180
–40
85
–20
25
TJ – Junction Temperature – °C
125
Figure 26
Figure 25
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
OSCILLATOR FREQUENCY
vs
JUNCTION TEMPERATURE
OSCILLATOR OUTPUT VOLTAGE
vs
FREQUENCY
600
VOSCH,VOSCL– Oscillator Output Voltahe – V
1.6
f osc– Oscillator Frequency – kHz
f = 500 kHz
500
VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V
400
VCC = 4.5 V,
VCC = 7 V,
VCC = 25 V
300
200
f = 200 kHz
100
0
–40
85
–20
25
TJ – Junction Temperature – °C
125
1.4
VOSCH
1.2
1
0.8
0.6
VOSCL
0.4
0.2
0
10
100
fOSC – Frequency – kHz
Figure 27
Figure 28
ERROR AMPLIFIER GAIN AND PHASE SHIFT
180
60
Rs = 100 Ω,
Rf = 10 kΩ
50
Phase
40
100
30
Gain
20
60
10
20
0
–20
–10
–20
1k
10 k
100 k
1M
f – Frequency – Hz
Figure 29
16
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–60
10 M
Phase Shift – Deg
Error Amplifier Gain – dB
140
1000
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
MAXIMUM DUTY CYCLE
vs
JUNCTION TEMPERATURE
SOFTSTART CAPACITANCE
vs
SOFTSTART TIME
100
104
f = 200 kHz
C SS – Softstart Capacitance – pF
99.5
Maximum Duty Cycle – %
99
98.5
98
97.5
97
96.5
96
103
102
95.5
95
100
0.01
85
125
–20
25
TJ – Junction Temperature – °C
–40
0.1
1
10
TSS – Soft Start Time – ms
Figure 30
Figure 31
DRIVER DEAD TIME
vs
JUNCTION TEMPERATURE
CURRENT PROTECTION SOURCE CURRENT
vs
INPUT VOLTAGE PWM MODE
VCC = 4.5 V
120
100
TDRVLH
80
60
VCC = 7 V,
VCC = 25 V
VCC = 4.5 V
VCC = 7 V,
VCC = 25 V
40
20
0
–45
95
–25
25
TJ – Junction Temperature – °C
135
I TRIP – Current Protection Source Current – µ A
T DRVLH,TDRVHL– Driver Dead Time – ns
140
TDRVHL
100
14.5
14.25
TA = 125°C
14
13.75
TA = 25°C
13.5
13.25
TA = –40°C
13
12.75
12.5
25
4.5
7
VI(TRIP) – Input Voltage PWM Mode – V
Figure 32
Figure 33
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
CURRENT PROTECTION SOURCE CURRENT
vs
INPUT VOLTAGE SKIP MODE
I TRIP – Current Protection Source Current – µ A
4.6
TA = 125°C
4.5
4.4
TA = 25°C
4.3
4.2
TA = –40°C
4.1
4
4.5
7
25
VI(TRIP) – Input Voltage Skip Mode – V
Figure 34
OSCILLATOR FREQUENCY
vs
RESISTOR
700
f osc– Oscillator Frequency – kHz
CT = 10 pF
600
CT = 15 pF
500
CT = 22 pF
400
CT = 33 pF
300
200
CT = 470 pF
CT = 680 pF
100
0
10
100
R(T) – Resistor – kΩ
Figure 35
18
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
APPLICATION INFORMATION
overshoot of output rectangle wave
The drivers in the TPS5103 controller are fast and can produce high transients on VCC or the junction of Q1 and
Q2 (shown below). Care must be taken to insure that these transients do not exceed the absolute maximum
rating for the device or associated external component. A low-ESR capacitor connected directly from Q1 drain
to Q2 source can greatly reduce transient pulses on VCC. Also, Q1 turnon speed can be reduced by adding a
resistor (5 – 15 Ω) in series with OUT_u. Poor layout of the switching node (V1 in Figure 36) can result in the
requirement for additional snubber circuitry required from V1 to ground.
VCC
OUT_u
Q1
C1
V1
Q2
Figure 36. Output Rectangle Wave
The high-current Schottky diode (D1) can be removed provided an alternate way of preventing negative
voltages on LL (≥0.5 V) is used (refer to Figure 38).
Rg
OUT_u
Q1
LL
Q2
D1
Figure 37. High-Current Schottky Diode
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
APPLICATION INFORMATION
Resistor (Rg) is moved from the gate of the top FET and placed in series with LL. This allows for a smaller
Schottky diode (DX) to be used.
OUT_u
Q1
Rg
LL
DX
Q2
Figure 38. High-Current Schottky Diode Removed
application for general power
The design shown in this data sheet is a reference design for a general power supply application. An evaluation
module (EVM), TPS5103EVM-136 (SLVP136), is available for customer testing and evaluation. The intent is
to allow a customer to fully evaluate the given design using the plug-in EVM supply shown here. For subsequent
customer board revisions, the EVM design can be copied onto the users PCB to shorten design cycle time,
component count, and board cost.
To help the customers design the power supply using the TPS5103, some key design procedures are shown
in Figure 39.
R3
J1
C15
TP18
Q1
C5
TP2
R6B
C8
TP3
TP4
TP5
TP6
R6A
TP7
R7
C9
TP9
C2
SOFTSTART LH
C10
TP15
LL
CT
OUT_d
RT
OUTGND
D1
TP14
J8
R12
TP13
GND
470 µF
J11
TRIP
C12
J13
REF VCC_SENSE
TP12
C11
VCC
TP11
C13
PWM/SKIPVREF5
STBYVREG5V_IN
R9
Figure 39. EVM Schematic
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J14
VI
Input GND
Input GND
Input GND
SENSE
VO
VO
J9
J10
NOTE: VI = 4. V to 10 V
VO = 1.8 V @ 4 A
20
+
C3
R13
R10
J7
Q2
OUT_u
FB
J6
6.8 µH
TP16
INV
TP8
TP10
JP2
J5
L1
TP17
COMP
JP1
J4
D2
TP1
C6
J3
R11
R5
C7
C14
+ C1
TP26
R1
R4
VI
J2
J12
VO
VOGND
VOGND
VOGND
TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
APPLICATION INFORMATION
output voltage setpoint calculation
The output voltage is set by the reference voltage and the voltage divider. In the TPS5102, the reference voltage
is 1.185 V, and the divider is composed of two resistors in the EVM design that are R4 and R5, or R14 and R15.
The equation for the setpoint is shown below.
R2
+ VR1 * VVref
O
ref
Where R1 (> 10 kΩ) is the top resistor R2 is the bottom resistor (kΩ), VO is the required output voltage, and Vref
is the reference voltage (1.185 V in TPS5103).
Example: R1 = 1 kΩ; Vref = 1.185 V; VO = 1.8 V, then R2 = 1.9 kΩ.
Some of the most popular output voltage setpoints are calculated in Table 2.
Table 2. Output Voltage Setpoints
VO
R1 (kΩ)
1.3 V
1.5 V
1.8 V
2.5 V
3.3 V
5.0 V
10
10
10
10
10
10
R2 (kΩ)
100
37
19
9
5.6
3.1
If higher precision resistor is used, the output voltage setpoint can be more accurate.
In some applications, the output voltage is required to be lower than the reference voltage. With a few extra
components, this lower voltage can be easily achieved. Figure 40 shows the method for accomplishing this.
VCC
VO
R1
Rz1
INV
Rz2
TPS5103
Zener
R2
Figure 40. Application With Extra Components for Lower Output Voltage
In the schematic, Rz1, Rz2, and the Zener are the extra components. Rz1 is used to give the Zener enough
current to build up the Zener voltage. The Zener voltage is added to INV through Rz2. Therefore, the voltage
on INV is still equal to the IC internal voltage (1.185 V), even if the output voltage is regulated at a lower setpoint.
The equation for setting up the output voltage is shown below:
R z2
+ ǒV
ǒ
V
(z)
–V
Ǔ)
Ǔ
ref
V
–V
ref O
ref
R1
R2
Where Rz2 is the adjusting resistor for low-output voltage, V(z) is the Zener voltage, Vref is the internal reference
voltage, R1 is the top resistor of the voltage sensing network, R2 is the bottom resistor of the sensing network,
and VO is the required output voltage setpoint.
Example: Assuming the required output voltage setpoint is VO = 0.8 V, V(z) = 5 V, R1 = 1 kΩ; R2 = 1 kΩ, then
the Rz2 = 2.43 kΩ.
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
APPLICATION INFORMATION
switching frequency
With hysteretic control, the switching frequency is a function of the following:
D
D
D
D
D
D
D
D
D
D
input voltage
output voltage
hysteresis window
delay of the hysteresis comparator and the driver
output inductance
resistance in the output inductor
output capacitance
ESR and ESL in the output capacitor
output current
turnon resistance of the high-side and the low-side MOSFET
This is a very complex equation if everything is included. To make it more useful to the designers, a simplified
equation only considers the most influential factors. The tolerance of this equation is about 30%.
ƒs
+V
*
*
) ń
*
(V
V ) (ESR (10 10 *7 Td) C )
I
O
O
O
*
7
(V
ESR (10 10
Td) 0.0097 L
ESL
I
(O)
V
I
) )
V)
I
Where fs is the switching frequency (Hz), VO is the output voltage, VI is the input voltage, CO is the output
capacitance, ESR is the equivalent series resistance in the output capacitor (Ω), ESL is the equivalent series
inductance in the output capacitor (H), L(O) is the output inductance (H), and Td is the output feedback RC filter
time constant (s).
For example: VI = 5 V, VO = 1.8 V, CO = 680 µF; ESR = 40 mΩ; ESL = 3 nH; L(O) = 6 µH; Td = 0.5 µs.
Then, the frequency (fs) = 122 kHz.
output inductor ripple current
The output inductor current ripple can affect not only the efficiency and the inductor saturation, but also the
output voltage capacitor selection. The equation is exhibited as below:
I
(ripple)
+
V
I
ǒ
Ǔ
* VO * IO rds(on) ) RL
L
D
Ts
O
Where I(ripple) is the peak-to-peak ripple current (A) through inductor; VI is the input voltage, VO is the output
voltage, IO is the output current, rds(on) is the on-time resistance of MOSFET (Ω), D is the duty cycle, and Ts
is the switching cycle (S). From the equation, it can be seen that the current ripple can be adjusted by changing
the output inductor value.
Example: VI = 5 V, VO = 1.8 V, IO = 5 A, rds(on) = 10 mΩ, RL = 5 mΩ, D = 0.36, Ts = 10 µs, L(O) = 6 µH
Then, the I(ripple) = 2 A.
output capacitor RMS current
Assuming the inductor ripple current totally goes through the output capacitor to the ground, the RMS current
in the output capacitor can be calculated as:
DI
I
O(rms)
12
+Ǹ
22
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
APPLICATION INFORMATION
output capacitor RMS current
Where IO(rms) is the maximum RMS current in the output capacitor (A), and ∆I is the peak-to-peak inductor ripple
current (A).
Example: ∆I = 2 A, so IO(rms) = 0.58 A
input capacitor RMS current
Assuming the input ripple current totally goes into the input capacitor to the power ground, the RMS current in
the input capacitor can be calculated as:
I
I(rms)
+
Ǹ
I o2
D
(1
* D) ) 121
Iripple 2
D
Where II(rms) is the input RMS current in the input capacitor (A), IO is the output current (A), and D is the duty
cycle. From the equation, it can be seen that the highest input RMS current usually occurs at the lowest input
voltage, so it is the worst case design for the input capacitor ripple current.
Example: IO = 5 A; D = 0.36
Then, II(rms)= 3.36 A
softstart
The softstart timing can be adjusted by selecting the soft-start capacitor value. The equation is shown below.
C
(soft)
+2
T
(soft)
Where C(soft) is the softstart capacitance (µF), T(soft) is the start-up time on the softstart terminal (s).
Example: T(soft) = 5 ms, so, C(soft) = 0.01 µF.
current protection
The current protection in the TPS5103 is set using an internal current source and an external resistor to set up
the current limit. The sensed, high-side MOSFET drain-to-source voltage drop is compared to the set point, if
the voltage drop exceeds the limit, the internal oscillator is activated, and continuously resets the current limit
until the over-current condition is removed. The equation below should be used for calculating the external
resistor value for current protection:
Rcl
+
r
PWM or HYS mode
Rcl
+
r
SKIP mode
ǒ
ds(on)
I
)
ń
Ǔ
Iind(p-p) 2
(trip)
0.000015
ds(on)
I
)
ń
Iind(p-p) 2
(trip)
0.000005
Where, Rcl is the external current limit resistor (R10, R11), rds(on) is the high side MOSFET on-time resistance,
I(trip) is the required current limit, and Iind(p-p) is the peak-to-peak output inductor current.
Example: PWM mode or HYS mode
rds(on) = 10 mΩ, I(trip) = 5 A, Iind(p-p) = 2 A, so Rcl = 4 kΩ
Example: SKIP mode
rds(on) = 10 mΩ, I(trip) = 2 A, Iind(p-p) = 1 A, so Rcl = 5 kΩ
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
APPLICATION INFORMATION
loop-gain compensation
Voltage mode control is used in this controller for the output voltage regulation. To achieve fast, stabilized
control, two parts are discussed in this section: the power stage small signal modeling and the compensation
circuit design.
For the buck converter, the small-signal modeling circuit is shown in Figure 41.
a
ZL
∧
d
Vap
D
+
–
ia
VO
C
∧
Ic d
VI
L
ic
D
1
+
RL
c
R
ZRC
RC
p
Figure 41. Small-Signal Modeling Circuit
From this equivalent circuit, several control transfer functions can be derived: input-to-output, output
impedance, and control-to-output. Typically, the control-to-output transfer function is used for the feedback
control design.
Assuming RC and RL are much smaller than R, the simplified small signal control-to-output transfer function
equation is shown below.
∧
Vod
∧
d
+
1
ƪ ǒ
)s C
) sCRc)
Rc ) R ) L ) s 2LC
L
R
(1
Ǔ ƫ
Where C is the output capacitance, Rc is the equivalent serial resistance (ESR) in the output capacitor, L is the
output inductor, RL is the equivalent serial resistance (ESR) in the output inductor, and R is the load resistance.
To achieve the fast transient response and the better output voltage regulation, a compensation circuit is added
to improve the feedback control. The whole system is shown in Figure 42.
Vref
Power
Stage
PWM
Compensation
Figure 42. Loop-Gain Compensation
The typical compensation circuit used as an option in the EVM design is a part of the output feedback circuit.
The circuitry is shown in Figure 43.
24
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
APPLICATION INFORMATION
loop-gain compensation (continued)
R1
R2
R4
C3
C1
_
R3
C2
To PWM
+
Vref
Figure 43. Typical Compensation Circuit
This circuit is composed of one integrator, two poles, and two zeros.
Assuming R1
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