TPS54226EVM-539

www.ti.com Table of Contents User’s Guide TPS54226 Step-Down Converter Evaluation Module User's Guide Table of Contents 1 Introduction.............................................................................................................................................................................2 1.1 Background........................................................................................................................................................................ 2 1.2 Performance Specification Summary.................................................................................................................................2 1.3 Modifications...................................................................................................................................................................... 2 2 Test Setup and Results.......................................................................................................................................................... 3 2.1 Input/Output Connections.................................................................................................................................................. 3 2.2 Start-Up Procedure............................................................................................................................................................ 4 2.3 Efficiency............................................................................................................................................................................4 2.4 Load Regulation................................................................................................................................................................. 5 2.5 Line Regulation.................................................................................................................................................................. 5 2.6 Load Transient Response.................................................................................................................................................. 6 2.7 Output Voltage Ripple........................................................................................................................................................ 6 2.8 Input Voltage Ripple........................................................................................................................................................... 7 2.9 Start-Up..............................................................................................................................................................................7 2.10 Switching Frequency........................................................................................................................................................8 3 Board Layout...........................................................................................................................................................................9 3.1 Layout................................................................................................................................................................................ 9 4 Schematic, Bill of Materials, and Reference...................................................................................................................... 13 4.1 Schematic........................................................................................................................................................................ 13 4.2 Bill of Materials.................................................................................................................................................................14 4.3 Reference.........................................................................................................................................................................14 5 Revision History................................................................................................................................................................... 14 List of Figures Figure 2-1. TPS54226EVM-539 Efficiency.................................................................................................................................. 4 Figure 2-2. TPS54226EVM-539 Load Regulation....................................................................................................................... 5 Figure 2-3. TPS54226EVM-539 Line Regulation........................................................................................................................ 5 Figure 2-4. TPS54226EVM-539 Load Transient Response........................................................................................................ 6 Figure 2-5. TPS54226EVM-539 Output Voltage Ripple.............................................................................................................. 6 Figure 2-6. TPS54226EVM-539 Input Voltage Ripple................................................................................................................. 7 Figure 2-7. TPS54226EVM-539 Start-Up.................................................................................................................................... 7 Figure 2-8. TPS54226EVM-539 Switching Frequency................................................................................................................ 8 Figure 3-1. Top Assembly............................................................................................................................................................ 9 Figure 3-2. Top Layer.................................................................................................................................................................10 Figure 3-3. Internal Layer 1....................................................................................................................................................... 10 Figure 3-4. Internal Layer 2........................................................................................................................................................11 Figure 3-5. Bottom Layer........................................................................................................................................................... 11 Figure 3-6. Bottom Assembly.................................................................................................................................................... 12 Figure 4-1. TPS54226EVM-539 Schematic Diagram................................................................................................................ 13 List of Tables Table 1-1. Input Voltage and Output Current Summary...............................................................................................................2 Table 1-2. TPS54226 EVM and Performance Specifications Summary...................................................................................... 2 Table 1-3. Output Voltages.......................................................................................................................................................... 3 Table 2-1. Connection and Test Points........................................................................................................................................ 4 Table 4-1. Bill of Materials..........................................................................................................................................................14 Trademarks D-CAP2™ is a trademark of Texas Instruments. SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 TPS54226 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated 1 Introduction www.ti.com All trademarks are the property of their respective owners. 1 Introduction This user’s guide contains background information for the TPS54226 as well as support documentation for the TPS54226EVM-539 evaluation module. Also included are the performance specifications, schematic, and the bill of materials for the TPS54226EVM-539. 1.1 Background The TPS54226 is a single, adaptive on-time D-CAP2™ mode synchronous buck converter requiring a very low external component count. The D-CAP2 control circuit is optimized for low-ESR output capacitors such as POSCAP, SP-CAP, or ceramic types and features fast transient response with no external compensation. The switching frequency is internally set at a nominal 700 kHz. The high-side and low-side switching MOSFETs are incorporated inside the TPS54226 package along with the gate drive circuitry. The low drain-to-source on resistance of the MOSFETs allow the TPS54226 to achieve high efficiencies and helps keep the junction temperature low at high output currents. The TPS54226 also has an auto-skip mode to enable higher efficiency at light loads. The TPS54226 DC/DC synchronous converter is designed to provide up to a 2-A output from an input control voltage source of 4.5 V to 18 V and an input power voltage source of 2 V to 18 V. The output voltage range is from 0.76-V to 5.5-V voltage. The output current range for the evaluation module are given in Table 1-1. Table 1-1. Input Voltage and Output Current Summary EVM INPUT VOLTAGE RANGE OUTPUT VOLTAGE AND CURRENT RANGE TPS54226EVM-539 VIN = 4.5 V to 18 V VOUT = 1.05 V, 0 A to 2 A 1.2 Performance Specification Summary A summary of the TPS54226EVM-539 performance specifications is provided in Table 1-2. Specifications are given for an input voltage of VIN = 12V and an output voltage of 1.05V, unless otherwise noted. The ambient temperature is 25°C for all measurement, unless otherwise noted. Table 1-2. TPS54226 EVM and Performance Specifications Summary SPECIFICATIONS TEST CONDITIONS Input voltage range (VIN) MIN TYP MAX 4.5 12 18 Output voltage Operating frequency CH1 VIN = 12 V, IO = 1 A Output current range VIN = 12 V Output ripple voltage VIN = 12 V, IO = 2 A V 1.05 V 700 kHz 0 Over current limit UNIT 2 3.1 7 A A mVPP 1.3 Modifications These evaluation modules are designed to provide access to the features of the TPS54226. Some modifications can be made to this module. 1.3.1 Output Voltage Set Point To change the output voltage of the EVMs, change the value of resistor R1. Changing the value of R1 can change the output voltage above 0.765 V. The value of R1 for a specific output voltage can be calculated using Equation 1 and Equation 2. For output voltage from 0.76 V to 2.5 V: æ R1 ö VO = 0.765 ´ ç 1+ ÷ è R2 ø (1) For output voltage over 2.5 V: 2 TPS54226 Step-Down Converter Evaluation Module User's Guide SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Test Setup and Results æ R1 ö VO = (0.763 + 0.0017 ´ VO ) ´ ç 1+ ÷ è R2 ø (2) Table 1-3 lists the R1 value for some common output voltages. For higher output voltages, a feedforward capacitor is required. Pads for this component (C2) are provided on the printed circuit board. C2 is used for faster load transient response and is recommended for auto skip mode stability. Note that the values given in Table 1-3 are standard values, and not the exact value calculated using Table 1-3. Table 1-3. Output Voltages OUTPUT VOLTAGE (V) R1 (kΩ) R2 (kΩ) C2 (pF) L1 (µH) 1.0 6.81 22.1 2.2 1.05 8.25 22.1 2.2 1.2 12.7 22.1 1.8 30.1 22.1 150 – 220 3.3 2.5 49.9 22.1 68 – 100 3.3 3.3 73.2 22.1 47 – 68 3.3 5.0 121 22.1 33 – 47 4.7 2.2 2 Test Setup and Results This section describes how to properly connect, set up, and use the TPS54226EVM-539. The section also includes test results typical for the evaluation modules and the following: • • • • • • • • Efficiency Output load regulation Output line regulation Load transient response Output voltage ripple Input voltage ripple Start-up Switching frequency 2.1 Input/Output Connections The TPS54226EVM-539 is provided with input/output connectors and test points as shown in Table 2-1. A power supply capable of supplying 2 A must be connected to J1 through a pair of 20 AWG wires. The load must be connected to J2 through a pair of 20 AWG wires. The maximum load current capability is 2 A. Wire lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. TP8 is used to monitor the output voltage with TP9 as the ground reference. SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 TPS54226 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated 3 Test Setup and Results www.ti.com Table 2-1. Connection and Test Points REFERENCE DESIGNATOR FUNCTION J1 VIN (see Table 1-1 for VIN range) J2 VOUT, 1.05 V at 2 A maximum JP1 EN control. Connect EN to OFF to disable, connect EN to ON to enable. TP1 VIN test point at VIN connector TP2 GND test point at VIN TP3 EN test point TP4 VCC test point TP5 Analog ground test point TP6 Switch node test point TP7 Power good test point TP8 Output voltage test point TP9 Ground test point at output connector 2.2 Start-Up Procedure 1. Make sure the jumper at JP1 (Enable control) is set from EN to OFF. 2. Apply appropriate VIN voltage to VIN and PGND terminals at J1. 3. Move the jumper at JP1 (Enable control) to cover EN and ON. The EVM will enable the output voltage. 2.3 Efficiency Figure 2-1 shows the efficiency for the TPS54226EVM-539 at an ambient temperature of 25°C. 90 VO = 1.05 V 80 VI = 5 V Efficiency - % 70 60 VI = 12 V 50 40 30 20 10 0.001 0.01 0.1 IL - Load Current - A 1 10 Figure 2-1. TPS54226EVM-539 Efficiency 4 TPS54226 Step-Down Converter Evaluation Module User's Guide SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Test Setup and Results 2.4 Load Regulation The load regulation for the TPS54226EVM-539 is shown Figure 2-2. 1 Voltage Deviation - % 0.8 0.6 VI = 5 V 0.4 VI = 12 V 0.2 0 -0.2 0 0.5 1 1.5 IO - Output Current - A 2 2.5 Figure 2-2. TPS54226EVM-539 Load Regulation 2.5 Line Regulation The line regulation for the TPS54226EVM-539 is shown Figure 2-3. 1.065 IO = 0.001 A VO - Output Voltage - V 1.06 1.055 IO = 1 A 1.05 IO = 2 A 1.045 4 8 12 VI - Input Voltage - V 16 20 Figure 2-3. TPS54226EVM-539 Line Regulation SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 TPS54226 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated 5 Test Setup and Results www.ti.com 2.6 Load Transient Response The TPS54226EVM-539 response to load transient is shown in Figure 2-4. The current step is from 500 mA to 1.5 A (25% to 75% of rated load). Total peak-to-peak output voltage variation is as shown. VOUT = 50 mV/div (AC coupled) IOUT = 500 mA/div, 0.5 to 1.5 A Load Step Time = 200 ms/div Figure 2-4. TPS54226EVM-539 Load Transient Response 2.7 Output Voltage Ripple The TPS54226EVM-539 output voltage ripple is shown in Figure 2-5. The output current is the rated full load of 2 A. VOUT = 20 mV/div (AC coupled) Switching Node = 5 V/div Time = 1 ms/div Figure 2-5. TPS54226EVM-539 Output Voltage Ripple 6 TPS54226 Step-Down Converter Evaluation Module User's Guide SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Test Setup and Results 2.8 Input Voltage Ripple The TPS54226EVM-539 input voltage ripple is shown in Figure 2-6. The output current is the rated full load of 2 A. VOUT = 20 mV/div (AC coupled) Switching Node = 5 V/div Time = 1 ms/div Figure 2-6. TPS54226EVM-539 Input Voltage Ripple 2.9 Start-Up The TPS54226EVM-539 start-up waveform is shown in Figure 2-7. EN = 10 V/div VOUT = 500 mV/div PG = 5 V/div Time = 500 ms/div Figure 2-7. TPS54226EVM-539 Start-Up SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 TPS54226 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated 7 Test Setup and Results www.ti.com 2.10 Switching Frequency The TPS54226EVM-539 switching frequency is shown in Figure 2-8. 900 fsw - Switching Frequency - kHz IO = 1 A 800 VO = 1.8 V 700 600 VO = 3.3 V 500 0 5 10 VI - Input Voltage - V 15 20 Figure 2-8. TPS54226EVM-539 Switching Frequency 8 TPS54226 Step-Down Converter Evaluation Module User's Guide SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Board Layout 3 Board Layout This section provides description of the TPS54226EVM-539, board layout, and layer illustrations. 3.1 Layout The board layout for the TPS54226EVM-539 and is shown in Figure 3-1 through Figure 3-6. The top layer contains the main power traces for VIN, VO, and ground. Also on the top layer are connections for the pins of the TPS54226 and a large area filled with ground. Many of the signal traces are also located on the top side. The input decoupling capacitor are located as close to the IC as possible. The input and output connectors, test points, and most of the components are located on the top side. R3, the 0-Ω resistor that connects VIN to VCC and R4, the power-good pullup, are located on the back side. Analog ground and power ground are connected at a single point on the top layer near pin 5 of the TPS54226. The internal layer 1 is a split plane containing analog and power grounds. The internal layer 2 is primarily power ground. There are also a fill area of VIN and a trace routing VCC to the enable control jumper JP1. The bottom layer is primarily analog ground. There are also traces to connect VIN to VCC through R3, traces for the power good signal and the feedback trace from VOUT to the voltage set point divider network. Figure 3-1. Top Assembly SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 TPS54226 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated 9 Board Layout www.ti.com Figure 3-2. Top Layer Figure 3-3. Internal Layer 1 10 TPS54226 Step-Down Converter Evaluation Module User's Guide SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Board Layout Figure 3-4. Internal Layer 2 Figure 3-5. Bottom Layer SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 TPS54226 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated 11 Board Layout www.ti.com Figure 3-6. Bottom Assembly 12 TPS54226 Step-Down Converter Evaluation Module User's Guide SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Schematic, Bill of Materials, and Reference 4 Schematic, Bill of Materials, and Reference This section presents the TPS54226EVM-539 schematic, bill of materials, and reference. 4.1 Schematic Figure 4-1 is the schematic for the TPS54226EVM. Figure 4-1. TPS54226EVM-539 Schematic Diagram SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 TPS54226 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated 13 Schematic, Bill of Materials, and Reference www.ti.com 4.2 Bill of Materials Table 4-1. Bill of Materials REFDES QTY VALUE DESCRIPTION C1, C3 2 SIZE PART NUMBER MFR 10 μF Capacitor, Ceramic, 25 V, X5R, 20% 1210 C3225X5R1E106M C11 TDK 0 Open Capacitor, Ceramic 1206 Std Std C2, C4, C8 0 Open Capacitor, Ceramic 0603 Std Std C5 1 3300 pF Capacitor, Ceramic, 25 V, X7R , 10% 0603 Std Std C6 1 1 μF Capacitor, Ceramic, 16 V, X7R, 10% 0603 Std Std C7 1 0.1 μF Capacitor, Ceramic, 50 V, X7R, 10% 0603 Std Std C9, C10 2 22 μF Capacitor, Ceramic, 6.3 V, X5R, 20% 1206 C3216X5R0J226M TDK J1, J2 2 ED555/2DS Terminal Block, 2-pin, 6-A, 3.5 mm 0.27 × 0.25 inch ED555/2DS Sullins JP1 1 PEC03SAAN Header, Male 3-pin, 100-mil spacing 0.100 inch × 3 PEC03SAAN Sullins L1 1 2.2 μH Inductor, SMT, 8.4 A, 17.3 milliΩ 0.256 × 0.280 inch SPM6530T-2R2M TDK R1 1 8.25 k Resistor, Chip, 1/16W, 1% 0603 Std Std R2 1 22.1 k Resistor, Chip, 1/16W, 1% 0603 Std Std R3 1 0 Resistor, Chip, 1/16W, 1% 0603 Std Std R4 1 100k Resistor, Chip, 1/16W, 1% 0603 Std Std R5 0 Open Resistor, Chip, 1/16W, 1% 0603 Std Std TP1, TP3, TP4, TP6, TP7, TP8, TP9 3 5000 Test Point, Red, Thru Hole Color Keyed 0.100 × 0.100 inch 5000 Keystone TP2, TP5, TP9 3 5001 Test Point, Black, Thru Hole Color Keyed 0.100 × 0.100 inch 5001 Keystone U1 1 TPS54226PWP TPS54226PWP TI 929950-00 3M HPA539 Any IC, 2-A Output Single Sync. Step-Down – 1 Shunt, 100-mil, Black – 1 PCB, 2.76 inch × 1.97 inch × 0.062 inch 0.100 4.3 Reference Texas Instruments, TPS54226 Single Synchronous Converter with Integrated High Side and Low Side MOS FET Data Sheet 5 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision * (November 2009) to Revision A (October 2021) Page • Updated the numbering format for tables, figures, and cross-references throughout the document. ................2 • Updated the user's guide title ............................................................................................................................ 2 • Edited the user's guide for clarity........................................................................................................................2 14 TPS54226 Step-Down Converter Evaluation Module User's Guide SLVU336A – NOVEMBER 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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