TPS54232EVM-415

www.ti.com Table of Contents User’s Guide TPS54232 Step-Down Converter Evaluation Module User's Guide Table of Contents 1 Introduction.............................................................................................................................................................................2 1.1 Background........................................................................................................................................................................ 2 1.2 Performance Specification Summary.................................................................................................................................2 1.3 Modifications...................................................................................................................................................................... 3 2 Test Setup and Results.......................................................................................................................................................... 3 2.1 Input / Output Connections................................................................................................................................................ 3 2.2 Efficiency............................................................................................................................................................................4 2.3 Output Voltage Load Regulation........................................................................................................................................ 5 2.4 Output Voltage Line Regulation......................................................................................................................................... 6 2.5 Load Transients..................................................................................................................................................................6 2.6 Loop Characteristics.......................................................................................................................................................... 7 2.7 Output Voltage Ripple........................................................................................................................................................ 7 2.8 Input Voltage Ripple........................................................................................................................................................... 8 2.9 Powering Up.......................................................................................................................................................................8 2.10 Eco-mode Operation........................................................................................................................................................ 9 3 Board Layout.........................................................................................................................................................................10 3.1 Layout.............................................................................................................................................................................. 10 3.2 Estimated Circuit Area......................................................................................................................................................11 4 Schematic and Bill of Materials...........................................................................................................................................12 4.1 Schematic........................................................................................................................................................................ 12 4.2 Bill of Materials.................................................................................................................................................................13 5 Revision History................................................................................................................................................................... 13 List of Figures Figure 2-1. TPS54232EVM-415 Efficiency.................................................................................................................................. 4 Figure 2-2. TPS54232EVM-415 Low Current Efficiency..............................................................................................................5 Figure 2-3. TPS54232EVM-415 Load Regulation....................................................................................................................... 5 Figure 2-4. TPS54232EVM-415 Line Regulation........................................................................................................................ 6 Figure 2-5. TPS54232EVM-415 Transient Response................................................................................................................. 6 Figure 2-6. TPS54232EVM-415 Loop Response........................................................................................................................ 7 Figure 2-7. TPS54232EVM-415 Output Ripple........................................................................................................................... 7 Figure 2-8. TPS54232EVM-415 Input Ripple.............................................................................................................................. 8 Figure 2-9. TPS54232EVM-415 Start-Up Relative to VIN ........................................................................................................... 8 Figure 2-10. TPS54232EVM-415 Start-Up Relative to Enable....................................................................................................9 Figure 2-11. TPS54232EVM-415 Eco-mode Operation...............................................................................................................9 Figure 3-1. TPS54232EVM-415 Top-Side Layout..................................................................................................................... 10 Figure 3-2. TPS54232EVM-415 Bottom-Side Layout................................................................................................................ 11 Figure 3-3. TPS54232EVM-415 Top-Side Assembly................................................................................................................. 11 Figure 4-1. TPS54232EVM-415 Schematic...............................................................................................................................12 List of Tables Table 1-1. Input Voltage and Output Current Summary...............................................................................................................2 Table 1-2. TPS54232EVM-415 Performance Specification Summary.........................................................................................2 Table 1-3. Output Voltages Available...........................................................................................................................................3 Table 2-1. EVM Connectors and Test Points............................................................................................................................... 4 Table 4-1. TPS54232EVM-415 Bill of Materials.........................................................................................................................13 Trademarks SWIFT™ is a trademark of Texas Instruments. SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 TPS54232 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated 1 Introduction www.ti.com All trademarks are the property of their respective owners. 1 Introduction This user's guide contains background information for the TPS54232 as well as support documentation for the TPS54232EVM-415 evaluation module (HPA415). Also included are the performance specifications, the schematic, and the bill of materials for the TPS54232EVM-415. 1.1 Background The TPS54232 dc/dc converter is designed to provide up to a 2 A output from an input voltage source of 3.5 V to 28 V. Rated input voltage and output current range for the evaluation module are given in Table 1-1. This evaluation module is designed to demonstrate the small printed-circuit-board areas that may be achieved when designing with the TPS54232 regulator. The switching frequency is internally set at a nominal 1000 kHz. The high-side MOSFET is incorporated inside the TPS54232 package along with the gate drive circuitry. The low drain-to-source on resistance of the MOSFET allows the TPS54232 to achieve high efficiencies and helps keep the junction temperature low at high output currents. The compensation components are external to the integrated circuit (IC), and an external divider allows for an adjustable output voltage. Additionally, the TPS54232 provides adjustable slow start and undervoltage lockout inputs. The absolute maximum input voltage is 30 V for the TPS54232EVM-415. Table 1-1. Input Voltage and Output Current Summary EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE TPS54232EVM-415 VIN = 5 V to 15 V 0 A to 2 A 1.2 Performance Specification Summary A summary of the TPS54232EVM-415 performance specifications is provided in Table 1-2. Specifications are given for an input voltage of VIN = 12 V and an output voltage of 2.5 V, unless otherwise specified. The TPS54232EVM-415 is designed and tested for VIN = 5 V to 15 V. The ambient temperature is 25°C for all measurements, unless otherwise noted. Table 1-2. TPS54232EVM-415 Performance Specification Summary SPECIFICATION TEST CONDITIONS VIN voltage range MIN 5 Output voltage set point MAX 12 15 2.5 Output current range VIN = 5 V to 15 V Line regulation IO = 1 A, VIN = 5 V to 15 V ±0.02% Load regulation VIN = 12 V, IO = 0.2 A to 2 A ±0.25% Load transient response IO = 0.5 A to 1.5 A IO = 1.5 A to 0.5 A 0 UNIT V V 2 A Voltage change –40 Recovery time 400 μs Voltage change 60 mV mV Recovery time 400 μs 36 kHz Loop bandwidth VIN = 12 V, IO = 1 A Phase margin VIN = 12 V , IO = 1 A 54 ° Input ripple voltage IO = 2 A 160 mVpp Output ripple voltage IO = 2 A 10 mVpp 6 ms 1000 kHz Output rise time Operating frequency Maximum efficiency 2 TYP TPS54232EVM-415, VIN = 5 V, IO = 0.5 A TPS54232 Step-Down Converter Evaluation Module User's Guide 88.6% SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Introduction 1.3 Modifications These evaluation modules are designed to provide access to the features of the TPS54232. Some modifications can be made to this module. 1.3.1 Output Voltage Set Point To change the output voltage of the EVM, it is necessary to change the value of resistor R6. Changing the value of R6 can change the output voltage above 0.8 V. The value of R6 for a specific output voltage can be calculated using Equation 1. R 6 = 10.2 k W ´ 0.8 V VOUT - 0.8 V (1) Table 1-3 lists the R6 values for some common output voltages. Note that VIN must be in a range so that the minimum on-time is greater than 130 ns, and the maximum duty cycle is less than 91%. The values given in Table 1-3 are standard values, not the exact value calculated using Equation 1. Table 1-3. Output Voltages Available Output Voltage (V) R6 Value (kΩ) 1.8 8.25 2.5 4.75 3.3 3.24 5 1.96 2 Test Setup and Results This section describes how to properly connect, set up, and use the TPS54232EVM-415 evaluation module. The section also includes test results typical for the evaluation module and covers efficiency, output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up. 2.1 Input / Output Connections The TPS54232EVM-415 is provided with input/output connectors and test points as shown in Table 2-1. A power supply capable of supplying 2 A must be connected to J1 through a pair of 20 AWG wires. The load must be connected to J4 through a pair of 20 AWG wires. The maximum load current capability must be 2 A. Wire lengths must be minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. TP5 is used to monitor the output voltage with TP6 as the ground reference. SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 TPS54232 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated 3 Test Setup and Results www.ti.com Table 2-1. EVM Connectors and Test Points Reference Designator Function J1 VIN (see Table 1-1 for VIN range) J2 2-pin header for enable. Connect EN to ground to disable, open to enable. J3 2-pin header for slow start monitor and GND. J4 VOUT, 2.5 V at 2 A maximum TP1 VIN test point at VIN connector TP2 GND test point at VIN TP3 PH test point TP4 Test point between voltage divider network and output. Used for loop response measurements. TP5 Output voltage test point at OUT connector TP6 GND test point at OUT connector 2.2 Efficiency The efficiency of this EVM peaks at a load current of about 0.5 A with VIN = 5 V, and then decreases as the load current increases towards full load. Figure 2-1 shows the efficiency for the TPS54232EVM-415 at an ambient temperature of 25°C. 100 VO = 3.3 V 95 VI = 5 V Efficiency - % 90 VI = 12 V 85 80 75 VI = 15 V 70 65 60 0 0.25 0.5 0.75 1 1.25 1.5 IO - Output Current - A 1.75 2 Figure 2-1. TPS54232EVM-415 Efficiency Figure 2-2 shows the efficiency for the TPS54232EVM-415 at lower output currents between 0.02 A and 0.20 A at an ambient temperature of 25°C. 4 TPS54232 Step-Down Converter Evaluation Module User's Guide SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Test Setup and Results 100 95 VI = 8 V 90 Efficiency - % 85 80 VI = 12 V 75 70 65 VI = 15 V 60 55 50 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 IO - Output Current - mA Figure 2-2. TPS54232EVM-415 Low Current Efficiency The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-source resistance of the internal MOSFET. 2.3 Output Voltage Load Regulation The load regulation for the TPS54232EVM-415 is shown in Figure 2-3. 0.1 Output Voltage Regulation - % 0.08 0.06 0.04 VI = 15 V VI = 5 V 0.02 0 -0.02 VI = 12 V -0.04 -0.06 -0.08 -0.1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 IO - Output Current - A 1.6 1.8 2 Figure 2-3. TPS54232EVM-415 Load Regulation Measurements are given for an ambient temperature of 25°C. SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 TPS54232 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated 5 Test Setup and Results www.ti.com 2.4 Output Voltage Line Regulation The line regulation for the TPS54232EVM-415 is shown in Figure 2-4. 0.025 0.02 Output Regulation - % 0.015 0.01 IO = 1 A 0.005 0 -0.005 -0.01 -0.015 -0.02 -0.025 5 6 7 8 9 10 11 12 VI - Input Voltage - V 13 14 15 Figure 2-4. TPS54232EVM-415 Line Regulation 2.5 Load Transients The TPS54232EVM-415 response to load transients is shown in Figure 2-5. The current step is from 25% to 75% of maximum rated load at 15V input. Total peak-to-peak voltage variation is as shown, including ripple and noise on the output. VOUT IOUT 0.5 - 2 A STEP t - Time - 2 ms/div Figure 2-5. TPS54232EVM-415 Transient Response 6 TPS54232 Step-Down Converter Evaluation Module User's Guide SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Test Setup and Results 2.6 Loop Characteristics The TPS54232EVM-415 loop-response characteristics are shown in Figure 2-6 . Gain and phase plots are shown for VIN voltage of 15 V. Load current for the measurement is 1 A. 60 180 50 150 Gain 40 120 30 90 Phase 60 10 30 0 0 Phase - Deg. Gain - dB 20 -10 -30 -20 -60 -30 -90 -40 -120 -50 -150 -60 10 100 1k 10k f - Frequency - Hz 100k -180 1M Figure 2-6. TPS54232EVM-415 Loop Response 2.7 Output Voltage Ripple The TPS54232EVM-415 output voltage ripple is shown in Figure 2-7 . The output current is the rated full load of 2 A and VIN = 15 V. The ripple voltage is measured directly across the output capacitors. VOUT PH t - Time - 1 ms/div Figure 2-7. TPS54232EVM-415 Output Ripple SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 TPS54232 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated 7 Test Setup and Results www.ti.com 2.8 Input Voltage Ripple The TPS54232EVM-415 input voltage ripple is shown in Figure 2-8 . The output current is the rated full load of 2 A and VIN = 15 V. The ripple voltage is measured directly across the input capacitors. VIN PH t - Time - 1 ms/div Figure 2-8. TPS54232EVM-415 Input Ripple 2.9 Powering Up The start-up waveforms are shown in Figure 2-9 and Figure 2-10. In Figure 2-9, the top trace shows VOUT , and the bottom trace shows VIN. In Figure 2-10 , the top trace shows VOUT whereas the bottom trace shows the slow start voltage . In Figure 2-10, the input voltage is initially applied and the output is inhibited by using a jumper at J2 to tie EN to GND. When the jumper is removed, EN is released. When the EN voltage reaches the enable-threshold voltage of 1.25 V, the start-up sequence begins and the output ramps up at the externally set rate toward the set value of 2.5 V. The input voltage for these plots is 12 V and there is no load. VOUT VIN t - Time - 2 ms/div Figure 2-9. TPS54232EVM-415 Start-Up Relative to VIN 8 TPS54232 Step-Down Converter Evaluation Module User's Guide SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Test Setup and Results VOUT SS t - Time - 2 ms/div Figure 2-10. TPS54232EVM-415 Start-Up Relative to Enable 2.10 Eco-mode Operation At light load currents, the TPS54232 is designed to operate in pulse skipping Eco-mode. When the peak inductor current is lower than 100 mA typical, the device enters Eco-mode. Figure 2-11 shows Eco-mode operation, channel 1(C1) shows the output voltage while channel 2(C2) shows the switching node (PH). Figure 2-11. TPS54232EVM-415 Eco-mode Operation SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 TPS54232 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated 9 Board Layout www.ti.com 3 Board Layout This section provides a description of the TPS54232EVM-415, board layout, and layer illustrations. 3.1 Layout The board layout for the TPS54232EVM-415 is shown in Figure 3-1 through Figure 3-3. The topside layer of the EVM is laid out in a manner typical of a user application. The top and bottom layers are 2-oz. copper. The top layer contains the main power traces for VIN, VOUT, and VPHASE. Also on the top layer are connections for the remaining pins of the TPS54232 and a large area filled with ground. The bottom layer contains ground and a signal route for the BOOT capacitor. The top and bottom and internal ground traces are connected with multiple vias placed around the board including ten vias directly under the TPS54232 device to provide a thermal path from the top-side ground plane to the bottom-side ground plane. The input decoupling capacitor (C1, C2 is not used) and bootstrap capacitor (C4) are all located as close to the IC as possible. In addition, the voltage set-point resistor divider components are also kept close to the IC. The voltage divider network ties to the output voltage at the point of regulation, the copper VOUT trace past the output capacitor (C3, C8 is not used). For the TPS54232, an additional input bulk capacitor may be required, depending on the EVM connection to the input supply. Figure 3-1. TPS54232EVM-415 Top-Side Layout 10 TPS54232 Step-Down Converter Evaluation Module User's Guide SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Board Layout Figure 3-2. TPS54232EVM-415 Bottom-Side Layout Figure 3-3. TPS54232EVM-415 Top-Side Assembly 3.2 Estimated Circuit Area The estimated printed circuit board area for the components used in this design is 0.44 in2. This area does not include test point or connectors. SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 TPS54232 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated 11 Schematic and Bill of Materials www.ti.com 4 Schematic and Bill of Materials This section presents the TPS54232EVM-415 schematic and bill of materials. 4.1 Schematic Figure 4-1 is the schematic for the TPS54232EVM-415. Figure 4-1. TPS54232EVM-415 Schematic 12 TPS54232 Step-Down Converter Evaluation Module User's Guide SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Schematic and Bill of Materials 4.2 Bill of Materials Table 4-1 presents the bill of materials for the TPS54232EVM-415. Table 4-1. TPS54232EVM-415 Bill of Materials Count RefDes Value Description Size Part Number MFR 1 C1 4.7 μF Capacitor, Ceramic, 25 V, X5R, 10% 1206 GRM31CR61E106KA 12 muRata 0 C2 Open Capacitor, Ceramic, 25 V, X5R, 10% 1206 GRM31CR61E106KA 12 muRata 1 C3 22 μF Capacitor, Ceramic, 10 V, X7R, 10% 1210 Std Std 1 C4 0.1 μF Capacitor, Ceramic, 16 V, X7R, 10% 0603 Std Std 1 C5 0.015 μF Capacitor, Ceramic, 16 V, X7R, 10% 0603 Std Std 1 C6 680 pF Capacitor, Ceramic, 16 V, X7R, 10% 0603 Std Std 1 C7 47 pF Capacitor, Ceramic, 16 V, X7R, 10% 0603 Std Std 0 C8 Open Capacitor, Ceramic, 10 V, X5R, 10% 1210 Std TDK 1 D1 B220A Diode, Schottky, 2 A, 20 V SMA B220A Diodes Inc 2 J1, J4 ED1514 Terminal Block, 2-pin, 6 A, 3.5 mm 0.27 × 0.25 inch ED1514 OST 2 J2, J3 PTC36SAAN Header, 2 pin, 100 mil spacing, (36-pin strip) 0.100 × 2 PTC36SAAN Sullins 3.3 μH Inductor, SM Toroid, 3.72 A, 20 mΩ 0.287 × 0.287 inch MSS7341-332 Coilcraft 1 L1 1 R1 150 kΩ Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R2 48.7 kΩ Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R3 17.4 kΩ Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R4 0 Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R5 10.2 kΩ Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R6 4.75 kΩ Resistor, Chip, 1/16W, 1% 0603 Std Std 0 R7 Open Resistor, Chip, 1/16W, 1% 0603 Std Std 3 TP1, TP3, TP5 5000 Test Point, Red, Thru Hole Color Keyed 0.100 × 0.100 inch 5000 Keystone 3 TP2, TP4, TP6 5001 Test Point, Black, Thru Hole Color Keyed 0.100 × 0.100 inch 5001 Keystone 1 U1 TPS54232D IC, DC-DC Converter, 28 V, 2 A SO-8 TPS54232D TI 1 — PCB, 2 inch × 2 inch × 0.062 inch 2.0" × 2.0" × 0.062" HPA415 Any 5 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision * (January 2009) to Revision A (October 2021) Page • Updated the numbering format for tables, figures, and cross-references throughout the document. ................2 • Updated the user's guide title............................................................................................................................. 2 SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021 TPS54232 Step-Down Converter Evaluation Module User's Guide Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated 13 IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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