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Table of Contents
User’s Guide
TPS54521 Step-Down Converter Evaluation Module User's
Guide
Table of Contents
1 Introduction.............................................................................................................................................................................3
1.1 Background........................................................................................................................................................................ 3
1.2 Performance Specification Summary.................................................................................................................................3
1.3 Modifications...................................................................................................................................................................... 4
2 Test Setup and Results.......................................................................................................................................................... 5
2.1 Input / Output Connections................................................................................................................................................ 5
2.2 Efficiency............................................................................................................................................................................6
2.3 Output Voltage Load Regulation........................................................................................................................................ 7
2.4 Output Voltage Line Regulation......................................................................................................................................... 7
2.5 Load Transients..................................................................................................................................................................8
2.6 Loop Characteristics.......................................................................................................................................................... 8
2.7 Output Voltage Ripple........................................................................................................................................................ 9
2.8 Input Voltage Ripple........................................................................................................................................................... 9
2.9 Powering Up.....................................................................................................................................................................10
2.10 Hiccup Overcurrent Mode Operation..............................................................................................................................11
2.11 Thermal Characteristics..................................................................................................................................................11
3 Board Layout.........................................................................................................................................................................13
3.1 Layout.............................................................................................................................................................................. 13
3.2 Estimated Circuit Area..................................................................................................................................................... 14
4 Schematic and Bill of Materials...........................................................................................................................................15
4.1 Schematic........................................................................................................................................................................ 15
4.2 Bill of Materials.................................................................................................................................................................17
5 Revision History................................................................................................................................................................... 17
List of Figures
Figure 2-1. TPS54521EVM-607 Efficiency.................................................................................................................................. 6
Figure 2-2. TPS54521EVM-607 Low Current Efficiency..............................................................................................................6
Figure 2-3. TPS54521EVM-607 Load Regulation....................................................................................................................... 7
Figure 2-4. TPS54521EVM-607 Line Regulation........................................................................................................................ 7
Figure 2-5. TPS54521EVM-607 Transient Response................................................................................................................. 8
Figure 2-6. TPS54521EVM-607 Loop Response........................................................................................................................ 8
Figure 2-7. TPS54521EVM-607 Output Ripple........................................................................................................................... 9
Figure 2-8. TPS54521EVM-607 Input Ripple.............................................................................................................................. 9
Figure 2-9. TPS54521EVM-607 Start-Up Relative to VIN ......................................................................................................... 10
Figure 2-10. TPS54521EVM-607 Start-Up Relative to Enable..................................................................................................10
Figure 2-11. TPS54521EVM-607 Overcurrent Hiccup Mode..................................................................................................... 11
Figure 2-12. TPS54521EVM-607 Thermal Image......................................................................................................................11
Figure 2-13. TPS54521EVM-607 Junction Temperature vs Load Current................................................................................ 12
Figure 3-1. TPS54521EVM-607 Top-Side Layout (Top View)....................................................................................................13
Figure 3-2. TPS54521EVM-607 Layer 2 (X-Ray Top View).......................................................................................................13
Figure 3-3. TPS54521EVM-607 Layer 3 (X-Ray Top View).......................................................................................................14
Figure 3-4. TPS54521EVM-607 Bottom-Side Layout (Bottom View)........................................................................................ 14
Figure 3-5. TPS54521EVM-607 Top-Side Assembly.................................................................................................................14
Figure 4-1. TPS54521EVM-607 Schematic...............................................................................................................................16
List of Tables
Table 1-1. Input Voltage and Output Current Summary...............................................................................................................3
Table 1-2. TPS54521EVM-607 Performance Specification Summary.........................................................................................3
Table 1-3. Output Voltages Available...........................................................................................................................................4
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Trademarks
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Table 2-1. EVM Connectors and Test Points............................................................................................................................... 5
Table 4-1. TPS54521EVM-607 Bill of Materials.........................................................................................................................17
Trademarks
All trademarks are the property of their respective owners.
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Introduction
1 Introduction
This user's guide contains background information for the TPS54521, as well as support documentation for
the TPS54521EVM-607 evaluation module (HPA607). Also included are the performance specifications, the
schematic, and the bill of materials for the TPS54521EVM-607.
1.1 Background
The TPS54521 dc/dc converter is designed to provide up to a 5 A output. The TPS54521 implements split input
power rails with separate input voltage inputs for the power stage and control circuitry. The power stage input
(PVIN) is rated for 1.6 V to 17 V while the control input (VIN) is rated for 4.5 to 17 V. The TPS54521EVM-607
provides both inputs but is designed and tested using the PVIN connected to VIN. Rated input voltage and
output current range for the evaluation module are given in Table 1-1. This evaluation module demonstrates a
low cost design that may be achieved when designing with the TPS54521 regulator. The switching frequency
is externally set at a nominal 480 kHz. The high-side and low-side MOSFETs are incorporated inside the
TPS54521 package along with the gate drive circuitry. The compensation components are external to the
integrated circuit (IC), and an external divider allows for an adjustable output voltage. Additionally, the TPS54521
provides adjustable slow start, tracking and undervoltage lockout inputs. The absolute maximum input voltage is
20 V for the TPS54521EVM-607.
Table 1-1. Input Voltage and Output Current Summary
EVM
INPUT VOLTAGE RANGE
OUTPUT CURRENT RANGE
TPS54521EVM-607
VIN = 8 V to 17 V (VIN start voltage = 6.806 V)
0 A to 5 A
1.2 Performance Specification Summary
A summary of the TPS54521EVM-607 performance specifications is provided in Table 1-2. Specifications
are given for an input voltage of 12 V and an output voltage of 3.3 V, unless otherwise specified. The
TPS54521EVM-607 is designed and tested for VIN = 8 V to 17 V with the VIN and PVIN pins connected together
with the JP1 jumper. The ambient temperature is 25°C for all measurements, unless otherwise noted.
Table 1-2. TPS54521EVM-607 Performance Specification Summary
SPECIFICATION
TEST CONDITIONS
VIN voltage range (PVIN = VIN)
MIN
8
TYP
MAX
12
17
UNIT
V
VIN start voltage
6.806
V
VIN stop voltage
4.824
V
3.3
V
Output voltage set point
Output current range
VIN = 8 V to 17 V
Line regulation
IO = 5 A, VIN = 8 V to 17 V
±0.04%
Load regulation
VIN = 12 V, IO = 0 A to 5 A
±0.05%
IO = 2 A to 4 A
Load transient response
IO = 4 A to 2 A
0
Voltage change
Recovery time
Voltage change
Recovery time
5
150
A
mV
6
μs
125
mV
6
μs
42
kHz
Loop bandwidth
VIN = 12 V, IO = 5 A
Phase margin
VIN = 12 V , IO = 5 A
62
°
Input ripple voltage
VIN = 12 V, IO = 5 A
500
mVPP
Output ripple voltage
VIN = 12 V, IO = 5 A
Output rise time
Operating frequency
Maximum efficiency
TPS54521EVM-607, VIN = 8 V, IO = 1.1 A
75
mVPP
3.5
ms
480
kHz
94.5%
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1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54521. Some modifications
can be made to this module.
1.3.1 Output Voltage Set Point
The output voltage is set by the resistor divider network of R8 and R9. R9 is fixed at 10 kΩ. To change the output
voltage of the EVM, it is necessary to change the value of resistor R8. Changing the value of R8 can change the
output voltage above 0.8 V. The value of R8 for a specific output voltage can be calculated using Equation 1.
R8 =
10 kΩ (VOUT - 0.8 V )
0.8 V
(1)
Table 1-3 lists the R8 values for some common output voltages. Note that VIN must be in a range so that the
minimum on-time is greater than 135 ns, and the maximum duty cycle is less than 95%. In addition, different
output voltages may require different frequency compensation, which will require changes to the values of R4,
C4, C6, and C11. The values given in Table 1-3 are standard values, not the exact value calculated using
Equation 1.
Table 1-3. Output Voltages Available
OUTPUT
VOLTAGE (V)
R8 VALUE (kΩ)
1.8
12.4
2.5
21.5
3.3
31.6
5
52.3
1.3.2 Slow-Start Time
The slow-start time can be adjusted by changing the value of C7. Use Equation 2 to calculate the required value
of C7 for a desired slow-start time.
C7(nF) =
Tss(ms) ´ Iss(m A)
Vref(V)
(2)
The EVM is set for a slow start time of 3.5 msec using C7 = 0.01 μF.
1.3.3 Track In
The TPS54521 can track an external voltage during start up. The J5 connector is provided to allow connection
to that external voltage. Ratio-metric or simultaneous tracking can be implemented using resistor divider R5 and
R6. See the TPS54521 4.5-V to 17-V Input, 5-A Synchronous Step-Down Converter Data Sheet for details.
1.3.4 Adjustable UVLO
The under voltage lock out (UVLO) can be adjusted externally using R1 and R2. The EVM is set for a start
voltage of 6.806 V and a stop voltage of 4.824 V using R1 = 511 kΩ and R2 = 100 kΩ. Use Equation 3 and
Equation 4 to calculate required resistor values for different start and stop voltages.
æV
ö
VSTART ç ENFALLING ÷ - VSTOP
è VENRISING ø
R1 =
æ V
ö
Ip ç1 - ENFALLING ÷ + Ih
VENRISING ø
è
R2 =
4
R1´ VENFALLING
VSTOP - VENFALLING + R1(Ip + Ih )
TPS54521 Step-Down Converter Evaluation Module User's Guide
(3)
(4)
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Introduction
1.3.5 Input Voltage Rails
The EVM is designed to accommodate different input voltage levels for the power stage and control logic. During
normal operation, the PVIN and VIN inputs are connected together using a jumper across JP1. The single input
voltage is supplied at J1. If desired, these two input voltage rails may be separated by removing the jumper
across JP1. Two input voltages must then be provided at both J1 and J2. C1 is provided for adding additional
input capacitance for the PVIN input, if desired.
2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54521EVM-607 evaluation module.
The section also includes test results typical for the evaluation module and covers efficiency, output voltage
regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1 Input / Output Connections
The TPS54521EVM-607 is provided with input/output connectors and test points as shown in Table 2-1. A power
supply capable of supplying 3 A must be connected to J1 through a pair of 20 AWG wires. The jumper across
JP1 must be in place. See Section 1.3.5 for split input voltage rail operation. The load must be connected to
J3 through a pair of 20 AWG wires. The maximum load current capability must be 5 A. Wire lengths must be
minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input voltages with
TP2 providing a convenient ground reference. TP8 is used to monitor the output voltage with TP9 as the ground
reference.
Table 2-1. EVM Connectors and Test Points
REFERENCE
DESIGNATOR
FUNCTION
J1
PVIN input voltage connector. See Table 1-1 for VIN range.
J2
VIN input voltage connector. Not normally used
J3
VOUT, 3.3 V at 5-A maximum
J4
2-pin header for tracking output and ground
J5
2-pin header for tracking voltage input and ground
JP1
PVIN to VIN jumper. Normally closed to tie VIN to PVIN for common rail voltage operation
JP2
2-pin header for enable. Connect EN to ground to disable, open to enable.
TP1
PVIN test point at PVIN connector
TP2
GND test point at PVIN connector
TP3
VIN test point at VIN connector
TP4
GND test point at VIN connector
TP5
PH test point
TP6
Slow start / track in test point
TP7
Test point between voltage divider network and output. Used for loop response measurements.
TP8
Output voltage test point at VOUT connector
TP9
GND test point at VOUT connector
TP10
PWRGD test point
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2.2 Efficiency
The efficiency of this EVM peaks at a load current of about 1.1 A and then decreases as the load current
increases towards full load. Figure 2-1 shows the efficiency for the TPS54521EVM-607 at an ambient
temperature of 25°C.
100
VI = 8 V
VI = 10 V
95
Efficiency - %
90
VI = 12 V
85
VI = 15 V
VI = 17 V
80
75
70
65
60
0
1
2
3
IO - Output Current - A
4
5
Figure 2-1. TPS54521EVM-607 Efficiency
Figure 2-2 shows the efficiency for the TPS54521EVM-607 at lower output currents below 0.10 A at an ambient
temperature of 25°C.
100
90
VI = 15 V
80
VI = 17 V
VI = 12 V
Efficiency - %
70
VI = 10 V
60
VI = 8 V
50
40
30
20
10
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
IO - Output Current - A
0.08
0.09
0.1
Figure 2-2. TPS54521EVM-607 Low Current Efficiency
The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-source
resistance of the internal MOSFETs.
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Test Setup and Results
2.3 Output Voltage Load Regulation
Figure 2-3 shows the load regulation for the TPS54521EVM-607.
0.05
VI = 12 V
0.04
VI = 8 V
Load Regulation - %
0.03
0.02
VI = 10 V
0.01
VI = 15 V
0
VI = 17 V
-0.01
-0.02
-0.03
-0.04
-0.05
0
3
2
IO - Output Current - A
1
5
4
Figure 2-3. TPS54521EVM-607 Load Regulation
Measurements are given for an ambient temperature of 25°C.
2.4 Output Voltage Line Regulation
Figure 2-4 shows the line regulation for the TPS54521EVM-607.
0.05
0.04
0.03
Line Regulation - %
0.02
0.01
IO = 0 A
0
-0.01
-0.02
-0.03
IO = 2.5 A
-0.04
IO = 5 A
-0.05
8
9
10
11
12
13
VI - Input Voltage - V
14
15
16
17
Figure 2-4. TPS54521EVM-607 Line Regulation
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2.5 Load Transients
Figure 2-5 shows the TPS54521EVM-607 response to load transients. The current step is from 2 A to 4 A at 12
V input. Total peak-to-peak voltage variation is as shown, including ripple and noise on the output.
Vout = 100 mV / div (AC coupled)
Iout = 2 A / div (2A to 4 A load step)
Vin = 12 V
Time = 10 μsec / div
Figure 2-5. TPS54521EVM-607 Transient Response
2.6 Loop Characteristics
Figure 2-6 shows the TPS54521EVM-607 loop-response characteristics. Gain and phase plots are shown for VIN
voltage of 12 V. Load current for the measurement is 5 A.
60
180
50
150
40
120
90
30
60
Gain - dB
20
30
10
Gain
0
0
-10
-30
-20
-60
-30
-90
-120
-40
Vin = 12 V
Load = 5 A
-50
-150
Frequency - Hz
-180
1000000
100000
10000
1000
100
-60
Phase - Deg
Phase
Figure 2-6. TPS54521EVM-607 Loop Response
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Test Setup and Results
2.7 Output Voltage Ripple
Figure 2-7 shows the TPS54521EVM-607 output voltage ripple. The output current is the rated full load of 5 A
and VIN = 12 V. The ripple voltage is measured directly across the output capacitors.
Vout = 50 mV / div (AC coupled)
Inductor Current = 2 A / div
PH = 10 V / div
Time = 1 μsec / div
Figure 2-7. TPS54521EVM-607 Output Ripple
2.8 Input Voltage Ripple
Figure 2-8 shows the TPS54521EVM-607 input voltage ripple. The output current is the rated full load of 5 A and
VIN = 12 V. The ripple voltage is measured directly across the input capacitors.
Vout = 200 mV / div (AC coupled)
Inductor Current = 2 A / div
PH = 10 V / div
Time = 1 μsec / div
Figure 2-8. TPS54521EVM-607 Input Ripple
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2.9 Powering Up
Figure 2-9 and Figure 2-10 show the start-up waveforms for the TPS54521EVM-607. In Figure 2-9, the output
voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R1 and R2 resistor
divider network. In Figure 2-10, the input voltage is initially applied and the output is inhibited by using a jumper
at J2 to tie EN to GND. When the jumper is removed, EN is released. When the EN voltage reaches the
enable-threshold voltage, the start-up sequence begins and the output voltage ramps up to the externally set
value of 3.3 V. The input voltage for these plots is 12 V and the load is 0.66 Ω.
Vin = 10 V / div
EN = 2 V / div
SS/TR = 1 V / div
Vout = 2 V / div
Time = 2 msec / div
Figure 2-9. TPS54521EVM-607 Start-Up Relative to VIN
Vin = 10 V / div
EN = 2 V / div
SS/TR = 1 V / div
Vout = 2 V / div
Time = 2 msec / div
Figure 2-10. TPS54521EVM-607 Start-Up Relative to Enable
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Test Setup and Results
2.10 Hiccup Overcurrent Mode Operation
Figure 2-11 shows the TPS54521EVM-607 operating in a near shorted output (0.1 Ω load) condition. If the
current in the high-side MOSFET reaches the current limit for 512 switching cycles in a row, the TPS54521
enters hiccup overcurrent protection and stops switching (hiccups) for the next 16384 cycles.
Vout = 2 V / div
Inductor Current =10 A / div
PH = 10 V / div
Vin = 12 V
Load = 0.1 Ω
SS/TR = 1 V / div
Time = 20 msec / div
Figure 2-11. TPS54521EVM-607 Overcurrent Hiccup Mode
2.11 Thermal Characteristics
This section shows a thermal image of the TPS54521EVM-607 running at 12 V input and 5 A load and a graph
showing the junction temperature vs. output current of the EVM circuit. There is no air flow and the ambient
temperature is 25°C. The peak temperature of the IC (91.9°C) is below the maximum recommended operating
condition listed in the data sheet of 125°C.
Figure 2-12. TPS54521EVM-607 Thermal Image
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TJ - Junction Temperature - °C
125
VIN = 12V
Vout = 3.3V
Fsw = 480kHz
Ta = room temperature
no airflow
100
75
50
25
0
0.5
1
1.5 2 2.5 3 3.5
Load Current - A
4
4.5
5
Figure 2-13. TPS54521EVM-607 Junction Temperature vs Load Current
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Board Layout
3 Board Layout
This section provides a description of the TPS54521EVM-607, board layout, and layer illustrations.
3.1 Layout
The board layout for the TPS54521EVM-607 is shown in Figure 3-1 through Figure 3-5. The topside layer of the
EVM is laid out in a manner typical of a user application. The top, bottom and internal layers are 2-oz. copper.
The top layer contains the main power traces for PVIN, VIN, VOUT, and VPHASE. Also on the top layer are
connections for the remaining pins of the TPS54521 and a large area filled with ground. The bottom and internal
ground layers contain ground planes only. The top side ground traces are connected to the bottom and internal
ground planes with multiple vias placed around the board including two vias directly under the TPS54521 device
to provide a thermal path from the top-side ground plane to the bottom-side ground plane.
The input decoupling capacitors (C2, and C3) and bootstrap capacitor (C5) are all located as close to the IC
as possible. In addition, the voltage set-point resistor divider components are also kept close to the IC. The
voltage divider network ties to the output voltage at the point of regulation, the copper VOUT trace at the J3
output connector. For the TPS54521, an additional input bulk capacitor may be required, depending on the EVM
connection to the input supply. Critical analog circuits such as the voltage setpoint divider, frequency set resistor,
slow start capacitor and compensation components are terminated to ground using a wide ground trace separate
from the power ground pour.
Figure 3-1. TPS54521EVM-607 Top-Side Layout
(Top View)
Figure 3-2. TPS54521EVM-607 Layer 2 (X-Ray Top
View)
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Figure 3-3. TPS54521EVM-607 Layer 3 (X-Ray Top
View)
Figure 3-4. TPS54521EVM-607 Bottom-Side Layout
(Bottom View)
Figure 3-5. TPS54521EVM-607 Top-Side Assembly
3.2 Estimated Circuit Area
The estimated printed circuit board area for the components used in this design is 246 in2 (0.38 mm2). This area
does not include test point or connectors.
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Schematic and Bill of Materials
4 Schematic and Bill of Materials
This section presents the TPS54521EVM-607 schematic and bill of materials.
4.1 Schematic
Figure 4-1 is the schematic for the TPS54521EVM-607.
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+
Schematic and Bill of Materials
Figure 4-1. TPS54521EVM-607 Schematic
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Schematic and Bill of Materials
4.2 Bill of Materials
Table 4-1 presents the bill of materials for the TPS54521EVM-607.
Table 4-1. TPS54521EVM-607 Bill of Materials
COUNT
REFDES
VALUE
DESCRIPTION
SIZE
PART NUMBER
MFR
1
C2
10 µF
Capacitor, Ceramic, 25 V, X5R, 20%
1210
Std
Std
1
C3
4.7 µF
Capacitor, Ceramic, 25 V, X5R, 10%
0805
Std
Std
1
C4
5600 pF
Capacitor, Ceramic, 50 V, X7R, 10%
0603
Std
Std
1
C5
0.1 µF
Capacitor, Ceramic, 16 V, X7R, 10%
0603
Std
Std
1
C6
560 pF
Capacitor, Ceramic, 50 V, C0G, 5%
0603
Std
Std
1
C7
0.01 µF
Capacitor, Ceramic, 10 V, X7R, 10%
0603
Std
Std
1
C8
10 µF
Capacitor, Ceramic, 10 V, X5R, 10%
0805
Std
Std
1
C9
330 µF
Capacitor, Alum Electrolytic 6.3 V, 125
mΩ ESR, ±20%
6.30 mm Dia
EKZE6R3ELL331
MF11D
Chemi-con
1
L1
3.3 µH
Inductor, 12mΩ DCR, 7.5 A, ± 20%
0.300 Dia. inch
DR0608-332L
Coilcraft
1
R1
511 K
Resistor, Chip, 1/16W, 1%
0603
Std
Std
2
R2, R3
100 K
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R4
38.3 K
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R7
51.1
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R8
31.6 K
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R9
10.0 K
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
U1
TPS54521RHL
IC, 17V Input, 5-A Output, Sync. StepDown Switcher With Integrated FET
QFN14
TPS54521RHL
TI
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (August 2010) to Revision A (August 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................3
• Updated the user's guide title............................................................................................................................. 3
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