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Table of Contents
User’s Guide
TPS54527 Step-Down Converter Evaluation Module User's
Guide
ABSTRACT
This user's guide contains information for the TPS54527 as well as support documentation for the
TPS54527EVM-052 evaluation module. Included are the performance specifications, schematic, and the bill
of materials of the TPS54527EVM-052.
Table of Contents
1 Introduction.............................................................................................................................................................................3
2 Performance Specification Summary................................................................................................................................... 4
3 Modifications...........................................................................................................................................................................5
3.1 Output Voltage Setpoint..................................................................................................................................................... 5
3.2 Output Filter and Closed-Loop Response..........................................................................................................................5
4 Test Setup and Results.......................................................................................................................................................... 6
4.1 Input/Output Connections.................................................................................................................................................. 6
4.2 Start-Up Procedure............................................................................................................................................................ 6
4.3 Efficiency............................................................................................................................................................................7
4.4 Load Regulation................................................................................................................................................................. 8
4.5 Line Regulation.................................................................................................................................................................. 8
4.6 Load Transient Response.................................................................................................................................................. 9
4.7 Output Voltage Ripple........................................................................................................................................................ 9
4.8 Input Voltage Ripple......................................................................................................................................................... 10
4.9 Start-Up............................................................................................................................................................................10
5 Board Layout.........................................................................................................................................................................13
5.1 Layout.............................................................................................................................................................................. 13
6 Schematic, Bill of Materials, and Reference...................................................................................................................... 16
6.1 Schematic........................................................................................................................................................................ 16
6.2 Bill of Materials.................................................................................................................................................................17
6.3 Reference.........................................................................................................................................................................17
7 Revision History................................................................................................................................................................... 17
List of Figures
Figure 4-1. TPS54527EVM-052 Efficiency.................................................................................................................................. 7
Figure 4-2. TPS54527EVM-052 Light-Load Efficiency................................................................................................................ 7
Figure 4-3. TPS54527EVM-052 Load Regulation, VIN = 5 V and VIN = 12 V.............................................................................. 8
Figure 4-4. TPS54527EVM-052 Line Regulation........................................................................................................................ 8
Figure 4-5. TPS54527EVM-052 Load Transient Response........................................................................................................ 9
Figure 4-6. TPS54527EVM-052 Output Voltage Ripple.............................................................................................................. 9
Figure 4-7. TPS54527EVM-052 Input Voltage Ripple............................................................................................................... 10
Figure 4-8. TPS54527EVM-052 Start-Up Relative to VIN With SS............................................................................................ 10
Figure 4-9. TPS54527EVM-052 Start-Up Relative to VIN With VREG5.....................................................................................11
Figure 4-10. TPS54527EVM-052 Start-Up Relative to EN With SS.......................................................................................... 11
Figure 4-11. TPS54527EVM-052 Start-Up Relative to EN With VREG5................................................................................... 12
Figure 5-1. Top Assembly.......................................................................................................................................................... 13
Figure 5-2. Top Layer.................................................................................................................................................................13
Figure 5-3. Internal Layer 1....................................................................................................................................................... 14
Figure 5-4. Internal Layer 2....................................................................................................................................................... 14
Figure 5-5. Bottom Layer........................................................................................................................................................... 15
Figure 6-1. TPS54527EVM-052 Schematic Diagram................................................................................................................ 16
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Trademarks
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List of Tables
Table 1-1. Input Voltage and Output Current Summary...............................................................................................................3
Table 2-1. TPS54527EVM-052 Performance Specifications Summary.......................................................................................4
Table 3-1. Output Voltages.......................................................................................................................................................... 5
Table 4-1. Connection and Test Points........................................................................................................................................ 6
Table 6-1. Bill of Materials..........................................................................................................................................................17
Trademarks
D-CAP2™ are trademarks of Texas Instruments.
All trademarks are the property of their respective owners.
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Introduction
1 Introduction
The TPS54527 is a single, adaptive on-time, D-CAP2™ mode, synchronous buck converter requiring a low
external component count. The D-CAP2™ control circuit is optimized for low-ESR output capacitors such as
POSCAP, SP-CAP, or ceramic types and features fast transient response with no external compensation. The
switching frequency is internally set at a nominal 650 kHz. The high-side and low-side switching MOSFETs
are incorporated inside the TPS54527 package along with the gate drive circuitry. The low drain-to-source on
resistance of the MOSFETs allows the TPS54527 to achieve high efficiencies and helps keep the junction
temperature low at high-output currents. The TPS54527 DC/DC synchronous converter is designed to provide
up to a 5-A output from an input voltage source of 4.5 V to 18 V. The output voltage range is from 0.76 V to 6 V.
Rated input voltage and output current range for the evaluation module are given in Table 1-1.
The TPS54527EVM-052 evaluation module is a single, synchronous buck converter providing 1.05 V at 5 A from
4.5-V to 18-V input. This user’s guide describes the TPS54527EVM-052 performance.
Table 1-1. Input Voltage and Output Current Summary
EVM
INPUT VOLTAGE RANGE
OUTPUT CURRENT RANGE
TPS54527EVM-052
VIN = 4.5 V to 18 V
0 A to 5 A
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Performance Specification Summary
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2 Performance Specification Summary
A summary of the TPS54527EVM-052 performance specifications is provided in Table 2-1. Specifications are
given for an input voltage of VIN = 12 V and an output voltage of 1.05 V, unless otherwise noted. The ambient
temperature is 25°C for all measurement, unless otherwise noted.
Table 2-1. TPS54527EVM-052 Performance Specifications Summary
SPECIFICATIONS
TEST CONDITIONS
Input voltage range (VIN)
MIN
TYP
MAX
4.5
12
18
Output voltage
Operating frequency
VIN = 12 V, IO = 5 A
Output current range
4
UNIT
V
1.05
V
650
kHz
0
5
IO = 2.5 A
Load regulation
VIN = 12 V
Overcurrent limit
VIN = 12 V, LO = 1.5 µH
Output ripple voltage
VIN = 12 V, IO = 5 A
15
mVPP
Maximum efficiency
VIN = 5 V, IO= 0.7 A
88
%
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±0.33
A
Line regulation
%
±0.15
5.6
6.4
%
7.9
A
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Modifications
3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54527. Some modifications
can be made to this module.
3.1 Output Voltage Setpoint
To change the output voltage of the EVMs, it is necessary to change the value of resistor R1. Changing the
value of R1 can change the output voltage above 0.765 V. The value of R1 for a specific output voltage can be
calculated using Equation 1.
For output voltage from 0.76 V to 7 V:
æ R1 ö
VO = 0.765 ´ ç 1+
÷
è R2 ø
(1)
Table 3-1 lists the R1 values for some common output voltages. For higher output voltages of 1.8 V or above,
a feedforward capacitor (C4) may be required to improve phase margin. Pads for this component (C4) are
provided on the printed-circuit board. Note that the resistor values given in Table 3-1 are standard values and not
the exact value calculated using Equation 1.
Table 3-1. Output Voltages
OUTPUT VOLTAGE
(V)
R1
(kΩ)
R2
(kΩ)
1
6.81
1.05
1.2
C4
(pF)
L1
(µH)
C9, C10, C11 TOTAL
CAPACITANCE
(µF)
22.1
1 - 1.5
22 - 68
8.25
22.1
1 - 1.5
22 - 68
12.7
22.1
1 - 1.5
22 - 68
1.5
21.5
22.1
1.5
22 - 68
1.8
30.1
22.1
5 - 22
1.5
22 - 68
2.5
49.9
22.1
5 - 22
2.2
22 - 68
3.3
73.2
22.1
5 - 22
2.2
22 - 68
5
124
22.1
5 - 22
3.3
22 - 68
3.2 Output Filter and Closed-Loop Response
The TPS54527 relies on the output filter characteristics to ensure stability of the control loop. The recommended
output filter components for common output voltages are given in Table 3-1. It is possible for other output filter
component values to provide acceptable closed-loop characteristics. R3 and TP4 are provided for convenience
in breaking the control loop and measuring the closed-loop response.
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Test Setup and Results
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4 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54527EVM-052. It also includes test
results typical for the following:
•
•
•
•
•
•
•
•
Evaluation module and efficiency
Output load regulation
Output line regulation
Load transient response
Output voltage ripple
Input voltage ripple
Start-up
Switching frequency
4.1 Input/Output Connections
Table 4-1 shows the input/output connectors and test points of TPS54527EVM-052. Connect a power supply
capable of supplying 2 A to J1 through a pair of 20 AWG wires. Connect the load to J2 through a pair of 20 AWG
wires. The maximum load current capability is 5 A. Minimize wire lengths to reduce losses in the wires. Test point
TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. Use
TP8 to monitor the output voltage with TP9 as the ground reference.
Table 4-1. Connection and Test Points
REFERENCE DESIGNATOR
FUNCTION
J1
VIN (See Table 1-1 for VIN range.)
J2
VOUT, 1.05 V at 5-A maximum
JP1
EN control. Connect EN to OFF to disable, connect EN to ON to enable.
TP1
VIN test point at VIN connector
TP2
GND test point at VIN
TP3
EN test point
TP4
Loop response measurement test point
TP5
VREG5 test point
TP6
Switch node test point
TP7
Analog ground test point
TP8
Output voltage test point
TP9
Ground test point at output connector
4.2 Start-Up Procedure
1. Make sure that the jumper at JP1 (Enable control) is set from EN to OFF.
2. Apply appropriate VIN voltage to VIN and PGND terminals at J1.
3. Move the jumper at JP1 (Enable control) to cover EN and ON. The EVM enables the output voltage.
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Test Setup and Results
4.3 Efficiency
Figure 4-1 shows the efficiency for the TPS54527EVM-052 at an ambient temperature of 25°C.
100
90
80
Efficiency (%)
70
60
50
40
30
20
VIN = 5 V
VIN = 12 V
10
0
0
0.5
1
1.5
2
2.5
3
Output Current (A)
3.5
4
4.5
5
G001
Figure 4-1. TPS54527EVM-052 Efficiency
Figure 4-2 shows the efficiency at light loads for the TPS54527EVM-052 at an ambient temperature of 25°C.
100
90
80
Efficiency (%)
70
60
50
40
30
20
VIN = 5 V
VIN = 12 V
10
0
0.01
0.1
1
10
Output Current (A)
G002
Figure 4-2. TPS54527EVM-052 Light-Load Efficiency
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4.4 Load Regulation
The load regulation for the TPS54527EVM-052 is shown in Figure 4-3.
0.2
VIN = 5 V
VIN = 12 V
Output Voltage Deviation (%)
0.15
0.1
0.05
0
−0.05
−0.1
−0.15
−0.2
0
0.5
1
1.5
2
2.5
3
Output Current (A)
3.5
4
4.5
5
G003
Figure 4-3. TPS54527EVM-052 Load Regulation, VIN = 5 V and VIN = 12 V
4.5 Line Regulation
The line regulation for the TPS54527EVM-052 is shown in Figure 4-4.
0.4
Output Voltage Deviation (%)
0.3
0.2
0.1
0
−0.1
−0.2
−0.3
IOUT = 2.5 A
−0.4
4
8
12
Input Voltage (V)
16
20
G004
Figure 4-4. TPS54527EVM-052 Line Regulation
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Test Setup and Results
4.6 Load Transient Response
The TPS54527EVM-052 response to load transient is shown in Figure 4-5. The current step is from 1.25 A to
3.75 A. Total peak-to-peak voltage variation is as shown.
VOUT = 100 mV / div (ac coupled)
IOUT = 1 A / DIV
Load step = 1.25 A to 3.75 A
Slew rate = 1 A / µsec
Time = 100 µsec / div
Figure 4-5. TPS54527EVM-052 Load Transient Response
4.7 Output Voltage Ripple
The TPS54527EVM-052 output voltage ripple is shown in Figure 4-6. The output current is the rated full load of 5
A.
VOUT = 20 mV / div (ac coupled)
PH = 5 V / DIV
Time = 1 µsec / div
Figure 4-6. TPS54527EVM-052 Output Voltage Ripple
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Test Setup and Results
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4.8 Input Voltage Ripple
The TPS54527EVM-052 input voltage ripple is shown in Figure 4-7. The output current is the rated full load of 5
A.
VIN = 100 mV / div (ac coupled)
PH = 5 V / DIV
Time = 1 µsec / div
Figure 4-7. TPS54527EVM-052 Input Voltage Ripple
4.9 Start-Up
The TPS54527EVM-052 start-up waveforms relative to VIN are shown in Figure 4-8 and Figure 4-9.
VIN = 10 V / div
SS = 5 V / div
VOUT = 500 mV / div
Time = 1 msec / div
Figure 4-8. TPS54527EVM-052 Start-Up Relative to VIN With SS
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Test Setup and Results
VIN = 10 V / div
VREG5 = 5 V / div
VOUT = 500 mV / div
Time = 1 msec / div
Figure 4-9. TPS54527EVM-052 Start-Up Relative to VIN With VREG5
The TPS54527EVM-052 start-up waveforms relative to enable (EN) are shown in Figure 4-10 and Figure 4-11.
EN = 10 V / div
SS = 5 V / div
VOUT = 500 mV / div
Time = 1 msec / div
Figure 4-10. TPS54527EVM-052 Start-Up Relative to EN With SS
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EN = 10 V / div
VREG5 = 5 V / div
VOUT = 500 mV / div
Time = 1 msec / div
Figure 4-11. TPS54527EVM-052 Start-Up Relative to EN With VREG5
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Board Layout
5 Board Layout
This section provides description of the TPS54527EVM-052, board layout, and layer illustrations.
5.1 Layout
The board layout for the TPS54527EVM-052 is shown in Figure 5-1 through Figure 5-5. The top layer contains
the main power traces for VIN, VO, and ground. Also on the top layer are connections for the pins of the
TPS54527 and a large area filled with ground. Many of the signal traces also are located on the top side. The
input decoupling capacitors are located as close to the IC as possible. The input and output connectors, test
points, and all of the components are located on the top side. An analog ground (GND) area is provided on the
top side. Analog ground (GND) and power ground (PGND) are connected at a single point on the top layer near
C6. The bottom layer is primarily power ground but also has a trace to connect VIN to the enable jumper, a trace
to connect VREG5 to TP5, and the feedback trace from VOUT to the voltage setpoint divider network.
Figure 5-1. Top Assembly
Figure 5-2. Top Layer
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Board Layout
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Figure 5-3. Internal Layer 1
Figure 5-4. Internal Layer 2
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Board Layout
Figure 5-5. Bottom Layer
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Schematic, Bill of Materials, and Reference
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6 Schematic, Bill of Materials, and Reference
6.1 Schematic
Figure 6-1 is the schematic for the TPS54527EVM-052.
TP1
J1
VIN = 4.5 V - 18 V
1
VIN
2
GND
TP2
C1
C2
C3
10uF
10uF
0.1uF
3
JP1
ON
EN
OFF
R3 0
TP4
1
2
TP3
R4 10.0k
3
U1 2
TPS54x2xDDA
1
R1
8.25k
2
VOUT
C4
3
TP5
1
4
VIN
VFB
VBST
VREG5
SS
SW
PWPD GND
8
7
C7
0.1uF
TP6
C5
22.1k
1uF
C6
L1 1.5uH
VOUT = 1.05 V, 5 A
TP8
6
VOUT
J2
5
C8
9
R2
TP7
EN
D1
8200pF
1
C9
C10
22uF
22uF
C11
2
TP9
1
1
VOUT
GND
R5
1
1
1
Not Installed
2
See BOM for IC usage
3
Optional
IC Usage
Input Voltage Range
TPS54527
4.5 V to 18 V
Iout Max
5A
TPS54528
4.5 V to 18 V
5A
Figure 6-1. TPS54527EVM-052 Schematic Diagram
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Schematic, Bill of Materials, and Reference
6.2 Bill of Materials
Table 6-1. Bill of Materials
REFDES
QTY
VALUE
DESCRIPTION
C1, C2
2
SIZE
PART NUMBER
MFR
10 μF
Capacitor, Ceramic, 25 V, X5R, 20%
1210
Std
C11
Std
0
Open
Capacitor, Ceramic
1206
Std
Std
C3, C7
2
0.1 μF
Capacitor, Ceramic, 50 V, X7R, 10%
0603
Std
Std
C4, C8
1
Open
Capacitor, Ceramic
0603
Std
Std
C5
1
1.0 μF
Capacitor, Ceramic, 16 V, X7R, 10%
0603
Std
Std
C6
1
8200 pF
Capacitor, Ceramic, 25 V, X7R , 10%
0603
Std
Std
C9, C10
2
22 μF
Capacitor, Ceramic, 6.3 V, X5R, 20%
1206
C3216X5R0J226M
TDK
J1, J2
2
ED555/2DS
Terminal Block, 2-pin, 6-A, 3.5 mm
0.27 × 0.25 inch
ED555/2DS
Sullins
JP1
1
PEC03SAAN
Header, Male 3-pin, 100-mil spacing
0.100 inch × 3
PEC03SAAN
Sullins
L1
1
1.5 μH
Inductor, SMT, 11 A, 9.7 mΩ
0.256 × 0.280 inch
SPM6530T-1R5M100
TDK
R1
1
8.25 k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R2
1
22.1 k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R3
1
0
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R4
1
10.0 k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R5
0
Open
Resistor, Chip, 1/16W, 1%
0603
Std
Std
TP1, TP3,
TP4, TP5,
TP6, TP8
3
5000
Test Point, Red, Thru Hole Color Keyed
0.100 × 0.100 inch
5000
Keystone
TP2, TP7, TP9
3
5001
Test Point, Black, Thru Hole Color Keyed
0.100 × 0.100 inch
5001
Keystone
U1
1
TPS54527DDA
IC, 5-A Output Single Sync. Step-Down
SO8[DDA]
TPS54527DDA
TI
0.100
929950-00
3M
PWR052
Any
–
1
Shunt, 100 mil, Black
–
1
PCB, 2.76 in × 1.97 in × 0.062 in
6.3 Reference
Texas Instruments, TPS54527, Single Synchronous Converter With Integrated High Side and Low Side MOS
FET Data Sheet
7 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (July 2011) to Revision A (August 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................3
• Updated the user's guide title............................................................................................................................. 3
• Edited user's guide for clarity..............................................................................................................................3
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