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Table of Contents
User’s Guide
TPS54622 Step-Down Converter Evaluation Module User's
Guide
ABSTRACT
This user’s guide contains background information for the TPS54622 as well as support documentation for
the TPS54622EVM-012 evaluation module (PWR012). Also included are the performance specifications, the
schematic, and the bill of materials for the TPS54622EVM-012.
Table of Contents
1 Introduction.............................................................................................................................................................................2
2 Test Setup and Results.......................................................................................................................................................... 4
3 Board Layout......................................................................................................................................................................... 11
4 Schematic and Bill of Materials...........................................................................................................................................14
5 Revision History................................................................................................................................................................... 15
List of Figures
Figure 2-1. TPS54622EVM-012 Efficiency.................................................................................................................................. 5
Figure 2-2. TPS54622EVM-012 Low Current Efficiency..............................................................................................................5
Figure 2-3. TPS54622EVM-012 Load Regulation....................................................................................................................... 6
Figure 2-4. TPS54622EVM-012 Line Regulation........................................................................................................................ 6
Figure 2-5. TPS54622EVM-012 Transient Response................................................................................................................. 7
Figure 2-6. TPS54622EVM-012 Loop Response........................................................................................................................ 7
Figure 2-7. TPS54622EVM-012 Output Ripple........................................................................................................................... 8
Figure 2-8. TPS54622EVM-012 Input Ripple.............................................................................................................................. 8
Figure 2-9. TPS54622EVM-012 Start-Up Relative to VIN ........................................................................................................... 9
Figure 2-10. TPS54622EVM-012 Start-Up Relative to Enable....................................................................................................9
Figure 2-11. TPS54622EVM-012 Start Up Into Pre-Bias...........................................................................................................10
Figure 2-12. TPS54622EVM-012 Hiccup Mode Current Limit...................................................................................................10
Figure 3-1. TPS54622EVM-012 Top-Side Layout..................................................................................................................... 12
Figure 3-2. TPS54622EVM-012 Layout 2..................................................................................................................................12
Figure 3-3. TPS54622EVM-012 Layout 3..................................................................................................................................13
Figure 3-4. TPS54622EVM-012 Bottom-Side Layout................................................................................................................13
Figure 3-5. TPS54622EVM-012 Top-Side Assembly.................................................................................................................13
Figure 4-1. TPS54622EVM-012 Schematic...............................................................................................................................14
List of Tables
Table 1-1. Input Voltage and Output Current Summary...............................................................................................................2
Table 1-2. TPS54622EVM-012 Performance Specification Summary.........................................................................................2
Table 1-3. Output Voltages Available...........................................................................................................................................3
Table 2-1. EVM Connectors and Test Points............................................................................................................................... 4
Table 4-1. TPS54622EVM-012 Bill of Materials.........................................................................................................................15
Trademarks
All trademarks are the property of their respective owners.
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Introduction
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1 Introduction
1.1 Background
The TPS54622 dc/dc converter is designed to provide up to a 6-A output. The TPS54622 implements split-input
power rails with separate input voltage inputs for the power stage and control circuitry. The power stage
input (PVIN) is rated for 1.6 V to 17 V whereas the control input (VIN) is rated for 4.5 V to 17 V. The
TPS54622EVM-012 provides both inputs but is designed and tested using the PVIN connected to VIN. Rated
input voltage and output current range for the evaluation module are given in Table 1-1. This evaluation module
is designed to demonstrate the small printed-circuit-board areas that may be achieved when designing with
the TPS54622 regulator. The switching frequency is externally set at a nominal 480 kHz. The high-side and
low-side MOSFETs are incorporated inside the TPS54622 package along with the gate drive circuitry. The low
drain-to-source on resistance of the MOSFET allows the TPS54622 to achieve high efficiencies and helps
keep the junction temperature low at high output currents. The compensation components are external to the
integrated circuit (IC), and an external divider allows for an adjustable output voltage. Additionally, the TPS54622
provides adjustable slow start, tracking, and undervoltage lockout inputs. The absolute maximum input voltage is
20 V for the TPS54622EVM-012.
Table 1-1. Input Voltage and Output Current Summary
EVM
INPUT VOLTAGE RANGE
OUTPUT CURRENT
RANGE
TPS54622EVM-012
VIN = 8 V to 17 V (VIN start voltage = 6.521 V)
0 A to 6 A
1.2 Performance Specification Summary
A summary of the TPS54622EVM-012 performance specifications is provided in Table 1-2. Specifications are
given for an input voltage of VIN = 12 V and an output voltage of 3.3 V, unless otherwise specified. The
TPS54622EVM-012 is designed and tested for VIN = 8 V to 17 V with the VIN and PVIN pins connect together
with the J5 jumper. The ambient temperature is 25°C for all measurements, unless otherwise noted.
Table 1-2. TPS54622EVM-012 Performance Specification Summary
SPECIFICATION
TEST CONDITIONS
VIN voltage range (PVIN = VIN)
MIN
TYP
MAX
8
12
17
V
VIN start voltage
6.528
V
VIN stop voltage
6.19
V
3.3
V
Output voltage set point
Output current range
VIN = 8 V to 17 V
Line regulation
IO = 3 A, VIN = 8 V to 17 V
±0.02
Load regulation
VIN = 12 V, IO = 0 A to 6 A
±0.013
IO = 1.5 A to 4.5 A
Load transient response
IO = 4.5 A to 1.5 A
0
6
A
%
%
Voltage change
–150
Recovery time
200
µs
Voltage change
150
mV
Recovery time
mV
200
µs
44.7
kHz
Loop bandwidth
VIN = 12 V, IO = 1.9 A
Phase margin
VIN = 12 V , IO = 1.9 A
54
°
Input ripple voltage
IO = 6 A
420
mVPP
Output ripple voltage
IO = 6 A
18
mVPP
6
ms
480
kHz
94.9
%
Output rise time
Operating frequency
Maximum efficiency
2
UNIT
TPS54622EVM-012, VIN = 8 V, IO = 2 A
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Introduction
1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54622. Some modifications
can be made to this module.
1.3.1 Output Voltage Set Point
The output voltage is set by the resistor divider network of R6 and R7. R6 is fixed at 10 kΩ. To change the output
voltage of the EVM, it is necessary to change the value of resistor R7. Changing the value of R7 can change the
output voltage above 0.6 V. The value of R7 for a specific output voltage can be calculated using Equation 1.
R7=
10 k W´ 0.6 V
VOUT - 0.6V
(1)
Table 1-3 lists the R8 values for some common output voltages. Note that VIN must be in a range so that the
minimum on-time is greater than 120 ns, and the maximum duty cycle is less than 95%. The values given in
Table 1-3 are standard values, not the exact value calculated using Equation 1.
Table 1-3. Output Voltages Available
Output Voltage
(V)
R7 Value
(kΩ)
1.8
4.99
2.5
3.16
3.3
2.21
5
1.37
1.3.2 Slow-Start Time
The slow-start time can be adjusted by changing the value of C9. Use Equation 2 to calculate the required value
of C9 for a desired slow-start time
C9(nF) =
Tss (ms ) ´ Iss(mA )
Vref ( V )
(2)
The EVM is set for a slow-start time of approximately 6 ms using C9 = 0.01 µF.
1.3.3 Track In
The TPS54622 can track an external voltage during start-up. The J5 connector is provided to allow connection to
that external voltage. Ratiometric or simultaneous tracking can be implemented using resistor divider R5 and R6.
See the TPS54622 data sheet (SLVSA70) for details.
1.3.4 Adjustable UVLO
The undervoltage lockout (UVLO) can be adjusted externally using R1 and R2. The EVM is set for a start voltage
of 6.528 V and a stop voltage of 6.190 V using R1 = 35.7 kΩ and R2 = 8.06 kΩ. Use Equation 3 and Equation 4
to calculate required resistor values for different start and stop voltages.
æV
ö
VSTART ç ENFALLING ÷ - VSTOP
VENRISING ø
è
R1=
æ V
ö
Ip ç 1- ENFALLING ÷ +Ih
è VENRISING ø
R2=
(3)
R1× VENFALLING
VSTOP - VENFALLING +R1(Ip +Ih)
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1.3.5 Input Voltage Rails
The EVM is designed to accommodate different input voltage levels for the power stage and control logic. During
normal operation, the PVIN and VIN inputs are connected using a jumper across J5. The single input voltage is
supplied at J1. If desired, these two input voltage rails may be separated by removing the jumper across J5. Two
input voltages must then be provided at both J1 and J4.
2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54622EVM-012 evaluation module.
The section also includes test results typical for the evaluation module and covers efficiency, output voltage
regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1 Input/Output Connections
The TPS54622EVM-012 is provided with input/output connectors and test points as shown in Table 2-1. A power
supply capable of supplying 4 A must be connected to J1 through a pair of 20 AWG wires. The jumper across
J5 must be in place. See Section 1.3.5 for split-input voltage rail operation. The load must be connected to
J2 through a pair of 20 AWG wires. The maximum load current capability must be 6 A. Wire lengths must be
minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input voltages with
TP2 providing a convenient ground reference. TP3 is used to monitor the output voltage with TP5 as the ground
reference.
Table 2-1. EVM Connectors and Test Points
Reference Designator
4
Function
J1
PVIN input voltage connector. (See Table 1-1 for VIN range.)
J2
VOUT, 3.3 V at 6 A maximum.
J3
2-pin header for enable. Connect EN to ground to disable, open to enable.
J4
VIN input voltage connector. Not normally used.
J5
PVIN to VIN jumper. Normally closed to tie VIN to PVIN for common rail voltage operation.
J6
2-pin header for tracking voltage input and ground.
J7
2-pin header for tracking output and ground.
TP1
PVIN test point at PVIN connector.
TP2
GND test point at PVIN connector.
TP3
Output voltage test point at VOUT connector.
TP4
PH test point.
TP5
GND test point at VOUT connector.
TP6
Test point between voltage divider network and output. Used for loop response measurements. Slow start/track
in test point.
TP7
COMP pin test point.
TP8
VIN test point at VIN connector.
TP9
GND test point at VIN connector.
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Test Setup and Results
2.2 Efficiency
The efficiency of this EVM peaks at a load current of about 2 A and then decreases as the load current increases
toward full load. Figure 2-1 shows the efficiency for the TPS54622EVM-012 at an ambient temperature of 25°C.
100
95
90
Efficiency - %
85
VIN = 8 V
VIN = 12 V
80
VIN = 17 V
75
70
65
60
55
50
0
1
2
3
Output Current - A
4
5
6
Figure 2-1. TPS54622EVM-012 Efficiency
Figure 2-2 shows the efficiency for the TPS54622EVM-012 using a semi-log scale to more easily show efficiency
at lower output currents. The ambient temperature is 25°C.
100
VIN = 17 V
VIN = 12 V
90
80
VIN = 8 V
Efficiency - %
70
60
50
40
30
20
10
0
0.01
0.1
1.0
10.0
Output Current - A
Figure 2-2. TPS54622EVM-012 Low Current Efficiency
The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-source
resistance of the internal MOSFET.
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Test Setup and Results
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2.3 Output Voltage Load Regulation
Figure 2-3 shows the load regulation for the TPS54622EVM-012.
0.4
Output Voltage Deviation - %
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
0
1
2
3
Output Current - A
5
4
6
Figure 2-3. TPS54622EVM-012 Load Regulation
Measurements are given for an ambient temperature of 25°C.
2.4 Output Voltage Line Regulation
Figure 2-4 shows the line regulation for the TPS54622EVM-012.
0.4
Output Voltage Deviation - %
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
8
9
10
11
13
12
Input Voltage - V
14
15
16
17
Figure 2-4. TPS54622EVM-012 Line Regulation
6
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Test Setup and Results
2.5 Load Transients
Figure 2-5 shows the TPS54622EVM-012 response to load transients. The current step is from 25% to 75%
of maximum rated load at 12-V input. The current step slew rate is 100 mA / µsec. Total peak-to-peak voltage
variation is as shown, including ripple and noise on the output.
VOUT = 100 mV / div (dc coupled, -3.13 V offset)
IOUT = 2 A / div
Load step = 1.5 A to 4.5 A Slew rate = 100 mA / µsec
Time = 200 µsec / div
Figure 2-5. TPS54622EVM-012 Transient Response
2.6 Loop Characteristics
Figure 2-6 shows the TPS54622EVM-012 loop-response characteristics. Gain and phase plots are shown for VIN
voltage of 12 V. Load current for the measurement is 1.9 A.
60
180
50
150
Phase
120
30
90
20
60
10
30
0
0
Gain
-10
-30
-20
-60
-30
-90
-40
-120
-50
-150
-60
100
1000
10000
100000
Phase - Degrees
Gain - dB
40
-180
1000000
Frequency - Hz
Figure 2-6. TPS54622EVM-012 Loop Response
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Test Setup and Results
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2.7 Output Voltage Ripple
Figure 2-7 shows the TPS54622EVM-012 output voltage ripple. The output current is the rated full load of 6 A
and VIN = 12 V. The ripple voltage is measured directly across the output capacitors.
VOUT = 20 mV / div (ac coupled)
PH = 5 V / div
Time = 1 µsec / div
Figure 2-7. TPS54622EVM-012 Output Ripple
2.8 Input Voltage Ripple
Figure 2-8 shows the TPS54622EVM-012 input voltage. The output current is the rated full load of 6 A and VIN =
12 V. The ripple voltage is measured directly across the input capacitors.
VIN = 500 mV / div
PH = 5 V / div
Time = 1 µsec / div
Figure 2-8. TPS54622EVM-012 Input Ripple
8
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Test Setup and Results
2.9 Powering Up
Figure 2-9 and Figure 2-10 show the start-up waveforms for the TPS54622EVM-012. In Figure 2-9, the output
voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R1 and R2 resistor
divider network. In Figure 2-10, the input voltage is initially applied and the output is inhibited by using a jumper
at J3 to tie EN to GND. When the jumper is removed, EN is released. When the EN voltage reaches the
enable-threshold voltage, the start-up sequence begins and the output voltage ramps up to the externally set
value of 3.3 V. The input voltage for these plots is 12 V and the load is 1 Ω.
VIN = 5 V / div
VOUT = 1 V / div
Time = 2 msec / div
Figure 2-9. TPS54622EVM-012 Start-Up Relative to VIN
VIN = 5 V / div
EN = 2 V / div
VOUT = 2 V / div
Time = 2 msec / div
Figure 2-10. TPS54622EVM-012 Start-Up Relative to Enable
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Test Setup and Results
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2.10 Pre-Bias Start-Up
The TPS54622 is designed to start up into a pre-biased output. The output voltage is not discharged to ground
at the beginning of the slow-start sequence. Figure 2-11 shows the start-up waveform with the output voltage
pre-biased to 1 V.
VIN = 10 V / div
VOUT = 2 V / div
PH = 10 V / div
Time = 2 msec / div
Figure 2-11. TPS54622EVM-012 Start Up Into Pre-Bias
2.11 Hiccup Mode Current Limit
The TPS54622 features hiccup mode current limit. When an overcurrent event occurs, the TPS54622 shuts
down and restarts. Figure 2-12 shows restart sequence in an over current condition.
VOUT = 2 V / div
PH = 10 V / div
Inductor Current = 5 A / div
Time = 20 msec / div
Figure 2-12. TPS54622EVM-012 Hiccup Mode Current Limit
10
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Board Layout
3 Board Layout
This section provides a description of the TPS54622EVM-012 board layout and layer illustrations.
3.1 Layout
The board layout for the TPS54622EVM-012 is shown in Figure 3-1 through Figure 3-5. The top-side layer of the
EVM is laid out in a manner typical of a user application. The top, bottom, and internal layers are 2-oz. copper.
The top layer contains the main power traces for PVIN, VIN, VOUT, and VPHASE. Also on the top layer are
connections for the remaining pins of the TPS54622 and a large area filled with ground. The bottom and internal
ground layers contain ground planes only. The top-side ground traces are connected to the bottom and internal
ground planes with multiple vias placed around the board including two vias directly under the TPS54622 device
to provide a thermal path from the top-side ground plane to the bottom-side ground plane.
The input decoupling capacitors (C1, and C2) and bootstrap capacitor (C3) are all located as close to the
IC as possible. Additionally, the voltage set-point resistor divider components are kept close to the IC. The
voltage divider network ties to the output voltage at the point of regulation, the copper VOUT trace at the J2
output connector. For the TPS54622, an additional input bulk capacitor may be required, depending on the
EVM connection to the input supply. Critical analog circuits such as the voltage setpoint divider, frequency set
resistor, slow-start capacitor, and compensation components are terminated to ground using a wide ground trace
separate from the power ground pour.
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Board Layout
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Figure 3-1. TPS54622EVM-012 Top-Side Layout
Figure 3-2. TPS54622EVM-012 Layout 2
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Board Layout
Figure 3-3. TPS54622EVM-012 Layout 3
Figure 3-4. TPS54622EVM-012 Bottom-Side Layout
Figure 3-5. TPS54622EVM-012 Top-Side Assembly
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Schematic and Bill of Materials
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4 Schematic and Bill of Materials
This section presents the TPS54622EVM-012 schematic and bill of materials.
4.1 Schematic
TRACK OUT
2
1
TRACK IN
1
2
1
2
EN
GND
R7
2.21k
J6
V_SNS
C10
Open
R6
10.0k
TP6
SS/TR
R2
8.06k
C8
4.7uF
R1
35.7k
C11
open
C2
10uF
J3
TP9
1
VIN
GND
PVIN
GND
J4
2
2
VIN
TP8
1
J5
PVIN
1
J1
2
TP2
EN
C1
Open
VIN = 8 - 17 V
TP1
Open
R9
Open
15
COMP
VIN
V_SNS
V_SNS
7
PVIN
5
4
6
PVIN
GND
3
GND
C4
0.01uf
R4
3.74k
8
EN
9
10
EN
PH
PH
11
12
13
BOOT
PWRGD
RT/CLK
1
R3
100k
2
U1
PWPD
TPS54622RGY
14
C3
0.1uF
TP4
C5
47pF
TP7
L1
3.3uH
C9
0.022uf
C6
100uF
R8
C7
open
R5
51.1
GND
TP5
VOUT = 3.3 V, 6 A
TP3
2
1
J7
GND
GND
J2
VOUT
Figure 4-1 is the schematic for the TPS54622EVM-012.
Figure 4-1. TPS54622EVM-012 Schematic
14
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Schematic and Bill of Materials
4.2 Bill of Materials
Table 4-1 presents the bill of materials for the TPS54622EVM-012.
Table 4-1. TPS54622EVM-012 Bill of Materials
Count
RefDes
Value
Description
Size
Part Number
MFR
0
C1
Open
Capacitor, Ceramic
1210
Std
Std
1
C2
10µF
Capacitor, Ceramic, 25V, X5R, 20%
1210
Std
Std
1
C3
0.1µF
Capacitor, Ceramic, 25V, X7R, 10%
0603
Std
Std
1
C4
0.01µF
Capacitor, Ceramic, 25V, X7R, 10%
0603
Std
Std
1
C5
47pF
Capacitor, Ceramic, 50V, COG, 10%
0603
Std
Std
1
C6
100µF
Capacitor, Ceramic, 6.3V, X5R, 20%
1206
Std
Std
0
C7
Open
Capacitor, Ceramic
1206
Std
Std
1
C8
4.7µF
Capacitor, Ceramic, 25V, X5R, 10%
0805
Std
Std
1
C9
0.022µF
Capacitor, Ceramic, 25V, X5R, 10%
0603
Std
Std
0
C10, C11
Open
Capacitor, Ceramic
0603
Std
Std
3
J1, J2, J4
ED555/2DS
Terminal Block, 2-pin, 6-A, 3.5mm
0.27 x 0.25
inch
ED555/2DS
OST
4
J3, J5, J6,
J7
PEC02SAAN
Header, Male 2-pin, 100mil spacing
0.100 inch x 2
PEC02SAAN
Sullins
1
L1
3.3µH
Inductor, SMT, 7.2A, 10.4milliohm
0.402 sq inch
MSS1048-332
NL_
Coilcraft
1
R1
35.7k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R2
8.06k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R3
100k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R4
3.74k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R5
51.1
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R6
10.0k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
1
R7
2.21k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
0
R8, R9
Open
Resistor, Chip, 1/16W, 1%
0603
Std
Std
6
TP1, TP3,
TP4, TP6,
TP7, TP8
5000
Test Point, Red, Thru Hole Color Keyed
0.100 x 0.100
inch
5000
Keystone
3
TP2, TP5,
TP9
5001
Test Point, Black, Thru Hole Color Keyed
0.100 x 0.100
inch
5001
Keystone
1
U1
TPS54622RHL
IC, 1.6V-17V Synchronous Buck PWM
Converter with Integrated MOSFET
3.5mm x
TPS54622RG
3.3mm QFN14 HL
TI
2
—
Shunt, 100-mil, Black
0.100
929950-00
3M
1
—
Label (see note 5)
1.25 x 0.25
inch
THT-13-457-10 Brady
1
—
PCB, 2.5” x 2.5” x 0.062”
PWR012
Any
Notes
1.
2.
3.
4.
5.
These assemblies are ESD sensitive, ESD precautions shall be observed.
These assemblies must be clean and free from flux and all contaminants. Use of no clean flux is not acceptable.
These assemblies must comply with workmanship standards IPC-A-610 Class 2.
Ref designators marked with an asterisk (‘**’) cannot be substituted. All other components can be substituted with equivalent MFG's
components.
Install label in silkscreened box after final wash. Text shall be 8 pt font
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
SLVU441B – MAY 2011 – REVISED AUGUST 2021
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TPS54622 Step-Down Converter Evaluation Module User's Guide
Copyright © 2021 Texas Instruments Incorporated
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Revision History
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Changes from Revision A (September 2011) to Revision B (August 2021)
Page
• Updated user's guide title................................................................................................................................... 2
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................2
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TPS54622 Step-Down Converter Evaluation Module User's Guide
Copyright © 2021 Texas Instruments Incorporated
SLVU441B – MAY 2011 – REVISED AUGUST 2021
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