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Table of Contents
User’s Guide
TPS562201 Step-Down Converter Evaluation Module
User's Guide
ABSTRACT
This user's guide contains information for the TPS562201 as well as support documentation for the
TPS562201EVM-715 evaluation module. Included are the performance specifications, schematic, and the bill
of materials of the TPS562201EVM-715.
Table of Contents
1 Introduction.............................................................................................................................................................................3
2 Performance Specification Summary................................................................................................................................... 4
3 Modifications...........................................................................................................................................................................5
3.1 Output Voltage Setpoint..................................................................................................................................................... 5
4 Test Setup and Results.......................................................................................................................................................... 6
4.1 Input/Output Connections.................................................................................................................................................. 6
4.2 Start-Up Procedure............................................................................................................................................................ 6
4.3 Efficiency............................................................................................................................................................................7
4.4 Load Regulation................................................................................................................................................................. 8
4.5 Line Regulation.................................................................................................................................................................. 8
4.6 Load Transient Response.................................................................................................................................................. 9
4.7 Output Voltage Ripple........................................................................................................................................................ 9
4.8 Input Voltage Ripple......................................................................................................................................................... 10
4.9 Start-Up............................................................................................................................................................................ 11
4.10 Shut-Down......................................................................................................................................................................11
5 Board Layout.........................................................................................................................................................................12
5.1 Layout.............................................................................................................................................................................. 12
6 Schematic, Bill of Materials, and Reference...................................................................................................................... 13
6.1 Schematic........................................................................................................................................................................ 13
6.2 Bill of Materials.................................................................................................................................................................14
6.3 Reference.........................................................................................................................................................................15
7 Revision History................................................................................................................................................................... 15
List of Figures
Figure 4-1. Efficiency................................................................................................................................................................... 7
Figure 4-2. Light-Load Efficiency................................................................................................................................................. 7
Figure 4-3. Load Regulation........................................................................................................................................................ 8
Figure 4-4. Line Regulation......................................................................................................................................................... 8
Figure 4-5. Load Transient Response, 25% to 75% Load Step...................................................................................................9
Figure 4-6. Output Voltage Ripple, IOUT = 2 A............................................................................................................................. 9
Figure 4-7. Output Voltage Ripple, IOUT = 250 mA...................................................................................................................... 9
Figure 4-8. Output Voltage Ripple, IOUT = 10 mA...................................................................................................................... 10
Figure 4-9. Input Voltage Ripple, IOUT = 2 A.............................................................................................................................. 10
Figure 4-10. Start-Up Relative to Input Voltage......................................................................................................................... 11
Figure 4-11. Start-Up Relative to EN..........................................................................................................................................11
Figure 4-12. Shut-Down Relative to Input Voltage..................................................................................................................... 11
Figure 4-13. Shut-Down Relative to EN..................................................................................................................................... 11
Figure 5-1. Top Assembly.......................................................................................................................................................... 12
Figure 5-2. Top Layer.................................................................................................................................................................12
Figure 5-3. Bottom Layer........................................................................................................................................................... 12
Figure 6-1. TPS562201EVM-715 Schematic Diagram.............................................................................................................. 13
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Trademarks
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List of Tables
Table 1-1. Input Voltage and Output Current Summary...............................................................................................................3
Table 2-1. TPS562201EVM-715Performance Specifications Summary......................................................................................4
Table 3-1. Output Voltages.......................................................................................................................................................... 5
Table 4-1. Connection and Test Points........................................................................................................................................ 6
Table 6-1. Bill of Materials..........................................................................................................................................................14
Trademarks
D-CAP2™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
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Introduction
1 Introduction
The TPS562201 is a single, adaptive on-time, D-CAP2™ mode, synchronous buck converter requiring a very
low external component count. The D-CAP2 control circuit is optimized for low-ESR output capacitors such as
POSCAP, SP-CAP, or ceramic types and features fast transient response with no external compensation. The
switching frequency is internally set at a nominal 580 kHz and enters plus skip mode in light load conditions.
The high-side and low-side switching MOSFETs are incorporated inside the TPS562201 package along with the
gate-drive circuitry. The low drain-to-source on resistance of the MOSFETs allows the TPS562201 to achieve
high efficiencies and helps keep the junction temperature low at high output currents. The TPS562201 dc/dc
synchronous converter is designed to provide up to a 2-A output from an input voltage source of 4.5 V to 17 V.
The output voltage range is from 0.768 V to 7 V. Rated input voltage and output current ranges for the evaluation
module are given in Table 1-1.
The TPS562201EVM-715 evaluation module (EVM) is a single, synchronous buck converter providing 1.05 V at
2 A from 4.5-V to 17-V input. This user’s guide describes the TPS562201EVM-715 performance.
Table 1-1. Input Voltage and Output Current Summary
EVM
INPUT VOLTAGE (VIN) RANGE
OUTPUT CURRENT (IOUT) RANGE
TPS562201EVM-715
4.5 V to 17 V
0 A to 2 A
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Performance Specification Summary
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2 Performance Specification Summary
A summary of the TPS562201EVM-715 performance specifications is provided in Table 2-1. Specifications are
given for an input voltage of VIN = 12 V and an output voltage of 1.05 V, unless otherwise noted. The ambient
temperature is 25°C for all measurement, unless otherwise noted.
Table 2-1. TPS562201EVM-715Performance Specifications Summary
SPECIFICATIONS
VIN
TEST CONDITIONS
Input voltage range
MIN
TYP
MAX
4.5
12
17
Output voltage
Operating frequency
CH1
4
VIN = 12 V, IOUT = 2 A
Output current range
VIN = 12 V, LOUT = 3.3 µH
Output ripple voltage
VIN = 12 V, IOUT = 2 A
TPS562201 Step-Down Converter Evaluation Module User's Guide
V
1.05
V
580
kHz
0
Overcurrent limit
UNIT
2
A
3
A
20
mVPP
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Modifications
3 Modifications
These evaluation modules are designed to provide access to the features of the TPS562201. Some
modifications can be made to this module.
3.1 Output Voltage Setpoint
To change the output voltage of the EVMs, it is necessary to change the value of resistor R1. Changing the
value of R1 can change the output voltage above 0.768 V. The value of R1 for a specific output voltage can be
calculated using Equation 1.
R1 =
R2 ´ (VOUT - 0.768 V )
(1)
0.768 V
Table 3-1 lists the R5 values for some common output voltages. Note that the values given in Table 3-1 are
standard values and not the exact value calculated using Table 3-1.
Table 3-1. Output Voltages
OUTPUT VOLTAGE
(V)
R1
(kΩ)
R2
(kΩ)
L1
(µH)
MIN
TYP
MAX
C5 + C6 +C7
(µF)
1.0
3.09
10.0
2.2
2.2
4.7
20 - 68
1.05
3.74
10.0
2.2
2.2
4.7
20 - 68
1.2
5.76
10.0
2.2
2.2
4.7
20 - 68
1.5
9.53
10.0
2.2
2.2
4.7
20 - 68
1.8
13.7
10.0
2.2
2.2
4.7
20 - 68
2.5
22.6
10.0
3.3
3.3
4.7
20 - 68
3.3
33.2
10.0
3.3
3.3
4.7
20 - 68
5.0
54.9
10.0
3.3
4.7
4.7
20 - 68
6.5
75.0
10.0
3.3
4.7
4.7
20 - 68
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Test Setup and Results
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4 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS562201EVM-715. The section also
includes test results typical for the evaluation modules and efficiency, output load regulation, output line
regulation, load transient response, output voltage ripple, input voltage ripple, start-up, and switching frequency.
4.1 Input/Output Connections
The TPS562201EVM-715 is provided with input/output connectors and test points as shown in Table 4-1. A
power supply capable of supplying 2 A must be connected to J1 through a pair of 20-AWG wires. The load
must be connected to J2 through a pair of 20-AWG wires. The maximum load current capability is 2 A. Wire
lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor the VIN input
voltages with TP2 providing a convenient ground reference. TP7 is used to monitor the output voltage with TP8
as the ground reference.
Table 4-1. Connection and Test Points
REFERENCE
DESIGNATOR
FUNCTION
J1
VIN (see Table 1-1 for VIN range)
J2
VOUT, 1.05 V at 2-A maximum
JP1
EN control. Shunt EN to GND to disable, shunt EN to VIN to enable.
TP1
VIN positive monitor point
TP2
GND monitor test point
TP3
EN test point
TP4
Switch node test point
TP5
Test point for loop response measurements
TP6
VOUT positive monitor point
TP7
GND monitor test point
TP8
GND monitor test point
4.2 Start-Up Procedure
1. Ensure that the jumper at JP1 (Enable control) pins 1 and 2 are covered to shunt EN to GND, disabling the
output.
2. Apply appropriate VIN voltage to VIN (J1-2) and GND (J1-1).
3. Move the jumper at JP1 (Enable control) from pins 1 and 2 (EN and GND), to pins 2 and 3 (EN and VIN)
enabling the output.
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Test Setup and Results
4.3 Efficiency
Figure 4-1 shows the efficiency for the TPS562201EVM-715 at an ambient temperature of 25°C.
100%
90%
80%
Efficiency
70%
60%
50%
40%
30%
VIN = 5 V
VIN = 9 V
VIN = 12 V
VIN = 15 V
20%
10%
0
0.25
0.5
0.75
1
Load Current (A)
1.25
1.5
1.75
2
D001
Figure 4-1. Efficiency
Figure 4-2 shows the efficiency at light loads for the TPS562201EVM-715 at an ambient temperature of 25°C.
100%
90%
80%
70%
Efficiency
60%
50%
40%
30%
20%
VIN = 5 V
VIN = 9 V
VIN = 12 V
VIN = 15 V
10%
0
0.001
0.002 0.003
0.0050.007 0.01
0.02
0.03
0.05 0.07 0.1
Load Current (A)
0.2
0.3 0.4 0.5
0.7
1
2 2.5
D002
Figure 4-2. Light-Load Efficiency
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Test Setup and Results
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4.4 Load Regulation
The load regulation for the TPS562201EVM-715 is shown in Figure 4-3.
2.00%
Percent Output Voltage
1.00%
0.00
-1.00%
VIN = 12 V
VIN = 5 V
-2.00%
0
0.25
0.5
0.75
1
Load Current (A)
1.25
1.5
1.75
2
D003
Figure 4-3. Load Regulation
4.5 Line Regulation
The line regulation for the TPS562201EVM-715 is shown in Figure 4-4.
0.50%
0.40%
Percent Output Voltage
0.30%
0.20%
0.10%
0.00
-0.10%
-0.20%
-0.30%
-0.40%
-0.50%
4
5
6
7
8
9
10
11
12
Input Voltage (V)
13
14
15
16
17
18
D005
Figure 4-4. Line Regulation
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Test Setup and Results
4.6 Load Transient Response
The TPS562201EVM-715 response to load transient is shown in Figure 4-5. The current steps and slew rates
are indicated in the figures. Total peak-to-peak voltage variation is as shown.
VO = 20 mV / div
IO = 1 A / div
Time = 100 ms / div
Figure 4-5. Load Transient Response, 25% to 75% Load Step
4.7 Output Voltage Ripple
The TPS562201EVM-715 output voltage ripple is shown in Figure 4-6, Figure 4-7, and Figure 4-8. The output
currents are as indicated.
VO = 20 mV / div
VO = 20 mV / div
VLX = 5 V / div
VLX = 5 V / div
IL = 500 mA / div
IL = 2 A / div
Time = 1 ms / div
Time = 1 ms / div
Figure 4-6. Output Voltage Ripple, IOUT = 2 A
Figure 4-7. Output Voltage Ripple, IOUT = 250 mA
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VO = 50 mV / div
VLX = 5 V / div
IL = 500 mA / div
Time = 20 ms / div
Figure 4-8. Output Voltage Ripple, IOUT = 10 mA
4.8 Input Voltage Ripple
The TPS562201EVM-715 input voltage ripple is shown in Figure 4-9. The output current is as indicated.
VIN = 100 mV / div
VLX = 5 V / div
IO = 2 A / div
Time = 800 ns / div
Figure 4-9. Input Voltage Ripple, IOUT = 2 A
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Test Setup and Results
4.9 Start-Up
The TPS562201EVM-715 start-up waveform relative to VIN is shown in Figure 4-10. Load = 1 Ω resistive.
The TPS562201EVM-715 start-up waveform relative to enable (EN) is shown in Figure 4-11. Load = 1 Ω
resistive.
VIN = 5 V / div
VIN = 5 V / div
VEN = 5 V / div
VEN = 5 V / div
VO = 500 mV / div
VO = 500 mV / div
Time = 2 ms / div
Time = 1 ms / div
Figure 4-10. Start-Up Relative to Input Voltage
Figure 4-11. Start-Up Relative to EN
4.10 Shut-Down
The TPS562201EVM-715 shut-down waveform relative to VIN is shown in Figure 4-12. Load = 1 Ω resistive.
The TPS562201EVM-715 shut-down waveform relative to EN is shown in Figure 4-13. Load = 1 Ω resistive.
VIN = 5 V / div
VIN = 5 V / div
VEN = 5 V / div
VEN = 5 V / div
VO = 500 mV / div
VO = 500 mV / div
Time = 10 ms / div
Figure 4-12. Shut-Down Relative to Input Voltage
Time = 100 ms / div
Figure 4-13. Shut-Down Relative to EN
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Board Layout
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5 Board Layout
This section provides a description of the TPS562201EVM-715, board layout, and layer illustrations.
5.1 Layout
The board layouts for the TPS562201EVM-715 are shown in Figure 5-1, Figure 5-2 and Figure 5-3. The top
layer contains the main power traces for VIN, VOUT, and ground. Also on the top layer are connections for the
pins of the TPS562201 and a large area filled with ground. Most of the signal traces are also located on the
top side. The input decoupling capacitors, C1, C2, and C3 are located as close to the IC as possible. The input
and output connectors, test points, and all of the components are located on the top side. The bottom layer is a
ground plane along with the switching node copper fill, signal ground copper fill and the feed back trace from the
point of regulation to the top of the resistor divider network.
Figure 5-2. Top Layer
Figure 5-1. Top Assembly
Figure 5-3. Bottom Layer
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Schematic, Bill of Materials, and Reference
6 Schematic, Bill of Materials, and Reference
6.1 Schematic
Figure 6-1 is the schematic for the TPS562201EVM-715.
Figure 6-1. TPS562201EVM-715 Schematic Diagram
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Schematic, Bill of Materials, and Reference
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6.2 Bill of Materials
Table 6-1. Bill of Materials
Designator
Qty
Value
Description
Package Reference
Part Number
Manufacturer
PWR715
Any
0603
GRM188R61E104KA01D
Murata
Capacitor, ceramic, 10 µF, 25 V, ±10%, X5R, 1206
1206
GRM31CR61E106KA12L
Murata
22 µF
Capacitor, ceramic, 22 µF, 10 V, ±10%, X7R, 1206
1206
GRM31CR71A226KE15L
Murata
10 pF
Capacitor, ceramic, 10 pF, 100 V, ±5%, C0G/NP0, 0603
0603
GRM1885C2A100JA01D
Murata
Terminal block, 6 A, 3.5 mm pitch, 2-Pos, TH
7.0 x 8.2 x 6.5mm
ED555/2DS
On-Shore Technology
Header, 100 mil, 3 × 1, Tin, TH
Header, 3 PIN, 100mil, Tin
PEC03SAAN
Sullins Connector
Solutions
Inductor, Shielded drum core, superflux, 3.3 µH, 6.5 A, 0.0172 Ω, SMD
WE-HC4
744311330
Wurth Elektronik eiSos
Thermal transfer printable labels, 1.250" W x 0.250" H (10,000 per roll)
PCB Label 1.25"H × 0.250"W THT-13-457-10
Brady
3.74 kΩ Resistor, 3.74 kΩ, 1%, 0.1 W, 0603
0603
CRCW06033K74FKEA
Vishay-Dale
10.0 kΩ Resistor, 10.0 kΩ, 1%, 0.1 W, 0603
0603
CRCW060310K0FKEA
Vishay-Dale
Resistor, 0 Ω, 5%, 0.1 W, 0603
0603
ERJ-3GEY0R00V
Panasonic
1×2
Shunt, 100 mil, gold plated, black
Shunt
969102-0000-DA
3M
5
Red
Test point, miniature, red, TH
Red Miniature Testpoint
5000
Keystone
TP2, TP7, TP8
3
Black
Test point, miniature, black, TH
Black Miniature Testpoint
U1
1
C8
0
C7
0
!PCB1
1
C1, C4
2
0.1 µF
Capacitor, ceramic, 0.1 µF, 25 V, ±10%, X5R, 0603
C2, C3
2
10 µF
C5, C6
2
C8
0
J1, J2
2
JP1
1
L1
1
LBL1
1
R1
1
R2, R4
2
R3, R5
2
0
SH-JP1
1
TP1, TP3, TP4,
TP5, TP6
14
Printed Circuit Board
3.3 µH
5001
Keystone
4.5 V to 16 V Input, 2-A synchronous step-down voltage regulator, DDC0006A DDC0006A
TPS562201DDC
Texas Instruments
10 pF
Capacitor, ceramic, 10 pF, 100 V, ±5%, C0G/NP0, 0603
0603
GRM1885C2A100JA01D
Murata
22 µF
Capacitor, ceramic, 22 µF, 10V, ±10%, X7R, 1206
1206
GRM31CR71A226KE15L
Murata
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Schematic, Bill of Materials, and Reference
6.3 Reference
1. TPS56220x 4.5 V to 17 V Input, 2-A Synchronous Step-Down Voltage Regulator in SOT-23 data sheet
(SLVSD90)
7 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (December 2015) to Revision A (August 2021)
Page
• Updated user's guide title................................................................................................................................... 3
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................3
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