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Table of Contents
User’s Guide
TPS562209 Step-Down Converter Evaluation Module
User's Guide
ABSTRACT
This user's guide contains information for the TPS562209 as well as support documentation for the
TPS562209EVM-601 evaluation module. Included are the performance specifications, schematic, and the bill
of materials of the TPS562209EVM-601.
Table of Contents
1 Introduction.............................................................................................................................................................................3
2 Performance Specification Summary................................................................................................................................... 4
3 Modifications...........................................................................................................................................................................4
3.1 Output Voltage Setpoint..................................................................................................................................................... 4
4 Test Setup and Results.......................................................................................................................................................... 5
4.1 Input/Output Connections.................................................................................................................................................. 5
4.2 Start-Up Procedure............................................................................................................................................................ 5
4.3 Efficiency............................................................................................................................................................................6
4.4 Load Regulation................................................................................................................................................................. 7
4.5 Line Regulation.................................................................................................................................................................. 7
4.6 Load Transient Response.................................................................................................................................................. 8
4.7 Output Voltage Ripple........................................................................................................................................................ 9
4.8 Input Voltage Ripple........................................................................................................................................................... 9
4.9 Start-Up............................................................................................................................................................................10
4.10 Shut-Down......................................................................................................................................................................11
5 Board Layout.........................................................................................................................................................................12
5.1 Layout.............................................................................................................................................................................. 12
6 Schematic, Bill of Materials, and Reference...................................................................................................................... 14
6.1 Schematic........................................................................................................................................................................ 14
6.2 Bill of Materials.................................................................................................................................................................15
6.3 Reference.........................................................................................................................................................................15
7 Revision History................................................................................................................................................................... 15
List of Figures
Figure 4-1. TPS562209EVM-601 Efficiency................................................................................................................................ 6
Figure 4-2. TPS562209EVM-601 Light Load Efficiency.............................................................................................................. 6
Figure 4-3. TPS562209EVM-601 Load Regulation..................................................................................................................... 7
Figure 4-4. TPS562209EVM-601 Line Regulation...................................................................................................................... 7
Figure 4-5. TPS562209EVM-601 Load Transient Response, 25% to 75% Load Step................................................................8
Figure 4-6. TPS562209EVM-601 Output Voltage Ripple, IOUT = 2 A.......................................................................................... 9
Figure 4-7. TPS562209EVM-601 Input Voltage Ripple, IOUT = 2 A............................................................................................. 9
Figure 4-8. TPS562209EVM-601 Start-Up Relative to VIN ....................................................................................................... 10
Figure 4-9. TPS562209EVM-601 Start-Up Relative to EN........................................................................................................ 10
Figure 4-10. TPS562209EVM-601 Shut-Down Relative to VIN .................................................................................................11
Figure 4-11. TPS562209EVM-601 Shut-Down Relative to EN.................................................................................................. 11
Figure 5-1. Top Assembly.......................................................................................................................................................... 12
Figure 5-2. Bottom Layer........................................................................................................................................................... 13
Figure 6-1. TPS562209EVM-601Schematic Diagram............................................................................................................... 14
List of Tables
Table 1-1. Input Voltage and Output Current Summary...............................................................................................................3
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Trademarks
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Table 2-1. TPS562209EVM-601Performance Specifications Summary......................................................................................4
Table 3-1. Output Voltages.......................................................................................................................................................... 4
Table 4-1. Connection and Test Points........................................................................................................................................ 5
Table 6-1. Bill of Materials..........................................................................................................................................................15
Trademarks
D-CAP2™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
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Introduction
1 Introduction
The TPS562209 is a single, adaptive on-time, D-CAP2™-mode, synchronous buck converter requiring a very
low external component count. The D-CAP2 control circuit is optimized for low-ESR output capacitors such as
POSCAP, SP-CAP, or ceramic types and features fast transient response with no external compensation. The
switching frequency is internally set at a nominal 650 kHz. The high-side and low-side switching MOSFETs
are incorporated inside the TPS562209 package along with the gate-drive circuitry. The low drain-to-source on
resistance of the MOSFETs allows the TPS562209 to achieve high efficiencies and helps keep the junction
temperature low at high output currents. The TPS562209 dc/dc synchronous converter is designed to provide up
to a 2-A output from an input voltage source of 4.5 V to 17 V. The output voltage range is from 0.8 V to 6.5 V.
Rated input voltage and output current ranges for the evaluation module are given in Table 1-1.
The TPS562209EVM-601 evaluation module (EVM) is a single, synchronous buck converter providing 1.05 V at
2 A from 4.5-V to 17-V input. This user’s guide describes the TPS562209EVM-601 performance.
Table 1-1. Input Voltage and Output Current Summary
EVM
Input Voltage Range
Output Current Range
TPS562209EVM-601
VIN = 4.5 V to 17 V
0 A to 2 A
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Performance Specification Summary
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2 Performance Specification Summary
A summary of the TPS562209EVM-601 performance specifications is provided in Table 2-1. Specifications are
given for an input voltage of VIN = 12 V and an output voltage of 1.05 V, unless otherwise noted. The ambient
temperature is 25°C for all measurement, unless otherwise noted.
Table 2-1. TPS562209EVM-601Performance Specifications Summary
Specifications
Test Conditions
Input voltage range (VIN)
Min
Typ
Max
4.5
12
17
Output voltage
Operating frequency
CH1
VIN = 12 V, IO = 2 A
Output current range
VIN = 12 V, LO = 2.2 µH
Output ripple voltage
VIN = 12 V, IO = 2 A
V
1.05
V
650
kHz
0
Over current limit
Unit
2
A
A
20
mVPP
3 Modifications
These evaluation modules are designed to provide access to the features of the TPS562209. Some
modifications can be made to this module.
3.1 Output Voltage Setpoint
To change the output voltage of the EVMs, it is necessary to change the value of resistor R5. Changing the
value of R5 can change the output voltage above 0.765 V. The value of R5 for a specific output voltage can be
calculated using Equation 1.
R5 =
R6 ´ (VOUT -0.765 V )
(1)
0.765 V
Table 3-1 lists the R5 values for some common output voltages. For higher output voltages of 1.8 V or above, a
feedforward capacitor (C9) may be used to improve phase margin. Pads for this component (C9) are provided
on the printed-circuit board (PCB). Note that the values given in Table 3-1 are standard values and not the exact
value calculated using Table 3-1.
Table 3-1. Output Voltages
4
C9
(pF)
L1
(µH)
Output Voltage
(V)
R5
(kΩ)
R6
(kΩ)
Min
Typ
Max
1.0
15.4
49.9
1.5
2.2
4.7
20 - 68
1.05
18.7
49.9
1.5
2.2
4.7
20 - 68
1.2
28.7
49.9
1.5
2.2
4.7
20 - 68
1.5
47.5
49.9
1.5
2.2
4.7
20 - 68
1.8
68.1
49.9
optional, 10 pF max
1.5
2.2
4.7
20 - 68
2.5
113
49.9
optional, 10 pF max
2.2
3.3
4.7
20 - 68
3.3
165
49.9
optional, 10 pF max
2.2
3.3
4.7
20 - 68
5.0
274
49.9
optional, 10 pF max
3.3
4.7
4.7
20 - 68
6.5
374
49.9
optional, 10 pF max
3.3
4.7
4.7
20 - 68
TPS562209 Step-Down Converter Evaluation Module User's Guide
C6 + C7 +C8
(µF)
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Test Setup and Results
4 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS562209EVM-601. The section also
includes test results typical for the evaluation modules and efficiency, output load regulation, output line
regulation, load transient response, output voltage ripple, input voltage ripple, start-up, and switching frequency.
4.1 Input/Output Connections
The TPS562209EVM-601 is provided with input/output connectors and test points as shown in Table 4-1. A
power supply capable of supplying 2 A must be connected to J1 through a pair of 20-AWG wires. The load
must be connected to J2 through a pair of 20-AWG wires. The maximum load current capability is 2 A. Wire
lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor the VIN input
voltages with TP2 providing a convenient ground reference. TP7 is used to monitor the output voltage with TP8
as the ground reference.
Table 4-1. Connection and Test Points
Reference Designator
Function
J1
VIN (see Table 1-1 for VIN range)
J2
VOUT, 1.05 V at 2-A maximum
JP1
EN control. Shunt EN to GND to disable, shunt EN to VIN to enable.
TP1
VIN positive monitor point
TP2
GND monitor test point
TP3
EN test point
TP4
Switch node test point
TP5
Test point for loop response measurements
TP6
VOUT positive monitor point
TP7
GND monitor test point
4.2 Start-Up Procedure
1. Ensure that the jumper at JP1 (Enable control) pins 1 and 2 are covered to shunt EN to GND, disabling the
output.
2. Apply appropriate VIN voltage to VI (J1-2) and GND (J1-1).
3. Move the jumper at JP1 (Enable control) from pins 1 and 2 (EN and GND), to pins 2 and 3 (EN and VIN)
enabling the output.
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4.3 Efficiency
Figure 4-1 shows the efficiency for the TPS562209EVM-601 at an ambient temperature of 25°C.
100
90
80
Efficiency - %
70
VIN = 12 V
VIN = 5 V
60
50
40
30
20
10
0
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
Output Current - A
C001
Figure 4-1. TPS562209EVM-601 Efficiency
Figure 4-2 shows the efficiency at light loads for the TPS562209EVM-601 at an ambient temperature of 25°C.
100
90
80
Efficiency - %
70
60
50
40
30
VIN = 12 V
20
VIN = 5 V
10
0
0.001
0.01
0.1
1
Output Current - A
C002
Figure 4-2. TPS562209EVM-601 Light Load Efficiency
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Test Setup and Results
4.4 Load Regulation
The load regulation for the TPS562209EVM-601 is shown in Figure 4-3.
1.50
1.00
Load Regulation - %
VIN = 12 V
0.50
0.00
VIN = 5 V
±0.50
±1.00
±1.50
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
Output Current - A
C003
Figure 4-3. TPS562209EVM-601 Load Regulation
4.5 Line Regulation
The line regulation for the TPS562209EVM-601 is shown in Figure 4-4.
0.5
0.4
0.3
Line Rgulation - %
0.2
IOUT = 1 A
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
4
6
8
10
12
14
16
18
Input Voltage - V
C004
Figure 4-4. TPS562209EVM-601 Line Regulation
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4.6 Load Transient Response
The TPS562209EVM-601 response to load transient is shown in Figure 4-5.The current steps and slew rates are
indicated in the figures. Total peak-to-peak voltage variation is as shown.
VOUT = 20 mV / div (ac coupled)
IOUT = 500 mA / div
Load step = 0.5 A - 1.5 A, slew rate = 500 mA / µsec
Time = 200 µsec / div
Figure 4-5. TPS562209EVM-601 Load Transient Response, 25% to 75% Load Step
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Test Setup and Results
4.7 Output Voltage Ripple
The TPS562209EVM-601 output voltage ripple is shown in Figure 4-6. The output current is as indicated.
VOUT = 20 mV / div (ac coupled)
SW = 5 V / div
Time = 1 µsec / div
Figure 4-6. TPS562209EVM-601 Output Voltage Ripple, IOUT = 2 A
4.8 Input Voltage Ripple
The TPS562209EVM-601 input voltage ripple is shown in Figure 4-7. The output current is as indicated.
VIN = 100 mV / div (ac coupled)
SW = 5 V / div
Time = 1 µsec / div
Figure 4-7. TPS562209EVM-601 Input Voltage Ripple, IOUT = 2 A
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4.9 Start-Up
The TPS562209EVM-601 start-up waveform relative to VIN is shown in Figure 4-8. Load = 1 Ω resistive.
VIN = 10 V / div
EN = 10 V / div
VOUT = 500 mV / div
Time = 2 msec / div
Figure 4-8. TPS562209EVM-601 Start-Up Relative to VIN
The TPS562209EVM-601 start-up waveform relative to enable (EN) is shown in Figure 4-9. Load = 1 Ω resistive.
VIN = 10 V / div
EN = 10 V / div
VOUT = 500 mV / div
Time = 2 msec / div
Figure 4-9. TPS562209EVM-601 Start-Up Relative to EN
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Test Setup and Results
4.10 Shut-Down
The TPS562209EVM-601 shut-down waveform relative to VIN is shown in Figure 4-10. Load = 1 Ω resistive.
VIN = 10 V / div
EN = 10 V / div
VOUT = 500 mV / div
Time = 2 msec / div
Figure 4-10. TPS562209EVM-601 Shut-Down Relative to VIN
The TPS562209EVM-601 shut-down waveform relative to EN is shown in Figure 4-11. Load = 1 Ω resistive.
VIN = 10 V / div
EN = 10 V / div
VOUT = 500 mV / div
Time = 2 msec / div
Figure 4-11. TPS562209EVM-601 Shut-Down Relative to EN
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Board Layout
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5 Board Layout
This section provides a description of the TPS562209EVM-601, board layout, and layer illustrations.
5.1 Layout
The board layout for the TPS562209EVM-601 is shown in Figure 5-1 and Figure 5-2. The top layer contains
the main power traces for VIN, VOUT, and ground. Also on the top layer are connections for the pins of the
TPS562209 and a large area filled with ground. Most of the signal traces also are located on the top side. The
input decoupling capacitors, C1, C2, and C3 are located as close to the IC as possible. The input and output
connectors, test points, and all of the components are located on the top side. The bottom layer is a ground
plane along with the switching node copper fill, signal ground copper fill and the feed back trace from the point of
regulation to the top of the resistor divider network.
Figure 5-1. Top Assembly
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Board Layout
Figure 5-2. Bottom Layer
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Schematic, Bill of Materials, and Reference
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6 Schematic, Bill of Materials, and Reference
6.1 Schematic
Figure 6-1 is the schematic for the TPS562209EVM-601.
TP1
TP4
TP6
L1
J1
2
1
3
TP3
TP2
C1
10µF
2.2 uH
U1
VIN = 4.5 V to 17 V
C2
10µF
5
C3
0.01µF
4
VIN
SW
EN
VBST
VFB
GND
1
2
6
1
R2
0
VOUT = 1.05 V, 2 A
2
C4
C6
22µF
0.1µF
C7
22µF
C8
DNP
TP5
J2
1
2
R4 TP7
0
TPS562209DDC
R1
10.0k
C5
DNP
3
2
1
C9
DNP
R5
18.7k
R3
DNP
SH-JP1
JP1
R6
49.9k
NT1
Net-Tie
Figure 6-1. TPS562209EVM-601Schematic Diagram
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Schematic, Bill of Materials, and Reference
6.2 Bill of Materials
Table 6-1. Bill of Materials
QTY
Value
1
Description
Package Reference
Printed-Circuit Board
Part Number
Manufacturer
PWR601
Any
2
10uF
CAP, CERM, 10uF, 25V, +/-10%, X5R, 0805
0805
C2012X5R1E106K125AB
TDK
1
0.01uF
CAP, CERM, 0.01uF, 50V, +/-10%, X7R, 0603
0603
C1608X7R1H103K
TDK
1
0.1uF
CAP, CERM, 0.1uF, 50V, +/-10%, X7R, 0603
0603
C1608X7R1H104K
TDK
2
22uF
CAP, CERM, 22uF, 6.3V, +/-20%, X5R, 1206
1206
C3216X5R0J226K
TDK
2
2x1
Conn Term Block, 2POS, 3.81mm, TH
2POS Terminal Block
1727010
Phoenix Contact
1
1x3
Header, TH, 100mil, 1x3, Gold plated, 230 mil
above insulator
PBC03SAAN
PBC03SAAN
Sullins Connector
Solutions
1
2.2 uH
Inductor, Power Line, Magnetic Shielded, ±30%
6.9x7.2 mm
CLF7045T2R2N
TDK
Thermal Transfer Printable Labels, 1.250" W x
0.250" H - 10,000 per roll
PCB Label 1.25"H x 0.250"W
THT-13-457-10
Brady
1
1
10.0k
RES, 10.0k ohm, 1%, 0.1W, 0603
0603
CRCW060310K0FKEA
Vishay-Dale
2
0
RES, 0 ohm, 5%, 0.1W, 0603
0603
ERJ-3GEY0R00V
Panasonic
1
18.7k
RES, 18.7k ohm, 1%, 0.1W, 0603
0603
CRCW060318K7FKEA
Vishay-Dale
1
49.9k
RES, 49.9k ohm, 1%, 0.1W, 0603
0603
CRCW060349K9FKEA
Vishay-Dale
1
1x2
Shunt, 2mm, Gold plated, Black
2mm Shunt, Closed Top
2SN-BK-G
Samtec
2
Red
Test Point, Miniature, Red, TH
Red Miniature Testpoint
5000
Keystone
2
Black
Test Point, Miniature, Black, TH
Black Miniature Testpoint
5001
Keystone
2
White
Test Point, Miniature, White, TH
White Miniature Testpoint
5002
Keystone
1
Yellow
Test Point, Miniature, Yellow, TH
Yellow Miniature Testpoint
5004
Keystone
1
4.5V to 17 V Input, 2-A Synchronous Step-Down
SWIFT Converter, DDC0006A
DDC0006A
TPS562209DDC
Texas Instruments
0
CAP, CERM, 0603
0603
0
CAP, CERM, 1206
1206
0
CAP, CERM, 0603
0603
0
RES, 0603
0603
6.3 Reference
1. TPS56220x 4.5 V to 17 V Input, 2-A Synchronous Step-Down Voltage Regulator in SOT-23 data sheet
(SLVSCB0)
7 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (January 2014) to Revision A (August 2021)
Page
• Updated user's guide title................................................................................................................................... 3
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................3
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