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TPS56637
SLVSEG1A – JULY 2018 – REVISED SEPTEMBER 2019
TPS56637 4.5-V to 28-V Input, 6-A Synchronous Buck Converter
1 Features
3 Description
•
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The TPS56637 is a high efficiency, high-voltage
input, easy-to-use synchronous buck converter with
integrated MOSFETs.
4.5-V to 28-V input voltage range
0.6-V to 13-V output voltage range
6-A maximum continuous output current
Integrated 26-mΩ and 12-mΩ MOSFETs
0.6-V ±1% Reference Voltage
D-CAP3™ control mode for fast transient
response
Eco-mode™ and FCCM (forced continuous
conduction mode) selectable for light-load
operation through MODE pin
Internal 2-ms soft start
Built-in output discharge function
500-kHz switching frequency
Power good indicator to monitor output voltage
Cycle by cycle over current limit
Non-latched protections for UV, OV, OT and
UVLO
–40°C to +150°C operating junction temperature
Small 10-Pin 3.0-mm × 3.0-mm HotRod™ QFN
Package
Available in WEBENCH® Power Designer to
create custom designs
1
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•
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•
•
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2 Applications
•
•
Enterprise systems: multifunction printers, storage
Personal electronics: TVs, speakers, set-top box,
portable electronics
Industrial applications: electronic point of sale,
factory automation and control, motor drives
General purposes for 12-V,19-V, 24-V power-bus
supply
•
•
With the wide operating input voltage range of 4.5 V
to 28 V, the TPS56637 is ideally suited for systems
powered from 12-V, 19-V, 24-V power-bus rails. It
supports up to 6-A continuous output current at
output voltages between 0.6 V and 13 V.
The TPS56637 uses DCAP3™ control mode to
provide fast transient response, good line and load
regulation, no requirement for external compensation,
and supports low equivalent series resistance (ESR)
output capacitors such as POSCAP and MLCC.
The TPS56637 has both FCCM and Eco-mode™
operation modes for selection at light-load condition
through configuration of MODE pin. To attain high
efficiency at light load, Eco-mode™ could be
selected. To support tight output voltage ripple
requirement, FCCM could be selected.
The TPS56637 provides complete non-latched OV
(Over-voltage), UV (Under-voltage), OC (Overcurrent), OT (Over-temperature) and UVLO (Undervoltage lock-out) protections combined with power
good indicator and output discharge function features.
The TPS56637 is available in a 10-pin 3.0-mm x 3.0mm HotRod™ QFN package and the junction
temperature is specified from –40°C to 150°C.
Device Information(1)
PART NUMBER
TPS56637
Efficiency vs Output Current
VOUT = 5 V
BOOT
VIN
CBST
CIN
100
L
SW
EN
98
VOUT
96
TPS56637RPA
MODE
AGND
PG
FB
PGND
94
RFBT
COUT
RFBB
Efficiency (%)
NC
BODY SIZE (NOM)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
VIN
PACKAGE
VQFN-HR (10)
92
90
88
86
VIN=8V
VIN=12V
VIN=19V
VIN=24V
84
Copyright © 2017, Texas Instruments Incorporated
82
80
0.01
0.1
1
Output Current (A)
10
FAD2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS56637
SLVSEG1A – JULY 2018 – REVISED SEPTEMBER 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
6
7
Absolute Maximum Ratings ......................................
Handling Ratings.......................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Typical Characteristics ..............................................
Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 11
7.3 Feature Description................................................. 12
7.4 Device Functional Modes........................................ 17
8
Application and Implementation ........................ 18
8.1 Application Information............................................ 18
8.2 Typical Application ................................................. 18
9 Power Supply Recommendations...................... 24
10 Layout................................................................... 24
10.1 Layout Guidelines ................................................. 24
10.2 Layout Example .................................................... 25
11 Device and Documentation Support ................. 26
11.1
11.2
11.3
11.4
11.5
11.6
Documentation Support .......................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
26
26
26
26
26
26
12 Mechanical, Packaging, and Orderable
Information ........................................................... 26
4 Revision History
Changes from Original (July 2018) to Revision A
•
2
Page
Changed marketing status from Advance Information to production data. ............................................................................ 1
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5 Pin Configuration and Functions
RPA Package
10-Pin VQFN-HR
Top View
VIN
VIN
VIN
VIN
8
7
6
SW
9
PGND
5
2
3
NC
4
PG
EN
1
AGND
10
FB
MODE
BOOT
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
NO.
AGND
3
G
Ground of internal analog circuitry. Connect AGND to PGND plane at a single point.
BOOT
7
I
Supply input for the gate drive voltage of the high-side MOSFET. Connect a 0.1-µF bootstrap capacitor
between BOOT and SW.
EN
1
I
Enable input control. Driving EN high or leaving this pin floating enables the converter. A resistor
divider can be used to imply an UVLO function.
FB
2
I
Output feedback. Connect FB to the tap of an external resistor divider from the output to GND to set
the output voltage.
MODE
10
I
Operation mode selection pin. Leaving this pin floating(≥500 kΩ) forces the TPS56637 into FCCM.
Connecting this pin to GND(≤10 kΩ) forces the TPS56637 into Eco-mode™ under light load.
NC
5
N
Not Connected, keep this pin floating.
PG
4
O
Open Drain Power Good Indicator, it is asserted low if output voltage is out of PG threshold due to
over-voltage, under-voltage, thermal shutdown, EN shutdown or during soft-start.
PGND
9
G
Power GND terminal. Source terminal of low side MOSFET.
SW
6
O
Switching node terminal. Connect the output inductor to this pin with wide and short tracks
VIN
8
P
Input voltage supply pin. Drain terminal of high-side MOSFET. Connect the input decoupling capacitors
between VIN and GND.
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6 Specifications
6.1 Absolute Maximum Ratings
Over the recommended operating junction temperature range of –40°C to +150°C (unless otherwise noted) (1)
Input voltage
Output voltage
MIN
MAX
VIN
–0.3
32
V
BOOT
–0.3
SW+6
V
BOOT-SW
–0.3
6.0
V
EN, FB, MODE
–0.3
6.0
V
PGND, AGND
–0.3
0.3
V
SW
–0.3
32
V
–4
32.5
V
SW (H)
Hysteresis
Hiccup detect(H>L)
125%
5%
65%
Hysteresis
5%
Temperature Rising
165
°C
30
°C
200
Ω
THERMAL SHUTDOWN
TSDN
Thermal shutdown threshold (2)
Hysteresis
SW DISCHARGE RESISTANCE
RDISCHG
(1)
(2)
VOUT discharge resistance
VEN=0, VSW=0.5V, TJ=25°C
Not representative of the total input current of the system when in regulation. Ensured by design and characterization test.
Not production tested. Ensured by design and engineering sample correlation.
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6.6 Timing Requirements
The electrical ratings specified in this section apply to all specifications in this document unless otherwise noted. These
specifications are interpreted as conditions that will not degrade the parametric or functional specifications of the device for
the life of the product containing it. Typical values correspond to TJ = 25°C, VIN = 12 V. Minimum and maximum limits are
based on TJ = –40°C to +150°C, VIN = 4.5 V to 28 V(unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ON-TIME TIMER CONTROL
Minimum on time (1)
tON(MIN)
tOFF(MIN)
50
Minimum off time
VFB = 0.5 V, measure SW at 50% VIN,
Eco-mode
Soft start time
Internal soft-start time
200
ns
300
ns
SOFT START
TSS
2
ms
0.25
ms
25
ms
OUTPUT UNDERVOLTAGE PROTECTION
TUVP_WAIT
UV protection hiccup wait time
TUVP_HICCUP
UV protection hiccup time before
recovery
(1)
6
UV triggered (VFB lower than 65%
VFB_nom)
Not production tested. Ensured by design and engineering sample correlation.
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6.7 Typical Characteristics
VIN = 12 V (unless otherwise noted)
143
4
142.5
3.5
Shutdown Current (PA)
Quiescent Current (PA)
142
141.5
141
140.5
140
139.5
139
3
2.5
2
1.5
138.5
138
-40
-20
0
20
40
60
80 100 120
TJ - Junction Temperature (qC)
140
1
-40
160
-20
0
IqTe
Figure 1. Quiescent Current vs Temperature
20
40
60
80 100 120
TJ - Junction Temperature (qC)
140
160
IsdT
Figure 2. Shutdown Current vs Temperature
18
40
16
36
Low-side Rds_on (m:)
High-side Rds_on (m:)
38
34
32
30
28
26
14
12
10
24
22
20
-40
-20
0
20
40
60
80 100 120
TJ - Junction Temperature (qC)
140
8
-40
160
Figure 3. High-Side RDS(on) vs Temperature
20
40
60
80 100 120
TJ - Junction Temperature (qC)
140
160
RdsL
4.6
VINUVLO_RISE
VINUVLO_FALL
4.4
VIN UVLO Threshold (V)
0.604
Feedback Voltage (V)
0
Figure 4. Low-side RDS(on) vs Temperature
0.606
0.602
0.6
0.598
0.596
0.594
-40
-20
RdsH
4.2
4
3.8
3.6
-20
0
20
40
60
80 100 120
TJ - Junction Temperature (qC)
140
Figure 5. Feedback Voltage vs Temperature
160
3.4
-40
-20
Vfb2
0
20
40
60
80 100 120
TJ - Junction Temperature (qC)
140
160
UVLO
Figure 6. VIN UVLO Threshold vs Temperature
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Typical Characteristics (continued)
VIN = 12 V (unless otherwise noted)
1.26
7.75
VEN_RISING
VEN_FALLING
7.7
IOCL - Valley Current Limit (A)
1.24
EN Threshold (V)
1.22
1.2
1.18
1.16
1.14
1.12
1.1
7.65
7.6
7.55
7.5
7.45
7.4
7.35
1.08
1.06
-40
-20
0
20
40
60
80 100 120
TJ - Junction Temperature (qC)
140
7.3
-40
160
Figure 7. EN Threshold vs Temperature
0
20
40
60
80 100 120
TJ - Junction Temperature (qC)
LOC2
550
FSW - Switching Frequency (kHz)
600
575
550
525
500
475
500
450
400
350
300
250
200
150
VIN=8V
VIN=12V
VIN=19V
VIN=24V
100
50
6
8
10
12
14 16 18 20 22
VIN - Input Voltage (V)
24
26
28
0
0.001
30
IOUT = 6 A
VOUT = 5 V
Figure 9. Switching Frequency vs Input voltage
90%
90%
80%
80%
70%
70%
60%
60%
VIN=6V, ECO
VIN=6V, FCCM
VIN=12V, ECO
VIN=12V, FCCM
VIN=19V, ECO
VIN=19V, FCCM
VIN=24V, ECO
VIN=24V, FCCM
30%
20%
10%
0
0.001
Efficiency
100%
40%
0.01
0.1
IOUT - Load Current (A)
1
1
10
FswL
L = 3.3 µH
50%
Eco-mode™
VIN=6V, ECO
VIN=6V, FCCM
VIN=12V, ECO
VIN=12V, FCCM
VIN=19V, ECO
VIN=19V, FCCM
VIN=24V, ECO
VIN=24V, FCCM
40%
30%
20%
10%
10
0
0.001
0.01
1.05
Figure 11. VOUT = 1.05 V Efficiency, L = 1 µH
0.1
IOUT - Output Current (A)
Figure 10. Switching Frequency vs Output Current
100%
50%
0.01
FswV
VOUT=5 V
Efficiency
160
600
ECO
FCCM
450
8
140
Figure 8. Valley Current Limit vs Temperature
625
FSW - Switching Frequency (kHz)
-20
EN2p
0.1
IOUT - Load Current (A)
1
10
3.3V
Figure 12. VOUT = 3.3 V Efficiency, L = 2.2 µH
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Typical Characteristics (continued)
100%
100%
90%
90%
80%
80%
70%
70%
60%
60%
50%
VIN=8V, ECO
VIN=8V, FCCM
VIN=12V, ECO
VIN=12V, FCCM
VIN=19V, ECO
VIN=19V, FCCM
VIN=24V, ECO
VIN=24V, FCCM
40%
30%
20%
10%
0
0.001
Efficiency
Efficiency
VIN = 12 V (unless otherwise noted)
0.01
0.1
IOUT - Load Current (A)
1
50%
40%
30%
VIN=19V, ECO
VIN=19V, FCCM
VIN=24V, ECO
VIN=24V, FCCM
20%
10%
10
0
0.001
0.01
5Vou
Figure 13. VOUT = 5 V Efficiency, L = 3.3 µH
0.1
IOUT - Load Current (A)
1
10
12Vo
Figure 14. VOUT = 12 V Efficiency, L = 5.6 µH
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7 Detailed Description
7.1 Overview
The TPS56637 is a 6-A synchronous buck converter operating from 4.5V to 28V input voltage (VIN), and its
output voltage ranges from 0.6V to 13V. The proprietary D-CAP3™ mode enables low external component
count, ease of design, optimization of the power design for power, size and efficiency. The device employs DCAP3™ mode control that provides fast transient response with no external compensation components and an
accurate feedback voltage. The control topology provides seamless transition between CCM operating mode at
higher load condition and DCM operation at lighter load condition. Eco-mode™ allows the TPS56637 to maintain
high efficiency at light load. FCCM mode has the quasi-fixed switching frequency at both light and heavy load.
The TPS56637 is able to adapt both low equivalent series resistance (ESR) output capacitors such as POSCAP
or SP-CAP, and ultra-low ESR ceramic capacitors.
10
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7.2 Functional Block Diagram
PG rising threshold
+
UV threshold
+
PG
PG
Logic
UV
+
+
PG falling threshold
OV
OV threshold
Regulator
+
UVLO
VIN
VREG5
4.2V/3.7V
FB
0.6V
Reference
SS
Soft Start
+
One Shot
165°C /
30°C
TSD
+
BOOT
Control Logic
+
x
x
x
x
x
x
x
On/Off time
Min On/Off time
FCCM/Eco-mode
Soft-start
Power Good
OCL
UVP/OVP/TSD
SW
XCON
VREG5
Ih
Ip
PGND
+
EN
+
Enable
Threshold
MODE
OCL
Light Load
Operation
+
ZC
+
NC
NOCL
AGND
Discharge Control
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7.3 Feature Description
7.3.1 The Adaptive On-Time Control and PWM Operation
The main control loop of the TPS56637 is adaptive on-time pulse width modulation (PWM) controller that
supports a proprietary DCAP3™ mode control. The DCAP3™ mode control combines adaptive on-time control
with an internal compensation circuit for quasi-fixed frequency and low external component count configuration
with both low-ESR and ceramic output capacitors. It is stable even with virtually no ripple at the output. The
TPS56637 also includes an error amplifier that makes the output voltage very accurate. No external current
sense network or loop compensation is required for DCAP3™ control topology.
At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal
one-shot timer expires. This one-shot duration is set proportional to the output voltage, VOUT, and is inversely
proportional to the converter input voltage, VIN, to maintain a pseudo-fixed frequency over the input voltage
range, hence it is called adaptive on-time control. When the feedback voltage falls below the reference voltage,
the one-shot timer is reset and the high-side MOSFET is turned on again . An internal ripple generation circuit is
added to reference voltage for emulating the output ripple, and this enables the use of very low-ESR output
capacitors such as multi-layered ceramic caps (MLCC).
7.3.2 Mode Selection
TPS56637 has a MODE pin that can offer 2 different states of operations under light load condition. If MODE pin
is short to GND(≤10kΩ), TPS56637 works under Eco-mode™ control scheme. If MODE pin is floating(≥500kΩ),
TPS56637 works under FCCM mode.
Figure 15 below shows the typical start-up sequence of the device once the enable signal triggers the EN turn-on
threshold. After the voltage of internal VCC crosses the UVLO rising threshold, it takes about 64µs to finish the
reading and setting of MODE. After this process, the MODE is latched and will not change until VIN or EN toggles
to restart-up this device. Then after a delay of around 650µs the internal soft-start function begins to ramp up the
reference voltage to the PWM comparator.
Table 1. MODE Pin Settings
MODE Pin
Light Load Operation Mode
Short to GND (≤10kΩ)
Eco-mode™
Floating (≥500kΩ)
FCCM
EN Threshold
1.18V
EN
VCC UVLO
4.2V
Internal
VCC
MODE
Detection
MODE
100µs 64µs 650µs
Tss= 2ms
90%
VOUT
VOUT
1ms
PGOOD
Figure 15. Power-Up Sequence
12
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7.3.2.1 Eco-mode™ Control Scheme
When MODE pin is short to GND(≤10kΩ), the TPS56637 is set to Eco-mode™ control scheme to maintain high
light load efficiency. As the output current decreases from heavy load condition, the inductor current is also
reduced and eventually comes to a point that its rippled valley touches zero level, which is the boundary between
continuous conduction and discontinuous conduction modes. The rectifying MOSFET is turned off when the zero
inductor current is detected. As the load current further decreases the converter runs into discontinuous
conduction mode. The on-time is kept almost the same as it was in the continuous conduction mode so that
longer time is needed to discharge the output capacitor with smaller load current to the level of the reference
voltage. This process makes the switching frequency lower, proportional to the load current, and keeps the light
load efficiency high. The transition point to the light load operation IOUT(LL) current can be calculated by
Equation 1.
I OUT(LL)
(V
VOUT ) ˜ VOUT
1
˜ IN
2 ˜ L ˜ f SW
VIN
(1)
7.3.2.2 FCCM Control
When MODE pin is floating(≥500kΩ), the TPS56637 is set to operate in forced continuous conduction mode
(FCCM) in light load conditions and allows the inductor current to become negative. In FCCM, the switching
frequency is maintained at a quasi-fixed level over the entire load range which is suitable for applications
requiring tight control of the switching frequency and output voltage ripple at the cost of lower efficiency under
light load compared with which under Eco-mode™. This mode also can help to avoid switching frequency
dropping into audible range that may introduces some audible "noise".
7.3.3 Soft Start and Pre-Biased Soft Start
The TPS56637 features an internal 2-ms soft-start function. The internal soft start circuitry controls the output
voltage slope during startup. This avoids excessive inrush current and ensures a controlled output voltage rise
time. It also prevents unwanted voltage drops from high impedance power sources or batteries. When EN pin is
set to start device operation, the internal soft-start circuitry will begin ramping up the reference voltage to the
PWM comparator with a controlled slope. If the output capacitor is pre-biased at startup, the device initiates
switching and start ramping up only after the internal reference voltage becomes greater than the feedback
voltage VFB. This scheme ensures that the converters ramp up smoothly into regulation point.
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7.3.4 Enable and Adjusting Undervoltage Lockout
The EN pin provides electrical on and off control of the device. When the EN pin voltage exceeds the threshold
voltage, the device begins operating. If the EN pin voltage is pulled below the threshold voltage, the regulator
stops switching and enters the standby operation.
The EN pin has an internal pull-up current source which allows the user to float the EN pin to enable the device.
If an application requires control of the EN pin, open-drain or open-collector output logic can be used to interface
with the pin.
The TPS56637 implements internal undervoltage-lockout (UVLO) circuitry on the VIN pin. The device is disabled
when the VIN pin voltage falls below the internal VIN UVLO threshold. The internal VIN UVLO threshold has a
hysteresis of 500 mV.
If an application requires a higher UVLO threshold on the VIN pin, then the EN pin can be configured as shown
in Figure 16. When using the external UVLO function, setting the hysteresis at a value greater than 500 mV is
recommended.
The EN pin has a small pull-up current, Ip, which sets the default state of the pin to enable when no external
components are connected. The pull-up current is also used to control the voltage hysteresis for the UVLO
function because it increases by Ih when the EN pin crosses the enable threshold. Use Equation 2 , and
Equation 3 to calculate the values of R1 and R2 for a specified UVLO threshold. Once R1, R2 were settled
down, the VEN voltage can be calculated by Equation 4, which should be lower than 5.5V with max VIN.
VIN
R1
Device
Ip
Ih
EN
R2
Figure 16. Adjustable VIN Undervoltage Lockout
VSTART
R1
R2
VEN
VENfalling
VENrisig
VSTOP
§ VENfalling ·
¸ Ih
I p ¨1
¨ V
¸
ENrising ¹
©
R 1 u VENfalling
VSTOP
VENfalling
R 2 u VIN
(2)
R1 Ip
R 1R 2 I p
Ih
(3)
Ih
R1 R 2
(4)
Where
• Ip = 1 µA
• Ih = 4 µA
• VENfalling = 1.12 V
• VENrising = 1.18 V
14
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7.3.5 Output Overcurrent Limit and Undervoltage Protection
The output overcurrent limit (OCL) is implemented using a cycle by cycle valley detect control circuit. The
switching current is monitored during off state by measuring the low-side FET drain to source voltage. This
voltage is proportional to the switching current. To improve accuracy, the voltage sensing is temperature
compensated.
During the on-time of the high-side FET switch, the switching current increases at a linear rate determined by
VIN, VOUT, the on-time and the output inductor value. During the on-time of the low-side FET switch, this current
decreases linearly. The average value of the switch current is the load current IOUT. If the monitored current is
above the OCL level, the converter maintains low-side FET on and delays the creation of a new set pulse, even
the voltage feedback loop requires one, until the current level becomes OCL level or lower. In subsequent
switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner.
There are some important considerations for this type of over current limit. When the load current is higher than
the over current threshold by one half of the peak-to-peak inductor ripple current, the OCL is triggered and the
current is being limited, output voltage tends to drop because the load demand is higher than what the converter
can support. When the output voltage falls below 65% of the target voltage, the UVP comparator detects it and
shuts down the device after a deglitch wait time of 0.25ms and then re-start after the hiccup time of 25ms. When
the over current condition is removed, the output will be recovered.
7.3.6 Overvoltage Protection
When the output voltage becomes higher than 125% of the target voltage, the OVP comparator output goes high
after a deglitch time of 256µs and then the output will be discharged. When the over voltage condition is
removed, the discharge path will still be on for a hiccup time of 25ms before a re-soft-start process to recover the
output voltage.
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7.3.7 UVLO Protection
Undervoltage Lockout protection(UVLO) monitors the internal regulator voltage. When the voltage is lower than
UVLO threshold voltage, the device is shut down. This protection is non-latched.
7.3.8 Thermal Shutdown
The junction temperature (Tj) of the device is monitored by an internal temperature sensor. If Tj exceeds 165°C
(typical), the device goes into thermal shut down. Both the high-side and low-side power FETs are turned off and
the discharge path is turned on. When Tj decreases below the hysteresis amount, the converter resumes normal
operation, beginning with Soft Start. To avoid unstable conditions, a hysteresis of typically 30°C is implemented
on the thermal shut down temperature.
7.3.9 Output Voltage Discharge
The TPS56637 has a built in discharge function by using an integrated MOSFET with 200-Ω RDS(on), which is
connected to the output terminal SW. The discharge is slow due to the lower current capability of the MOSFET.
The discharge path will be turned on when the device is turned off due to UV, OV, OT and EN shut down
conditions.
7.3.10 Power Good
The TPS56637 has a built in power good (PG) function to indicate whether the output voltage has reached its
appropriate level or not. The PG signal can be used for startup sequencing of multiple rails. The PG pin is an
open-drain output that requires a pull-up resistor (to any voltage below 5.5 V). A pull-up resistor of 100kΩ is
recommended to pull it up to 5V voltage. It can sink 1.5mA of current and maintain its specified logic low level.
Once the FB pin voltage is between 90% and 110% of the internal reference voltage (VREF) and after a deglitch
time of 64µs, the PG turns to high impedance status. The PG pin is pulled low after a deglitch time of 32µs when
FB pin voltage is lower than 85% of the internal reference voltage or greater than 115% of the internal reference
voltage, or in events of thermal shutdown, EN shutdown, UVLO conditions. VIN must remain present for the PG
pin to stay Low.
Table 2. Power Good Pin Logic Table (TPS56637)
PG Logic Status
Device State
Enable (EN=High)
High Impedance
VFB doesn't trigger VPGTH
√
VFB triggers VPGTH
√
Shutdown (EN=Low)
UVLO
√
2 V < VIN < VUVLO
Thermal Shutdown
TJ > TSD
Power Supply Removal
VIN < 2 V
16
Low
√
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√
√
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7.4 Device Functional Modes
7.4.1 Standby Operation
The TPS56637 can be placed in standby mode by pulling the EN pin low. The device operates with a shutdown
current of 2µA(typical) when in standby condition.
7.4.2 Normal Operation
When the input voltage is above the UVLO threshold voltage and EN pin is high, TPS56637 can operate in its
normal switching modes. Normal continuous conduction mode (CCM) occurs when the minimum switch current is
above 0 A. In CCM, the TPS56637 operates at a quasi-fixed frequency of 500kHz (typical).
7.4.3 Light Load Operation
When the MODE pin is selected to operate in FCCM mode, the converter operates in continuous conduction
mode (FCCM) during light-load conditions. During FCCM, the switching frequency is maintained at an almost
constant level over the entire load range which is suitable for applications requiring tight control of the switching
frequency and output voltage ripple at the cost of lower efficiency under light load. If the MODE pin is selected to
operate in Eco-mode™ control scheme, the device enters pulse skip mode after the valley of the inductor ripple
current crosses zero. The Eco-mode™ control scheme maintains higher efficiency at light load with a lower
switching frequency. If the TPS56637 works at Eco-mode™ and the load current is light enough to a specific
value, the TPS56637 will enter ULQ mode that the TPS56637 will disable some internal circuits to further
increase the light load efficiency.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The schematic of Figure 17 shows a typical application for TPS56637. This design converts an input voltage
range of 8V to 28V down to 5V with a maximum output current of 6 A.
8.2 Typical Application
The application schematic in Figure 17 shows the TPS56637 8-V to 28-V Input, 5-V output converter design
meeting the requirements for 6-A output. This circuit is available as the evaluation module (EVM). The sections
provide the design procedure.
U1
VIN
8
J1
VIN
BOOT
C4
R4
7
0
1
2
1
C1
10uF
C2
10uF
C3
0.1uF
EN
R1
169k
SW
6
PG
4
FB
2
PGND
9
AGND
3
SW
L1
R5
49.9
VCC
R9
PGND
R2
36.1k
10
NC
MODE
C5
22uF
C6
22uF
DNP
C7
22uF
DNP
C8
22uF
2
1
J2
R8
100k
5
VOUT
3.3uH
0.1uF
20.0k
C9
100pF
R6
73.2k
PGND
FB
R7
10.0k
PGND
TPS56637
AGND
AGND
AGND
PGND
AGND
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Figure 17. TPS56637 5-V, 6-A Reference Design
8.2.1 Design Requirements
Table 3 shows the design parameters for this application.
Table 3. Design Parameters
PARAMETER
Input voltage range
EXAMPLE VALUE
24V nominal, 8V to 28V
Output voltage
5V
Transient response, 6-A load step
18
ΔVOUT = ±5%
Output ripple voltage
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