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TPS60200, TPS60201, TPS60202, TPS60203
SLVS274A – MARCH 2000 – REVISED APRIL 2016
TPS6020x Regulated 3.3 V, 100-mA Low-Ripple Charge Pump
Low Power DC/DC Converters
1 Features
2 Applications
•
•
•
•
•
•
•
•
1
•
•
•
•
•
•
•
•
•
Regulated 3.3-V Output Voltage With up to
100-mA Output Current From a 1.8-V to 3.6-V
Input Voltage
Less Than 5-mV (PP) Output Voltage Ripple
Achieved With Push-Pull Topology
Integrated Low-Battery and Power-Good Detector
Switching Frequency Can Be Synchronized to
External Clock Signal
Extends Battery Usage With up to 90% Efficiency
and 35-μA Quiescent Supply Current
Reliable System Shutdown Because Output
Capacitor Is Discharged When Device Is Disabled
Easy-to-Design, Low-Cost, Low-EMI Power
Supply Since No Inductors Are Used
0.05-μA Shutdown Current, Battery Is Isolated
From Load in Shutdown Mode
Compact Converter Solution in UltraSmall 10-pin
MSOP With Only Four External Capacitors
Required
Evaluation Module Available (TPS60200EVM-145)
Two Battery Cells to 3.3-V Conversion
MP3 Portable Audio Players
Battery-Powered Microprocessor Systems
Backup-Battery Boost Converters
PDAs, Organizers, and Cordless Phones
Handheld Instrumentation
Glucose Meters and Other Medical Instruments
3 Description
The TPS6020x step-up, regulated charge pumps
generate a 3.3-V ±4% output voltage from a 1.8-V to
3.6-V input voltage. The devices are typically
powered by two Alkaline, NiCd or NiMH battery cells
and operate down to a minimum supply voltage of
1.6 V. Continuous output current is a minimum of 100
mA for the TPS60200 and TPS60201 and 50 mA for
the TPS60202 and TPS60203, all from a 2-V input.
Only four external capacitors are needed to build a
complete low-ripple DC/DC converter. The push-pull
operating mode of two single-ended charge pumps
assures the low output voltage ripple as current is
continuously transferred to the output.
Device Information(1)
PART NUMBER
TPS6020x
PACKAGE
MSOP (10)
BODY SIZE (NOM)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
spacer
Typical Application with Low-Battery Warning
TPS60200
7
Ci
2.2 mF
IN
OUT
5
R1
1
R3
LBI
LBO
R2
4
C1
1 mF
3
9
OFF/ON
C1+
C2+
C1–
C2–
EN
GND
2
Co
2.2 mF
10
Low Battery
Warning
6
8
350
OUTPUT
3.3 V, 100 mA
C2
1 mF
I O – Peak Output Current – mA
INPUT
1.6 V to 3.6 V
TPS60200 Peak Output Current
300
250
200
150
100
50
0
1.6
2.0
3.2
2.4
2.8
VI – Input Voltage – V
3.6
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS60200, TPS60201, TPS60202, TPS60203
SLVS274A – MARCH 2000 – REVISED APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Tables...................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
5
7.1
7.2
7.3
7.4
7.5
7.6
5
5
5
5
6
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information .................................................
Electrical Characteristics...........................................
Electrical Characteristics – Low-Battery
Comparator ................................................................
7.7 Electrical Characteristics – Power-Good
Comparator ................................................................
7.8 Typical Characteristic................................................
8
6
6
7
Detailed Description .............................................. 8
8.2 Functional Block Diagrams ....................................... 8
8.3 Feature Description................................................... 9
8.4 Device Functional Modes........................................ 10
9
Application and Implementation ........................ 11
9.1 Application Information............................................ 11
9.2 Typical Applications ................................................ 12
10 Power Supply Recommendations ..................... 17
11 Layout................................................................... 17
11.1 Layout Guidelines ................................................. 17
11.2 Layout Example .................................................... 17
11.3 Power Dissipation ................................................. 18
12 Device and Documentation Support ................. 19
12.1
12.2
12.3
12.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
19
19
13 Mechanical, Packaging, and Orderable
Information ........................................................... 19
8.1 Overview ................................................................... 8
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (March 2000) to Revision A
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
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SLVS274A – MARCH 2000 – REVISED APRIL 2016
5 Device Comparison Tables
Table 1. Available Options
PART NUMBER
DEVICE FEATURES
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
TA
TPS60200
Low-battery detector
100
3.3
–40°C to 85°C
TPS60201
Power-good detector
100
3.3
–40°C to 85°C
TPS60202
Low-battery detector
50
3.3
–40°C to 85°C
TPS60203
Power-good detector
50
3.3
–40°C to 85°C
Table 2. Other Charge Pump DC/DC Converters
PART NUMBER
DESCRIPTION
TPS60100
2-cell to regulated 3.3 V, 200-mA low-noise charge pump
TPS60101
2-cell to regulated 3.3 V, 100-mA low-noise charge pump
TPS60110
3-cell to regulated 5 V, 300-mA low-noise charge pump
TPS60111
3-cell to regulated 5 V, 150-mA low-noise charge pump
TPS60120
2-cell to regulated 3.3 V, 200-mA high-efficiency charge pump with low battery comparator
TPS60121
2-cell to regulated 3.3 V, 200-mA high-efficiency charge pump with power-good comparator
TPS60122
2-cell to regulated 3.3 V, 100-mA high-efficiency charge pump with low battery comparator
TPS60123
2-cell to regulated 3.3 V, 100-mA high-efficiency charge pump with power-good comparator
TPS60130
3-cell to regulated 5 V, 300-mA high-efficiency charge pump with low battery comparator
TPS60131
3-cell to regulated 5 V, 300-mA high-efficiency charge pump with power-good comparator
TPS60132
3-cell to regulated 5 V, 150-mA high-efficiency charge pump with low battery comparator
TPS60133
3-cell to regulated 5 V, 150-mA high-efficiency charge pump with power-good comparator
TPS60140
2-cell to regulated 5 V, 100-mA charge pump voltage tripler with low battery comparator
TPS60141
2-cell to regulated 5 V, 100-mA charge pump voltage tripler with power-good comparator
Copyright © 2000–2016, Texas Instruments Incorporated
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SLVS274A – MARCH 2000 – REVISED APRIL 2016
www.ti.com
6 Pin Configuration and Functions
TPS60200 and TPS60202 DGS Package
10-Pin MSOP
Top View
LBI
1
10
GND
2
9
EN
C1–
3
8
C2–
C1+
4
7
IN
OUT
5
TPS60201 and TPS60203 DGS Package
10-Pin MSOP
Top View
LBO
6
GND
1
10
PG
GND
2
9
EN
C1–
3
8
C2–
C1+
4
7
IN
OUT
5
6
C2+
C2+
Pin Functions
PIN
TPS60200,
TPS60202
TPS60201,
TPS60203
I/O
C1+
4
4
—
Positive terminal of the flying capacitor C1
C1–
3
3
—
Negative terminal of the flying capacitor C1
C2+
6
6
—
Positive terminal of the flying capacitor C2
C2–
8
8
—
Negative terminal of the flying capacitor C2
NAME
EN
9
9
I
GND
2
1, 2
IN
7
7
DESCRIPTION
Device-enable input. Three operating modes can be programmed with the EN pin.
EN = Low disables the device. Output and input are isolated in the shutdown mode
and the output capacitor is automatically discharged. EN = High lets the device run
from the internal oscillator. If an external clock signal is applied to the EN pin, the
device is in Sync–Mode and runs synchronized at the frequency of the external
clock signal.
Ground
I
Supply input. Bypass IN to GND with a capacitor of the same size as CO.
LBI
1
—
I
Low-battery detector input for TPS60200 and TPS60202. A low-battery warning is
generated at the LBO pin when the voltage on LBI drops below the threshold of
1.18 V. Connect LBI to GND if the low-battery detector function is not used. For the
devices TPS60201 and TPS60203, this pin has to be connected to ground (GND
pin).
LBO
10
—
O
Open-drain low-battery detector output for TPS60200 and TPS60202. This pin is
pulled low if the voltage on LBI drops below the threshold of 1.18 V. A pullup
resistor should be connected between LBO and OUT or any other logic supply rail
that is lower than 3.6 V.
OUT
5
5
O
Regulated 3.3-V power output. Bypass OUT to GND with the output filter capacitor
CO.
PG
—
10
O
Open-drain power-good detector output for TPS60201 and TPS60203. As soon as
the voltage on OUT reaches about 90% of it is nominal value this pin goes active
high. A pullup resistor should be connected between PG and OUT or any other
logic supply rail that is lower than 3.6 V.
4
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SLVS274A – MARCH 2000 – REVISED APRIL 2016
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Voltage
Continuous total power
dissipation
Continuous output current
MIN
MAX
IN, OUT, EN, LBI, LBO, PG to GND
–0.3
3.6
C1+, C2+ to GND
–0.3
VO + 0.3
C1–, C2– to GND
–0.3
VI + 0.3
TA ≤ 25°C power rating
424
TA = 70°C power rating
187
TA = 85°C power rating
136
TPS60200, TPS60201
150
TPS60202, TPS60203
75
Junction temperature, TJ
Storage temperature, Tstg
(1)
–55
UNIT
V
mW
mA
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VI
Input voltage
Ci
Input capacitor
C1, C2
Flying capacitors
CO
Output capacitor
TJ
Operating junction temperature
NOM
MAX
1.6
UNIT
3.6
V
2.2
µF
1
µF
2.2
µF
–40
125
°C
7.4 Thermal Information
TPS6020x
THERMAL METRIC (1)
DGS (MSOP)
UNIT
10 PINS
RθJA
Junction-to-ambient thermal resistance
158.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
49.3
°C/W
RθJB
Junction-to-board thermal resistance
78.1
°C/W
ψJT
Junction-to-top characterization parameter
4.7
°C/W
ψJB
Junction-to-board characterization parameter
76.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5 Electrical Characteristics
Ci = 2.2 µF, C1 = C2 = 1 µF, CO = 2.2 µF, TA = –40°C to 85°C, VI = 2.4 V, and EN = VI (unless otherwise noted)
PARAMETER
IO(MAX)
Maximum continuous output current
TEST CONDITIONS
MIN
TPS60200 and TPS60201, VI = 2 V
100
TPS60202 and TPS60203, VI = 2 V
50
1.6 V < VI < 1.8 V,
0 < IO < 0.25 × IO(MAX)
VO
Output voltage
TYP
MAX
UNIT
mA
3
1.8 V < VI < 2 V,
0 < IO < 0.5 × IO(MAX)
3.17
3.43
2 V < VI < 3.3 V, 0 < IO < IO(MAX)
3.17
3.43
3.3 V < VI < 3.6 V, 0 < IO < IO(MAX)
3.17
V
3.47
VPP
Output voltage ripple
IO = IO(MAX)
I(Q)
Quiescent current (no-load input
current)
IO = 0 mA, VI = 1.8 V to 3.6 V
I(SD)
Shutdown supply current
EN = 0 V
0.05
1
µA
f(OSC)
Internal switching frequency
200
300
400
kHz
f(SYNC)
External clock signal frequency
400
600
800
kHz
External clock signal duty cycle
5
35
30%
mVPP
70
µA
70%
VIL
EN input low voltage
VI = 1.6 V to 3.6 V
VIH
EN input leakage current
VI = 1.6 V to 3.6 V
Ilkg(EN)
EN input leakage current
EN = 0 V or VI
Output capacitor auto discharge time
EN is set from VI to GND,
time until VO < 0.5 V
0.6
ms
Output resistance in shutdown
EN = 0 V
70
Ω
LinSkip threshold
VI = 2.2 V
Output load regulation
10 mA < IO< IO(MAX), TA = 25°C
Output line regulation
2 V < VI < 3.3 V,
IO = 0.5 × IO(MAX), TA = 25°C
Short-circuit current
VI = 2.4 V, VO = 0 V
I(SC)
0.3 × VI
V
0.1
µA
0.7 × VI
V
0.01
7
mA
0.01%
mA
0.6%
V
60
mA
7.6 Electrical Characteristics – Low-Battery Comparator
TPS60200 and TPS60202 devices only at TA = –40°C to 85°C, VI = 2.4 V, and EN = VI (unless otherwise noted) (1)
PARAMETER
V(LBI)
TEST CONDITIONS
LBI trip voltage
VI = 1.6 V to 2.2 V,
TC = 0°C to 70°C
LBI trip voltage hysteresis
For rising voltage at LBI
II(LBI)
LBI input current
V(LBI) = 1.3 V
VO(LBO)
LBO output voltage low
V(LBI) = 0 V, I(LBO) = 1 mA
Ilkg(LBO)
LBO leakage current
V(LBI) = 1.3 V, V(LBO) = 3.3 V
(1)
MIN
TYP
MAX
UNIT
1.13
1.18
1.23
V
10
2
0.01
mV
50
nA
0.4
V
0.1
µA
During start-up of the converter, the LBO output signal is invalid for the first 500 µs.
7.7 Electrical Characteristics – Power-Good Comparator
TPS60201 and TPS60203 devices only at TA = –40°C to 85°C, VI = 2.4 V, and EN = VI (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
V(PG)
Power-good trip voltage
TC = 0°C to 70°C
Vhys(PG)
Power-good trip voltage hysteresis
VO decreasing, TC = 0°C to 70°C
VO(PG)
Power-good output voltage low
VO = 0 V, I(PG) = 1 mA
Ilkg(PG)
Power-good leakage current
VO = 3.3 V, V(PG) = 3.3 V
(1)
6
MIN
TYP
MAX
0.87 × VO
0.91 × VO
0.95 × VO
UNIT
V
1%
0.01
0.4
V
0.1
µA
During start-up of the converter, the PG output signal is invalid for the first 500 µs.
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7.8 Typical Characteristic
40
I – Quiescent Current – m A
Q
38
IO = 0 mA
36
34
32
30
28
26
24
22
20
1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
VI – Input Voltage – V
Figure 1. Quiescent Supply Current vs Input Voltage
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8 Detailed Description
8.1 Overview
The TPS6020x charge pumps provide a regulated 3.3-V output from a 1.8-V to 3.6-V input. They deliver up to
100-mA load current while maintaining the output at 3.3 V ± 4%. Designed specifically for space-critical, batterypowered applications, the complete converter requires only four external capacitors. The device is using the
push-pull topology to achieve lowest output voltage ripple. The converter is also optimized for smallest board
space. It makes use of small-sized capacitors, with the highest output current rating per output capacitance and
package size.
The TPS6020x circuits consist of an oscillator, a 1.18-V voltage reference, an internal resistive feedback circuit,
an error amplifier, two charge pump power stages with high current MOSFET switches, a shutdown and start-up
circuit, a control circuit, and an auto-discharge transistor (see Functional Block Diagrams).
8.2 Functional Block Diagrams
Charge Pump 1
0°
Oscillator
180°
IN
C1+
C1
C1–
EN
Charge Pump 2
Control
Circuit
C2+
_
C2–
C2
+
+
VREF –
Shutdown/
Start-Up
Control
OUT
_
_
Autodischarge
+
LBI
+
+
–
0.8 x VIN
+
VREF –
GND
LBO
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Figure 2. TPS60200 and TPS60202 With Low-Battery Detector
8
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SLVS274A – MARCH 2000 – REVISED APRIL 2016
Functional Block Diagrams (continued)
Charge Pump 1
0°
Oscillator
180°
IN
C1+
C1
C1–
EN
Charge Pump 2
Control
Circuit
C2+
_
C2–
C2
+
+
VREF –
Shutdown/
Start-Up
Control
OUT
_
_
Autodischarge
+
+
+
–
0.8 x VIN
VREF
GND
+
–
PG
Copyright © 2016, Texas Instruments Incorporated
Figure 3. TPS60201 and TPS60203 With Power-Good Detector
8.3 Feature Description
8.3.1 Start-Up, Shutdown, and Auto-Discharge
During start-up, that is when EN is set from logic low to logic high, the output capacitor is directly connected to IN
and charged up with a limited current until the output voltage VO reaches 0.8 × VI. When the start-up comparator
detects this limit, the converter begins switching. This precharging of the output capacitor guarantees a short
start-up time. In addition, the inrush current into an empty output capacitor is limited. The converter can start into
a full load, which is defined by a 33-Ω or 66-Ω resistor, respectively.
Driving EN low disables the converter. This disables all internal circuits and reduces the supply current to only
0.05 μA. The device exits shutdown once EN is set high. When the device is disabled, the load is isolated from
the input. This is an important feature in battery-operated products because it extends the products shelf life.
Additionally, the output capacitor will automatically be discharged after EN is taken low. This ensures that the
system, when switched off, is in a stable and reliable condition because the supply voltage is removed from the
supply pins.
8.3.2 Synchronization to an External Clock Signal
The operating frequency of the charge pump is limited to 400 kHz to avoid interference in the sensitive 455-kHz
IF band. The device can either run from the integrated oscillator, or an external clock signal can be used to drive
the charge pump. The maximum frequency of the external clock signal is 800 kHz. The switching frequency used
internally to drive the charge pump power stages is half of the external clock frequency. The external clock signal
is applied to the EN pin. The device will switch off if the signal on EN is hold low for more than 10 μs.
When the load current drops below the LinSkip current threshold, the devices will enter the pulse-skip mode but
stay synchronized to the external clock signal.
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Feature Description (continued)
8.3.3 Power-Good Detector
The power-good output is an open-drain output that pulls low when the output is out of regulation. When the
output rises to within 90% of its nominal voltage, the power-good output is released. Power-good is high
impedance in shutdown. In normal operation, an external pullup resistor must be connected between PG and
OUT, or any other voltage rail in the appropriate range. The resistor should be in the 100-kΩ to 1-MΩ range. If
the PG output is not used, it should remain unconnected.
8.4 Device Functional Modes
8.4.1 Push-Pull Operating Mode
The two single-ended charge pump power stages operate in the so-called push-pull operating mode, that is they
operate with a 180°C phase shift. Each single-ended charge pump transfers charge into its transfer capacitor (C1
or C2) in one half of the period. During the other half of the period (transfer phase), the transfer capacitor is
placed in series with the input to transfer its charge to CO. While one single-ended charge pump is in the charge
phase, the other one is in the transfer phase. This operation assures an almost constant output current which
ensures a low output ripple.
If the clock were to run continuously, this process would eventually generate an output voltage equal to two times
the input voltage (hence the name voltage doubler). To provide a regulated fixed output voltage of 3.3 V, the
TPS6020x devices use either pulse-skip or constant-frequency linear-regulation control mode. The mode is
automatically selected based on the output current. If the load current is below the LinSkip current threshold, it
switches into the power-saving pulse-skip mode to boost efficiency at low output power.
8.4.2 Constant-Frequency Mode
When the output current is higher then the LinSkip current threshold, the charge pump runs continuously at the
switching frequency f(OSC). The control circuit, fed from the error amplifier, controls the charge on C1 and C2 by
controlling the gates and hence the rDS(ON) of the integrated MOSFETs. When the output voltage decreases, the
gate drive increases, resulting in a larger voltage across C1 and C2. This regulation scheme minimizes output
ripple. Since the device switches continuously, the output signal contains well-defined frequency components,
and the circuit requires smaller external capacitors for a given output ripple. However, constant-frequency mode,
due to higher operating current, is less efficient at light loads. For this reason, the device switches seamlessly
into the pulse-skip mode when the output current drops below the LinSkip current threshold.
8.4.3 Pulse-Skip Mode
The regulator enters the pulse-skip mode when the output current is lower than the LinSkip current threshold of
7 mA. In the pulse-skip mode, the error amplifier disables switching of the power stages when it detects an
output voltage higher than 3.3 V. The controller skips switching cycles until the output voltage drops below 3.3 V.
Then the error amplifier reactivates the oscillator and switching of the power stages starts again. A 30-mV output
voltage offset is introduced in this mode.
The pulse-skip regulation mode minimizes operating current because it does not switch continuously and
deactivates all functions except the voltage reference and error amplifier when the output is higher than 3.3 V.
Even in pulse-skip mode the rDS(ON) of the MOSFETs is controlled. This way the energy per switching cycle that
is transferred by the charge pump from the input to the output is limited to the minimum that is necessary to
sustain a regulated output voltage, with the benefit that the output ripple is kept to a minimum. When switching is
disabled from the error amplifier, the load is also isolated from the input.
10
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TPS60200, TPS60201, TPS60202, TPS60203
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SLVS274A – MARCH 2000 – REVISED APRIL 2016
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The power-good output is an open-drain output that pulls low when the output is out of regulation. When the
output rises to within 90% of its nominal voltage, the power-good output is released. Power-good is high
impedance in shutdown. In normal operation, an external pullup resistor must be connected between PG and
OUT, or any other voltage rail in the appropriate range. The resistor should be in the 100-k Ω to 1-M Ω range. If
the PG output is not used, it should remain unconnected)
9.1.1 Capacitor Selection
The TPS6020x devices require only four external capacitors to achieve a very low output voltage ripple. The
capacitor values are closely linked to the required output current. Low ESR (
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