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TPS60500, TPS60501, TPS60502, TPS60503
SLVS391C – OCTOBER 2001 – REVISED SEPTEMBER 2015
TPS6050x High-Efficiency, 250-mA Step-Down Charge Pump
1 Features
3 Description
•
•
The TPS6050x devices are a family of switched
capacitor voltage converters, designed specifically for
space-critical battery-powered applications.
1
•
•
•
•
•
•
•
•
•
•
Wide Input Voltage Range From 1.8 V to 6.5 V
Regulated 3.3-V, 1.8-V, 1.5-V, or Adjustable
Output Voltage
Up to 250-mA Output Current
Up to 90% Efficiency
Output Voltage Tolerance 3% Over Line, Load,
and Temperature Variation
Device Quiescent Current Less Than 40 µA
Output Voltage Supervisor Included (Power Good)
Internal Soft Start
Load Isolated From Battery During Shutdown
Overtemperature and Overcurrent Protected
Micro-Small 10-Pin VSSOP Package
EVM Available, TPS60500EVM-193
The TPS6050x step-down charge pumps generate a
regulated, fixed 3.3-V, 1.8-V, 1.5-V, or adjustable
output voltage. Only four small ceramic capacitors are
required to build a complete high-efficiency DC–DC
charge pump converter. To achieve the high
efficiency over a wide input voltage range, the charge
pump automatically selects between three different
conversion modes. The output can deliver a
maximum of 250-mA output current. The power good
function supervises the output voltage and goes high
when the output voltage rises to 97% of the nominal
value.
The TPS6050x devices come in a micro-small 10-pin
VSSOP package.
2 Applications
•
•
•
•
•
Device Information(1)
Mobile Phones
Portable Instruments
Internet Audio Player
PC Peripherals
USB Powered Applications
PART NUMBER
BODY SIZE (NOM)
VSSOP (10)
3.05 mm × 4.98 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Schematic
C1F
1 μF
PACKAGE
TPS60500
TPS60501
TPS60502
TPS60503
Efficiency vs Input Voltage
C2F
1 μF
100
100 mA
50 mA
90
80
6
3
4
70
C1F− C1F+ C2F− C2F+
INPUT
Li-ion cell
OUT
5
1.8 V
150 mA
7
+ C
o
10 μF
VIN
Ci
2.2 μF
FB
Efficiency − %
8
60
150 mA
50
LDO
40
30
20
10
10
1
R
EN
OFF/ON
PG
2
0
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
VI − Input Voltage − V
GND
9
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS60500, TPS60501, TPS60502, TPS60503
SLVS391C – OCTOBER 2001 – REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 7
8.1 Overview ................................................................... 7
8.2 Functional Block Diagram ......................................... 7
8.3 Feature Description................................................... 7
8.4 Device Functional Modes.......................................... 8
9
Application and Implementation ........................ 11
9.1 Application Information............................................ 11
9.2 Typical Applications ................................................ 11
9.3 System Examples ................................................... 17
10 Power Supply Recommendations ..................... 21
11 Layout................................................................... 21
11.1 Layout Guidelines ................................................. 21
11.2 Layout Examples................................................... 21
12 Device and Documentation Support ................. 23
12.1
12.2
12.3
12.4
12.5
12.6
Device Support......................................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
23
13 Mechanical, Packaging, and Orderable
Information ........................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (February 2002) to Revision C
•
2
Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
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SLVS391C – OCTOBER 2001 – REVISED SEPTEMBER 2015
5 Device Comparison Table
(1)
PART NUMBER (1)
OUTPUT VOLTAGE [V]
MINIMUM INPUT VOLTAGE FOR IOUT = 150 mA
TPS60500DGS
Adjustable (0.8 V to 3.3 V)
VIN > VOUT + 1
TPS60501DGS
3.3
VIN > 4.3 V
TPS60502DGS
1.8
VIN > 2.8 V
TPS60503DGS
1.5
VIN > 2.5 V
The DGS package is available taped and reeled. Add R suffix to device type (for example, TPS60500DGSR) to order quantities of 2500
devices per reel.
6 Pin Configuration and Functions
DGS Package
10-Pin VSSOP
Top View
EN
PG
C2F−
C2F+
VIN
1
10
2
9
3
8
4
7
5
6
FB
GND
C1F−
OUT
C1F+
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
C1F+
6
–
Positive terminal of the flying capacitor C1F
C1F−
8
–
Negative terminal of the flying capacitor C1F
C2F+
4
–
Positive terminal of the flying capacitor C2F
C2F−
3
–
Negative terminal of the flying capacitor C2F
EN
1
I
Device-enable Input.
− EN = High disables the device. Output and input are isolated in shutdown mode.
− EN = Low enables the device.
GND
9
–
Ground
FB
10
O
TPS60500: connect via voltage divider to VO
TPS60501 to TPS60503: connect directly to VO
OUT
7
O
Regulated 3.3 V, 1.8 V, 1.5 V, or adjustable power output
Bypass OUT to GND with the output filter capacitor Co.
PG
2
O
Open drain power good detector output. As soon as the voltage on OUT reaches about 97% of its nominal
value this pin goes high.
VIN
5
I
Supply Input. Connect to an input supply in the 1.8-V to 6.5-V range.
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SLVS391C – OCTOBER 2001 – REVISED SEPTEMBER 2015
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7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
Voltage at VIN, EN, PG to GND (2)
−0.3
7
V
Voltage at OUT, FB to GND
−0.3
3.6
V
Voltage at C1F+, C1F−, C2F+, C2F− to GND
−0.3
7
V
300
mA
150
°C
150
°C
Output current at OUT
TJ
Maximum junction temperature
Tstg
Storage temperature
(1)
(2)
−55
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The voltage at EN, and PG can exceed VIN up to the maximum rated voltage without increasing the leakage current drawn by these
mode select inputs.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted)
MIN
VIM
Input voltage at VIN
IOUT
Output current at OUT
CIN
Input capacitor
C1F,
C2F
Flying capacitors
MAX
UNIT
6.5
V
250
mA
2.2
µF
1
Output capacitor
TJ
NOM
1.8
COUT for IOUT ≤ 150 mA
4.7
COUT for 150 mA < IOUT < 250 mA
22
µF
−40
Operating junction temperature
µF
125
°C
7.4 Thermal Information
TPS6050x
THERMAL METRIC
(1)
DGS (VSSOP)
UNIT
10 PINS
RθJA
Junction-to-ambient thermal resistance
157
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
53
°C/W
RθJB
Junction-to-board thermal resistance
76
°C/W
ψJT
Junction-to-top characterization parameter
5.5
°C/W
ψJB
Junction-to-board characterization parameter
75
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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SLVS391C – OCTOBER 2001 – REVISED SEPTEMBER 2015
7.5 Electrical Characteristics
at CIN = 4.7 µF, C1F = C2F = 1 µF, COUT = 10 µF, TA = −40°C to 85°C, VIN = 5 V, V(EN) = GND (unless otherwise noted)
PARAMETER
VIN
TEST CONDITIONS
MIN
Supply voltage
1.8
VIN = 1.8 V to 2.7 V, VIN − VOUT > 1 V
IOUT
Maximum output current
TPS60500
VOUT
TPS60501
Output voltage
TPS60502
TPS60503
V(FB)
TYP
Feedback voltage
6.5
VIN ≥ 2.7 V, VIN − VOUT > 1 V
150
VOUT = 1.5 V, VIN ≥ 3.1 V
250
VIN ≥ 3.7 V, 1.8 V ≤ VOUT ≤ 2.5 V
250
VOUT > 2.5 V, VIN > VOUT + 1.2 V
250
3.3
3.3
V
1.8
1.5
0.8
–4%
V
TPS60501
IOUT = 0 mA to 150 mA, COUT = 47 µF
TPS60500
TPS60502
TPS60503
IOUT = 0 mA to 150 mA, COUT = 47 µF
3%
IOUT = 0 mA to 150 mA, COUT = 10 µF
4%
3%
IOUT = 0 mA to 250 mA, COUT = 47 µF
4%
Vpp
Output voltage ripple at OUT
IOUT = 150 mA, VOUT = 1.5 V
30
IQ
Quiescent current (no-load input current)
IOUT = 0 mA
40
T(SD)
Thermal shutdown temperature
IOUT(SD)
Shutdown supply current
f(OSC)
Internal switching frequency
VIL
EN input low voltage
VIH
EN input high voltage
Ilkg(SD)
EN input leakage current
Ilkg(FB)
FB input leakage current
TPS60500
R(max)
Maximum resistance of the
external voltage divider
TPS60500
mVPP
75
µA
0.05
0.5
µA
800
1200
kHz
0.3 ×
VIN
V
150
V(EN) = VIN
600
°C
0.7 ×
VIN
V(EN) = 0 V or VIN
V
0.01
R1 + R2 at FB pin
VIN = 6.5 V, VOUT = 0 V
Output current limit
VOUT > 0.6 V
V
mA
0.8
VIN > 2.7 V; VIN − VOUT > 1 V
at IOUT ≤ 150 mA,
VIN > 1.8 V; VIN − VOUT > 1 V
at IOUT ≤ 50 mA
Short circuit current (start-up current)
UNIT
50
TPS60500
Tolerance of output voltage
MAX
100
No load start-up time
0.1
µA
0.1
µA
1
MΩ
300
mA
500
mA
80
µs
Vml –
2%
V
FOR POWER GOOD COMPARATOR:
V(PG)
td,r
td,f
Power good trip voltage
See
Power good delay time
(1)
VOUT ramping positive
100
200
µs
VOUT ramping negative
50
100
µs
VOL
Power good output voltage low
VOUT = 0 V, I(PG) = 1 mA
Ilkg
Power good leakage current
VOUT = 3.3 V, V(PG) = 3.3 V
(1)
0.01
0.3
V
0.1
µA
Vml is the output voltage at the maximum load current. Vml is not a JEDEC symbol.
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7.6 Typical Characteristics
45
Quiescent Current − μ A
40
TA = 85°C
35
30
TA = 25°C
TA = −40°C
25
20
1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3 5.8 6.3
VI − Input Voltage − V
Figure 1. Quiescent Current vs Input Voltage
6
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8 Detailed Description
8.1 Overview
The TPS6050x charge pumps provide a regulated output voltage in the range of 0.8 V to 3.3 V from an input
voltage of 1.8 V to 6.5 V. The devices use switched capacitor fractional conversion to achieve high efficiency
over the entire input and output voltage range. Regulation is achieved by sensing the output voltage and
enabling the internal switches as needed to maintain the selected output voltage. This skip-mode regulation is
used over a load range from 0 mA to 150 mA. At a higher output current, the device works in a linear regulation
mode.
The TPS6050x circuits consist of an oscillator, a voltage reference, an internal resistive feedback circuit (fixedvoltage version only), an error amplifier, two charge pump stages with MOSFET switches, a shutdown or start-up
circuit, and a control circuit.
8.2 Functional Block Diagram
VIN
VIN
2/3
1/2
Skip
Gear
Logic
800 KHz
CLK
EN
Driver
1/3
C1F
C2F
EN
=
ON/OFF
OUT
EN
Start−up
Thermal and
Short-Circuit
Current Limit
OUT
FB
Skip
Regulator
Amplifier
Bandgap
0.8 V
V_REG
PG
PG
EN
8.3 Feature Description
8.3.1 Short-Circuit Current Limit and Thermal Protection
When the output voltage is lower than 0.6 V, the output current is limited to 300 mA typically.
The device also has a thermal protection which reduces the output current when the temperature of the chip
exceeds 150°C. The output current declines to 0 mA when the chip temperature rises to 160°C.
8.3.2 Enable
Driving EN high disables the converter. This disables all internal circuits, reducing input current to only 0.05 µA.
Leakage current drawn from the output pin OUT is a maximum of 1 µA. The device exits shutdown once EN is
set low (see Start-up Procedure). The typical no-load start-up time is 80 µs. When the device is disabled, the
load is isolated from the input, an important feature in battery-operated products because it extends the battery
shelf life.
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Feature Description (continued)
8.3.3 Power Good Detector
The power good (PG) output is an open-drain output on all TPS6050x devices. The PG output pulls low when the
output is out of regulation. When the output rises above 97% nominal Vout, the power good output is pulled high
by resistor. In shutdown, power good is pulled low. In normal operation, an external pullup resistor is typically
used to connect the PG pin to VOUT or VIN. If the PG output is not used, it should remain unconnected.
VO
V(NOM)
VIT
td,r
PG
1
td,r
t
td,f
0
t
EN
1
0
t
Figure 2. Power Good Timing Diagram
8.4 Device Functional Modes
8.4.1 Start-up Procedure
The device is enabled when EN is set from logic high to logic low. The charge pump stages immediately start
switching to transfer energy to the output. In start-up until the output voltage has reached 0.6 V, the input current
is limited to 300 mA typically.
8.4.2 Conversion Modes
The TPS6050x devices use fractional conversion to achieve high efficiency over a wide input and output voltage
range. Depending on the input to output voltage ratio and output current, internal circuitry switches between an
LDO mode, a 2/3x mode, a 0.5x mode, and a 1/3x mode.
8.4.2.1 LDO Conversion Mode
In the LDO mode, the flying capacitors are no longer used for transferring energy. The switches 1, 2, 5, and 6
are closed and connect the input directly with the output. This mode is automatically selected if the input to
output voltage ratio does not allow the use of another conversion mode with higher efficiency. In LDO mode, the
regulation is done by switching off MOSFET 2 and 6 until the output current reaches the linear-skip current (150
mA typical). At a higher output current, the output voltage is regulated by controlling the resistance of the switch.
The minimum input to output voltage difference required for regulation is 1 V.
8
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Device Functional Modes (continued)
VIN
SW1
SW2
SW7
C2F
+
SW5
SW3
C1F
+
SW9
SW8
SW6
SW4
OUT
+
Co
Figure 3. LDO Conversion Mode
8.4.2.2 2/3x Conversion Mode
In the first cycle, the two flying capacitors are connected in parallel and are charged up in series with the output
capacitor. In the second cycle, the flying capacitors are connected in series. This mode provides higher efficiency
than the LDO mode because the current into VIN is only 2/3 of the output current. The mode is automatically
selected if the input voltage is higher than 3/2 of the selected output voltage.
VIN
SW1
SW2
VIN
SW3
C1F
+
SW4
SW5
SW7
C2F
+
SW9
SW6
SW1
SW8
SW2
SW3
C1F
+
SW4
SW5
SW9
SW6
SW7
C2F
+
SW8
OUT
+
Phase 1: Charging of Flying Caps
OUT
+
Co
Co
Phase 2: Discharging of Flying Caps
Figure 4. 2/3x Conversion Mode
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Device Functional Modes (continued)
8.4.2.3 0.5x Conversion Mode
This conversion mode is internally selected if the input to output voltage ratio is greater than two (for example,
3.6-V to 1.5-V conversion). In the 0.5x mode, the flying capacitors and the switches always work in parallel,
which reduces the resistance of the circuit compared to the other modes. In the first cycle, the flying capacitors
are charged in series with the output capacitors. In the second cycle, the flying capacitors are connected in
parallel with the output capacitor, which discharges the flying capacitors.
VIN
SW1
SW2
SW3
C1F
+
SW4
SW5
VIN
SW1
SW7
C2F
+
SW9
SW6
SW2
SW8
SW3
C1F
+
SW4
SW5
SW9
SW6
SW7
C2F
+
SW8
OUT
+
OUT
+
Co
Phase 1: Charging of Flying Caps
Co
Phase 2: Discharging of Flying Caps
Figure 5. 0.5x Conversion Mode
8.4.2.4 1/3x Conversion Mode
This mode was implemented to provide high efficiency even with an input to output voltage ratio greater than
three (for example, 5-V to 1.5-V conversion). In the first cycle, the two flying capacitors are charged in series with
the output capacitor. In the next step, the flying capacitors which are charged to VIN/3, are connected in parallel
to the output capacitor.
VIN
SW1
SW2
SW3
C1F
+
SW4
SW5
VIN
SW1
SW7
C2F
+
SW9
SW8
SW6
SW2
SW3
C1F
+
SW4
SW5
SW9
SW6
SW7
C2F
+
SW8
OUT
+
Phase 1: Charging of Flying Caps
OUT
+
Co
Co
Phase 2: Discharging of Flying Caps
Figure 6. 1/3x Conversion Mode
10
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TPS6050x devices are switched capacitor voltage converters providing fractional conversion to achieve high
efficiency over a wide input and output voltage range. They support regulated output voltages of 3.3 V, 1.8 V and
1.5 V or adjustable output voltages from a 1.8-V to 6.5-V input voltage range.
9.2 Typical Applications
9.2.1 Typical Application Circuit for Fixed-Voltage and Adjustable-Voltage Versions
Figure 7. Typical Operating Circuit – TPS60500, Adjustable Output Voltage
Figure 8. Typical Operating Circuit – TPS60503, Maximum 150-mA Output Current
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Typical Applications (continued)
Figure 9. Typical Operating Circuit – TPS60503, Maximum 250-mA Output Current
9.2.1.1 Design Requirements
The Detailed Design Procedure provides a component selection to operate the device within the recommended
operating conditions
Figure 7, Figure 8 and Figure 9 show the typical operation circuits. The TPS60501 to TPS60503 devices use an
internal resistor divider for sensing the output voltage. The FB pin must be connected externally with the output.
For maximum output current and best performance, four ceramic capacitors are recommended. For lower
currents or higher allowed output voltage ripple, other capacitors can also be used. TI recommends that the
minimum value of the output capacitor be 4.7 µF. This value is necessary to maintain a stable operation of the
system. Flying capacitors lower than 1 µF can be used, but this decreases the maximum output power. This
means that the device works in linear mode with lower output currents. The device works in the linear mode for
an output current of greater than 150 mA. With an output current greater than 150 mA, an output capacitor of
≥22 µF must be used. Figure 9 shows that two 10-µF capacitors can also be used in parallel.
9.2.1.2 Detailed Design Procedure
9.2.1.2.1 Capacitor Selection
Designed specifically for space-critical battery-powered applications, the complete converter requires only four
external capacitors. The capacitor values are closely linked to the required output current, output noise, and
ripple requirements. The input capacitor improves system efficiency by reducing the input impedance, and it also
stabilizes the input current. The value of the output capacitor, CO, influences the stability of the voltage regulator.
The minimum required capacitance for CO is 4.7 µF. Depending on the maximum allowed output ripple voltage
and load current, larger values can be chosen. For an output current greater than 150 mA, a minimum output
capacitor of 22 µF is required. Table 2 shows ceramic capacitor values recommended for low output voltage
ripple.
Table 1. Recommended Capacitor Values
12
IOUT, MAX
[mA]
CIN
[µF]
C(xF)
[µF]
COUT
[µF]
50
2.2
0.22
4.7
150
4.7
1
10
250
4.7
1
22
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Table 2. Recommended Capacitors
MANUFACTURER
PART NUMBER
SIZE
CAPACITANCE
TYPE
Taiyo Yuden
LMK212BJ105KG
LMK212BJ225MG
EMK316BJ225KL
LMK316BJ475KL
JMK316BJ106KL
805
805
1206
1206
1206
1 µF
2.2 µF
2.2 µF
4.7 µF
10 µF
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
TDK
C2012X5R1C105M
C2012X5R1A225M
C2012X5R0J106M
805
805
805
1 µF
2.2 µF
10 µF/6.3 V
Ceramic
Ceramic
Ceramic
Table 3 contains a list of manufacturers of ceramic capacitors. Ceramic capacitors provide the lowest output
voltage ripple because they typically have the lowest ESR-rating.
Table 3. Recommended Capacitor Manufacturers
MANUFACTURER
CAPACITOR TYPE
INTERNET
Taiyo Yuden
X7R/X5R ceramic
www.t−yuden.com
TDK
X7R/X5R ceramic
www.component.tdk.com
Vishay
X7R/X5R ceramic
www.vishay.com
Kemet
X7R/X5R ceramic
www.kemet.com
9.2.1.2.2 Resistor Combinations
Table 4. Resistor Combinations
NOMINAL OUTPUT VOLTAGE
EQUATION
POSSIBLE E24 RESISTOR COMBINATIONS
1.2 V
R1 = 0.5R2
R1 = 100 kΩ, R2 = 200 kΩ, (1.20 V)
1.5 V
R1 = 0.875R2
R1 = 160 kΩ, R2 = 180 kΩ, (1.51 V)
1.6 V
R1 = R2
any
1.8 V
R1 = 1.25R2
R1 = 150 kΩ, R2 = 120 kΩ, (1.80 V)
2.5 V
R1 = 2.125R2
R1 = 510 kΩ, R2 = 240 kΩ, (2.50 V)
R1 = 470 kΩ, R2 = 220 kΩ, (2.51 V)
Equations:
VOUT -
(R1 + R2)
´ VFB
R2
VFB = 0.8 V
(1)
æV
ö
R1 - R2 ç OUT ÷ - R2
è VFB ø
(2)
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9.2.1.3 Application Curves
3.40
3.6
VO Threshold:
VO nom −3% = 1.455 V
3
TA = 85°C
2.80
TA = 25°C
2.60
2.40
2.20
TA = −40°C
2
3.2
3
2.8
−40°C
25°C
2.6
2.4
2.2
1.80
85°C
2
1.60
1.8
0
50
100
150
200
IO − Output Current − mA
0
250
50
200
250
2.6
VO Threshold:
VO nom −3% = 3.201 V
4.1
−40°C
4
25°C
3.9
3.8
85°C
3.7
VO Threshold:
VO nom −3% = 0.776 V
2.5
VI(min) − Input Voltage − V
4.2
3.6
3.5
2.4
2.3
2.2
85°C
2.1
25°C
2
1.9
1.8
1.7
−40°C
1.6
3.4
1.5
3.3
1.4
0
50
100
150
200
250
0
50
IO − Output Current − mA
100
150
200
250
IO − Output Current − mA
Figure 12. TPS60501
Minimum Input Voltage vs Output Current
Figure 13. TPS60500
Minimum Input Voltage vs Output Current
100
100
100 mA
10 mA
90
150 mA
90
80
80
70
70
60
Efficiency − %
Efficiency − %
150
Figure 11. TPS60502
Minimum Input Voltage vs Output Current
4.3
200 mA
10 mA
50
250 mA
40
60
200 mA
150 mA
50
100 mA
40
30
30
20
20
10
10
0
250 mA
0
2
14
100
IO − Output Current − mA
Figure 10. TPS60503
Minimum Input Voltage vs Output Current
VI(min) − Input Voltage − V
VO Threshold:
VO nom −3% = 1.746 V
3.4
V I(min) − Input Voltage − V
V I(min) − Input Voltage − V
3.20
2.5
3
3.5
4
4.5
5
5.5
6
6.5
2
2.5
3
3.5
4
4.5
5
5.5
6
VI − Input Voltage − V
VI − Input Voltage − V
Figure 14. TPS60503
Efficiency vs Input Voltage
Figure 15. TPS60502
Efficiency vs Input Voltage
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100
100
10 mA
90
60
200 mA
100 mA
50
250 mA
40
60
50
150 mA
40
100 mA
30
20
20
10
10
4
4.5
5
5.5
6
0
1.5
6.5
50 mA
VO Adjusted to 0.8 V,
Co = 47 μ F,
2
2.5 3
3.5 4
4.5 5
5.5 6 6.5
V − Input Voltage − V
VI − Input Voltage − V
Figure 16. TPS60501
Efficiency vs Input Voltage
Figure 17. TPS60500
Efficiency vs Input Voltage
1.55
1.84
Co = 10 μF,
1.54
Co = 10 μ F,
1.83
1.53
VI = 5 V
1.82
1.52
VO − Output Voltage − V
VO − Output Voltage − V
250 mA
70
Efficiency − %
Efficiency − %
70
150 mA
30
VI = 3.6 V
1.51
VI = 5 V
1.5
1.49
1.48
VI = 3.3 V
1.47
VI = 3.6 V
1.81
1.80
1.79
VI = 3.3 V
1.78
1.77
1.76
1.75
1.46
1.45
0.1
1.74
1
10
100
1000
0.1
IO − Output Current − mA
1
10
100
1000
IO − Output Current − mA
Figure 18. TPS60503
Output Voltage vs Output Current
Figure 19. TPS60502
Output Voltage vs Output Current
3.36
0.86
VO Adjusted to 0.8 V
0.85
VI = 5 V
Co = 10 μF
3.34
0.84
VO − Output Voltage − V
VO− Output Voltage − V
200 mA
80
80
0
3.5
10 mA
90
VI = 3.6 V
0.83
VI = 5 V
0.82
0.81
0.80
VI = 2.4 V
0.79
VI = 3.3 V
0.78
3.32
3.30
3.28
3.26
3.24
3.22
0.77
0.76
0.1
3.20
1
10
100
1000
IO − Output Current − mA
Figure 20. TPS60500
Output Voltage vs Output Current
Copyright © 2001–2015, Texas Instruments Incorporated
0.1
1
10
100
1000
IO − Output Current − mA
Figure 21. TPS60501
Output Voltage vs Output Current
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90
90
VI = 3.3 V
VI = 3.6 V
80
VI = 3.3 V
80
VI = 5 V
Efficiency − %
Efficiency − %
70
VI = 3.6 V
60
50
70
VI = 5 V
60
50
40
40
30
30
0.1
20
0.1
1
10
100
1000
10
100
1000
IO − Output Current − mA
Figure 22. TPS60503
Efficiency vs Output Current
Figure 23. TPS60502
Efficiency vs Output Current
100
90
1
IO − Output Current − mA
80
VI = 5 V
VI = 3.3 V
VI = 2.4 V
70
Efficiency − %
Efficiency − %
80
70
60
50
60
VI = 3.6 V
50
VI = 5 V
40
40
30
30
VO Adjusted to 0.8 V
1
10
100
1000
0.1
1
10
100
1000
IO − Output Current − mA
IO − Output Current − mA
Figure 24. TPS60501
Efficiency vs Output Current
Figure 25. TPS60500
Efficiency vs Output Current
Co = 10 μF,
VI = 3.3 V
VO = 1.5 V
IO = 100 mA
TA = 25°C
10 mV/division
1 μs / division
Figure 26. Output Voltage (Ripple) vs Time
16
20
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VO − OUTPUT VOLTAGE (RIPPLE) − V
VO − OUTPUT VOLTAGE (RIPPLE) − V
20
0.1
Co = 10 μF,
IO = 50 mA
VO = 1.5 V
TA = 25°C
VO
50 mV/division
VI = 2.5 V to 3.5 V to 2.5 V
1 V/division
10 μs / division
Figure 27. Line Transient Response
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Co = 10 μF,
VO − OUTPUT VOLTAGE (RIPPLE) − V
VI = 3.3 V
VO = 1.5 V
TA = 25°C
50 mV/division
VO
IO = 15 mA to 135 mA to 15 mA
100 mA/division
10 μs / division
Figure 28. Load Transient Response
9.3 System Examples
9.3.1 DSP Supply With Sequencing
This application shows a power supply for a typical digital signal processor (DSP). DSPs usually have core
voltages in the 1-V to 2.5-V range, whereas the voltage at the I/O-pins (I/O voltage) is typically 3.3 V to interface
with external logic and converters. Therefore, a power supply with two output voltages is required. The
application works with an input voltage in the range of 3.5 V to 6.5 V. The maximum output current is 150 mA on
each output.
The supply is enabled by pulling the enable pin (EN of the TPS60503) to GND. The step-down charge pump
starts and its power good (PG) output goes high. This enables the LDO which powers the I/O lines and
generates a reset signal for the DSP. Figure 29 shows the timing diagram of the start-up or shutdown procedure.
VI/O
V(NOM)
VIT
TPS77133
VI
10 MΩ
1 MΩ
VIN
VIN
OUT
OUT
FB
EN RESET
GND
3.3 V
10 μF†
TPS60503
VIN
47 μF
1 MΩ
ENABLE
GND
EN
C1F−
VI/O
RESET
PG
FB
OUT
C1F+
1.5 V
t
RS‡
1
0
PG
1
td
td
t
td
V(CORE)
10 μF†
0
t
1 μF
EN
1
C2F+
C2F−
GND
t
V(CORE)
V(NOM)
VIT
47 kΩ
1 μF
0
t
† Recommended value for stability, DSP may require higher capacitance.
‡ RS is the RESET output of the TPS77133.
Figure 29. DSP Supply With Sequencing
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System Examples (continued)
9.3.2 LC-Post Filter
If the output voltage ripple of the step-down charge pump is to high, an LC post filter can be used.
C1F
1 μF
8
C2F
1 μF
6
3
4
C1F− C1F+ C2F− C2F+
INPUT
2.5 V to 6.5 V
OUT
5
+ C
o
10 μF
VIN
Ci
2.2 μF
TPS60503
FB
1
L(P) max 150 mA
7
VP(out)
C(P)
10
R
EN
OFF/ON
PG
2
GND
9
Figure 30. LC-Post Filter
Table 5. Measurement Results on Different C(fly), C(P), L(P) Combinations; BW = 500 MHz
CI
[µF]
C(XF)
[µF]
CO
[µF]
CERAMIC
CERAMIC
CERAMIC
50
2.2
0.22
4.7
—
50
2.2
0.22
4.7
—
5
150
4.7
1
10
5
250
4.7
1
5
100
4.7
1
VI
[V]
IO
[mA]
5
5
C(P)
[µF]
VO
[V]
TYPICAL
VP(Out)
VPP[mV]
TYPICAL VO(RMS)
[mV]
0.1 (X7R)
3.3
50
8
0.1 (X7R)
1.5
30
9
—
0.1 (X7R)
1.5
50
6
2 x 10
—
0.1 (X7R)
1.5
45
8
10
0.1
0.1 (X7R)
1.5
20
4
L(P)
[µH]
CERAMIC
9.3.3 Power Supply With Dynamic Voltage Scaling
Dynamic voltage scaling of the core can be used to reduce power consumption of a digital signal processor
(DSP). During the periods, in which the maximum DSP performance is not required, the core voltage can be
reduced when the DSP operates at a lower clock-rate. This function is called runtime power control (RPC) and is
supported by modern DSPs. RPC extends battery lifetime in handheld applications, like MP3 players and digital
cameras.
The supply of DSPs is separated into I/O interface and core supply. Interface is mostly powered by a 3.3-V
system supply, whereas core supply achieves voltages far below 1.5 V. The TPS60500 is powered by the 3.3-V
system supply. The DSP itself selects the applied core voltage.
The core voltage is switched between 1.5 V and 1.1 V by changing the feedback resistor network. A MOSFET
modifies the voltage divider at the feedback (FB) pin by switching a resistor. In this application, a generalpurpose MOSFET BSS138 is used with a VGS(th) of 1.6 V. A DSP 3.3-V I/O port drives the gate. The feedback
resistor network consists of R2, R3 and R4. C(ff) is the fast-forward capacitor for improved line regulation.
General requirements for the application:
• Output voltage1 (DSP core): 1.5 V ±0.08 V
• Output voltage 2 (DSP core): 1.1 V +0.1 V –0.05 V
• Input voltage: 3 V to 3.3 V
• Output current: 150 mA (10R load)
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C1F
1 μF
C2F
1 μF
8
6
3
4
C1F− C1F+ C2F− C2F+
Input
3.3 V
OUT
5
Co
10 μF
VIN
Ci
2.2 μF
TPS60500
FB
1
7
10
C(ff)
150 pF
R2
R3
R4
T1
R1
EN
1.5 V / 1.1 V
150 mA
DVS in
OFF/ON
GND
PG
9
BSS138
R5
2
330 kΩ
C6
470 pF
Figure 31. Dynamic Voltage Scaling Application
To keep current through the adjustment resistor network as low as possible, the resistors are calculated to:
Vout1 adjusted by R2 and R3
Vout1 = 1.1 V,
R2 =1
80 kW,
VFB
Vout1 - VFB
Vref = 0.80 V,
R2
® R3 = 470 kW
adjusted by R2 and Rx = R3||R4
R3 =
Vout2
Vout2 = 1.5 V,
V ´ R2
Rx = FB
(V 2 - VFB )
1
1
1
=
+
Rx R3 R4
® R4 =
(3)
® Rx = 206 kW
(4)
1
1
1
Rx R3
Copyright © 2001–2015, Texas Instruments Incorporated
® R4 = 360 kW
(5)
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9.3.4 Internet Audio Power Supply
The input voltage from a single or dual NiCd, NiMH or alkaline cell is boosted to 3.3 V. This voltage is used as
system supply for the application and as an input voltage for the step-down charge pump which is used to
provide the core voltage for a DSP.
L1
10 μH
Ci
10 μF
7
SW
6
VOUT
VBAT
Co
22 μF
R1
9
LBI
LBO
R2
Single or dual
NiCd,
NiMH or
Alkaline Cell
8
R5
R3
Low Battery
Output
10
TPS61010
1
VO = 3.3 V
IO ≥ 100 mA
5
FB
EN
ADEN
COMP
GND
C1F
1 μF
100 kΩ
Cc1
10 pF
9
R4
R(C)
2
Cc2
10 nF
C2F
1 μF
8
6
3
4
C1F− C1F+ C2F− C2F+
OUT
5
Co
10 μF
VIN
Ci
2.2 μF
TPS60503
FB
1
7
VO = 1.5 V
IO ≤ 150 mA
10
R
EN
OFF/ON
PG
GND
2
Power Good
Output
9
Figure 32. Internet Audio Power Supply
20
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10 Power Supply Recommendations
The TPS6050x devices have no special requirements for its input power supply. The output currents of the input
power supply need to be rated according to the supply voltage, output voltage and output current of the
TPS6050x.
11 Layout
11.1 Layout Guidelines
All capacitors must be soldered as close as possible to the IC. A PCB layout proposal for a two-layer board is
shown in Figure 33. Connect all capacitors as close as possible to the circuit to achieve optimized output voltage
ripple performance.
11.2 Layout Examples
Top GND Plane
VOUT
connection
Ceramic output
capacitor as close
to device as possible
VIN connection
Ceramic input
capacitor as close
to device as possible
Figure 33. Recommended PCB Layout for TPS6050x (Top Layer)
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Layout Examples (continued)
Bottom GND Plane
C1F
C2F
Figure 34. Recommended PCB Layout for TPS6050x (Bottom Layer)
Figure 35. Top Silkscreen
22
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SLVS391C – OCTOBER 2001 – REVISED SEPTEMBER 2015
12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 6. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS60500
Click here
Click here
Click here
Click here
Click here
TPS60501
Click here
Click here
Click here
Click here
Click here
TPS60502
Click here
Click here
Click here
Click here
Click here
TPS60503
Click here
Click here
Click here
Click here
Click here
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS60500DGS
ACTIVE
VSSOP
DGS
10
80
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
AVB
Samples
TPS60500DGSG4
ACTIVE
VSSOP
DGS
10
80
RoHS & Green
Level-1-260C-UNLIM
-40 to 85
AVB
Samples
TPS60500DGSR
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
AVB
Samples
TPS60500DGSRG4
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVB
Samples
TPS60501DGS
ACTIVE
VSSOP
DGS
10
80
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVC
Samples
TPS60501DGSR
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVC
Samples
TPS60502DGS
ACTIVE
VSSOP
DGS
10
80
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVD
Samples
TPS60502DGSR
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVD
Samples
TPS60503DGS
ACTIVE
VSSOP
DGS
10
80
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVE
Samples
NIPDAU
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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