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TPS61000, TPS61001, TPS61002, TPS61003
TPS61004, TPS61005, TPS61006, TPS61007
SLVS279D – MARCH 2000 – REVISED AUGUST 2015
TPS6100x Single- and Dual-Cell Boost Converter With Start-up Into Full Load
1 Features
3 Description
•
The TPS6100x devices are boost converters intended
for systems that are typically operated from a singleor dual-cell nickel-cadmium (NiCd), nickel-metal
hydride (NiMH), or alkaline battery. The converter
output voltage can be adjusted from 1.5 V to a
maximum of 3.3 V and provides a minimum output
current of 100 mA from a single battery cell and 250
mA from two battery cells. The converter starts up
into a full load with a supply voltage of 0.9 V and
stays in operation with supply voltages as low as 0.8
V.
1
•
•
•
•
•
Start-Up Into a Full Load With Supply Voltages as
Low as 0.9 V Over Full Temperature Range
Minimum 100-mA Output Current From 0.8-V
Supply Voltage, 250 mA From 1.8 V
High Power Conversion Efficiency, up to 90%
Power-Save Mode for Improved Efficiency at Low
Output Currents
Device Quiescent Current Less Than 50 µA
Added System Security With Integrated LowBattery Comparator
Low-EMI Converter (Integrated Antiringing Switch
Across Inductor)
Micro-Size 10-Pin MSOP Package
Evaluation Modules Available
(TPS6100xEVM–156)
2 Applications
The converter is based on a fixed-frequency, currentmode pulse-width-modulation (PWM) controller that
goes into power-save mode at low load currents. The
current through the switch is limited to a maximum of
1100 mA, depending on the output voltage. The
current sense is integrated to further minimize
external component count. The converter can be
disabled to minimize battery drain when the system is
put into standby.
•
•
•
•
•
A low-EMI mode is implemented to reduce
interference and radiated electromagnetic energy that
is caused by the ringing of the inductor when the
inductor discharge-current decreases to zero. The
device is packaged in the space-saving 10-pin MSOP
package.
•
•
•
Single- and Dual-Cell Battery Operated Products
MP3-Players and Wireless Headsets
Pagers and Cordless Phones
Portable Medical Diagnostic Equipment
Remote Controls
Device Information(1)
PART NUMBER
TPS6100x
PACKAGE
VSSOP (10)
BODY SIZE (NOM)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Ci
10 µ F
33 µH
6 VBAT
D1
7
SW
9 LBI
R2
LBO 10
Low Battery
Warning
TPS61006
8 NC
FB 3
ON
OFF
Co
22 µ F
VOUT 5
R3
R1
1 EN
COMP 2
GND
4
C1
100 pF
140
VO = 3.3 V
R4
10 k Ω
C2
33 nF
VOUT
3
VO - Output Voltage - V
L1
TPS61006 Start-Up Timing Into 33-Ω Load
120
100
2
IOUT
80
60
40
1
EN
0
0
20
IO - Output Current - mA
Typical Application Circuit for Fixed Output
Voltage Options
0
2
4
6
8 10 12 14 16 18 20
Time - ms
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61000, TPS61001, TPS61002, TPS61003
TPS61004, TPS61005, TPS61006, TPS61007
SLVS279D – MARCH 2000 – REVISED AUGUST 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Available Options...................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
4
4
4
4
5
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 9
Detailed Description ............................................ 10
9.1 Overview ................................................................. 10
9.2 Functional Block Diagrams ..................................... 10
9.3 Feature Description................................................. 12
9.4 Device Functional Modes........................................ 13
10 Application and Implementation........................ 14
10.1 Application Information.......................................... 14
10.2 Typical Application ............................................... 15
11 Power Supply Recommendations ..................... 20
12 Layout................................................................... 20
12.1 Layout Guidelines ................................................. 20
12.2 Layout Example .................................................... 20
12.3 Thermal Considerations ........................................ 21
13 Device and Documentation Support ................. 22
13.1
13.2
13.3
13.4
13.5
13.6
Device Support......................................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
22
22
22
22
22
22
14 Mechanical, Packaging, and Orderable
Information ........................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (April 2003) to Revision D
Page
•
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
•
Replaced the Dissipation Ratings table with the Thermal Information table .......................................................................... 4
2
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TPS61004, TPS61005, TPS61006, TPS61007
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SLVS279D – MARCH 2000 – REVISED AUGUST 2015
5 Available Options
TA
–40°C to 85°C
(1)
OUTPUT VOLTAGE
(V)
PART NUMBER (1)
MARKING DGS
PACKAGE
Adj. from 1.5 V to 3.3 V
TPS61000DGS
ADA
1.5
TPS61001DGS
ADB
1.8
TPS61002DGS
ADC
2.5
TPS61003DGS
ADD
2.8
TPS61004DGS
ADE
3.0
TPS61005DGS
ADF
3.3
TPS61006DGS
ADG
Adj. from 1.5 V to 3.3 V
TPS61007DGS
AD
PACKAGE
10-Pin MSOP DGS
The DGS package is available taped and reeled. Add R suffix to device type (e.g. TPS61000DGSR) to order quantities of 2500 devices
per reel.
6 Pin Configuration and Functions
DGS Package
10-Pin VSSOP
Top View
EN
COMP
FB
GND
VOUT
1
10
2
9
3
8
4
7
5
6
LBO
LBI
NC/FBGND
SW
VBAT
TPS61007 only
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
Compensation of error amplifier. Connect R-C-C network to set frequency response of control loop. See the
Application section for more details.
COMP
2
—
EN
1
I
Chip-enable input. The converter is switched on if EN is set high, and is switched off when EN is connected to
ground (shutdown mode).
FB
3
I
Feedback input for adjustable output voltage (TPS61000 only). The output voltage is programmed depending
on the values of resistors R1 and R2. For the fixed output voltage versions (TPS61000, TPS61002,
TPS61003, TPS61004, TPS61005, TPS61006), leave the FB pin unconnected.
NC/FBGND
8
—
Not connected (TPS61000, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006). A ground pin for the
feedback resistor divider for the TPS61007 only.
GND
4
—
Ground
LBI
9
I
Low-battery detector input. A low-battery signal is generated at the LBO pin when the voltage on LBI drops
below the threshold of 500 mV. Connect LBI to GND or VBAT if the low-battery detector function is not used.
Do not leave this pin floating.
LBO
10
O
Open-drain low-battery detector output. This pin is pulled low if the voltage on LBI drops below the threshold
of 500 mV. A pullup resistor should be connected between LBO and VOUT.
SW
7
I
Switch input pin. The node between inductor and anode of the rectifier diode is connected to this pin.
VBAT
6
I
Supply pin
VOUT
5
O
Output voltage. For the fixed output voltage versions, the integrated resistive divider is connected to this pin.
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3
TPS61000, TPS61001, TPS61002, TPS61003
TPS61004, TPS61005, TPS61006, TPS61007
SLVS279D – MARCH 2000 – REVISED AUGUST 2015
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VI
MIN
MAX
UNIT
Input voltage (VBAT, VOUT, COMP, FB, LBO, EN, LBI)
–0.3
3.6
V
Input voltage (SW)
–0.3
VOUT + 0.7
V
1300
mA
Peak current into SW
Continuous total power dissipation
See Thermal Information
TA
Operating free-air temperature
85
°C
TJ
Maximum junction temperature
150
°C
Lead temperature
260
°C
150
°C
Tstg
(1)
–40
Storage temperature
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±1000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±500
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VBAT
Supply voltage
VO
Output current
MAX
VO
VBAT = 0.8 V
100
VBAT = 0.8 V
250
Inductor
TJ
NOM
0.8
33
10
Output capacitor
22
Operating junction temperature
–40
V
mA
10
Input capacitor
UNIT
µH
µF
µF
125
°C
7.4 Thermal Information
TPS6100x
THERMAL METRIC
(1)
DGS (VSSOP)
UNIT
10 PINS
RθJA
Junction-to-ambient thermal resistance
160.6
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
54.4
°C/W
RθJB
Junction-to-board thermal resistance
80.5
°C/W
ψJT
Junction-to-top characterization parameter
6.3
°C/W
ψJB
Junction-to-board characterization parameter
79.2
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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TPS61000, TPS61001, TPS61002, TPS61003
TPS61004, TPS61005, TPS61006, TPS61007
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SLVS279D – MARCH 2000 – REVISED AUGUST 2015
7.5 Electrical Characteristics
over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted)
PARAMETER
TEST CONDITIONS
RL = 33 Ω
Input voltage for start up
VI
VO
RL = 3 kΩ,
0.8
Programmable output voltage TPS61000,
TPS61007
IO = 100 mA
1.5
TPS61003
Output voltage
TPS61004
TPS61005
TPS61006
IO
Maximum continuous output current
I ILIM
Switch current limit
VFB
Feedback voltage
f
Oscillator frequency
DMAX
Maximum duty cycle
rDS(on)
Switch-on resistance
Line regulation
IO = 1 mA
1.44
1.5
1.55
0.8 V < VI < VO,
IO = 100 mA
1.45
1.5
1.55
1.2 V,
IO = 1 mA
1,72
1.8
1.86
0.8 V < VI < VO,
IO = 100 mA
1.74
1.8
1.86
1.2 V,
IO = 1 mA
2.40
2.5
2.58
0.8 V < VI < VO,
IO = 100 mA
2.42
2.5
2.58
1.6 V < VI < VO,
IO = 200 mA
2.42
2.5
2.58
1.2 V,
IO = 1 mA
2.68
2.8
2.89
0.8 V < VI < VO,
IO = 100 mA
2.72
2.8
2.89
1.6 V < VI < VO,
IO = 200 mA
2.72
2.8
2.89
1.2 V,
IO = 1 mA
2.88
3.0
3.1
0.8 V < VI < VO,
IO = 100 mA
2.9
3.0
3.1
1.6 V < VI < VO,
IO = 200 mA
1.2 V,
IO = 1 mA
0.8 V < VI < VO,
1.6 V < VI < VO,
2.9
3.0
3.1
3.16
3.3
3.4
IO = 100 mA
3.2
3.3
3.4
IO = 200 mA
3.2
3.3
3.4
VI = 0.8 V
100
VI = 1.8 V
250
0.9
0.8 V < VI < VO
TPS61005
1
TPS61006
1.1
(1)
468
360
VIL
EN low-level input voltage
VIH
EN high-level input voltage
V
V
V
V
V
500
515
mV
500
840
kHz
0.27
Ω
85%
VO = 3.3 V
0.18
VI = 0.8 V to 1.25 V,
IO = 50 mA
VI = 1.2 V,
IO = 10 mA to 90 mA
I = 0 mA,
Quiescent current drawn from power source O
VEN = VI,
ower (current into VBAT and into VOUT)
VO = 3.4 V
Shutdown current from power source
(current into VBAT and into VOUT)
V
A
0.95
TPS61000,
TPS61007
V
mA
0.65
ISD
(1)
1.2 V,
TPS61002
Load regulation fixed output voltage
versions (1)
IQ
3.3
0.5
TPS61004
UNIT
V
TPS61001
TPS61003
MAX
0.8
IO = 100 mA
TPS61002
TYP
0.9
TA = 25°C
Input voltage once started
TPS61001
VO
MIN
0.3
%/V
0.25%
VBAT
44
VOUT
6
VEN = 0 V
0.2
µA
5
µA
0.2x
VBAT
V
0.8 ×
VBAT
V
Line and load regulation is measured as a percentage deviation from the nominal value (i.e., as percentage deviation from the nominal
output voltage). For line regulation, x %/V stands for ±x% change of the nominal output voltage per 1-V change on the input/supply
voltage. For load regulation, y% stands for ±y% change of the nominal output voltage per the specified current change.
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Electrical Characteristics (continued)
over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted)
PARAMETER
VIL
TEST CONDITIONS
EN input current
EN = GND or VBAT
LBI low-level input voltage threshold
VLBI voltage decreasing
LBI input hysteresis
MIN
TYP
MAX
0.1
1
470
500
530
10
UNIT
µA
mV
II
LBI input current
0.01
0.1
VOL
LBO low-level output voltage
VLBI = 0 V, VO = 3.3 V, IOL = 50 µA
0.04
0.2
V
LBO output leakage current
VLBI = 650 mV, VLBO = 3.3 V
0.01
1
µA
FB input bias current (TPS61000,
TPS61007 only)
VFB = 500 mV
0.01
0.1
IFB
6
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µA
µA
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TPS61004, TPS61005, TPS61006, TPS61007
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SLVS279D – MARCH 2000 – REVISED AUGUST 2015
7.6 Typical Characteristics
Table 1. Table of Graphs
TITLE
vs Output Current
Figure 1, Figure 2
vs Inductor Type
Figure 3
vs Input Voltage
Figure 4
vs Input Voltage
Figure 5
Output Voltage
vs Output Current
Figure 6
VO
TPS61007 Output Voltage
vs Output Current
Figure 7
IQ
No-Load Supply Current
vs Input Voltage
Figure 8
ISD
Shutdown Current
vs Input Voltage
Figure 9
VI
Minimum Start-Up Input Voltage
vs Load Current
Figure 10
ILIM
Switch Current Limit
vs Output Voltage
Figure 11
η
Efficiency
IO
Maximum Output Current
VO
100
100
VI = 2.4 V
VI = 1.2 V
90
90
80
80
VO = 3.3 V
70
VO = 1.5 V
Efficiency − %
Efficiency − %
70
60
50
40
VO = 2.8 V
60
50
40
30
30
20
20
10
10
0
0
1
10
100
1
1000
10
100
1000
IO − Output Current − mA
IO − Output Current − mA
Figure 1. Efficiency vs Output Currency
Figure 2. Efficiency vs Output Currency
95
100
95
VO = 3.3 V
VI = 1.2 V
VO = 3.3 V
IO = 100 mA
IO = 50 mA
90
90
85
Efficiency − %
Efficiency − %
85
80
75
70
IO = 100 mA
80
75
65
70
60
55
50
65
Coilcraft
DO1608C
Coilcraft
DS1608C
Coiltronics
Coiltronics
UP1B
UP2B
Inductor Type
Sumida
CD43
Figure 3. Efficiency vs Inductor Type
Copyright © 2000–2015, Texas Instruments Incorporated
Sumida
CD54
60
0.80
1.30
1.80
2.30
VI − Input Voltage − V
2.80
3.30
Figure 4. Efficiency vs Input Voltage
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SLVS279D – MARCH 2000 – REVISED AUGUST 2015
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3.60
1
3.20
0.80
0.70
VO = 2.42 V
VO = 1.75 V
0.60
0.50
VO = 1.45 V
0.40
0.30
2.5 V
2.60
2.40
2
0.20
0.10
1.80
1.8 V
1.60
1
1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8
VI − Input Voltage − V
1
3
10
1000
Figure 6. TPS61002/3/6 Output Voltage vs Output Current
45
3.60
VI = 1.2 V
VO = 3.3 V
3.20
3
2.80
VO = 2.5 V
2.60
2.40
2.20
2
TA = 85°C
40
I Q − No-Load Supply Current − m A
3.40
VO = 1.8 V
35
TA = 25°C
30
TA = −40°C
25
20
15
10
5
1.80
1.60
0.1
1
10
100
0
0.80
1000
1.30
IO − Output Current − mA
Figure 7. TPS61007 Output Voltage vs Output Current
3.30
3.80
0.90
VI − Minimum Start-Up Input Voltage − V
TA = 85°C
1600
1400
1200
1000
800
600
400
TA = 25°C
200
TA = −40°C
0
0.80
1.80
2.30
2.80
VI − Input Voltage − V
Figure 8. No-Load Supply Current vs Input Voltage
1800
I SD − Shutdown Current − nA
100
IO − Output Current − mA
Figure 5. Maximum Output Current vs Input Voltage
VO − Output Voltage − V
3
2.80
2.00
0
0.8
8
VI = 1.2 V
3.3 V
3.40
VO = 3.2 V
VO − Output Voltage − V
I O − Maximum Output Current − A
0.90
1.30
1.80
2.30
2.80
3.30
3.80
VO = min 3.2 V
0.85
0.80
0.75
0.70
0.65
0.60
0
10
20
30
40
50
60
70
80
90 100
VI − Input Voltage − V
IO − Load Current − mA
Figure 9. Shutdown Current vs Input Voltage
Figure 10. Minimum Start-up Input Voltage vs Load Current
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SLVS279D – MARCH 2000 – REVISED AUGUST 2015
1.5
I LIM − Switch Current Limit − A
VI = 1.2 V
1
0.5
0
1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5
VO − Output Voltage − V
Figure 11. TPS61000, TPS61007 Switch Current Limit vs Output Voltage
8 Parameter Measurement Information
L1
Ci
10 µF
D1
33 µH
6 VBAT
7
SW
R3
R1
Low Battery
Warning
LBO 10
9 LBI
R2
TPS6100x
8 NC/FBGND
FB 3
ON
OFF
Co
22 µF
VOUT 5
List of Components:
IC1: Only fixed output versions
(unless otherwise noted)
L1:
Coilcraft DO3308P−333
D1: Motorola Schottky Diode
MBRM120LT3
CI:
Ceramic
CO: Ceramic
COMP 2
1 EN
GND
4
R4
10 kΩ
C1
100 pF
C2
33 nF
Figure 12. Circuit Used for Typical Characteristics Measurements
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SLVS279D – MARCH 2000 – REVISED AUGUST 2015
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9 Detailed Description
9.1 Overview
The TPS6100x Non-synchronous step-up converter typically operates at a 500-kHz frequency pulse width
modulation (PWM) at moderate to heavy load currents. The converter enters Power Save mode at low load
currents to maintain a high efficiency over a wide load. Additionally, the device integrates a circuit which removes
the ringing that typically appears on the SW-node when the converter enters the discontinuous current mode.
9.2 Functional Block Diagrams
L1
D1
CI
VOUT
SW
CO
Antiringing
Comparator
and Switch
VBAT
UVLO
EN
LBI/LBO
Comparator
Control Logic
Oscillator
Gate Drive
Current Sense
Current Limit
Slope Compensation
LBI
VREF
Comparator
Error
Amplifier
LBO
GND
Bandgap
Reference
COMP
Figure 13. Fixed Output-Voltage Option
10
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TPS61000, TPS61001, TPS61002, TPS61003
TPS61004, TPS61005, TPS61006, TPS61007
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Functional Block Diagrams (continued)
L1
D1
CI
CO
SW
Antiringing
Comparator
and Switch
VBAT
VOUT
UVLO
Control Logic
Oscillator
Gate Drive
EN
LBI/LBO
Comparator
Current Sense
Current Limit
Slope Compensation
LBI
FB
VREF
Comparator
Bandgap
Reference
Error
Amplifier
LBO
GND
COMP
Figure 14. Adjustable Output-Voltage Option (TPS61000 Only)
L1
D1
CI
CO
SW
Antiringing
Comparator
and Switch
VBAT
UVLO
EN
LBI/LBO
Comparator
VOUT
Control Logic
Oscillator
Gate Drive
Current Sense
Current Limit
Slope Compensation
LBI
FB
VREF
Comparator
Error
Amplifier
LBO
Bandgap
Reference
FBGND
GND
COMP
Figure 15. Adjustable Output-Voltage Option (TPS61007 Only)
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9.3 Feature Description
9.3.1 Controller Circuit
The device is based on a current-mode control topology using a constant-frequency pulse-width modulator to
regulate the output voltage. It runs at an oscillator frequency of 500 kHz. The current sense is implemented by
measuring the voltage across the switch. The controller also limits the current through the power switch on a
pulse-by-pulse basis. Care must be taken that the inductor saturation current is higher than the current limit of
the TPS6100x. This prevents the inductor from going into saturation and therefore protects both device and
inductor. The current limit should not become active during normal operating conditions.
The TPS6100x is designed for high efficiency over a wide output current range. Even at light loads the efficiency
stays high because the controller enters a power-save mode, minimizing switching losses of the converter. In this
mode, the controller only switches if the output voltage trips below a set threshold voltage. It ramps up the output
voltage with one or several pulses, and again goes into the power-save mode once the output voltage exceeds
the threshold voltage. The controller enters the power-save mode when the output current drops to levels that
force the discontinuous current mode. It calculates a minimum duty cycle based on input and output voltage and
uses the calculation for the transition out of the power-save mode into continuous current mode.
The control loop must be externally compensated with an R/C/C network connected to the COMP pin. See the
application section for more details on the design of the compensation network.
9.3.2 Device Enable
The device is put into operation when EN is set high. During start-up of the converter the input current from the
battery is limited until the voltage on COMP reaches its operating point. The device is put into a shutdown mode
when EN is set to GND. In this mode, the regulator stops switching and all internal control circuitry including the
low-battery comparator is switched off. The output voltage drops to one diode drop below the input voltage in
shutdown.
9.3.3 Undervoltage Lockout
An undervoltage lockout function prevents the device start-up if the supply voltage on VBAT is lower than
approximately 0.7 V. This undervoltage lockout function is implemented in order to prevent the malfunctioning of
the converter. When in operation and the battery is being discharged, the device automatically enters the
shutdown mode if the voltage on VBAT drops below approximately 0.7 V.
If the EN pin is hardwired to VBAT and if the voltage at VBAT drops temporarily below the UVLO threshold voltage,
the device switches off and does not start up again automatically, even if the supply voltage rises above 0.9 V.
The device starts up again only after a signal change from low to high on EN or if the battery voltage is
completely removed.
9.3.4 Low-Battery Detector Circuit (LBI and LBO)
The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag
when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is
enabled. When the device is disabled, the LBO pin is high impedance. The LBO pin goes active low when the
voltage on the LBI pin decreases below the set threshold voltage of 500 mV ±15 mV, which is equal to the
internal reference voltage. The battery voltage, at which the detection circuit switches, can be programmed with a
resistive divider connected to the LBI pin. The resistive divider scales down the battery voltage to a voltage level
of 500 mV, which is then compared to the LBI threshold voltage. The LBI pin has a built-in hysteresis of 10 mV.
See the application section for more details about the programming of the LBI threshold.
If the low-battery detection circuit is not used, the LBI pin should be connected to GND (or to VBAT) and the LBO
pin can be left unconnected. Do not let the LBI pin float.
9.3.5 Low-EMI Switch
The device integrates a circuit which removes the ringing that typically appears on the SW-node when the
converter enters the discontinuous current mode. In this case, the current through the inductor ramps to zero and
the Schottky diode stops conducting. Due to remaining energy that is stored in parasitic components of the
diode, inductor, and switch, a ringing on the SW pin is induced. The integrated antiringing switch clamps this
voltage internally to VBAT and therefore dampens this ringing.
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Feature Description (continued)
The antiringing switch is turned on by a comparator that monitors the voltage between SW and VOUT. This
voltage indicates when the diode is reverse biased. The ringing on the SW-node is damped to a large degree,
reducing the electromagnetic interference generated by the switching regulator to a great extent.
9.3.6 Adjustable Output Voltage (TPS61000 and TPS61007 Only)
The accuracy of the internal voltage reference, the controller topology, and the accuracy of the external resistor
divider determine the accuracy of the adjustable output voltage versions. The reference voltage has an accuracy
of ±4% over line, load, and temperature. The controller switches between fixed frequency and pulse-skip mode,
depending on load current. This adds an offset to the output voltage that is equivalent to 1% of VO. Using 1%
accurate resistors for the feedback divider, a total accuracy of ±6% can be achieved over the complete
temperature and output current range. The TPS61007 is an improved adjustable output voltage version. Ground
shift in the feedback loop was eliminated by adding a separate ground pin for the feedback resistor divider
(FBGND).
9.4 Device Functional Modes
9.4.1 Power Save Mode
The TPS6100x enters a power-save mode, minimizing switching losses of the converter. In this mode, the
controller only switches if the output voltage trips below a set threshold voltage. It ramps up the output voltage
with one or several pulses, and again goes into the power-save mode once the output voltage exceeds the
threshold voltage.
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The TPS6100x boost converter family is intended for systems that are powered by a single-cell NiCd or NiMH
battery with a typical terminal voltage between 0.9 V to 1.6 V. It can also be used in systems that are powered by
two-cell NiCd or NiMH batteries with a typical stack voltage between 1.8 V and 3.2 V. Additionally, singleor dualcell, primary and secondary alkaline battery cells can be the power source in systems where the TPS6100x is
used.
10.1.1 Schematic of TPS6100x Evaluation Modules (TPS6100XEVM156)
J1
LP1
R6
C5
TPS6100x
R5
LBO
EN
C6
COMP
FB
OUT
LBI
NC/FBGND
L1
R3
R4
GND
SW
VOUT
VBAT
C2
C1
R2
R1
IN
C3
D1
Figure 16. Schematic of TPS6100x Evaluation Modules
Evaluation modules are available for device types TPS61000, TPS61002, TPS61003, and TPS61006.
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10.2 Typical Application
D1
L1
VO
33 µH
7
SW
Ci
10 µF
10 V
VOUT
CO
22 µF
10 V
5
R5
6 V
BAT
R1
9
LBO
FB
LBI
Low Battery
Warning
3
TPS61007
R4
R2
FBGND
1
R3
10
8
EN
Alkaline Cell
COMP
2
RC
10 kΩ
GND
4
CC1
100 pF
CC2
33 nF
Figure 17. Typical Application Circuit for Adjustable Output Voltage Option
10.2.1 Design Requirements
See Table 2 for design parameters.
Table 2. TPS6100x Output Design Parameters
DESIGN PARAMETERS
VALUES
Input voltage range
1.8 V to 3.3 V
Output voltage
3.3 V
Output voltage ripple
±3% VOUT
10.2.2 Detailed Design Procedure
10.2.2.1 Programming the TPS61000 and TPS61007 Adjustable Output Voltage Devices
The output voltage of the TPS61000 and TPS61007 can be adjusted with an external resistor divider. The typical
value of the voltage on the FB pin is 500 mV in fixed-frequency operation and 485 mV in the power-save
operation mode. The maximum allowed value for the output voltage is 3.3 V. The current through the resistive
divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is
0.01 µA, and the voltage across R4 is typically 500 mV. Based on those two values, the recommended value for
R4 is in the range of 500 kΩ in order to set the divider current at 1 µA. From that, the value of resistor R3,
depending on the needed output voltage VOUT, can be calculated using the following equation:
5
§ V
·
5 u ¨ O ± ¸
© VFB
¹
§ VO
·
N: u ¨
± ¸
500
mV
©
¹
(1)
If, as an example, an output voltage of 2.5 V is needed, a 2-MΩ resistor should be chosen for R3.
The TPS61007 is an improved version of the TPS61000 adjustable output voltage device. The FBGND pin is
internally connected to GND.
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10.2.2.2 Programming the Low Battery Comparator Threshold Voltage
The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The
typical current into the LBI pin is 0.01 µA. The voltage across R2 is equal to the reference voltage that is
generated on-chip, which has a value of 500 mV ±15 mV. The recommended value for R2 is therefore in the
range of 500 kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage (VBAT),
can be calculated using the following equation:
§V
·
5 5 u ¨ TRIP ± ¸
© VREF
¹
§V
·
N: u ¨ BAT ± ¸
© 0.5 V
¹
(2)
For example, if the low-battery detection circuit should flag an error condition on the LBO output pin at a battery
voltage of 1 V, a resistor in the range of 500 kΩ should be chosen for R1.
The output of the low battery comparator is a simple open-drain output that goes active low if the battery voltage
drops below the programmed threshold voltage on LBI. The output requires a pullup resistor with a
recommended value of 1MΩ, and should only be pulled up to the VOUT. If not used, the LBO pin can be left
floating.
10.2.2.3 Inductor Selection
The output filter of inductive switching regulators is a low pass filter of second order. It consists of an inductor
and a capacitor, often referred to as storage inductor and output capacitor.
To select an inductor, keep the possible peak inductor current below the current limit threshold of the power
switch in your chosen configuration. For example, the current limit threshold of the TPS61006’s switch is 1100
mA at an output voltage of 3.3 V. The highest peak current through the inductor and the switch depends on the
output load, the input (VBAT), and the output voltage (VOUT). Estimation of the maximum average inductor current
can be done using the following equation:
VOUT
I L IOUT u
VBAT u 0.8
(3)
For example, for an output current of 100 mA at 3.3 V, at least 515-mA current flows through the inductor at a
minimum input voltage of 0.8 V.
The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally it is
advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the
magnetic hysteresis losses in the inductor as well as output voltage ripple and EMI. But in the same way, the
regulation time at load change rises. In addition, a larger inductor increases the total system cost.
With those parameters it is possible to calculate the value for the inductor:
9BAT u 9OUT ± 9BAT
L
', L u ¦ u 9OUT
where
•
•
f is the switching frequency
ΔIL is the ripple current in the inductor, that is 20% x IL
(4)
In this example, the desired inductor has the value of 12 µH. With this calculated value and the calculated
currents, it is possible to chose a suitable inductor. Care has to be taken that load transients and losses in the
circuit can lead to higher currents as estimated in equation 3. Also, the losses in the inductor caused by magnetic
hysteresis losses and copper losses are a major parameter for total circuit efficiency.
The following inductors from different suppliers were tested. All work with the TPS6100x converter within their
specified parameters:
Table 3. Recommended Inductors
VENDOR
PART NUMBER
DO1608P Series
Coilcraft
DS1608P Series
DO3308 Series
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Table 3. Recommended Inductors (continued)
VENDOR
Coiltronics
Murata
PART NUMBER
UP1B Series
UP2B Series
LQH3N Series
CD43 Series
Sumida
CD54 Series
CDR74B Series
TDK
NLC453232T Series
10.2.2.4 Capacitor Selection
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of
the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is
possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero.
,OUT u 9OUT ± 9BAT
Cmin
¦ u '9 u 9OUT
where
•
•
f is the switching frequency
ΔV is the maximum allowed ripple.
(5)
With a chosen ripple voltage of 15 mV, a minimum capacitance of 10 µF is needed. The total ripple will be larger
due to the ESR of the output capacitor. This additional component of the ripple can be calculated using the
following equation:
'VESR IOUT u RESR
(6)
An additional ripple of 30 mV is the result of using a tantalum capacitor with a low ESR of 300 mΩ. The total
ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In
this example, the total ripple is 45 mV. It is possible to improve the design by enlarging the capacitor or using
smaller capacitors in parallel to reduce the ESR or by using better capacitors with lower ESR, like ceramics. For
example, a 10-µF ceramic capacitor with an ESR of 50 mΩ is used on the evaluation module (EVM). Tradeoffs
have to be made between performance and costs of the converter circuit.
A 10-µF input capacitor is recommended to improve transient behavior of the regulator. A ceramic capacitor or a
tantalum capacitor with a 100-nF ceramic capacitor in parallel placed close to the IC is recommended.
10.2.2.5 Rectifier Selection
The rectifier diode has a major impact on the overall converter efficiency. Standard diodes are not suitable for
low-voltage switched mode power supplies. A Schottky diode with low forward voltage and fast reverse recovery
should be used as a rectifier to minimize overall losses of the dc-dc converter. The maximum current rating of the
diode must be high enough for the application. The maximum diode current is equal to the maximum current in
the inductor that was calculated in equation 3. The maximum reverse voltage is the output voltage. The chosen
diode should therefore have a reverse voltage rating higher than the output voltage.
Table 4. Recommended Diodes
VENDOR
PART NUMBER
Motorola Surface
Mount
MBRM120LT3
Motorola Axial Lead
ROHM
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MBR0520LT1
1N1517
RB520S-30
RB160L–40
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The typical forward voltage of those diodes is in the range of 0.35 to 0.45 V assuming a peak diode current of
600 mA.
10.2.2.6 Compensation of the Control Loop
An R/C/C network must be connected to the COMP pin in order to stabilize the control loop of the converter.
Both the pole generated by the inductor L1 and the zero caused by the ESR and capacitance of the output
capacitor must be compensated. The network shown in Figure 18 satisfies these requirements.
RC
10 kΩ
COMP
CC1
100 pF
CC2
33 nF
Figure 18. Compensation of the Control Loop
Resistor RC and capacitor CC2 depend on the chosen inductance. For a 33-µH inductor, the capacitance of CC2
should be chosen to 33 nF, or in other words, if the inductor is xx µH, the chosen compensation capacitor should
be xx nF, the same number value. The value of the compensation resistor is then chosen based on the
requirement to have a time constant of 0.3 ms for the R/C network of RC and CC2; hence for a 33-nF capacitor, a
10-kΩ resistor should be chosen for RC.
Capacitor CC1 is depending on the ESR and capacitance value of the output capacitor, and on the value chosen
for RC. Its value is calculated using following equation:
CO u ESRCOUT
CC1
3 u RC
(7)
For a selected output capacitor of 22 µF with an ESR of 0.2 Ω, and RC of 33 kΩ, the value of CC1 is in the range
of 100 pF.
Table 5. Recommended Compensation Components
INDUCTOR
[µH]
18
OUTPUT CAPACITOR
RC
[kΩ]
CC1
[pF]
CC2
[nF]
0.2
10
100
33
0.3
15
100
22
22
0.4
33
100
10
10
0.1
33
100
10
CAPACITANCE
[µF]
ESR
[Ω]
33
22
22
22
10
10
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10.2.3 Application Curves
3.36
VO − Output Voltage − V
3.34
IO = 2 mA
VO − Output Voltage − V
3.32
3.30
3.28
3.26
3.34
3.32
3.30
3.24
2
VSW
3.22
3.20
0
3.18
0
1
2
3
4
5
0
Time − ms
VO − Output Voltage − V
3.3
3.2
60
V I − Input Voltage − V
VO − Output Voltage − V
I O − Output Current − mA
VI = 1.2 V
RC = 33 kΩ
3.4
50 mA
40
20
5 mA
0
0
1
2
3
4
5
6
Time − ms
7
8
9
1
2
3
4
5
Figure 20. TPS61006 Output Voltage Ripple Amplitude
Figure 19. TPS61006 Output Voltage Ripple Amplitude
3.55
IO = 50 mA
RC = 33 kΩ
3.45
3.35
3.25
1.2
1
0.8
10
0
Figure 21. TPS61006 Load Transient Response
1
2
3
4
5
6
Time − ms
7
8
9
10
Figure 22. TPS61006 Line Transient Response
140
VOUT
120
100
2
80
IOUT
60
40
1
20
EN
0
I O − Output Current − mA
VO − Output Voltage − V
3
0
0
2
4
6
8
10 12
Time − ms
14
16
18
20
Figure 23. TPS61006 Start-up Timing Into 33-Ω Load
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11 Power Supply Recommendations
The device is designed to operate from an input voltage supply range between 0.8 V and 3.3 V. This input supply
must be well regulated. If the input supply is located more than a few inches from the converter, additional bulk
capacitance may be required in addition to the ceramic bypass capacitors. An electrolytic or tantalum capacitor
with a value of 47 μF is a typical choice.
12 Layout
12.1 Layout Guidelines
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC. The feedback
divider should be placed as close as possible to the control ground pin of the IC. To lay out the control ground, it
is recommended to use short traces as well, separated from the power ground traces. This avoids ground shift
problems, which can occur due to superimposition of power ground current and control ground current.
12.2 Layout Example
SW
VBAT
NC/FBGND
LBO
VOUT
LB I
GND
5
6
6
8
7
VIN
4
3
VOUT
3
FB
GND
1
COMP
EN
GND
2
TPS6100x
GND
VOUT
Figure 24. Layout Diagram
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12.3 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power
dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
• Improving the power dissipation capability of the PWB design
• Improving the thermal coupling of the component to the PWB
• Introducing airflow in the system
The maximum junction temperature (TJ) of the TPS6100x devices is 125°C. The thermal resistance of the 10-pin
MSOP package (DGS) is RθJA = 161°C/W. Specified regulator operation is assured to a maximum ambient
temperature (TA) of 85°C. Therefore, the maximum power dissipation is about 248 mW. More power can be
dissipated if the maximum ambient temperature of the application is lower.
T
J ( MAX) − A
P
=
D ( MAX)
R
Q JA
(8)
Under normal operating conditions, the sum of all losses generated inside the converter IC is less than 50 mW,
which is well below the maximum allowed power dissipation of 248 mW as calculated in Equation 8. Therefore,
power dissipation is given no special attention.
Table 6 shows where the losses inside the converter are generated.
Table 6. Losses Inside the Converter
LOSSES
AMOUNTS
Conduction losses in the switch
36 mW
Switching losses
8 mW
Gate drive losses
2.3 mW
Quiescent current losses
< 1 mW
TOTAL
< 50 mW
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13 Device and Documentation Support
13.1 Device Support
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 7. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS61000
Click here
Click here
Click here
Click here
Click here
TPS61001
Click here
Click here
Click here
Click here
Click here
TPS61002
Click here
Click here
Click here
Click here
Click here
TPS61003
Click here
Click here
Click here
Click here
Click here
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TPS61006
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13.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
22
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Product Folder Links: TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007
TPS61000, TPS61001, TPS61002, TPS61003
TPS61004, TPS61005, TPS61006, TPS61007
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SLVS279D – MARCH 2000 – REVISED AUGUST 2015
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2000–2015, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007
23
PACKAGE OUTLINE
DGS0010A
VSSOP - 1.1 mm max height
SCALE 3.200
SMALL OUTLINE PACKAGE
C
5.05
TYP
4.75
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
10
1
3.1
2.9
NOTE 3
8X 0.5
2X
2
5
6
B
10X
3.1
2.9
NOTE 4
SEE DETAIL A
0.27
0.17
0.1
C A
1.1 MAX
B
0.23
TYP
0.13
0.25
GAGE PLANE
0 -8
0.15
0.05
0.7
0.4
DETAIL A
TYPICAL
4221984/A 05/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-187, variation BA.
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EXAMPLE BOARD LAYOUT
DGS0010A
VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
10X (0.3)
10X (1.45)
(R0.05)
TYP
SYMM
1
10
SYMM
8X (0.5)
6
5
(4.4)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221984/A 05/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DGS0010A
VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
10X (1.45)
10X (0.3)
SYMM
1
(R0.05) TYP
10
SYMM
8X (0.5)
6
5
(4.4)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221984/A 05/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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