TPS61022
SLVSDX7D – JANUARY 2019 – REVISED JULY 2021
TPS61022 8-A Boost Converter with 0.5-V Ultra-low Input Voltage
1 Features
3 Description
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•
The TPS61022 provides a power supply solution
for portable equipment and IoT devices powered
by various batteries and super capacitors. The
TPS61022 has minimum 6.5-A valley switch current
limit over full temperature range. With a wide input
voltage range of 0.5 V to 5.5 V, the TPS61022
supports supercapacitor backup power applications,
which may deeply discharge the supercapacitor.
•
•
•
•
•
•
•
•
Input voltage range: 0.5 V to 5.5 V
1.8-V minimum input voltage for start-up
Output voltage setting range: 2.2 V to 5.5 V
Two 12-mΩ (LS) / 18-mΩ (HS) MOSFETs
8-A valley switching current limit
94.7% efficiency at VIN = 3.6 V, VOUT = 5 V and
IOUT = 3 A
1-MHz switching frequency when VIN > 1.5 V and
0.6-MHz switching frequency when VIN < 1 V
±2.5% reference voltage accuracy over –40°C to
+125°C
Pin-selectable auto PFM operation mode or forced
PWM operation mode at light load
Pass-through mode when VIN > VOUT
True disconnection between input and output
during shutdown
Output overvoltage and thermal shutdown
protections
Output short-circuit protection
2-mm × 2-mm VQFN 7-pin package
2 Applications
•
•
•
The TPS61022 operates at 1-MHz switching
frequency when the input voltage is above 1.5 V. the
switching frequency decreases gradually to 0.6 MHz
when the input voltage is below 1.5 V down to 1 V.
A MODE pin sets the TPS61022 operating either in
power-save mode or forced PWM mode in light load
condition. The TPS61022 only consumes a 26-µA
quiescent current from VOUT in light load condition.
During shutdown, the load is completely disconnected
from the input power. The TPS61022 has 5.7-V output
overvoltage protection, output short-circuit protection,
and thermal shutdown protection.
The TPS61022 offers a very small solution size with
its 2-mm × 2-mm VQFN package and minimum
amount of external components.
USB port
Supercap backup
GPRS power supply
Device Information
PART NUMBER
TPS61022
(1)
PACKAGE(1)
VQFN (7)
BODY SIZE (NOM)
2.00 mm × 2.00 mm
For all available packages, see the orderable addnedum at
the end of the data sheet.
L1
VIN
GND
VOUT
1 µH
C1
VIN
FB
SW
VOUT
EN
VOUT
GND
PWM
R1
TPS61022
PFM
MODE
GND
VOUT
C2
VIN
SW
MODE
VIN
GND
FB
R2
ON
EN
GND
OFF
Typical Application Circuit
A ceramic output capacitor is needed and must be close to
VOUT pin and GND pin of the TPS61022
Layout Example
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61022
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings ....................................... 4
6.2 ESD Ratings .............................................................. 4
6.3 Recommended Operating Conditions ........................4
6.4 Thermal Information ...................................................4
6.5 Electrical Characteristics ............................................5
6.6 Typical Characteristics................................................ 6
7 Detailed Description........................................................9
7.1 Overview..................................................................... 9
7.2 Functional Block Diagram........................................... 9
7.3 Feature Description.....................................................9
7.4 Device Functional Modes..........................................11
8 Application and Implementation.................................. 13
8.1 Application Information............................................. 13
8.2 Typical Application ................................................... 13
8.3 System Examples..................................................... 18
9 Power Supply Recommendations................................19
10 Layout...........................................................................20
10.1 Layout Guidelines................................................... 20
10.2 Layout Example...................................................... 20
10.3 Thermal Considerations..........................................20
11 Device and Documentation Support..........................22
11.1 Device Support .......................................................22
11.2 Receiving Notification of Documentation Updates.. 22
11.3 Support Resources................................................. 22
11.4 Trademarks............................................................. 22
11.5 Electrostatic Discharge Caution.............................. 22
11.6 Glossary.................................................................. 22
12 Mechanical, Packaging, and Orderable
Information.................................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (June 2021) to Revision D (July 2021)
Page
• Added IQ into VIN typical value...........................................................................................................................5
• Changed ISD test conditions from 5.5 V to 5.0 V................................................................................................ 5
• Changed ISD, TJ maximum value from 3.0 μA to 3.5 μA.....................................................................................5
Changes from Revision B (January 2020) to Revision C (June 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................1
2
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5 Pin Configuration and Functions
VIN
GND
MODE
SW
EN
VOUT
FB
Figure 5-1. 7-Pin VQFN with Thermal Pad RWU Package (Top View)
Table 5-1. Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
GND
PWR
Ground pin of the IC. The GND pad of output capacitor must be close to the GND pin.
Layout example is shown in Layout Example.
2
SW
PWR
The switch pin of the converter. It is connected to the drain of the internal low-side power
MOSFET and the source of the internal high-side power MOSFET.
3
VOUT
PWR
Boost converter output. The VOUT pad of output capacitor must be close to the VOUT pin.
Layout example is shown in Layout Example.
4
FB
I
Voltage feedback of adjustable output voltage.
5
EN
I
Enable logic input. Logic high voltage enables the device. Logic low voltage disables the
device and turns it into shutdown mode.
6
MODE
I
Operation mode selection in the light load condition. When it is connected to logic high
voltage, the device works in forced PWM mode. When it is connected to logic low voltage,
the device works in auto PFM mode.
7
VIN
I
IC power supply input.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
–0.3
7
V
Operating junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
Voltage range at terminals(2)
(1)
(2)
VIN, EN, FB, MODE, SW, VOUT
UNIT
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
All voltage values are with respect to network ground terminal.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±500 V may actually have higher performance.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VIN
Input voltage range
VOUT
Output voltage setting range
L
Effective inductance range
CIN
Effective input capacitance range
COUT
Effective output capacitance range
TJ
NOM
MAX
UNIT
Output voltage pre biased < 0.7V before start-up
0.5
4.8
V
Output voltage pre biased > 0.7V before start-up
0.5
5.5
V
2.2
5.5
V
2.9
µH
0.33
1.0
4.7
10
IOUT >= 3A
30
30
1000
µF
1.5A < IOUT < 3A
20
30
1000
µF
IOUT 2.2 V, TJ up to 85°C
1.3
1.6
V
VIN falling
0.4
0.5
V
Quiescent current into VIN pin
IC enabled, No load, No switching VIN =
1.8 V to 5.5 V, VFB = VREF + 0.1 V, TJ up
to 85°C
0.9
3.0
µA
Quiescent current into VOUT pin
IC enabled, No load, No switching VOUT =
2.2 V to 5.5 V, VFB = VREF + 0.1 V, TJ up
to 85°C
27
32
µA
IC disabled, VIN = 1.8 V to 5.0 V, TJ =
25°C
0.25
0.6
µA
IC disabled, VIN = 1.8 V to 5.0 V, TJ up to
85°C
0.25
3.5
µA
5.5
V
615
mV
Under-voltage lockout threshold
IQ
ISD
Shutdown current into VIN and SW pin
0.5
OUTPUT
VOUT
Output voltage setting range
2.2
PWM mode
585
600
PFM mode
590
606
VOUT rising
5.5
5.7
VREF
Reference voltage at the FB pin
VOVP
Output over-voltage protection threshold
VOVP_HYS
Over-voltage protection hysteresis
IFB_LKG
Leakage current at FB pin
IVOUT_LKG
Leakage current into VOUT pin
IC disabled, VIN = 0 V, VSW = 0 V, VOUT =
5.5 V,TJ up to 85°C
tSS
Soft startup time
From active EN to VOUT regulation.
VIN = 2.5 V, VOUT = 5.0 V, COUT_EFF =
30μF, IOUT = 0
mV
6.0
V
20
nA
3
µA
0.1
1
V
700
μs
POWER SWITCH
RDS(on)
High-side MOSFET on resistance
VOUT = 5.0 V
18
mΩ
Low-side MOSFET on resistance
VOUT = 5.0 V
12
mΩ
VIN = 3.6 V, VOUT = 5.0 V, PWM mode
1.0
MHz
VIN = 1.0 V, VOUT = 5.0 V, PWM mode
0.6
fSW
Switching frequency
tOFF_min
Minimum off time
ILIM_SW
Valley current limit
VIN = 3.6 V, VOUT = 5.0 V
ILIM_CHG
Pre-charge current
VIN = 1.8 - 4.8 V, VOUT < 0.4 V
ILIM_CHG_max
Maximum pre-charge current
VIN = 2.4 V, VOUT > 0.4 V
MHz
80
150
6.5
8
10
ns
400
700
mA
2
2.4
A
0.35
0.42
A
LOGIC INTERFACE
VEN_H
EN logic high threshold
VIN > 1.8 V or VOUT > 2.2 V
VEN_L
EN logic low threshold
VIN > 1.8 V or VOUT > 2.2 V
VMODE_H
MODE logic high threshold
VIN > 1.8 V or VOUT > 2.2 V
VMODE_L
MODE logic low threshold
VIN > 1.8 V or VOUT > 2.2 V
TSD
Thermal shutdown threshold
TJ rising
TSD_HYS
Thermal shutdown hysteresis
TJ falling below TSD
1.2
0.45
1.2
0.4
V
V
PROTECTION
150
°C
20
°C
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6.6 Typical Characteristics
100
100
95
95
90
90
Efficiency (%)
Efficiency (%)
VIN = 3.6 V, VOUT = 5 V, TJ = 25°C, unless otherwise noted
85
80
75
65
0.0001
0.001
0.01
0.1
Output Current (A)
1
80
75
VIN=1.8V
VIN=3.0V
VIN=3.6V
VIN=4.2V
70
85
65
0.0001
5
80
80
Efficiency (%)
Efficiency (%)
100
60
40
VIN=1.8V
VIN=3.0V
VIN=3.6V
VIN=4.2V
0.01
0.1
Output Current (A)
1
5
effi
Figure 6-2. Load Efficiency With Different Output in
Auto PFM
100
0.001
0.01
0.1
Output Current (A)
VIN = 1.8 V; VOUT = 3.3 V, 3.8 V, 4 V, 5 V
Figure 6-1. Load Efficiency With Different Input in
Auto PFM
0
0.0001
0.001
effi
VIN = 1.8 V, 3 V, 3.6 V, 4.2 V; VOUT = 5 V
20
VOUT=3.3V
VOUT=3.8V
VOUT=4.0V
VOUT=5.0V
70
1
60
40
VOUT=3.3V
VOUT=3.8V
VOUT=4.0V
VOUT=5.0V
20
0
0.0001
5
0.001
effi
VIN = 1.8 V, 3 V, 3.6 V, 4.2 V; VOUT = 5 V
0.01
0.1
Output Current (A)
1
5
effi
VIN = 1.8 V; VOUT = 3.3 V, 3.8 V, 4 V, 5 V
Figure 6-3. Load Efficiency With Different Input in
Forced PWM
Figure 6-4. Load Efficiency With Different Output in
Forced PWM
5.04
5.1
5.02
Output Voltage (V)
Output Voltage (V)
5.05
5
4.95
4.9
0.0001
VIN=1.8V
VIN=3.0V
VIN=3.6V
VIN=4.2V
0.001
4.98
4.96
4.94
0.01
0.1
Output Current (A)
1
5
4.92
0.0001
regu
VIN = 1.8 V, 3 V, 3.6 V, 4.2 V; VOUT = 5 V
VIN=1.8V
VIN=3.0V
VIN=3.6V
VIN=4.2V
0.001
0.01
0.1
Output Current (A)
1
5
regu
VIN = 1.8 V, 3 V, 3.6 V, 4.2 V; VOUT = 5 V
Figure 6-5. Load Regulation in Auto PFM
6
5
Figure 6-6. Load Regulation in Forced PWM
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5
600
4.5
Reference Voltage (mV)
Precharge current (A)
4
3.5
3
2.5
2
1.5
0.5
0.5
1
1.5
2
2.5
Output Voltage (V)
3
3.5
597
595
-60
4
-30
0
prec
30
60
Temperature (qC)
90
Figure 6-7. Pre-charge Current vs Output Voltage
refe
29
VIN=1.8V
VIN=3.6V
VIN=4.5V
28
Quiescent Current (PA)
1.5
1
0.5
27
26
25
24
23
VOUT=2.2V
VOUT=3.6V
VOUT=5V
22
-20
0
20
40
Temperature (qC)
60
80
21
-40
100
Figure 6-9. Quiescent Current into VIN vs
Temperature
20
40
Temperature (qC)
60
80
100
iqvo
Figure 6-10. Quiescent Current into VOUT vs
Temperature
1.14
VIN=1.8V
VIN=3.6V
VIN=4.5V
VIN=5V
1.11
1.08
Frequency (MHz)
Shutdown Current (PA)
0
VIN = 1.8 V; VOUT = 2.2 V, 3.6 V, 5 V, TJ = –40°C to +85°C, No
switching
1.4
1
-20
iqvi
VIN = 1.8 V, 3.6 V 4.5 V; VOUT = 5 V, TJ = –40°C to +85°C, No
switching
1.2
150
Figure 6-8. Reference Voltage vs Temperature
2
0
-40
120
VIN = 3.6 V; VOUT = 5 V, TJ = –40°C to +125°C
VIN = 5 V; VOUT = 0.5 V to 4 V
Quiescent Current (PA)
598
596
Tj=-40qC
Tj=25qC
Tj=125qC
1
599
0.8
0.6
0.4
1.05
1.02
0.99
0.96
0.93
0.9
0.2
0
-40
0.87
-20
0
20
40
Temperature (qC)
60
80
100
0.84
1.8
shut
VIN = VSW = 1.8 V, 3.6 V, 4.5 V, 5 V; TJ = –40°C to +85°C
Figure 6-11. Shutdown Current vs Temperature
2.1
2.4
2.7
3
3.3
3.6
Input Voltage (V)
3.9
4.2
4.5
freq
VIN = 1.8 V to 4.5 V; VOUT = 5 V
Figure 6-12. Switching Frequency vs Input Voltage
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1.05
0.48
VIN=1.8V
VIN=2.4V
VIN=3.6V
VIN=4.5V
1
0.45
0.9
Voltage (V)
Voltage (V)
0.95
0.85
0.8
0.75
0.7
0.65
-40
VIN=1.8V
VIN=2.4V
VIN=3.6V
VIN=4.5V
-20
0
0.39
0.36
20
40
60
80
Temperature (qC)
100
120
140
0.33
-60
enri
VIN = 1.8 V, 2.4 V, 3.6 V, 4.5 V; VOUT = 5 V; TJ = –40°C to
+125°C
Figure 6-13. EN Rising Threshold vs Temperature
8
0.42
-30
0
30
60
Temperature (qC)
90
120
150
enfa
VIN = 1.8 V, 2.4 V, 3.6 V, 4.5 V; VOUT = 5 V; TJ = –40°C to
+125°C
Figure 6-14. EN Falling Threshold vs Temperature
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7 Detailed Description
7.1 Overview
The TPS61022 synchronous step-up converter is designed to operate from an input voltage supply range
between 0.5 V and 5.5 V with 6.5-A (minimum) valley switch current limit. The TPS61022 typically operates at
a quasi-constant frequency pulse width modulation (PWM) at moderate to heavy load currents. The switching
frequency is 1 MHz when the input voltage is above 1.5 V. The switching frequency reduces down to 0.6 MHz
gradually when the input voltage goes down from 1.5 V to 1 V and keeps at 0.6 MHz when the input voltage
is below 1 V. The MODE pin sets the TPS61022 converter operating in power-save mode with pulse frequency
modulation (PFM) or forced PWM mode in light load conditions. During PWM operation, the converter uses
adaptive constant on-time valley current mode control scheme to achieve excellent line regulation and load
regulation and allows the use of a small inductor and ceramic capacitors. Internal loop compensation simplifies
the design process while minimizing the number of external components.
7.2 Functional Block Diagram
SW
2
VIN
7
EN
5
Undervoltage
Lockout
Logic
MODE
VIN
VOUT
3 VOUT
Valley Current
Sense
Gate Driver
6
1 GND
Thermal
Shutdown
PWM Control
VOUT
Overvoltage
Protection and
Short-Circuit
Protection
4 FB
Soft Start-up
EA
VREF
7.3 Feature Description
7.3.1 Undervoltage Lockout
The TPS61022 has a built-in undervoltage lockout (UVLO) circuit to ensure the device working properly. When
the input voltage is above the UVLO rising threshold of 1.8 V, the TPS61022 can be enabled to boost the output
voltage. After the TPS61022 starts up and the output voltage is above 2.2 V, the TPS61022 works with input
voltage as low as 0.5 V.
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7.3.2 Enable and Soft Start
When the input voltage is above the UVLO rising threshold and the EN pin is pulled to a voltage above 1.2 V,
the TPS61022 is enabled and starts up. At the beginning, the TPS61022 charges the output capacitors with a
current of about 700 mA when the output voltage is below 0.4 V. When the output voltage is charged above 0.4
V, the output current is changed to having output current capability to drive 1-Ω resistance load. After the output
voltage reaches the input voltage, the TPS61022 starts switching, and the output voltage ramps up further. The
typical start-up time is 700 µs accounting from EN high to output reaching target voltage for the application
with input voltage is 2.5 V, output voltage is 5 V, output effective capacitance is 30 µF and no load. When the
voltage at the EN pin is below 0.4 V, the internal enable comparator turns the device into shutdown mode. In the
shutdown mode, the device is entirely turned off. The output is disconnected from input power supply.
7.3.3 Switching Frequency
The TPS61022 switches at a quasi-constant 1-MHz frequency when the input voltage is above 1.5 V. When
the input voltage is lower than 1.5 V, the switching frequency is reduced gradually to 0.6 MHz to improve the
efficiency and get higher boost ratio. When the input voltage is below 1 V, the switching frequency is fixed at a
quasi-constant 0.6 MHz.
7.3.4 Current Limit Operation
The TPS61022 uses a valley current limit sensing scheme. Current limit detection occurs during the off-time by
sensing of the voltage drop across the synchronous rectifier.
When the load current is increased such that the inductor current is above the current limit within the whole
switching cycle time, the off-time is increased to allow the inductor current to decrease to this threshold before
the next on-time begins (so called frequency fold-back mechanism). When the current limit is reached, the output
voltage decreases during further load increase.
The maximum continuous output current (IOUT(LC)), before entering current limit (CL) operation, can be defined
by Equation 1.
IOUT(CL)
§
1 D u ¨ ILIM
©
1
'I
2 LP
P
·
¸
¹
(1)
where
•
•
D is the duty cycle
ΔIL(P-P) is the inductor ripple current
The duty cycle can be estimated by Equation 2.
D
VIN u K
VOUT
1
(2)
where
•
•
•
VOUT is the output voltage of the boost converter
VIN is the input voltage of the boost converter
η is the efficiency of the converter, use 90% for most applications
The peak-to-peak inductor ripple current is calculated by Equation 3.
'IL P
P
VIN u D
L u fSW
(3)
where
•
•
10
L is the inductance value of the inductor
fSW is the switching frequency
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•
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D is the duty cycle
VIN is the input voltage of the boost converter
7.3.5 Pass-Through Operation
When the input voltage is higher than the setting output voltage, the output voltage is higher than the target
regulation voltage. When the output voltage is 101% of the setting target voltage, the TPS61022 stops switching
and fully turns on the high-side PMOS FET. The device works in pass-through mode. The output voltage is the
input voltage minus the voltage drop across the DCR of the inductor and the RDS(on) of the PMOS FET. When
the output voltage drops below the 97% of the setting target voltage as the input voltage declines or the load
current increases, the TPS61022 resumes switching again to regulate the output voltage.
7.3.6 Overvoltage Protection
The TPS61022 has an output overvoltage protection (OVP) to protect the device if the external feedback resistor
divider is wrongly populated. When the output voltage is above 5.7 V typically, the device stops switching. Once
the output voltage falls 0.1 V below the OVP threshold, the device resumes operating again.
7.3.7 Output Short-to-Ground Protection
The TPS61022 starts to limit the output current when the output voltage is below 1.8 V. The lower the output
voltage reaches, the smaller the output current is. When the VOUT pin is short to ground, and the output voltage
becomes less than 0.4 V, the output current is limited to approximate 700 mA. Once the short circuit is released,
the TPS61022 goes through the soft start-up again to the regulated output voltage.
7.3.8 Thermal Shutdown
The TPS61022 goes into thermal shutdown once the junction temperature exceeds 150°C. When the junction
temperature drops below the thermal shutdown recovery temperature, typically 130°C, the device starts
operating again.
7.4 Device Functional Modes
The TPS61022 operates at a quasi-constant frequency pulse width modulation (PWM) in moderate-to heavy
load condition. Based on the input voltage to output voltage ratio, a circuit predicts the required on-time of the
switching cycle. At the beginning of each switching cycle, the low-side NMOS FET switch, shown in Functional
Block Diagram, is turned on. The input voltage is applied across the inductor and the inductor current ramps up.
In this phase, the output capacitor is discharged by the load current. When the on-time expires, the main switch
NMOS FET is turned off, and the rectifier PMOS FET is turned on. The inductor transfers its stored energy to
replenish the output capacitor and supply the load. The inductor current declines because the output voltage is
higher than the input voltage. When the inductor current hits a value that is the error amplifier's output, the next
switching cycle starts again. The error amplifier compares the feedback voltage of the output voltage with an
internal reference voltage; its output determines the inductor valley current in every switching cycle.
In light load condition, the TPS61022 implements two operation modes (power-save mode with PFM and forced
PWM mode) to meet different application requirements. The operation modes are set by the status of the MODE
pin. When the MODE pin is connected to logic low, the device works in the PFM mode. When the MODE pin is
connected to logic high, the device works in the forced PWM mode.
7.4.1 Forced PWM Mode
In the forced PWM mode, the TPS61022 keeps the switching frequency constant in light load condition. When
the load current decreases, the output of the internal error amplifier decreases as well to keep the inductor
current down and deliver less power from input to output. When the output current further reduces, the current
through the inductor decreases to zero during the off-time. The high-side P-MOSFET is not turned off even if
the current through the MOSFET is zero. Thus, the inductor current changes its direction after it runs to zero.
The power flow is from output side to input side. The efficiency is low in this mode. But with the fixed switching
frequency, there is no audible noise and other problems which might be caused by low switching frequency in
light load condition.
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7.4.2 Power-Save Mode
The TPS61022 integrates a power-save mode with PFM to improve efficiency at light load. When the load
current decreases, the inductor valley current set by the output of the error amplifier no longer regulates the
output voltage. When the inductor valley current hits the low limit of 150 mA, the output voltage exceeds the
setting voltage as the load current decreases further. When the FB voltage hits the PFM reference voltage,
the TPS61022 goes into the power-save mode. In the power-save mode, when the FB voltage rises and hits
the PFM reference voltage, the device continues switching for several cycles because of the delay time of the
internal comparator — then it stops switching. The load is supplied by the output capacitor, and the output
voltage declines. When the FB voltage falls below the PFM reference voltage, after the delay time of the
comparator, the device starts switching again to ramp up the output voltage.
Output
Voltage
PFM mode at light load
1.01 x VOUT_NOM
VOUT_NOM
PWM mode at heavy load
Figure 7-1. Output Voltage in PWM Mode and PFM Mode
12
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8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The TPS61022 is a synchronous boost converter designed to operate from an input voltage supply range
between 0.5 V and 5.5 V with a minimum 6.5-A valley switch current limit. The TPS61022 typically operates at a
quasi-constant 1-MHz frequency PWM at moderate-to-heavy load currents when the input voltage is above 1.5
V. The switching frequency changes to 0.6 MHz gradually with the input voltage changing from 1.5 V to 1 V for
better efficiency and high step-up ratio. When the input voltage is below 1 V, the switching frequency is fixed at
a quasi-constant 0.6 MHz. At light load currents, when the MODE pin is set to low logic level, the TPS61022
converter operates in power-save mode with PFM to achieve high efficiency over the entire load current range.
When the MODE pin is set to high logic level, the TPS61022 converter operates in forced PWM mode to keep
the switching frequency constant.
8.2 Typical Application
The TPS61022 provides a power supply solution for portable devices powered by batteries or backup
applications powered by super-capacitors. With minimum 6.5-A switch current capability, the TPS61022 can
output 5 V and 3 A from a single-cell Li-ion battery.
L1
2.7 V to 4.35 V
1 µH
C1
10 µF
VIN
SW
5V
VOUT
GND
PWM
PFM
MODE
FB
EN
ON
C2
R1
TPS61022
3 x 22 µF
732 k
R2
100 k
OFF
Figure 8-1. Li-ion Battery to 5-V Boost Converter
8.2.1 Design Requirements
The design parameters are listed in Table 8-1.
Table 8-1. Design Parameters
PARAMETERS
VALUES
Input voltage
2.7 V to 4.35 V
Output voltage
5V
Output current
3A
Output voltage ripple
±50 mV
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8.2.2 Detailed Design Procedure
8.2.2.1 Setting the Output Voltage
The output voltage is set by an external resistor divider (R1, R2 in Li-ion Battery to 5-V Boost Converter). When
the output voltage is regulated, the typical voltage at the FB pin is VREF. Thus the resistor divider is determined
by Equation 4.
§V
R1 ¨ OUT
© VREF
·
1¸ u R2
¹
(4)
where
•
•
VOUT is the regulated output voltage
VREF is the internal reference voltage at the FB pin
For best accuracy, keep R2 smaller than 300 kΩ to ensure the current flowing through R2 is at least 100 times
larger than the FB pin leakage current. Changing R2 towards a lower value increases the immunity against noise
injection. Changing the R2 towards a higher value reduces the quiescent current for achieving highest efficiency
at low load currents.
8.2.2.2 Inductor Selection
Because the selection of the inductor affects steady-state operation, transient behavior, and loop stability,
the inductor is the most important component in power regulator design. There are three important inductor
specifications, inductor value, saturation current, and dc resistance (DCR).
The TPS61022 is designed to work with inductor values between 0.33 µH and 2.9 µH. Follow Equation 5 to
Equation 7 to calculate the inductor peak current for the application. To calculate the current in the worst case,
use the minimum input voltage, maximum output voltage, and maximum load current of the application. To have
enough design margins, choose the inductor value with –30% tolerances, and low power-conversion efficiency
for the calculation.
In a boost regulator, the inductor dc current can be calculated by Equation 5.
VOUT u IOUT
VIN u K
IL DC
(5)
where
•
•
•
•
VOUT is the output voltage of the boost converter
IOUT is the output current of the boost converter
VIN is the input voltage of the boost converter
η is the power conversion efficiency, use 90% for most applications
The inductor ripple current is calculated by Equation 6.
'IL P
P
VIN u D
L u fSW
(6)
where
•
•
•
•
D is the duty cycle, which can be calculated by Equation 2
L is the inductance value of the inductor
fSW is the switching frequency
VIN is the input voltage of the boost converter
Therefore, the inductor peak current is calculated by Equation 7.
14
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IL P
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IL DC
'IL P
P
(7)
2
Normally, it is advisable to work with an inductor peak-to-peak current of less than 40% of the average inductor
current for maximum output current. A smaller ripple from a larger valued inductor reduces the magnetic
hysteresis losses in the inductor and EMI. But in the same way, load transient response time is increased. The
saturation current of the inductor must be higher than the calculated peak inductor current. Table 8-2 lists the
recommended inductors for the TPS61022.
Table 8-2. Recommended Inductors for the TPS61022
PART NUMBER
L (µH)
DCR MAX
(mΩ)
SATURATION CURRENT
(A)
SIZE (LxWxH)
VENDOR
XAL7030-102MEC
1
5.00
28
8 × 8 × 3.1
Coilcraft
XAL6030-102MEC
1
6.18
23
6.36 × 6.56 × 3.1
Coilcraft
XEL5030-102MEC
1
8.40
16.9
5.3 × 5.5 × 3.1
Coilcraft
744316100
1
5.23
11.5
5.6 × 5.3 × 4.3
Wurth Elecktronik
8.2.2.3 Output Capacitor Selection
The output capacitor is mainly selected to meet the requirements for output ripple and loop stability. The ripple
voltage is related to capacitor capacitance and its equivalent series resistance (ESR). Assuming a ceramic
capacitor with zero ESR, the minimum capacitance needed for a given ripple voltage can be calculated by
Equation 8.
COUT
IOUT u DMAX
fSW u VRIPPLE
(8)
where
•
•
•
•
DMAX is the maximum switching duty cycle
VRIPPLE is the peak-to-peak output ripple voltage
IOUT is the maximum output current
fSW is the switching frequency
The ESR impact on the output ripple must be considered if tantalum or aluminum electrolytic capacitors are
used. The output peak-to-peak ripple voltage caused by the ESR of the output capacitors can be calculated by
Equation 9.
VRIPPLE(ESR)
IL(P) u RESR
(9)
Take care when evaluating the derating of a ceramic capacitor under dc bias voltage, aging, and ac signal. For
example, the dc bias voltage can significantly reduce capacitance. A ceramic capacitor can lose more than 50%
of its capacitance at its rated voltage. Therefore, always leave margin on the voltage rating to ensure adequate
capacitance at the required output voltage. Increasing the output capacitor makes the output ripple voltage
smaller in PWM mode.
TI recommends using the X5R or X7R ceramic output capacitor in the range of 10-μF to 50-μF effective
capacitance. The output capacitor affects the small signal control loop stability of the boost regulator. If the
output capacitor is below the range, the boost regulator can potentially become unstable. Increasing the output
capacitor makes the output ripple voltage smaller in PWM mode.
8.2.2.4 Loop Stability, Feedforward Capacitor Selection
When the switching waveform shows large duty cycle jitter or the output voltage or inductor current shows
oscillations, the regulation loop may be unstable.
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The load transient response is another approach to check the loop stability. During the load transient recovery
time, VOUT can be monitored for settling time, overshoot or ringing that helps judge the stability of the converters.
Without any ringing, the loop has usually more than 45° of phase margin.
A feedforward capacitor (C3 in the Figure 8-2) in parallel with R1 induces a pair of zero and pole in the
loop transfer function. By setting the proper zero frequency, the feedforward capacitor can increase the phase
margin to improve the loop stability. For large output capacitance more than 40 μF application, TI recommends
a feedforward capacitor to set the zero frequency (fFFZ) to 2 kHz. As for the input voltage lower than 2-V
application, TI recommends setting the zero frequency (fFFZ) to 20 kHz when the effective output capacitance is
less than 40 μF. The value of the feedforward capacitor can be calculated by Equation 10.
C3
1
2S u fFFZ u R1
(10)
where
•
•
R1 is the resistor between the VOUT pin and FB pin
fFFZ is the zero frequency created by the feedforward capacitor
L1
VIN
1 µH
C1
VIN
SW
GND
C3
PWM
PFM
VOUT
VOUT
TPS61022
MODE
R1
C2
FB
R2
ON
EN
OFF
Figure 8-2. TPS61022 Circuit With Feedforward Capacitor
8.2.2.5 Input Capacitor Selection
Multilayer X5R or X7R ceramic capacitors are excellent choices for input decoupling of the step-up converter as
they have extremely low ESR and are available in small footprints. Input capacitors must be located as close
as possible to the device. While a 10-μF input capacitor is sufficient for most applications, larger values may
be used to reduce input current ripple without limitations. Take care when using only ceramic input capacitors.
When a ceramic capacitor is used at the input and the power is being supplied through long wires, a load step
at the output can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop
instability or could even damage the part. In this circumstance, place additional bulk capacitance (tantalum or
aluminum electrolytic capacitor) between ceramic input capacitor and the power source to reduce ringing that
can occur between the inductance of the power source leads and ceramic input capacitor.
16
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8.2.3 Application Curves
VIN = 3.6 V, VOUT = 5 V, IOUT = 100 mA , MODE = low
VIN = 3.6 V, VOUT = 5 V, IOUT = 3 A
Figure 8-3. Switching Waveform at Heavy Load
VIN = 3.6 V, VOUT = 5 V, 1.6-Ω resistance load
Figure 8-5. Start-up Waveform
VIN = 3.6 V, VOUT = 5 V, IOUT = 1 A to 3 A with 20-μs slew rate
Figure 8-7. Load Transient
Figure 8-4. Switching Waveform at Light Load
VIN = 3.6 V, VOUT = 5 V, 1.6-Ω resistance load
Figure 8-6. Shutdown Waveform
VIN = 2.7 V to 4.35 V with 50-μs slew rate, VOUT = 5 V,
IOUT = 3 A
Figure 8-8. Line Transient
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VIN = 3.6 V, VOUT = 5 V, IOUT = 0 A to 3 A Sweep, MODE = low
VIN = 0 V to 4.35 V Sweep, VOUT = 5 V, IOUT = 1 A
Figure 8-9. Load Sweep
Figure 8-10. Line Sweep
VIN = 3.6 V, VOUT = 5 V, IOUT = 1 A
VIN = 3.6 V, VOUT = 5 V, IOUT = 1 A
Figure 8-11. Output Short Protection (Entry)
Figure 8-12. Output Short Protection (Recover)
8.3 System Examples
For those applications with input voltage higher than 4.8 V, TI suggests adding a diode between the VIN pin and
the VOUT pin to pre-bias the output before the TPS61022 is enabled. As an example shown in Figure 8-13, the
input voltage is from a USB port in the range of 4.5 V to 5.25 V. The target output voltage is 5 V to 5.25 V.
L1
4.75V ~ 5.25V
C1
1.0µH
10µF
D1
VIN
SW
GND
PWM
PFM
TPS61022
MODE
ON
5.0V
VOUT
FB
EN
R1
732k
C2
3 x 22µF
R2
100k
OFF
Figure 8-13. TPS61022 Circuit for VIN > 4.8-V Application
18
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9 Power Supply Recommendations
The device is designed to operate from an input voltage supply range between 0.5 V to 5.5 V. This input supply
must be well regulated. If the input supply is located more than a few inches from the converter, additional bulk
capacitance may be required in addition to the ceramic bypass capacitors. A typical choice is a tantalum or
aluminum electrolytic capacitor with a value of 100 µF. Output current of the input power supply must be rated
according to the supply voltage, output voltage, and output current of the TPS61022.
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10 Layout
10.1 Layout Guidelines
As for all switching power supplies, especially those running at high switching frequency and high currents,
layout is an important design step. If the layout is not carefully done, the regulator could suffer from instability
and noise problems. To maximize efficiency, switch rise and fall time are very fast. To prevent radiation of high
frequency noise (for example, EMI), proper layout of the high-frequency switching path is essential. Minimize
the length and area of all traces connected to the SW pin, and always use a ground plane under the switching
regulator to minimize interplane coupling. The input capacitor needs not only to be close to the VIN pin, but also
to the GND pin in order to reduce input supply ripple.
The most critical current path for all boost converters is from the switching FET, through the rectifier FET, then
the output capacitors, and back to ground of the switching FET. This high current path contains nanosecond rise
and fall time and must be kept as short as possible. Therefore, the output capacitor not only must be close to the
VOUT pin, but also to the GND pin to reduce the overshoot at the SW pin and VOUT pin.
10.2 Layout Example
GND
VOUT
FB
VOUT
EN
GND
VIN
SW
MODE
VIN
GND
GND
Note: A ceramic output capacitor is needed and must be close to VOUT pin and GND pin of the TPS61022
Figure 10-1. Layout Example
10.3 Thermal Considerations
Restrict the maximum IC junction temperature to 125°C under normal operating conditions. Calculate the
maximum allowable dissipation, PD(max), and keep the actual power dissipation less than or equal to PD(max).
The maximum-power-dissipation limit is determined using Equation 11.
20
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PD max
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125 TA
RTJA
(11)
where
•
•
TA is the maximum ambient temperature for the application
RθJA is the junction-to-ambient thermal resistance given in Thermal Information
The TPS61022 comes in a VQFN package. This package includes three power pads that improves the thermal
capabilities of the package. The real junction-to-ambient thermal resistance of the package greatly depends on
the PCB type, layout, and thermal pad connection. Using larger and thicker PCB copper for the power pads
(GND, SW, and VOUT) to enhance the thermal performance. Using more vias connects the ground plate on the
top layer and bottom layer around the IC without solder mask also improves the thermal capability.
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 Glossary
TI Glossary
22
This glossary lists and explains terms, acronyms, and definitions.
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12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS61022RWUR
ACTIVE
VQFN-HR
RWU
7
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1UNF
TPS61022RWUT
ACTIVE
VQFN-HR
RWU
7
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1UNF
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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