TPS61098, TPS610981, TPS610982, TPS610985, TPS610986, TPS610987
SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
TPS61098x Ultra-Low Quiescent Current Synchronous Boost with Integrated LDO/
Load Switch
1 Features
•
•
•
•
•
•
•
•
•
•
•
300-nA ultra-low IQ in low power mode
Start-up into load at 0.7-V input voltage
Operating input voltage from 0.7 V to 4.5 V
Selectable output voltages up to 4.3 V
Minimum 350-mA switch peak current limit
Integrated LDO/load switch
Two modes controlled by MODE pin
– Active mode: dual outputs at set values
– Low power mode: LDO/load switch off; boost
keeps on
Automatic pass-through
Up to 88% efficiency at 10-µA load from 2 V to 3.3
V conversion (low power mode)
Up to 93% efficiency at 5-mA to 100-mA load from
2-V to 3.3-V conversion
1.5-mm × 1.5-mm WSON package
2 Applications
•
•
•
•
•
•
Smart remote control
BLE tag
Wearable applications
Low-power wireless applications
Portable consumer or medical products
Single-coin cell, single- or two-cell alkalinepowered applications
3 Description
The TPS61098x is an ultra-low power solution for
products powered by either a one-cell or two-cell
alkaline, NiCd or NiMH, one-cell coin cell or one-cell
Li-Ion or Li-polymer battery. It integrates either a Lowdropout Linear Regulator (LDO) or a load switch with
a boost converter and provides two output rails. The
0.7 V to 4.5 V
CBAT
10µF
L
4.7µH
boost output V(MAIN) is designed as an always-on
supply for a main system, and the LDO or load switch
output V(SUB) is to power peripheral devices.
The TPS61098x has two modes controlled by the
MODE pin: Active mode and Low Power mode. In
Active mode, both outputs are enabled with enhanced
response performance. In Low Power mode, the LDO
or load switch is disabled to disconnect peripherals.
The TPS61098x consumes only 300-nA quiescent
current and can achieve up to 88% efficiency at 10-µA
load in Low Power mode.
The TPS61098x supports automatic pass-through
function. When input voltage is higher than a passthrough threshold, the boost converter stops switching
and passes the input voltage to the VMAIN rail; when
input voltage is lower than the threshold, the boost
works in Boost mode and regulates the output at
the target value. The TPS61098x provides different
versions for different output set values.
The TPS61098x can provide up to 50-mA total output
current at 0.7-V input to 3.3-V output conversion. The
boost is based on a hysteretic controller topology
using a synchronous rectifier to obtain maximum
efficiency at minimal quiescent current.
The TPS61098x is available in 1.5-mm × 1.5-mm
WSON package to enable small circuit layout size.
Device Information
PART NUMBER
PACKAGE(1)
BODY SIZE (NOM)
TPS61098x
6 Pin WSON
1.50 mm × 1.50 mm
(1)
For all available packages, see the orderable addendum at
the end of this document.
SW
VMAIN
CO1
10µF
RIN
400
VIN
BOOST
CTRL
LDO / LS
CTRL
VSUB
CIN
0.1µF
CO2
10µF
MODE
GND
Copyright © 2016, Texas Instruments Incorporated
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61098, TPS610981, TPS610982, TPS610985, TPS610986, TPS610987
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings........................................ 4
7.2 ESD Ratings............................................................... 4
7.3 Recommended Operating Conditions.........................4
7.4 Thermal Information....................................................4
7.5 Electrical Characteristics.............................................5
7.6 Typical Characteristics................................................ 7
8 Detailed Description......................................................16
8.1 Overview................................................................... 16
8.2 Functional Block Diagrams....................................... 16
8.3 Feature Description...................................................17
8.4 Device Functional Modes..........................................19
9 Applications and Implementation................................ 21
9.1 Application Information............................................. 21
9.2 Typical Applications.................................................. 21
10 Power Supply Recommendations..............................33
11 Layout........................................................................... 34
11.1 Layout Guidelines................................................... 34
11.2 Layout Example...................................................... 34
12 Device and Documentation Support..........................35
12.1 Device Support....................................................... 35
12.2 Documentation Support.......................................... 35
12.3 Receiving Notification of Documentation Updates..35
12.4 Support Resources................................................. 35
12.5 Trademarks............................................................. 35
12.6 Electrostatic Discharge Caution..............................35
12.7 Glossary..................................................................35
13 Mechanical, Packaging, and Orderable
Information.................................................................... 35
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (December 2016) to Revision F (September 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................1
Changes from Revision D (April 2016) to Revision E (November 2016)
Page
• Changed the HBM value From: ±1000 To: ±2000 in Section 7.2 .......................................................................4
• Changed the CDM value From: ±250 To: ±750 in Section 7.2 .......................................................................... 4
2
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
5 Device Comparison Table
VSUB ACTIVE
DISCHARGE IN LOW
POWER MODE
PART NUMBER
INTEGRATED LDO OR
LOAD SWITCH
VMAIN
(ACTIVE MODE)
VMAIN
(LOW POWER MODE)
VSUB
(ACTIVE MODE)
VSUB
(LOW POWER MODE)
TPS61098DSE(1)
LDO
4.3 V
2.2 V
3.1 V
OFF
No
TPS610981DSE
LDO
3.3 V
3.3 V
3.0 V
OFF
Yes
TPS610982DSE
LDO
3.3 V
3.3 V
2.8 V
2.8 V
No
TPS610985DSE
Load Switch
3.0 V
3.0 V
ON
OFF
Yes
TPS610986DSE
Load Switch
3.3 V
3.3 V
ON
OFF
Yes
TPS610987DSE
LDO
4.3 V
2.2 V
3.1 V
OFF
Yes
(1)
The DSE package is available taped and reeled. Add R suffix to device type (for example, TPS61098DSER) to order quantities of 3000
devices per reel. Add T suffix to device type (for example, TPS61098DSET) to order quantities of 250 devices per reel. For detailed
ordering informationm, please check the package option addendum at the end of this data sheet.
6 Pin Configuration and Functions
VMAIN
GND
SW
VSUB
VIN
MODE
Figure 6-1. DSE Package 6-Pin WSON Top View
Table 6-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
VMAIN
1
PWR
Boost converter output
SW
2
PWR
Connection for inductor
VIN
3
I
IC power supply input
MODE
4
I
Mode selection pin. 1: Active mode; 0: Low Power mode. Must be actively tied high or low. Do not leave
floating.
VSUB
5
PWR
LDO or load switch output
GND
6
PWR
IC ground
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Input voltage
MIN
MAX
UNIT
VIN, SW, VMAIN, VSUB
–0.3
4.7
V
MODE
–0.3
5.0
V
Operating junction temperature, TJ
–40
150
°C
Storage temperature range, Tstg
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
V(ESD)
(1)
(2)
Electrostatic discharge
VALUE
UNIT
Human Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
±2000
V
Charged Device Model (CDM), per JEDEC specification JESD22C101, all pins(2)
±750
JEDEC document JEP155 states that 500V HBM rating allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250V CDM rating allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
NOM
MAX
UNIT
VIN
Input voltage range
0.7
4.5
V
V(MAIN)
Boost converter output voltage range
2.2
4.3
V
V(SUB)
Load switch / LDO outut voltage range
1.8
3.7
V
L
Effective inductance range
6.11
µH
CBAT
Effective input capacitance range at input(1)
CO1
(2)
(3)
output(1)
Effective output capacitance range at VSUB pin for LDO output(1)
Effective output capacitance range at VSUB pin for load switch
TJ
Operating virtual junction temperature
4.7
5
Effective output capacitance range at VMAIN pin for boost converter
CO2
(1)
1.54
µF
5
10
22
µF
1(2)
5
10
µF
2.2
µF
125
°C
output(1) (3)
1
–40
Effective value. Ceramic capacitor’s derating effect under bias should be considered. Choose the right nominal capacitance by
checking capacitor DC bias characteristics.
If LDO output current is lower than 20 mA, the minimum effective output capacitance value can be lower to 0.5 µF.
With load switch version, the output capacitor at VSUB pin is only required if smaller voltage ripple is needed.
7.4 Thermal Information
THERMAL METRIC(1)
RθJA
Junction-to-ambient thermal resistance
RθJCtop
RθJB
ψJT
Junction-to-top characterization parameter
ψJB
RθJCbot
(1)
4
TPS61098x
DSE 6 PINS
UNIT
207.3
°C/W
Junction-to-case (top) thermal resistance
118.9
°C/W
Junction-to-board thermal resistance
136.4
°C/W
8.3
°C/W
Junction-to-board characterization parameter
136.4
°C/W
Junction-to-case (bottom) thermal resistance
N/A
°C/W
For more information about traditional and new thermal metrics, see theSemiconductor and IC Package Thermal Metrics application
report.
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
7.5 Electrical Characteristics
TJ = –40°C to 125°C and VIN = 0.7 V to 4.5 V. Typical values are at VIN = 1.5 V, TJ = 25°C, unless otherwise noted.
PARAMETER
VERSION
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Power Supply
VIN
Input voltage range
TPS61098x
VIN(start)
Minimum input voltage at start-up
TPS61098x
RLoad ≥ 3 kΩ (1)
Quiescent current into the VIN pin
in Active mode
TPS61098x
MODE = High, Boost or Pass-through
no load, no switching
TJ = –40°C to 85°C
Quiescent current into the VIN pin
in Low Power mode
TPS61098x
IQ(VIN)
4.5
V
0.7
V
2
4
µA
MODE = Low, Boost or Pass-through
no load, no switching
5
90
nA
TPS61098/1/5/6/7
MODE = High, Boost or Pass-through
no load, no switching
TJ = –40°C to 85°C
15
23
µA
TPS610982
MODE = High, Boost or Pass-through
no load, no switching
TJ = –40°C to 85°C
18
23
µA
TPS61098/1/7
MODE = Low, Boost or Pass-through
no load, no switching
TJ = 25°C
300
400
nA
TPS61098/1/5/6/7
MODE = Low, Boost or Pass-through
no load, no switching
TJ = –40°C to 85°C
300
800
nA
TPS610982
MODE = Low, Boost or Pass-through
no load, no switching
TJ = –40°C to 85°C
4
10
µA
5
100
nA
Quiescent current into the VMAIN pin
in Active mode
IQ(VMAIN)
Quiescent current into the VMAIN pin
in Low Power mode
0.7
ILKG(SW)
Leakage current of the SW pin
(from the SW pin to GND pin)
TPS61098x
V(MAIN) = V(SW) = 4.7 V, no load
TJ = –40°C to 85°C
ILKG(MAIN)
Leakage current of the VMAIN pin
(from the VMAIN pin to SW pin)
TPS61098x
V(MAIN) = 4.7 V, V(SW) = 0 V, no load
TJ = –40°C to 85°C
10
200
nA
ILKG(SUB)
Leakage current of the VSUB pin
(from the VMAIN pin to VSUB pin)
TPS61098/1/5/6/7
MODE = Low, V(MAIN) = 4.7 V, V(SUB) = 0 V
TJ = –40°C to 85°C
10
150
nA
ILKG(MODE)
Leakage current into the MODE pin
TPS61098x
V(MODE) = 5 V
TJ = –40°C to 85°C
5
30
nA
MODE = Low
600
1000
mΩ
MODE = High
300
600
mΩ
TPS610981/2/6
MODE = Low / High
350
650
mΩ
TPS610985
MODE = Low / High
400
700
mΩ
MODE = Low
700
1000
mΩ
Power Switch
TPS61098/7
RDS(on)_LS
Low-side switch on resistance
TPS61098/7
RDS(on)_HS
Rectifier on resistance
MODE = High
450
700
mΩ
TPS610981/2/6
MODE = Low / High
500
700
mΩ
TPS610985
MODE = Low / High
550
750
mΩ
1.2
2
60
100
R(LS)
Load switch on resistance
TPS610985/6
V(Dropout)
LDO dropout voltage
TPS61098/1/2/7
ILH
Inductor current ripple
TPS61098x
ILIM(BST)
Boost switch current limit
TPS61098x
0.7 V < VIN < V(MAIN)
350
ILIM(SUB)
VSUB output current limit
TPS61098x
TJ = –20°C to 125°C
200
I(DISCH)
Discharge current from the VSUB pin to
TPS610981/5/6/7
GND pin
Copyright © 2021 Texas Instruments Incorporated
ISUB = 50 mA
100
MODE = Low, V(SUB) = 3 V
5
500
Ω
mV
mA
650
mA
mA
8
mA
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
TJ = –40°C to 125°C and VIN = 0.7 V to 4.5 V. Typical values are at VIN = 1.5 V, TJ = 25°C, unless otherwise noted.
PARAMETER
VERSION
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output
MODE = High, VIN < V(PSTH), Burst mode,
open loop
TPS61098/7
MODE = High, VIN < V(PSTH), PWM mode,
open loop
V(MAIN)
Boost converter output voltage
TPS610982
TPS610985
TPS610986
LDO output voltage
(LDO version)
V(SUB)
3.3
V
3.399
3.4
3.201
3.3
V
3.399
3.1
2.91
MODE = High / Low, VIN < V(PSTH), Burst
mode, open loop
3.0
V
V
V
3.09
3.4
V
V
V
TPS61098/7
MODE = High
3.038
3.1
3.162
V
TPS610981
MODE = High
2.94
3.0
3.06
V
TPS610982
MODE = High / Low
2.744
2.8
2.856
V
MODE = High, VIN rising
4.4
V
MODE = High, Hysteresis
0.1
V
MODE = Low, VIN rising
2.25
V
MODE = Low, Hysteresis
0.1
V
3.35
V
MODE = High / Low, Hysteresis
0.1
V
MODE = High / Low, VIN rising
3.35
V
MODE = High / Low, Hysteresis
0.1
V
MODE = High / Low, VIN rising
3.05
V
MODE = High / Low, Hysteresis
0.1
V
MODE = High / Low, VIN rising
3.35
V
MODE = High / Low, Hysteresis
0.1
V
TPS61098/1/2/7
f = 1kHz, CO2 = 10 µF, ISUB = 10 mA
MODE = High
40
dB
TPS610982
f = 1kHz, CO2 = 10 µF, ISUB = 10 mA
MODE = Low
28
dB
TPS61098x
No load
time from MODE high to 90% of V(SUB)
1
ms
TPS610985
TPS610986
VSUB start-up time
(LDO version and load switch version)
3.201
V
3.399
TPS610982
tstup_LDO
2.297
3.3
Pass-through mode threshold
Power-supply rejection ratio from LDO
input to output
V
3.4
MODE = High / Low, VIN < V(PSTH), Burst
mode, open loop
MODE = High / Low, VIN < V(PSTH), PWM
mode, open loop
2.23
V
3.201
TPS610981
PSRR
2.163
MODE = High / Low, VIN < V(PSTH), Burst
mode, open loop
MODE = High / Low, VIN < V(PSTH), PWM
mode, open loop
4.398
2.3
MODE = High / Low, VIN < V(PSTH), Burst
mode, open loop
MODE = High / Low, VIN < V(PSTH), PWM
mode, open loop
4.27
V
MODE = High / Low, VIN < V(PSTH), PWM
mode, open loop
TPS61098/7
V(PSTH)
4.142
MODE = Low, VIN < V(PSTH), Burst mode,
open loop
MODE = Low, VIN < V(PSTH), PWM mode,
open loop
TPS610981
4.45
MODE = High / Low, VIN rising
Control Logic
VIL
MODE input low voltage
TPS61098x
VIH
MODE input high voltage
TPS61098x
Overtemperature protection
TPS61098x
150
°C
Overtemperature hysteresis
TPS61098x
25
°C
(1)
6
0.4
1.2
V
V
TPS61098x is able to drive RLoad > 150 Ω after VMAIN is established over 1.8 V.
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
7.6 Typical Characteristics
20
1.2
18
1
Quiescent Current (µA)
Quiescent Current (µA)
16
14
12
10
8
6
4
0.8
0.6
0.4
0.2
2
0
-40
-25
-10
5
TPS61098, '1, '5, '6
20 35 50 65
Temperature (qC)
80
95
0
-40
110 125
-25
-10
5
D001
TPS61098, '1, '5, '6
MODE = High
Figure 7-1. IQ into VMAIN Pin at Active Mode vs
Temperature
20 35 50 65
Temperature (qC)
80
95
110 125
D002
MODE = Low
Figure 7-2. IQ into VMAIN Pin at Low Power Mode
vs Temperature
30
9
8
Quiescent Current (µA)
Quiescent Current (µA)
25
20
15
10
7
6
5
4
3
2
5
1
0
-40
-25
-10
5
TPS610982
20 35 50 65
Temperature (°C)
80
95
0
-40
110 125
-25
-10
5
20 35 50 65
Temperature (°C)
D035
MODE = High
TPS610982
Figure 7-3. IQ into VMAIN Pin at Active Mode vs
Temperature
80
95
110 125
D036
MODE = Low
Figure 7-4. IQ into VMAIN Pin at Low Power Mode
vs Temperature
700
500
600
400
Rds(on) (m:)
Rds(on) (m:)
500
400
300
300
200
200
100
100
0
-40
-25
-10
5
TPS61098, '7
20 35 50 65
Temperature (qC)
80
95
110 125
-25
-10
5
D021
MODE = High
Figure 7-5. Rectifier On Resistance vs Temperature
Copyright © 2021 Texas Instruments Incorporated
0
-40
TPS61098, '7
20 35 50 65
Temperature (qC)
80
95
110 125
D022
MODE = High
Figure 7-6. Low Side Switch On Resistance vs
Temperature
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
900
1000
800
900
800
700
600
Rds(on) (m:)
Rds(on) (m:)
700
500
400
500
400
300
300
200
200
100
100
0
-40
-25
-10
5
TPS61098, '7
20 35 50 65
Temperature (qC)
80
95
0
-40
110 125
MODE = Low
600
500
Rds(on) (m:)
500
400
300
80
95
110 125
D024
MODE = Low
400
300
100
100
-25
-10
5
20 35 50 65
Temperature (qC)
80
95
0
-40
110 125
-25
-10
5
D003
20 35 50 65
Temperature (qC)
80
95
110 125
D004
TPS610981 MODE = High / Low
TPS610981 MODE = High / Low
Figure 7-9. Rectifier On Resistance vs Temperature
Figure 7-10. Low Side Switch On Resistance vs
Temperature
700
600
600
500
Rds(on) (m:)
500
Rds(on) (m:)
20 35 50 65
Temperature (qC)
200
200
400
300
400
300
200
200
100
100
-25
-10
5
20 35 50 65
Temperature (°C)
80
95
110 125
TPS610982 MODE = High / Low
Figure 7-11. Rectifier On Resistance vs
Temperature
8
5
Figure 7-8. Low Side Switch On Resistance vs
Temperature
600
0
-40
-10
TPS61098, '7
700
0
-40
-25
D023
Figure 7-7. Rectifier On Resistance vs Temperature
Rds(on) (m:)
600
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D037
0
-40
-25
-10
5
20 35 50 65
Temperature (°C)
80
95
110 125
D038
TPS610982 MODE = High / Low
Figure 7-12. Low Side Switch On Resistance vs
Temperature
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700
700
600
600
500
500
RDS(on) (m:)
RDS(on) (m:)
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400
300
400
300
200
200
100
100
0
-40
-25
-10
5
20 35 50 65
Temperature (°C)
80
95
0
-40
110 125
-25
TPS610985 MODE = High / Low
600
600
500
500
RDS(on) (m:)
RDS(on) (m:)
700
400
300
100
100
20 35 50 65
Temperature (°C)
95
110 125
D040
300
200
5
80
400
200
-10
20 35 50 65
Temperature (°C)
Figure 7-14. Low Side Switch On Resistance vs
Temperature
700
-25
5
TPS610985 MODE = High / Low
Figure 7-13. Rectifier on Resistance vs
Temperature
0
-40
-10
D039
80
95
0
-40
110 125
-25
-10
5
D041
20 35 50 65
Temperature (°C)
80
95
110 125
D042
TPS610986 MODE = High / Low
TPS610986 MODE = High / Low
Figure 7-16. Low Side Switch on Resistance vs
Temperature
Figure 7-15. Rectifier on Resistance vs
Temperature
100
510
90
Boost Efficiency (%)
Current Limit (mA)
500
490
480
470
460
-40
VIN = 0.7 V
VIN = 1.5 V
VIN = 3.1 V
-25
-10
5
TPS61098x
20 35 50 65
Temperature (qC)
80
95
Figure 7-17. Current Limit vs Temperature
Copyright © 2021 Texas Instruments Incorporated
70
60
50
40
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
30
110 125
VIN < V(MAIN)
80
D005
20
0.001
0.01
0.1
1
Boost Output Current (mA)
TPS61098, '7
MODE = Low
10
100
D006
V(MAIN) = 2.2 V
Figure 7-18. Boost Efficiency vs Output Current
(Low Power Mode)
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
100
100
90
90
Boost Efficiency (%)
Boost Efficiency (%)
80
70
60
50
40
VIN = 0.7 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.3 V
30
20
10
0
0.001
0.01
MODE = High
60
50
40
V(MAIN) = 4.3 V
80
80
Boost Efficiency (%)
90
60
50
40
30
0
0.001
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
0.01
0.1
1
10
Boost Output Current (mA)
TPS610981
MODE = High
MODE = Low
D008
V(MAIN) = 3.3 V
70
60
50
40
30
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
20
10
0
0.001
200
0.01
D009
0.1
1
10
Boost Output Current (mA)
TPS610982
V(MAIN) = 3.3 V
Figure 7-21. Boost Efficiency vs Output Current
(Active Mode)
200
Figure 7-20. Boost Efficiency vs Output Current
(Low Power Mode)
100
70
0.1
1
10
Boost Output Current (mA)
TPS610981
90
10
0.01
D007
100
20
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
30
Figure 7-19. Boost Efficiency vs Output Current
(Active Mode)
Boost Efficiency (%)
70
20
0.001
0.1
1
10
Boost Output Current (mA)
TPS61098, '7
80
MODE = Low
200
D025
V(MAIN) = 3.3 V
Figure 7-22. Boost Efficiency vs Output Current
(Low Power Mode)
100
100
90
90
Boost Efficiency (%)
Boost Efficiency (%)
80
70
60
50
40
30
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
20
10
0
0.001
0.01
0.1
1
10
Boost Output Current (mA)
TPS610982
MODE = High
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70
60
50
40
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 2.5 V
30
200
D026
V(MAIN) = 3.3 V
Figure 7-23. Boost Efficiency vs Output Current
(Active Mode)
10
80
20
0.001
0.01
0.1
1
10
Boost Output Current (mA)
TPS610985
Mode = Low
200
D043
V(MAIN) = 3 V
Figure 7-24. Boost Efficiency vs Output Current
(Low Power Mode)
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
100
100
90
90
Boost Efficiency (%)
Boost Efficiency (%)
80
70
60
50
40
30
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 2.5 V
20
10
0
0.001
0.01
0.1
1
10
Boost Output Current (mA)
TPS610985
Mode = High
80
70
60
50
40
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
30
20
0.001
200
0.01
D044
V(MAIN) = 3 V
Figure 7-25. Boost Efficiency vs Output Current
(Active Mode)
0.1
1
10
Boost Output Current (mA)
TPS610986
200
D045
Mode = Low
V(MAIN) = 3.3 V
Figure 7-26. Boost Efficiency vs Output Current
(Low Power Mode)
2.5
100
90
2.4
Boost Output Voltage (V)
Boost Efficiency (%)
80
70
60
50
40
30
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
20
10
0
0.001
0.01
0.1
1
10
Boost Output Current (mA)
TPS610986
MODE = High
2.2
2.1
1.9
0.001
200
V(MAIN) = 3.3 V
Boost Output Voltage (V)
3.5
4.3
VIN = 0.7 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.3 V
4
0.001
0.01
MODE = Low
MODE = High
200
D011
V(MAIN) = 4.3 V
Figure 7-29. Boost Load Regulation (Active Mode)
Copyright © 2021 Texas Instruments Incorporated
100
D010
V(MAIN) = 2.2 V
3.4
3.3
3.2
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
3.1
0.1
1
10
Boost Output Current (mA)
TPS61098, '7
10
Figure 7-28. Boost Load Regulation (Low Power
Mode)
4.5
4.4
0.1
1
Boost Output Current (mA)
TPS61098, '7
3.6
4.1
0.01
D046
4.6
4.2
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
2
Figure 7-27. Boost Efficiency vs Output Current
(Active Mode)
Boost Output Voltage (V)
2.3
3
0.001
0.01
0.1
1
10
Boost Output Current (mA)
TPS610981
MODE = Low
200
V(MAIN) = 3.3 V
Figure 7-30. Boost Load Regulation (Low Power
Mode)
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3.6
3.6
3.5
3.5
Boost Output Voltage (V)
Boost Output Voltage (V)
SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
3.4
3.3
3.2
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
3.1
3
0.001
0.01
0.1
1
10
Boost Output Current (mA)
TPS610981
MODE = High
3
0.001
200
3.2
3.4
3.3
3.2
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
TPS610982
MODE = High
2.9
3.5
Boost Output Voltage (V)
3.2
3
2.9
VIN = 0.7 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 2.5 V
0.01
TPS610985
MODE = High
200
D048
V(MAIN) = 3 V
Figure 7-35. Boost Load Regulation (Active Mode)
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MODE = Low
200
D047
V(MAIN) = 3 V
3.4
3.3
3.2
3.1
0.1
1
10
Boost Output Current (mA)
0.1
1
10
Boost Output Current (mA)
Figure 7-34. Boost Load Regulation (Low Power
Mode)
3.6
2.7
0.001
0.01
TPS610985
V(MAIN) = 3.3 V
3.3
2.8
VIN = 0.7 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 2.5 V
D028
3.1
D027
V(MAIN) = 3.3 V
3
2.7
0.001
200
Figure 7-33. Boost Load Regulation (Active Mode)
MODE = Low
200
3.1
2.8
0.1
1
10
Boost Output Current (mA)
0.1
1
10
Boost Output Current (mA)
Figure 7-32. Boost Load Regulation (Low Power
Mode)
3.5
0.01
0.01
TPS610982
V(MAIN) = 3.3 V
3.3
3
0.001
VIN = 0.7 V
VIN = 1.2 V
VIN = 2 V
VIN = 3 V
D013
Boost Output Voltage (V)
Boost Output Voltage (V)
3.2
3.6
3.1
Boost Output Voltage (V)
3.3
3.1
Figure 7-31. Boost Load Regulation (Active Mode)
12
3.4
3
0.001
VIN = 0.7 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 3 V
0.01
0.1
1
10
Boost Output Current (mA)
TPS610986
MODE = Low
200
D049
V(MAIN) = 3.3 V
Figure 7-36. Boost Load Regulation (Low Power
Mode)
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
3.6
3.16
3.5
3.14
LDO Output Voltage (V)
Boost Output Voltage (V)
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3.4
3.3
3.2
VIN = 0.7 V
VIN = 1.5 V
VIN = 2.5 V
VIN = 3 V
3.1
3
0.001
0.01
3.1
3.08
MODE = High
3.04
0.001
200
TPS61098, '7
V(MAIN) = 3.3 V
0.1
1
10
LDO Output Current (mA)
200
MODE = High
D014
VIN = 3.6 V
Figure 7-38. LDO Load Regulation
3.06
2.86
2.84
LDO Output Voltage (V)
3.04
LDO Output Voltage (V)
0.01
D050
Figure 7-37. Boost Load Regulation (Active Mode)
3.02
3
2.98
TA = -40qC
TA = 25qC
TA = 85qC
2.96
2.94
0.001
0.01
TPS610981
0.1
1
10
LDO Output Current (mA)
MODE = High
2.82
2.8
2.78
2.76
2.74
2.7
0.001
200
0.01
D015
VIN = 2.5 V
TPS610982
0.1
1
10
LDO Output Current (mA)
MODE = Low
5
2.84
4.5
Input Current (µA)
2.8
2.78
2.76
2.74
TA = -40qC
TA = 25qC
TA = 85qC
TPS610982
0.1
1
10
LDO Output Current (mA)
MODE = High
3
2.5
2
1.5
0.5
200
0
0.7
0.9
1.1
D030
VIN = 2.5 V
Figure 7-41. LDO Load Regulation (Active Mode)
Copyright © 2021 Texas Instruments Incorporated
3.5
1
TA = -40qC
TA = 25qC
TA = 85qC
0.01
D029
VIN = 2.5 V
4
2.82
2.72
200
Figure 7-40. LDO Load Regulation (Low Power
Mode)
2.86
2.7
0.001
TA = -40°C
TA = 25°C
TA = 85°C
2.72
Figure 7-39. LDO Load Regulation
LDO Output Voltage (V)
TA = -40qC
TA = 25qC
TA = 85qC
3.06
0.1
1
10
Boost Output Current (mA)
TPS610986
3.12
TPS61098, '7
1.3
1.5
1.7
Input Voltage (V)
MODE = Low
1.9
2.1
2.3
D016
No Load
Figure 7-42. Input Current vs Input Voltage (Low
Power Mode)
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
10
180
TA = -40qC
TA = 25qC
TA = 85qC
9
140
7
Input Current (µA)
Input Current (µA)
8
TA = -40qC
TA = 25qC
TA = 85qC
160
6
5
4
3
120
100
80
60
40
2
20
1
0
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
D018
0
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
D017
TPS610981
MODE = Low
TPS610981
No Load
Figure 7-43. Input Current vs Input Voltage (Low
Power Mode)
MODE = High
No Load
Figure 7-44. Input Current vs Input Voltage (Active
Mode)
60
160
TA = -40°C
TA = 25°C
TA = 85°C
50
TA = -40°C
TA = 25°C
TA = 85°C
140
Input Current (µA)
Input Current (µA)
120
40
30
20
100
80
60
40
10
20
0
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
D032
0
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
D031
TPS610982
MODE = Low
TPS610982
No Load
10
10
TA = -40°C
TA = 25°C
TA = 85°C
9
8
7
6
5
4
3
7
6
5
4
3
2
2
1
1
0.9
1.1
1.3
TPS610985
1.5 1.7 1.9 2.1
Input Voltage (V)
MODE = Low
2.3
2.5
2.7
2.9
D051
V(MAIN) = 3 V
Figure 7-47. Input Current vs Input Voltage (Low
Power Mode)
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TA = -40°C
TA = 25°C
TA = 85°C
9
Input Current (µA)
Input Current (µA)
8
14
No Load
Figure 7-46. No Load Input Current vs Input
Voltage (Active Mode)
Figure 7-45. No Load Input Current vs Input
Voltage (Low Power Mode)
0
0.7
MODE = High
0
0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
Input Voltage (V)
D053
TPS610986
MODE = Low
V(MAIN) = 3.3 V
Figure 7-48. Input Current vs Input Voltage (Low
Power Mode)
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100
100
80
80
PSRR (dB)
PSRR (dB)
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60
40
20
60
40
20
IOUT = 10 mA
IOUT = 100 mA
0
10
100
1k
10k
100k
Frequency (Hz)
1M
IOUT = 10 mA
IOUT = 100 mA
0
10
10M
100
1k
D019
TPS61098. '7
MODE = High
VIN - VOUT = 4.3 V - 3.1 V = 1.2 V
CO2 = 10 µF
10k
100k
Frequency (Hz)
1M
D020
TPS610981
MODE = High
VIN - VOUT = 3.3 V - 3 V = 0.3 V
Figure 7-49. LDO PSRR vs Frequency
10M
CO2 = 10 µF
Figure 7-50. LDO PSRR vs Frequency
60
80
70
50
60
PSRR (dB)
PSRR (dB)
40
30
20
50
40
30
20
10
0
10
10
IOUT = 10 mA
IOUT = 100 mA
100
1k
10k
100k
Frequency (Hz)
TPS610982
MODE = Low
VIN - VOUT = 3.3 V - 2.8 V = 0.5 V
1M
10M
D033
CO2 = 10 µF
Figure 7-51. LDO PSRR vs Frequency (Low Power
Mode)
Copyright © 2021 Texas Instruments Incorporated
0
10
IOUT = 10 mA
IOUT = 100 mA
100
1k
10k
100k
Frequency (Hz)
TPS610982
MODE = High
VIN - VOUT = 3.3 V - 2.8 V = 0.5 V
1M
10M
D034
CO2 = 10 µF
Figure 7-52. LDO PSRR vs Frequency (Active
Mode)
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
8 Detailed Description
8.1 Overview
The TPS61098x is an ultra-low power solution optimized for products powered by either a one-cell or two-cell
alkaline, NiCd or NiMH, one-cell coin cell battery or one-cell Li-Ion or Li-polymer battery. To simplify system
design and save PCB space, the TPS61098x integrates an LDO or load switch with a boost converter (different
configurations for different versions) to provide two output rails in a compact package. The boost output V(MAIN)
is designed as an always-on supply to power a main system, and the LDO or load switch output V(SUB) is
designed to power peripheral devices and can be turned off.
The TPS61098x features two modes controlled by MODE pin: Active mode and Low Power mode. In Active
mode, both outputs are enabled, and the transient response performance of the boost converter and LDO/load
switch are enhanced, so it is able to respond load transient quickly. In Low Power mode, the LDO/load switch
is disabled, so the peripherals can be disconnected to minimize the battery drain. Besides that, the boost
consumes only 300 nA quiescent current in Low Power mode, so up to 88% efficiency at 10 µA load can be
achieved to extend the battery run time. The TPS610982 is an exception. Its LDO is always on in both Active
mode and Low Power mode. The main differences between the two modes of the TPS610982 are the quiescent
current and performance. Refer to Section 8.4.1 for details.
The TPS61098x supports automatic pass-through function in both Active mode and Low Power mode. When VIN
is detected higher than a pass-through threshold, which is around the target V(MAIN) voltage, the boost converter
stops switching and passes the input voltage through inductor and internal rectifier switch to V(MAIN), so V(MAIN)
follows VIN; when VIN is lower than the threshold, the boost works in boost mode and regulates V(MAIN) at the
target value. The TPS61098x can support different V(MAIN) target values in Active mode and Low Power mode to
meet various requirements. For example, for TPS61098, the set value of V(MAIN) is 4.3 V in Active mode but 2.2
V in Low Power mode.
8.2 Functional Block Diagrams
SW
2
Startup
1
VMAIN
5
VSUB
6
GND
Current
Sense
Boost
Gate Driver
OCP
Pulse
Modulator
REF
VIN
Pass_Through
3
VPSTH
OCP_SUB
Thermal
Shutdown
MODE
Logic
Control
LDO/Load Switch
Gate Driver
ILIM_SUB
1) LDO Version
4
VREF
Softstart
Copyright © 2016, Texas Instruments Incorporated
A.
16
Implemented in versions with LDO configuration.
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
8.3 Feature Description
8.3.1 Boost Controller Operation
The TPS61098x boost converter is controlled by a hysteretic current mode controller. This controller regulates
the output voltage by keeping the inductor ripple current constant in the range of 100 mA and adjusting the
offset of this inductor current depending on the output load. Since the input voltage, output voltage and inductor
value all affect the rising and falling slopes of inductor ripple current, the switching frequency is not fixed and
is decided by the operation condition. If the required average input current is lower than the average inductor
current defined by this constant ripple, the inductor current goes discontinuous to keep the efficiency high under
light load conditions. Figure 8-1 illustrates the hysteretic current operation. If the load is reduced further, the
boost converter enters into Burst mode. In Burst mode, the boost converter ramps up the output voltage with
several pulses and it stops operating once the output voltage exceeds a set threshold, and then it goes into a
sleep status and consumes less quiescent current. It resumes switching when the output voltage is below the
set threshold. It exits the Burst mode when the output current can no longer be supported in this mode. Refer to
Figure 8-2 for Burst mode operation details.
To achieve high efficiency, the power stage is realized as a synchronous boost topology. The output voltage
V(MAIN) is monitored via an internal feedback network which is connected to the voltage error amplifier. To
regulate the output voltage, the voltage error amplifier compares this feedback voltage to the internal voltage
reference and adjusts the required offset of the inductor current accordingly.
IL
Continuous Current Operation
Discontinuous Current Operation
100mA
(typ.)
100mA
(typ.)
t
Figure 8-1. Hysteretic Current Operation
Output Voltage of
Boost Converter
Burst Mode Operation at
Light Load
VOUT_BST
Continuous Current Operation at
Heavy Load
VOUT_NOM
t
Figure 8-2. Burst Mode Operation
8.3.2 Pass-Through Operation
The TPS61098x supports automatic pass-through function for the boost converter. When the input voltage is
detected higher than the pass-through threshold V(PSTH), which is around V(MAIN) set value, the boost converter
enters into pass-through operation mode. In this mode, the boost converter stops switching, the rectifier is
constantly turned on and the low side switch is turned off. The input voltage passes through external inductor
and the internal rectifier to the output. The output voltage in this mode depends on the resistance between the
input and the output, calculated as Equation 1:
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
VMAIN
VIN (IMAIN
ISUB ) u (RL
RDSon _ HS )
(1)
where
•
•
RL is the DCR of external inductor
RDS(on)_HS is the resistance of internal rectifier
When the input voltage is lower than V(PSTH), the boost converter resumes switching to regulate the output at
target value.
The TPS61098x can support automatic pass-through function in both Active mode and Low Power mode.
8.3.3 LDO / Load Switch Operation
The TPS61098x uses a PMOS as a pass element of its integrated LDO / load switch. The input of the PMOS is
connected to the output of the boost converter. When the MODE pin is pulled logic high, the PMOS is enabled to
output a voltage on VSUB pin.
For load switch version, the PMOS pass element is fully turned on when enabled, no matter the boost converter
works in boost operation mode or pass-through operation mode. So the output voltage at VSUB pin is decided
by the output voltage at VMAIN pin and the current passing through the PMOS as Equation 2:
VSUB
VMAIN ISUB u RLS
(2)
where
•
•
I(SUB) is the load of VSUB rail
RLS is the resistance of the PMOS when it is fully turned on
For LDO version, the output voltage V(SUB) is regulated at the set value when the voltage difference between
its input and output is higher than the dropout voltage V(Dropout), no matter the boost converter works in boost
operation mode or pass-through operation mode. The V(SUB) is monitored via an internal feedback network
which is connected to the voltage error amplifier. To regulate V(SUB), the voltage error amplifier compares the
feedback voltage to the internal voltage reference and adjusts the gate voltage of the PMOS accordingly. When
the voltage drop across the PMOS is lower than the dropout voltage, the PMOS will be fully turned on and the
output voltage at V(SUB) is decided by Equation 2.
When the MODE pin is pulled low, the LDO or load switch is turned off to disconnect the load at VSUB pin.
For some versions, active discharge function at VSUB pin is offered, which can discharge the V(SUB) to ground
after MODE pin is pulled low, to avoid any bias condition to downstream devices. For versions without the active
discharge function, the VSUB pin is floating after MODE pin is pulled low, and its voltage normally drops down
slowly due to leakage. Refer to the Section 5 for version differences.
When MODE pin is toggled from low to high, soft-start is implemented for the LDO versions to avoid inrush
current during LDO startup. The start up time of LDO is typically 1 ms. For load switch versions, the load switch
is turned on faster, so the output capacitor at VSUB pin is suggested 10X smaller than the output capacitor at
VMAIN pin to avoid obvious voltage drop of V(MAIN) during load switch turning on process.
8.3.4 Start Up and Power Down
The boost converter of the TPS61098x is designed always-on, so there is no enable or disable control of it.
The boost converter starts operation once input voltage is applied. If the input voltage is not high enough, a
low voltage startup oscillator operates the switches first. During this phase, the switching frequency is controlled
by the oscillator, and the maximum switch current is limited. Once the converter has built up the output voltage
V(MAIN) to approximately 1.8 V, the device switches to the normal hysteretic current mode operation and the
VMAIN rail starts to supply the internal control circuit. If the input voltage is too low or the load during startup is
too heavy, which makes the converter unable to build up 1.8 V at V(MAIN) rail, the boost converter can't start up
successfully. It will keep in this status until the input voltage is increased or removed.
The TPS61098x is able to startup with 0.7 V input voltage with ≥ 3 kΩ load. The startup time depends on
input voltage and load conditions. After the V(MAIN) reaches 1.8 V to start the normal hysteretic current mode
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operation, an internal ramp-up reference controls soft-start time of the boost converter until V(MAIN) reaches its
set value.
The TPS61098x does not support undervoltage lockout function. When the input voltage drops to a low voltage
and can't provide the required energy to the boost converter, the V(MAIN) drops. When and to what extent V(MAIN)
drops are dependent on the input and load conditions. When the boost converter is unable to maintain 1.8 V at
VMAIN rail to supply the internal circuit, the TPS61098x powers down and enters into startup process again.
8.3.5 Over Load Protection
The boost converter of the TPS61098x supports a cycle-by-cycle current limit function in boost mode operation.
If the peak inductor current reaches the internal switch current limit threshold, the main switch is turned off to
stop a further increase of the input current. In this case the output voltage will decrease since the device cannot
provide sufficient power to maintain the set output voltage. If the output voltage drops below the input voltage,
the backgate diode of the rectifying switch gets forward biased and current starts to flow through it. Because this
diode cannot be turned off, the load current is only limited by the remaining DC resistance. After the overload
condition is removed, the converter automatically resumes normal operation.
The overload protection is not active in pass-through mode operation, in which the load current is only limited by
the DC resistance.
The integrated LDO / load switch also supports over load protection. When the load current of VSUB rail reaches
the ILIM_SUB, the V(SUB) output current will be regulated at this limit value and will not increase further. In this case
the V(SUB) voltage will decrease since the device cannot provide sufficient power to the load.
8.3.6 Thermal Shutdown
The TPS61098x has a built-in temperature sensor which monitors the internal junction temperature in boost
mode operation. If the junction temperature exceeds the threshold (150°C typical), the device stops operating.
As soon as the junction temperature has decreased below the programmed threshold with a hysteresis, it starts
operating again. There is a built-in hysteresis (25°C typical) to avoid unstable operation at the overtemperature
threshold. The over temperature protection is not active in pass-through mode operation.
8.4 Device Functional Modes
8.4.1 Operation Modes by MODE Pin
The TPS61098x features two operation modes controlled by MODE pin: the Active mode and Low Power mode.
It can provide quick transient response in Active mode and ultra-low quiescent current in Low Power mode. So
a low power system can easily use the TPS61098x to get high performance in its active mode and meantime
minimize its power consumption to extend the battery run time in its sleep mode.
The MODE pin is usually controlled by an I/O pin of a controller, and should not be left floating.
8.4.1.1 Active Mode
The TPS61098x works in Active mode when MODE pin is logic high. In Active mode, both of the boost
converter and the integrated LDO/load switch are enabled, and the TPS61098x can provide dual outputs
simultaneously. The transient response performance of the boost converter is enhanced in Active mode, and the
device consumes around 15 µA quiescent current. It is able to respond load transient quickly.
When MODE pin is toggled from low to high, soft-start is implemented for the LDO versions to avoid inrush
current during startup. For load switch versions, the load switch is turned on faster, so the output capacitor at
VSUB pin is suggested 10X smaller than the output capacitor at VMAIN pin to avoid obvious voltage drop of
V(MAIN) during turning on process.
8.4.1.2 Low Power Mode
The TPS61098x works in Low Power mode when MODE pin is logic low. In Low Power mode, the LDO/load
switch is turned off, so the peripherals can be disconnected to minimize the battery drain. The VSUB pin
either outputs high impedance or is pulled to ground by internal active discharge circuit, depending on different
versions. The boost converter consumes only 300 nA quiescent current typically, and can achieve up to 88%
efficiency at 10 µA load.
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The Low Power mode is designed to keep the load device powered with minimum power consumption. For
example, it can be used to keep powering the main system, like an MCU, in a system's sleep mode even under
< 0.7 V input voltage condition.
Figure 8-3 and Figure 8-4 illustrate the outputs of the TPS61098 and TPS610981 under different input voltages
in Active mode and Low Power mode.
Voltage (V)
4.5
Voltage (V)
VIN
4.5
VMAIN (Active Mode)
4.3
VSUB (Active Mode)
3.1
3.3
3.0
2.2
2.2
VMAIN (Low Power Mode)
0.7
0
t
Figure 8-3. TPS61098 Output under Different Input
Voltages
VIN
VMAIN (Active Mode & Low
Power Mode)
VSUB (Active Mode)
0.7
0
t
Figure 8-4. TPS610981 Output under Different
Input Voltages
The TPS610982 is an exception. Its LDO is always on in both Active mode and Low Power mode with higher
quiescent current consumption than other versions. The TPS610982 can be used to replace discrete boost and
LDO solutions where the LDO output is always on, and its two modes provide users two options of different
quiescent current consumption and performance. Refer to Section 8.4.1, Section 7 and Section 7.6 for details.
8.4.2 Burst Mode Operation under Light Load Condition
The boost converter of TPS61098x enters into Burst Mode operation under light load condition. Refer to Section
8.3.1 for details.
8.4.3 Pass-Through Mode Operation
The boost converter of TPS61098x automatically enters into pass-through mode operation when input voltage is
higher than the target output voltage. Refer to Section 8.3.2 for details.
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9 Applications and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and
TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
The TPS61098x is an ultra low power solution for products powered by either a one-cell or two-cell alkaline,
NiCd or NiMH, one-cell coin cell or one-cell Li-Ion or Li-polymer battery. It integrates either a Low-dropout Linear
Regulator (LDO) or a load switch with a boost converter and provides dual output rails. The V(MAIN) rail is the
output of the boost converter. It is an always-on output and can only be turned off by removing input voltage. The
V(SUB) rail is the output of the integrated LDO or load switch, and it can be turned off by pulling the MODE pin
low.
9.2 Typical Applications
9.2.1 VMAIN to Power MCU and VSUB to Power Subsystem
The TPS61098x suits for low power systems very well, especially for the system which spends the most of time
in sleep mode and wakes up periodically to sense or transmit signals. For this kind of application, the boost
output V(MAIN) can be used as an always-on supply for the main system, such as an MCU controller, and the
LDO or load switch output V(SUB) is used to power peripheral devices or subsystem.
As shown in Figure 9-1, the MCU can control both of the subsystem and the TPS61098x. When the system
goes into sleep mode, the MCU can disable the subsystem first, and then force the TPS61098x enter into Low
Power mode, where the VSUB rail is disconnected but the V(MAIN) rail still powers the MCU with only 300 nA
quiescent current. When the system wakes up, the MCU pulls the MODE pin of TPS61098x high first to turn
on the VSUB rail, and then enables the subsystem. In this way, the system can benefit both of the enhanced
transient response performance in active mode and the ultra-low quiescent current in sleep mode.
0.7 V to 1.65 V
CBAT
10µF
L
4.7µH
SW
VMAIN
3.3 V
MCU
CO1
10µF
RIN
400
VIN
BOOST
CTRL
LDO
CTRL
VSUB
CIN
0.1µF
3.0 V
Subsystem
CO2
10µF
MODE
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 9-1. Typical Application of TPS610981 to Power Low Power System
9.2.1.1 Design Requirements
•
•
•
3.3 V V(MAIN) rail to power MCU with 15 mA load current, 3 V V(SUB) rail to power subsystem with 10 mA load
current
Power source, single-cell alkaline battery (0.7 V to 1.65 V range)
Greater than 90% conversion efficiency
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9.2.1.2 Detailed Design Procedure
9.2.1.2.1 Device Choice
In the TPS61098x family, different versions are provided. Refer to Section 5 for version details and select the
right version for target applications. It is OK to use only one output rail, either V(MAIN) or V(BUS), as long as it suits
the application.
In this example, dual rails of 3.3 V and 3 V are required to power both MCU and subsystem, so the TPS610981
is selected.
9.2.1.2.2 Maximum Output Current
For the boost converter, it provides output current for both V(MAIN) and V(SUB) rails. Its maximum output capability
is determined by the input to output ratio and the current limit of the boost converter and can be estimated by
Equation 3.
IOUT (max)
VIN u (ILIM _ BST
50mA ) u K
VMAIN
(3)
where
•
•
η is the boost converter power efficiency estimation
50 mA is half of the inductor current ripple value
Minimum input voltage, maximum boost output voltage and minimum current limit ILIM_BST should be used as the
worst case condition for the estimation.
Internal current limit is also implemented for the integrated LDO/load switch. So the maximum output current of
VSUB rail should be lower than ILIM_SUB, which has 200 mA minimum value. For LDO version, the maximum
output current is also limited by its input to output headroom, that is V(MAIN) - V(SUB). Make sure the headroom
voltage is enough to support the load current. Please refer to Section 7.5 for the dropout voltage information.
In this example, assume the power efficiency is 80% (lower than typical value for the worst case estimation),
so the calculated maximum output current of the boost converter is 50.9 mA, which satisfies the application
requirements (15 mA + 10 mA). The load of VSUB rail is 10 mA, which is well below the V(SUB) rail current limit
and the dropout voltage is also within the headroom.
9.2.1.2.3 Inductor Selection
Because the selection of the inductor affects steady state operation, transient behavior, and loop stability,
the inductor is the most important component in power regulator design. There are three important inductor
specifications, inductor value, saturation current, and dc resistance (DCR).
The TPS61098x is designed to work with inductor values between 2.2 µH and 4.7 µH. The inductance values
affects the switching frequency ƒ in continuous current operation, which is proportional to 1/L as shown in
Equation 4.
f
V u ( VMAIN VIN u K)
1
u IN
L u 100mA
VMAIN
(4)
The inductor current ripple is fixed to 100mA typical value by internal design, but it can be affected by the
inductor value indirectly. Normally when a smaller inductor value is applied, the inductor current ramps up and
down more quickly, so the current ripple becomes bigger because the internal current comparator has some
delay to respond. So if smaller inductor peak current is required in applications, a higher inductor value can be
tried. However, the TPS61098x is optimized to work within a range of L and C combinations. The LC output
filter inductance and capacitance must be considered together. The output capacitor sets the corner frequency
of the converter while the inductor creates a Right-Half-Plane-Zero degrading the stability of the converter.
Consequently with a larger inductor, a bigger capacitor normally should be used to ensure the same L/C ratio
thus a stable loop.
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Having selected an inductance value, the peak current for the inductor in steady-state operation varies as a
function of the load, the input and output voltages and can be estimated using Equation 5.
IL,MAX
VMAIN u IMAIN ISUB
VIN u K
IL,MAX
100 mA;
50mA; continuous current operation
discontinu ous current operation
(5)
where, 80% can be used for the boost converter power efficiency estimation, 100 mA is the typical inductor
current ripple value and 50mA is half of the ripple value, which may be affected a little bit by inductor value.
Equation 5 provides a suitable inductor current rating by using minimum input voltage, maximum boost output
voltage and maximum load current for the calculation. Load transients and error conditions may cause higher
inductor currents.
Equation 6 provides an easy way to estimate whether the device will work in continuous or discontinuous
operation depending on the operating points. As long as the Equation 6 is true, continuous operation is typically
established. If Equation 6 becomes false, discontinuous operation is typically established.
VMAIN u IMAIN ISUB
! 50mA
VIN u K
(6)
Selecting an inductor with insufficient saturation performance can lead to excessive peak current in the
converter. This could eventually harm the device and reduce it's reliability.
In this example, the maximum load for the boost converter is 25 mA, and the minimum input voltage is 0.7 V,
and the efficiency under this condition can be estimated at 80%, so the boost converter works in continuous
operation by the calculation. The inductor peak current is calculated as 197 mA. To leave some margin, a 4.7 µH
inductor with at least 250 mA saturation current is recommended for this application.
Table 9-1 also lists the recommended inductor for the TPS61098x device.
Table 9-1. List of Inductors
INDUCTANCE [µH]
ISAT [A]
IRMS [A]
DC RESISTANCE [mΩ]
PART NUMBER
MANUFACTURER
4.7
0.86
1.08
168
VLF302510MT-4R7M
TDK
4.7
0.57
0.95
300
VLF252010MT-4R7M
TDK
2.2
1.23
1.5
84
VLF302510MT-2R2M
TDK
2.2
0.83
0.92
120
VLF252010MT-2R2M
TDK
9.2.1.2.4 Capacitor Selection
For best output and input voltage filtering, low ESR X5R or X7R ceramic capacitors are recommended.
The input capacitor minimizes input voltage ripple, suppresses input voltage spikes and provides a stable system
rail for the device. An input capacitor value of at least 10 μF is recommended to improve transient behavior of
the regulator and EMI behavior of the total power supply circuit. A ceramic capacitor placed as close as possible
to the VIN and GND pins of the IC is recommended. For applications where line transient is expected, an input
filter composed of 400-Ω resistor and 0.1-µF capacitor as shown in Figure 9-1 is mandatory to avoid interference
to internal pass-through threshold comparison circuitry.
For the output capacitor of VMAIN pin, small ceramic capacitors are recommended, placed as close as possible
to the VMAIN and GND pins of the IC. If, for any reason, the application requires the use of large capacitors
which cannot be placed close to the IC, the use of a small ceramic capacitor with a capacitance value of around
2.2 μF in parallel to the large one is recommended. This small capacitor should be placed as close as possible
to the VMAIN and GND pins of the IC. The recommended typical output capacitor values are 10 μF and 22 µF
(nominal values).
For LDO version, like all low dropout regulators, VSUB rail requires an output capacitor connected between
VSUB and GND pins to stabilize the internal control loop. Ceramic capacitor of 10 µF (nominal value) is
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recommended for most applications. If the V(SUB) drop during load transient is much cared, higher capacitance
value up to 22 µF is recommended to provide better load transient performance. Capacitor below 10 µF is only
recommended for light load operation. For load switch version, capacitor of 10x smaller value than capacitor at
VMAIN pin is recommended to minimize the voltage drop caused by charge sharing when the load switch is
turned on.
When selecting capacitors, ceramic capacitor’s derating effect under bias should be considered.
Choose the right nominal capacitance by checking capacitor's DC bias characteristics. In this example,
GRM188R60J106ME84D, which is a 10 µF ceramic capacitor with high effective capacitance value at DC biased
condition, is selected for both VMAIN and VSUB rails. The load transient response performance is shown in
Section 9.2.1.3.
For load switch version, VSUB rails requires an output capacitor connected between VSUB and GND pins.
Ceramic capacitor of 1 µF (nominal value) is recommended for most applications.
9.2.1.2.5 Control Sequence
In this example, the MCU is powered by the boost output V(MAIN) and the subsystem is powered by the LDO
V(SUB). MCU controls both of the TPS610981 and subsystem. The control sequence as shown in Figure 9-2 is
recommended.
MODE
Logic
High
Logic
Low
3.3V
VMAIN
3.0V
VSUB
0V
Subsystem
Load
System
status
Sleep Mode
Active Mode
Figure 9-2. System Control Sequence
When the system is waking up, the MCU wakes up itself first, and it then pulls the MODE pin of TPS610981 to
high to turned on the V(SUB) rail. TPS610981 enters into Active mode and gets ready to provide power to the
subsystem. Then the MCU enables the subsystem.
When the system is entering into sleep mode, the MCU disables the subsystem first and then pulls the MODE
pin to low to turn off the V(SUB), so the subsystem is disconnected from the supply to minimize the current drain.
TPS610981 enters into Low Power mode and the VMAIN rail still powers the MCU with only 300 nA quiescent
current. The MCU enters into sleep mode itself finally.
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9.2.1.3 Application Curves
TPS610981
MODE = L
I(MAIN) = 1 mA
VIN = 1.5 V
I(SUB) = 0 mA
Figure 9-3. Switching Waveforms
TPS610981
MODE = L
I(MAIN) = 100 mA
VIN = 1.5 V
I(SUB) = 0 mA
Figure 9-5. Switching Waveforms
TPS610981
MODE = H
I(MAIN) = 0 mA
VIN = 1.5 V
I(SUB) = 10 mA
Figure 9-7. Switching Waveforms
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TPS610981
MODE = L
I(MAIN) = 10 mA
VIN = 1.5 V
I(SUB) = 0 mA
Figure 9-4. Switching Waveforms
TPS610981
MODE = H
I(MAIN) = 0 mA
VIN = 1.5 V
I(SUB) = 1 mA
Figure 9-6. Switching Waveforms
TPS610981
MODE = H
I(MAIN) = 0 mA
VIN = 1.5V
I(SUB) = 100 mA
Figure 9-8. Switching Waveforms
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TPS610986
MODE = H
I(MAIN) = 0 mA
VIN = 1.5V
I(SUB) = 1 mA
Figure 9-9. Switching Waveforms
TPS610986
MODE = H
I(MAIN) = 0 mA
VIN = 1.5V
I(SUB) = 100 mA
TPS610986
MODE = H
I(MAIN) = 0 mA
VIN = 1.5V
I(SUB) = 10 mA
Figure 9-10. Switching Waveforms
TPS610981
MODE = L
Figure 9-11. Switching Waveforms
VIN = 2.5 V
I(SUB) = 0 mA
I(MAIN) = 0 mA to 50 mA, 5 µs rising/falling
edge
Figure 9-12. Load Transient Response
TPS610981
MODE = H
VIN = 2.5 V
I(SUB) = 0 mA
I(MAIN) = 0 mA to 50 mA, 5 µs rising/falling
edge
Figure 9-13. Load Transient Response
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TPS610981
MODE = H
VIN = 2.5 V
I(MAIN) = 0 mA
I(SUB) = 0 mA to 50 mA, 5 µs rising/falling
edge
Figure 9-14. LDO Load Transient Response
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TPS610981
MODE = L
I(MAIN) = 20 mA
I(SUB) = 0 mA
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
Figure 9-15. Line Transient Response
TPS610981
MODE = H
I(MAIN) = 0 mA
I(SUB) = 20 mA
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
TPS610981
MODE = H
I(MAIN) = 20 mA
I(SUB) = 0 mA
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
Figure 9-16. Line Transient Response
TPS610981
MODE = L
Figure 9-17. Line Transient Response
VIN = 1.5 V
I(SUB) = 0 mA
I(MAIN) = 0 mA to 120 mA to 0 mA, ramp
up and down
Figure 9-18. Load Regulation
TPS610981
MODE = H
VIN = 1.5 V
I(MAIN) = 0 mA
I(SUB) = 0 mA to 120 mA to 0 mA, ramp
up and down
TPS610981
MODE = H
I(MAIN) = 0 mA
I(SUB) = 30 mA
VIN = 0.7 V to 4.5 V, ramp up and down
Figure 9-20. Line Regulation
Figure 9-19. Load Regulation
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TPS610981
R(MAIN) = 1 kΩ
MODE pin toggling
R(SUB) = open load
Figure 9-21. Mode Toggling
TPS610981
VIN = 1.5 V
R(MAIN) = 1 kΩ
R(SUB) = 1 kΩ
MODE connected to VMAIN
Figure 9-23. Startup
TPS610981
R(MAIN) = 3 kΩ
MODE connected to GND
VIN = 0.7 V
Figure 9-22. Startup
TPS610986
R(MAIN) = 1 kΩ
VIN = 1.5 V
C(SUB) = 1 µF
MODE connected to VMAIN
R(SUB) = 1 kΩ
Figure 9-24. Startup
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9.2.2 VMAIN to Power the System in Low Power Mode
If only one power supply is needed for the whole system, users can easily leave the VSUB pin float and only
use the VMAIN rail as the power supply. In this case, the TPS61098x functions as a standard boost converter.
If enhanced load transient performance is needed when the system works in Active mode, the controller can
control the MODE pin to switch the TPS61098x between the Active mode and Low Power mode. If the ultra-low
Iq is critical for the application, users can connect the MODE pin to GND so the TPS61098x keeps working in
Low Power mode with only 300 nA quiescent current. Below shows a typical application where the TPS61098 is
used in Low Power mode to generate 2.2 V with only 300 nA Iq to power the whole system.
0.7 V to 1.65 V
CBAT
10µF
L
4.7µH
SW
VMAIN
2.2 V
System
RIN
400
VIN
BOOST
CTRL
LDO
CTRL
VSUB
CIN
0.1µF
MODE
CO1
10µF
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 9-25. Typical Application of TPS61098 VMAIN to Power the System in Low Power Mode
9.2.2.1 Design Requirements
•
•
•
2.2 V V(MAIN) to power the whole system
Power source, single-cell alkaline battery (0.7 V to 1.65 V range)
≥ 80% conversion efficiency at 10 µA load
9.2.2.2 Detailed Design Procedure
Refer to Section 9.2.1.2 for the detailed design steps.
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9.2.2.3 Application Curves
TPS61098
MODE = L
VIN = 1.5 V
I(MAIN) = 50 mA to 100 mA, 5 µs rising/falling
edge
Figure 9-26. Load Transient Response
TPS61098
MODE = L
I(MAIN) = 100 mA I(SUB) = 0 mA
VIN = 1.2 V to 1.8 V, 10 µs rising/falling
edge
Figure 9-27. Line Transient Response
TPS61098
MODE connected to GND
R(MAIN) = 3 kΩ
VIN = 0.7 V
Figure 9-28. Startup
30
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9.2.3 VSUB to Power the System in Active Mode
In some applications, the system controller can be powered by the battery directly, but a buck-boost or a boost
converter with an LDO is needed to provide a quiet power supply for a subsystem like a sensor. In this type
of application, the TPS61098x can be used to replace the discrete boost converter and the LDO, providing a
compact solution to simplify the system design and save the PCB space. The LDO can be turned on and off
by the MODE pin. When the MODE pin is pulled low, the LDO is turned off to disconnect the load, and the
TPS61098x also enters into Low Power mode to save power consumption. Figure 9-29 shows an application
where the VSUB of the TPS61098 is used to supply the 3.1 V for a sensor in a system. The boost converter of
the TPS61098 outputs 4.3 V and provides enough headroom for the LDO operation.
0.7 V to 1.65 V
CBAT
10µF
L
4.7µH
SW
VMAIN
CO1
10µF
RIN
400
VIN
BOOST
CTRL
LDO
CTRL
VSUB
CIN
0.1µF
3.1 V
Sensor
CO2
10µF
MODE
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 9-29. Typical Application of TPS61098 VSUB to Power the System in Active Mode
9.2.3.1 Design Requirements
•
•
3.1 V rail to power a sensor
Power source, single-cell li-ion battery (2.7 V to 4.3 V range)
9.2.3.2 Detailed Design Procedure
Refer to Section 9.2.1.2 for the detailed design steps.
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9.2.3.3 Application Curves
TPS61098
MODE = H
VIN = 3.6 V
I(MAIN) = 0 mA
I(SUB) = 0 mA to 50 mA , 5 µs rising/falling
edge
TPS61098
MODE = H
I(MAIN) = 0 mA
I(SUB) = 100 mA
VIN = 2.7 V to 3.2 V, 5 µs rising/falling edge
Figure 9-31. Line Transient Response
Figure 9-30. LDO Load Transient Response
TPS610982
MODE = L
I(MAIN) = 0 mA
I(SUB) = 100 mA
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
Figure 9-32. Line Transient Response
TPS610982
MODE = L
VIN = 2.5 V
I(MAIN) = 0 mA
I(SUB) = 50 mA to 100 mA , 5 µs rising/falling
edge
Figure 9-34. LDO Load Transient Response
32
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TPS610982
MODE = H
I(MAIN) = 0 mA
I(SUB) = 100 mA
VIN = 2 V to 2.5 V, 10 µs rising/falling edge
Figure 9-33. Line Transient Response
TPS610982
MODE = H
VIN = 2.5 V
I(MAIN) = 0 mA
I(SUB) = 50 mA to 100 mA , 5 µs rising/falling
edge
Figure 9-35. LDO Load Transient Response
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
TPS61098
R(MAIN) = 10 kΩ
MODE pin toggling
R(SUB) = 3 kΩ
Figure 9-36. MODE Toggling
TPS610982
R(MAIN) = 1 kΩ
MODE connected to GND
R(SUB) = 1 kΩ
VIN = 1.5 V
Figure 9-38. Startup
TPS61098
R(MAIN) = 1 kΩ
MODE connected to VMAIN
R(SUB) = 1 kΩ
VIN = 3.6 V
Figure 9-37. Startup
TPS610982
R(MAIN) = 1 kΩ
MODE connected to VMAIN
R(SUB) = 1 kΩ
VIN = 1.5 V
Figure 9-39. Startup
10 Power Supply Recommendations
The TPS61098x family is designed to operate from an input voltage supply range between 0.7 V to 4.5 V. The
power supply can be either a one-cell or two-cell alkaline, NiCd or NiMH, one-cell coin cell or one-cell Li-Ion or
Li-polymer battery. The input supply should be well regulated with the rating of TPS61098x.
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11 Layout
11.1 Layout Guidelines
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
paths. The input and output capacitor, as well as the inductor should be placed as close as possible to the IC.
11.2 Layout Example
The bottom layer is a large GND plane connected by vias.
Top Layer
INPUT
VMAIN
SW
VSUB
GND
VIN
MODE
VMAIN
GROUND
GROUND
MODE VSUB
Figure 11-1. Layout
34
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SLVS873F – JUNE 2015 – REVISED SEPTEMBER 2021
12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Documentation Support
12.2.1 Related Documentation
•
•
•
Texas Instruments, Performing Accurate PFM Mode Efficiency Measurements Application Report
Texas Instruments, Accurately Measuring Efficiency Of Ultra Low-IQ Devices Technical Brief
Texas Instruments, IQ: What It Is, What It Isn’t, And How To Use It Techanical Brief
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.7 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS610981DSER
ACTIVE
WSON
DSE
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
GM
TPS610981DSET
ACTIVE
WSON
DSE
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
GM
TPS610982DSER
ACTIVE
WSON
DSE
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
G8
TPS610982DSET
ACTIVE
WSON
DSE
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
G8
TPS610985DSER
ACTIVE
WSON
DSE
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
1G
TPS610985DSET
ACTIVE
WSON
DSE
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
1G
TPS610986DSER
ACTIVE
WSON
DSE
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
1H
TPS610986DSET
ACTIVE
WSON
DSE
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
1H
TPS610987DSER
ACTIVE
WSON
DSE
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
3X
TPS610987DSET
ACTIVE
WSON
DSE
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
3X
TPS61098DSER
ACTIVE
WSON
DSE
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
GL
TPS61098DSET
ACTIVE
WSON
DSE
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
GL
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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