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TPS61183
SLVSAB4D – JUNE 2010 – REVISED JANUARY 2017
TPS61183 White-LED Driver With PWM Interface and Programmable PWM Dimming
1 Features
3 Description
•
•
•
•
The TPS61183 device provides a highly integrated
white-LED (WLED) driver solution for notebook LCD
backlights. This device has a built-in high-efficiency
boost regulator with integrated 2-A, 40-V power
MOSFET. The six current sink regulators provide
high-precision current regulation and matching. The
device can support a total of up to 60 WLEDs. In
addition, the boost output automatically adjusts its
voltage to the WLED forward voltage to optimize
efficiency.
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
4.5-V to 24-V Input Voltage
38-V Maximum Output Voltage
Integrated 2-A, 40-V MOSFET
280-kHz to 1-MHz Programmable Switching
Frequency
Adaptive Boost Output to WLED Voltages
Wide PWM Dimming Frequency Range
– 100 Hz to 50 KHz for Direct PWM Mode
– 100 Hz to 22 KHz for Frequency
Programmable Mode
100:1 Dimming Ratio at 20 kHz
10000:1 Dimming Ratio at 200 Hz (Direct PWM
mode)
Small External Components
Integrated Loop Compensation
Six Current Sinks of 30 mA, Maximum
1.5% (Typical) Current Matching
PWM Brightness Interface Control
PWM Programmable Mode Brightness Dimming
Method or Direct PWM Dimming Method
4000-V HBM ESD Protection
Programmable Overvoltage Threshold
Built-in WLED Open and Short Protections
Thermal Shutdown
The TPS61183 supports the programmable
brightness dimming method. In this configuration, the
dimming duty cycle of the WLED current is controlled
by the input PWM signal but the dimming frequency
is fixed and set by an external resistor. During direct
PWM dimming, the WLED current completely
synchronized with the input PWM signal's duty cycle
and frequency.
Device Information(1)
PART NUMBER
PACKAGE
TPS61183
QFN
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Programmable PWM-Mode Application
L1
10 mH
4.5V~24V
C3
4.7 mF
R4
Open
R5
VIN
Notebooks
Tablets
Monitors
Industrial PCs
Human Machine Interface Screens
ATMs
Fishfinder
D1
C1
2.2 mF
2 Applications
•
•
•
•
•
•
•
BODY SIZE (NOM)
FAULT
VDDIO
C2
1 mF
R7
1.2 KW
SW
PGND
OVP
EN
FSW
R8
10 KW
R3
499 KW
TPS61183
PWMIN
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
VDD_GPIO
R1
62 KW
Open
ISET
FPO
AGND
19.8 mA
RFPWM
/MODE
R2
9.09 KW
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61183
SLVSAB4D – JUNE 2010 – REVISED JANUARY 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
5
5
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 12
8
Application and Implementation ........................ 16
8.1 Application Information............................................ 16
8.2 Typical Application ................................................. 16
9 Power Supply Recommendations...................... 19
10 Layout................................................................... 20
10.1 Layout Guidelines ................................................. 20
10.2 Layout Example .................................................... 20
11 Device and Documentation Support ................. 21
11.1
11.2
11.3
11.4
11.5
11.6
Device Support......................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
21
21
21
21
21
12 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (October 2016) to Revision D
•
Page
Changed TPS61183 Layout drawing ................................................................................................................................... 20
Changes from Revision B (February 2012) to Revision C
Page
•
Deleted "For Notebooks" from title ........................................................................................................................................ 1
•
Changed "300 kHz" to "280 kHz" in Features ........................................................................................................................ 1
•
Added new "Applications" ...................................................................................................................................................... 1
•
Added Device Information and Pin Configuration and Functions sections, ESD Ratings and Thermal Information
tables, Feature Description, Device Functional Modes, Application and Implementation, Power Supply
Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable
Information sections; remove Ordering Information - see POA.............................................................................................. 1
•
Changed "300 kHz" to "280 kHz" in Pin Functions................................................................................................................. 3
•
Changed "300 kHz" to "280 kHz" in ROC table - 2 places..................................................................................................... 4
•
Changed "300 kHz" to "280 kHz" ......................................................................................................................................... 11
Changes from Revision A (July 2010) to Revision B
Page
•
Changed Figure 18 X axis unit from mA to A....................................................................................................................... 19
•
Changed Figure 19 X axis unit from mA to A....................................................................................................................... 19
Changes from Original (June 2010) to Revision A
Page
•
Changed Typical Application graphic ..................................................................................................................................... 1
•
Changed value of ceramic capacitor from 0.1 to 1 µF ........................................................................................................... 3
•
Changed value of bypass capacitor from 0.1 to 1 µF .......................................................................................................... 11
•
Changed BRIGHTNESS DIMMING CONTROL section....................................................................................................... 12
•
Deleted PWM BRIGHTNESS CONTROL INTERFACE section .......................................................................................... 13
2
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5 Pin Configuration and Functions
PWMIN
VIN
FAULT
NC
SW
RTJ Package
20-Pin QFN With PowerPAD™
Top View
20
19
18
17
16
VDDIO 1
15
PGND
EN
2
14
OVP
FSW
3
13
RFPWM
/ MODE
ISET 4
12
IFB1
FPO 5
11
IFB2
6
7
8
9
10
IFB6
IFB5
IFB4
GND
IFB3
TPS61183
PowerPAD™ information goes here.
Pin Functions
PIN
TYPE
DESCRIPTION
NO.
NAME
1
VDDIO
A
Internal pre_regulator — connect a 1-µF ceramic capacitor to VDDIO
2
EN
I
Enable
3
FSW
I
Switching-frequency selection pin. Use a resistor to set the frequency between 280 kHz
to 1 MHz.
4
ISET
I
Full-scale LED current set pin. Connecting a resistor to the pin programs the current
level.
5
FPO
O
Fault protection output to indicate fault conditions including OVP, OC, and OT.
IFB1 to IFB6
A
Regulated current sink input pins
9
GND
G
Analog ground
13
RFPWM / MODE
I
Dimming frequency program pin with an external resistor / mode selection
14
OVP
A
Overvoltage clamp pin / voltage feedback
15
PGND
G
Power ground
16
SW
A
Drain connection of the internal power FET
17
NC
—
No connection
18
FAULT
O
Fault pin to drive external ISO FET
19
VIN
A
Supply input pin
20
PWMIN
I
PWM signal input pin
—
—
6, 7, 8,
10, 11, 12
PowerPAD™
Connect to GND plane for better thermal performance
A: Analog; G: Ground; I: Input: O: Output; P: Power
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Voltage range (2)
MIN
MAX
VIN, FAULT
–0.3
24
FPO
–0.3
7
SW
–0.3
40
EN, PWM, IFB1 to IFB4
–0.3
20
–0.3
3.6
on all other pins
Continuous power dissipation
UNIT
V
SeeThermal Information
Operating junction temperature range
–40
150
°C
Tstg
–65
150
°C
(1)
(2)
Storage temperature
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
6.2 ESD Ratings
VALUE
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±4000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1500
Machine model
(1)
(2)
UNIT
V
200
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage range
4.5
24
V
VOUT
Output voltage range
VIN
38
V
L1
Inductor, 600-kHz to 1-MHz switching frequency
10
22
µH
L1
Inductor, 280-kHz to 600-kHz switching frequency
22
47
µH
CI
Input capacitor
CO
Output capacitor
FPWM_O
IFBx PWM dimming frequency - frequency programmable mode
0.1
22 (1)
KHz
FPWM_O
IFBx PWM dimming frequency - direct PWM mode
0.1
50
KHz
FPWM_I
PWM input signal frequency
0.1
22
KHz
FBOOST
Boost regulator switching frequency
280
1000
KHz
TA
Operating free-air temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
(1)
4
1
1
µF
4.7
10
µF
5 µs min pulse on time.
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6.4 Thermal Information
TPS61183
THERMAL METRIC (1)
RTJ
UNITS
20 PINS
RθJA
Junction-to-ambient thermal resistance
39.9
°C/W
RθJC(top)
Junction-to-case(top) thermal resistance
34.0
°C/W
RθJB
Junction-to-board thermal resistance
9.9
°C/W
ψJT
Junction-to-top characterization parameter
0.6
°C/W
ψJB
Junction-to-board characterization parameter
9.5
°C/W
RθJC(bottom)
Junction-to-case(bottom) thermal resistance
2
°C/W
(1)
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
6.5 Electrical Characteristics
VIN = 12 V, PWM/EN = high, IFB current = 20 mA, IFB voltage = 500 mV, TA = –40°C to 85°C, typical values are at TA = 25°C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VIN
Input voltage range
Iq_VIN
Operating quiescent current into
Vin
Device enable, switching 1 MHz and no load,
VIN = 24 V
VDDIO
VDDIO pin output voltage
ILOAD = 5 mA
Shutdown current
VIN = 12 V , EN = low
11
VIN = 24 V, EN = low
16
ISD
VIN_UVLO
VIN undervoltage lockout
threshold
VIN_Hys
VIN undervoltage lockout
hysterisis
4.5
24
4
3
3.6
VIN ramp down
3.50
VIN ramp up
3.75
250
V
mA
V
µA
V
mV
PWM
VH
EN Logic high threshold
EN
2.1
VL
EN Logic low threshold
EN
VH
PWM Logic high threshold
PWM
VL
PWM Logic low threshold
PWM
RPD
Pulldown resistor on PWM and
EN
0.8
2.1
V
0.8
400
800
1600
1.204
1.229
1.253
kΩ
CURRENT REGULATION
VISET
ISET pin voltage
KISET
Current multiplier
IFB
Km
Ileak
V
980
Current accuracy (average)
IISET = 20 µA, 0°C to 70°C
Current accuracy (average)
IISET = 20 µA, –40°C to 85°C
(Imax–Imin) / IAVG
IISET = 20 µA
IFB pin leakage current
IFB voltage = 15 V, each pin
2
5
IFB voltage = 5 V, each pin
1
2
IIFB_max
Current sink max output current
IFB = 350 mV
fdim
PWM dimming frequency
RFPWM = 9.09 kΩ
–2%
2%
–2.3%
2.3%
1.3%
30
mA
20
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kHz
5
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Electrical Characteristics (continued)
VIN = 12 V, PWM/EN = high, IFB current = 20 mA, IFB voltage = 500 mV, TA = –40°C to 85°C, typical values are at TA = 25°C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BOOST OUTPUT REGULATION
VIFB_L
Output voltage up threshold
Measured on VIFB(min)
350
mV
VIFB_H
Output voltage down threshold
Measured on VIFB(min)
650
mV
0.25
POWER SWITCH
RPWM_SW
PWM FET on-resistance
VIN = 12 V
ILN_NFET
PWM FET leakage current
VSW = 40 V, TA = 25°C
0.35
Ω
2
µA
OSCILLATOR
fSW
Oscillator frequency
RFSW = 499 kΩ
Dmax
Maximum duty cycle
IFB = 0
0.8
1
1.2
MHz
94%
OC, SC, OVP AND SS
ILIM
N-Channel MOSFET current limit
D = Dmax
VCLAMP_TH
Output voltage clamp program
threshold
VOVP_IFB
IFB overvoltage threshold
Measured on the IFBx pin, IFB on
FPO Logic low voltage
I_SOURCE = 0.5 mA
2
3
A
1.9
1.95
2
12
13.5
15
V
0.4
V
V
FPO, FAULT
VFPO_L
VFAULT_HIGH Fault high voltage
Measured as VIN – VFAULT
VFAULT_LOW
Fault low voltage
Measured as VIN – VFAULT , Sink, 10 µA
IFAULT
Maximum sink current
VIN – VFAULT = 0 V
0.1
6
8
20
V
10
V
µA
THERMAL SHUTDOWN
Tshutdown
6
Thermal shutdown threshold
150
Thermal shutdown hysteresis
15
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6.6 Typical Characteristics
Table 1. Table Of Graphs
TITLE
DESCRIPTION
FIGURE
Efficiency vs load current by output voltage
VIN = 12 V, VOUT = 28 V, 32 V, 36 V, L = 10 µH
Figure 18
Efficiency vs load current by input voltage
VOUT = 32 V , VIN = 8 V, 12 V, 24 V, L = 10 µH
Figure 19
Efficiency vs PWM duty
VOUT = 32 V , VIN = 8 V, 12 V, 24 V, FDIM = 200 Hz, L = 10 µH, RISET = 62
kΩ
Figure 20
Dimming linearity
VOUT = 32 V, VIN = 8 V, 12 V, 24 V, FDIM = 20 KHz, L = 10 µH, RISET = 62
kΩ
Figure 1
Dimming linearity
VOUT = 32 V, VIN = 8 V, 12 V, 24 V, FDIM = 200 Hz, L = 10 µH, RISET = 62
kΩ
Figure 2
Boost switching frequency
VIN = 12 V, VOUT = 33.8 V, L = 10 µH, RISET = 62 kΩ
Figure 3
Programmable dimming frequency
VIN = 12 V, VOUT = 33.8 V, L = 10 µH, RISET = 62 kΩ
Figure 4
Switch waveform
VIN = 8 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 100%, L = 10 µH, RISET =
62 kΩ
Figure 5
Switch waveform
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 100%, L = 10 µH, RISET =
62 kΩ
Figure 6
Programmable PWM dimming FDIM = 200Hz,
duty = 50%
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 50%, L = 10 µH, RISET =
62 kΩ
Figure 7
Programmable PWM dimming FDIM = 20KHz,
duty = 50%
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 50%, L = 10 µH, RISET =
62 kΩ
Figure 8
Output ripple of programmable PWM dimming
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 50%, L = 10 µH, RISET =
62 kΩ
Figure 9
Output ripple of programmable PWM dimming
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 70%, L = 10 µH, RISET =
62 kΩ
Figure 10
Start-up waveform
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 100%, L = 10 µH, RISET =
62 kΩ
Figure 11
Start-up waveform
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 50%, L = 10 µH, RISET =
62 kΩ
Figure 12
0.12
0.12
FDIM = 20 KHz
FDIM = 200 Hz
0.1
0.1
VI = 8 V
IO - Output Current - A
IO - Output Current - A
VI = 8 V
0.08
VI = 24 V
VI = 12 V
0.06
0.04
VI = 12 V
VI = 24 V
0.06
0.04
0.02
0.02
0
0
0.08
10
20
30
40
50
60
70
Dimming duty cycle - %
80
90
100
0
0
10
20
30
40
50
60
70
Dimming duty cycle - %
80
90
100
Figure 2. Dimming Linearity
Figure 1. Dimming Linearity
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1100
20000
VI = 8 V
VI = 8 V
15000
Dimming Frequency - Hz
fs - Switching Frequency - Hz
1000
900
800
700
10000
5000
600
500
500
600
700
800
RFSW - kW
900
1000
0
10
Figure 3. Boost Switching
210
310
410
510
610
RFPWM - kW
710
810
910
Figure 4. Programmable Dimming
VO
100 mV/div
AC
VO
100 mV/div
AC
SW
20 V/div
DC
SW
20 V/div
DC
Inductor
Current
500 mA/div
DC
Inductor
Current
500 mA/div
DC
Figure 5. Switch Waveform
Figure 6. Programmable PWM Waveform
IFB1
10 V/div
DC
IFB1
10 V/div
DC
IFB2
10 V/div
DC
IFB2
10 V/div
DC
IFB3
10 V/div
DC
IFB3
10 V/div
DC
Output
Current
50 mA/div
DC
Output
Current
50 mA/div
DC
Figure 7. Programmable PWM Waveform
8
110
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Figure 8. Programmable PWM Waveform
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IFB1
10 V/div
DC
IFB1
10 V/div
DC
IFB2
10 V/div
DC
IFB2
10 V/div
DC
VO
100 mV/div
AC
VO
100 mV/div
AC
Output
Current
50 mA/div
DC
Output
Current
50 mA/div
DC
Figure 9. Output Ripple Waveform
Figure 10. Output Ripple Waveform
EN
5 V/div
DC
EN
5 V/div
DC
VDDIO
5 V/div
DC
VDDIO
5 V/div
DC
VO
10 mV/div
AC
VO
10 mV/div
AC
Output
Current
50 mA/div
DC
Output
Current
50 mA/div
DC
Figure 11. Start-Up Waveform
Figure 12. Start-Up Waveform
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7 Detailed Description
7.1 Overview
The TPS61183 is a high-efficiency, high output-voltage, white-LED driver for notebook panel backlighting
applications. The advantages of white LEDs compared to CCFL backlights are higher power efficiency and lower
profile design. Due to the large number of white LEDs required to provide backlighting for medium-to-large
display panels, the LEDs must be arranged in parallel strings of several LEDs in series. Therefore, the backlight
driver for battery-powered systems is almost always a boost regulator with multiple current sink regulators. For
normal operation there must be enough white LEDs in series to ensure the output voltage stays above the input
voltage range. Having more white LEDs in series reduces the number of parallel strings, and therefore improves
overall current matching. However, the efficiency of the boost regulator declines due to the need for high output
voltage.
The TPS61183 device has integrated all of the key function blocks to power and control up to 60 white LEDs.
The device includes a 40-V, 2-A boost regulator, six 30-mA current sink regulators, and a protection circuit for
overcurrent, overvoltage, open LED, short LED, and output short-circuit failures. The device integrates
programmable PWM dimming methods with the PWM interface to control output dimming frequency
independently with input frequency. An optional direct PWM mode is user selectable through the RFPWM/MODE
selection function.
7.2 Functional Block Diagram
Optional
L
Diode
VIN
C1
2.2 mF
R5
OUTPUT
C4
C3
1 mF
FAULT
VIN
19
VDDIO
VDD_GPIO
1
NC
18
Fault
Protection
Linear
Regulator
17
SW
Fault
Condition
OVP
Protection
C2
1 uF
R
R3
16
OVP
14
R4
Q
S
PGND
15
FPO
Slope
Compensation
5
Optional
S
A
Comp
3
Error
Amp
Oscillator
D
Detector
R7
RFPO
M
U
X
Vref
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
R3
FSW
12
IFB1
EA
ISET
4
Current Mirror
Maximum
LED current
PWM
EN
Direct
PWM
/
Program
-mable
PWM
R1
R5
Dimming
Control
PWMIN
20
Current Sink
9
AGND
Current Sink
11
IFB2
Current Sink
10
IFB3
Current Sink
8
IFB4
Current Sink
7
IFB5
Current Sink
6
IFB6
RFPWM/MODE
Optional
13
EN
10
R4
EN
2
Shutdown
IFB no use
OCP
Protection
TSD
Protection
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Open / Short
LED
R2
9.09 KW
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7.3 Feature Description
7.3.1 Supply Voltage
The TPS61183 device has a built-in linear regulator to supply the device analog and logic circuit. The VDDIO pin,
output of the regulator, is connected to a 1-µF bypass capacitor for the regulator to be controlled in a stable loop.
VDDIO does not have high current sourcing capability for external use but it can be tied to the EN pin for startup.
7.3.2 Boost Regulator and Programmable Switch Frequency (FSCLT)
The fixed-frequency PWM boost converter uses current-mode control and has integrated loop compensation.
The internal compensation ensures stable output over the full input and output voltage ranges assuming the
recommended inductance and output capacitance values in Equation 1 are used. The output voltage of the boost
regulator is automatically set by the device to minimize voltage drop across the IFB pins. The device regulates
the lowest IFB pin to 350 mV and constantly adjusts the boost output voltage to account for any changes in LED
forward voltages. If the input voltage is higher than the sum of the white LED forward voltage drops (for example,
at low duty cycles), the boost converter is not able to regulate the output due to its minimum duty cycle limitation.
In this case, increase the number of WLEDs in series or include series ballast resistors in order to provide
enough headroom for the converter to boost the output voltage. Because the TPS61183 integrates a 40-V, 2-A
power MOSFET, the boost converter can provide up to a 38-V output voltage.
The TPS61183 switching frequency can be programmed between 280 kHz to 1 MHz by the resistor value on the
FSW pin according to Equation 1:
FSW =
5 ´ 1011
RFSW
where
•
RFSW = FSW pin resistor
(1)
See Figure 3 for boost converter switching frequency adjustment resistor RFSW selection.
The adjustable switching frequency feature provides the user with the flexibility of choosing the switching
frequency. A faster switching frequency allows for an inductor with smaller inductance and footprint while a
slower switching frequency could potentially yield higher efficiency due to lower switching losses. Use Equation 1
or refer to Table 2 to select the correct value:
Table 2. RFSW Recommendations
RFLCT
ƒSW
833 kΩ
600 KHz
625 kΩ
800 KHz
499 kΩ
1 MHz
7.3.3 LED Current Sinks
The six current-sink regulators embedded in the TPS61183 can be collectively configured to provide up to a
maximum of 30 mA each. These six specialized current sinks are accurate to within ±2% max for currents at 20
mA, with a string-to-string difference of ±1.5% typical.
The IFB current must be programmed to the highest WLED current expected using the ISETH pin resistor and
Equation 2.
V
IFB = ISETH ´ KISET
RISETH
where
•
•
•
KISET = 980 (current multiple)
VISETH = 1.229 V (ISETH pin voltage)
RISETH = ISETH pin resistor
(2)
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7.3.4 Enable and Start-Up
The internal regulator which provides VDDIO wakes up as soon as VIN is applied even when EN is low. This
allows the device to start when EN is tied to the VDDIO pin; however, VDDIO does not come to full regulation
until EN is high. The TPS61183 checks the status of all current feedback channels and shuts down any unused
feedback channels. TI recommends shorting the unused channels to ground for faster start-up.
After the device is enabled, if the PWMIN pin is left floating, the output voltage of the TPS61183 regulates to the
minimum output voltage. Once the device detects a voltage on the PWMIN pin, the TPS61183 begins to regulate
the IFB pin current, as pre-set per the ISETH pin resistor, according to the duty cycle of the signal on the PWMIN
pin. The boost converter output voltage rises to the appropriate level to accommodate the sum of the white LED
string with the highest forward voltage drops plus the headroom of the current sink at that current.
Pulling the EN pin low shuts down the device, resulting in the device consuming less than 11 µA in shutdown
mode.
7.3.5 IFB Pin Unused
The TPS61183 has open/short string detection. For an unused IFB string, simply short it to ground or leave it
open. TI recommends shorting unused IFB pins to ground for faster start-up.
7.4 Device Functional Modes
7.4.1 Brightness Dimming Control
The TPS61183 has programmable PWM dimming control with the PWM control interface.
The internal decoder block detects duty cycle information from the input PWM signal, saves it in an eight bit
register and delivers it to the output PWM dimming control circuit. The output PWM dimming control circuit turns
on/off six output current sinks at the PWM frequency set by RFPWM and the duty cycle from the decoder block.
The TPS61183 also has direct PWM dimming control with the PWM control interface. In direct PWM mode, each
current sink turns on/off at the same frequency and duty cycle as the input PWM signal. See Mode Selection –
Programmable PWM Dimming or Direct PWM Dimming for dimming mode selection.
When in programmable PWM mode, TI recommends inserting a series resistor of 10-kΩ to 20-kΩ value close to
PWMIN pin. This resistor together with an internal capacitor forms a low pass R-C filter with 30-ns to 60-ns time
constant. This prevents possible high frequency noises being coupled into the input PWM signal and causing
interference to the internal duty cycle decoding circuit. However, it is not necessary for direct PWM mode
because the duty cycle decoding circuit is disabled during the direct PWM mode.
7.4.2 Adjustable PWM Dimming Frequency and Mode Selection (R_FPWM/MODE)
The TPS61183 can operate in programmable mode or direct PWM mode. Tying the RFPWM/MODE pin to
VDDIO forces the device to operate in direct PWM mode. Alternatively, a resistor between the RFPWM/MODE
pin and ground sets the device into programmable mode with the value of the resistor determines the PWM
dimming frequency. Use Equation 3 or refer to Table 3 to select the correct value:
FDIM =
1.818 ´ 108
RFPWM
where
•
RFPWM = RFPWM pin resistor
(3)
Table 3. RFPWM Recommendations
12
RFPWM
FDIM
866 kΩ
210 Hz
437 kΩ
420 Hz
174 kΩ
1.05 kHz
9.09 kΩ
20 kHz
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7.4.3 Mode Selection – Programmable PWM Dimming or Direct PWM Dimming
The programmable dimming method or direct PWM dimming method can be selected through the
RFPWM/MODE pin. By attaching an external resistor to the RFPWM/MODE pin, the default programmable PWM
mode can be selected. To select direct PWM mode, the RFPWM/MODE pin needs to be tied to the VDDIO pin.
The RFPWM/MODE pin can be noise sensitive when R2 has high impedance. In this case, careful layout or a
parallel bypassing capacitor improves noise sensitivity but the value of the parallel capacitor may not exceed 33
pF for oscillator stability.
VDDIO
RFPWM
/MODE
Pin 13
R2
9.09 KW
RFPWM
/MODE
10 pF
Pin 13
Figure 13. Programmable Dimming Mode Selection
Figure 14. Direct PWM Dimming Mode Selection
7.4.4 Direct PWM Dimming
In direct PWM mode, all current feedback channels are turned on and off and are synchronized with the input
PWM signal.
PWM
IFB_CH1
IFB_CH2
IFB_CH3
IFB_CH4
IFB_CH5
IFB_CH6
Input PWM frequency and 6 - CH output dimming frequency are exactly same.
Figure 15. Direct PWM Dimming Timing Diagram
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7.4.5 Overvoltage Clamp and Voltage Feedback (OVP/FB)
The overvoltage clamp prevents the boost converter from being damaged due to overvoltage in the event there
are no LEDs or failed LEDs in the feedback path. The correct divider ratio is important for optimum operation of
the TPS61183. It can be noise sensitive if Rupper and Rdown have high impedance. Careful layout is required.
Also, choose lower resistance values for Rupper and Rdown when power dissipation allows. Use the following
guidelines to choose the divider value:
1. Determine the maximum output voltage, VO, for the system according to the number of series WLEDs.
2. Select an Rupper resistor value (1 MΩ for a typical application; a lower value such as 100 kΩ for a noisy
environment).
3. Calculate Rdown using Equation 4.
æ Rupper
ö
VOVP = ç
+1÷ ´ VOV_TH
è R down
ø
where
•
VOV_TH = 1.95 V
(4)
When the device detects that the OVP pin exceeds 1.95 V typical, indicating that the output voltage is over the
set threshold point, the OVP circuitry clamps the output voltage to the set threshold.
7.4.6 Current Sink Open Protection
For the TPS61183, if one of the WLED strings is open, the device automatically detects and disables that string.
The device detects the open WLED string by sensing no current in the corresponding IFB pin. As a result, the
device deactivates the open IFB pin and removes it from the voltage feedback loop. Subsequently, the output
voltage drops and is regulated to the minimum voltage required for the connected WLED strings. The IFB current
of the connected WLED strings remains in regulation.
If any IFB pin voltage exceeds the IFB overvoltage threshold (13.5 V typical), the device turns off the
corresponding current sink and removes this IFB pin from the regulation loop. The current regulation of the
remaining IFB pins is not affected. This condition often occurs when there are several shorted WLEDs in one
string. WLED mismatch typically does not create large voltage differences among WLED strings.
The device only shuts down if it detects that all of the WLED strings are open. If an open string is reconnected
again, a power-on reset (POR) or EN pin toggling is required to reactivate a previously deactivated string.
7.4.7 Overcurrent and Short-Circuit Protection
The TPS61183 has a pulse-by-pulse over-current limit of 2 A (minimum). The PWM switch turns off when the
inductor current reaches this current threshold. The PWM switch remains off until the beginning of the next
switching cycle. This protects the deviceand external components during on overload conditions. When there is a
sustained overcurrent condition, the device turns off and requires a POR or EN pin toggling to restart. Under
severe overload and/or short-circuit conditions, the boost output voltage can be pulled below the required
regulated voltage to keep all of the white LEDs operating. Under this condition, the current flows directly from
input to output through the inductor and Schottky diode. To protect the TPS61183, the device shuts down
immediately. The device restarts after input POR or EN pin toggling.
7.4.8 Thermal Protection
When the junction temperature of the TPS61183 device is over 150°C, the thermal protection circuit is triggered
and shuts down the device immediately. Only a POR or EN pin toggling clears the protection and restarts the
device.
7.4.9 Programmable PWM Dimming
FDIM is the PWM dimming frequency which is determined by the value of RFPWM on the RFPWM/MODE pin.
Figure 16 provides the detailed timing diagram of the programmable PWM dimming mode.
14
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PWM
25%
IFB _CH1
IFB _CH2
IFB _CH3
IFB _CH4
IFB _CH5
IFB _CH6
25%
Figure 16. Programmable PWM Dimming Timing Diagram
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS61183 provides a high-performance LED lighting solution for tablets, notebooks, monitors, and a variety
of industrial designs. The device can drive 6 strings of 10 series LEDs in a compact and high efficient solution.
The TPS61183 provides a gate driver to an external P channel MOSFET which can be turned off during device
shutdown or fault condition.
8.2 Typical Application
L1
10 mH
4.5V~24V
D1
C3
4.7 mF
C1
2.2 mF
R4
Open
R5
VIN
FAULT
VDDIO
C2
1 mF
R7
1.2 KW
SW
PGND
OVP
EN
FSW
R8
10 KW
R3
499 KW
TPS61183
PWMIN
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
VDD_GPIO
R1
62 KW
Open
ISET
FPO
AGND
19.8 mA
RFPWM
/MODE
R2
9.09 KW
Figure 17. TPS61183 Typical Application
8.2.1 Design Requirements
For typical white-LED driver applications, use the parameters listed in Table 4.
Table 4. Design Parameters
DESIGN PARAMETER
16
EXAMPLE VALUE
Input voltage
4.5 V to 24 V
Output voltage
38 V (maximum)
LED string current
30 mA (maximum)
Switching frequency
280 kHz to 1 MHz
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8.2.2 Detailed Design Procedure
8.2.2.1 Inductor Selection
Because selection of the inductor affects power supply steady-state operation, transient behavior, and loop
stability, the inductor is the most important component in switching-power-regulator design. There are three
specifications most important to the performance of the inductor: inductor value, DC resistance, and saturation
current. The TPS61183 is designed to work with inductor values between 10 µH and 47 µH. A 10-µH inductor is
typically available in a smaller or lower profile package, while a 47-µH inductor may produce higher efficiency
due to a slower switching frequency and/or lower inductor ripple. If the boost output current is limited by the
overcurrent protection of the device, using a 10-µH inductor and the highest switching frequency maximizes
controller output current capability.
Internal loop compensation for PWM control is optimized for the external component values, including typical
tolerances, recommended in Table 5. Inductor values can have ±20% tolerance with no current bias. When the
inductor current approaches saturation level, its inductance can decrease 20% to 35% from the 0-A value
depending on how the inductor vendor defines saturation. In a boost regulator, the inductor DC current can be
calculated with Equation 5.
Vout ´ Iout
IDC =
Vin ´ h
where
•
•
•
•
VOUT = boost output voltage
IOUT = boost output current
VIN = boost input voltage
η = power conversion efficiency, use 90% for TPS61183 applications
(5)
The inductor current peak-to-peak ripple can be calculated with Equation 6.
1
IPP =
1
1 ö
æ
L ´ ç
+
÷ ´ FS
è Vout - Vin Vin ø
where
•
•
•
•
•
IPP = inductor peak-to-peak ripple
L = inductor value
FS = switching frequency
VOUT = boost output voltage
VIN = boost input voltage
(6)
Therefore, the peak current seen by the inductor is calculated with Equation 7.
I
IP = IDC + PP
2
(7)
Select an inductor with a saturation current over the calculated peak current. To calculate the worst-case inductor
peak current, use the minimum input voltage, maximum output voltage, and maximum load current.
Regulator efficiency is dependent on the resistance of its high current path and switching losses associated with
the PWM switch and power diode. Although the TPS61183 device has optimized the internal switch resistance,
the overall efficiency is affected by the inductor DC resistance (DCR). Lower DCR improves efficiency. However,
there is a trade-off between DCR and inductor footprint; furthermore, shielded inductors typically have higher
DCR than unshielded ones. Table 5 lists the recommended inductors.
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Table 5. Recommended Inductors for TPS61183
L (µH)
DCR (mΩ)
ISAT (A)
Size (L × W × H mm)
A915AY – 4R7M
4.7
38
1.87
5.2 × 5.2 × 3.0
A915AY – 100M
10
75
1.24
5.2 × 5.2 × 3.0
SLF6028T – 4R7N1R6
4.7
38
1.87
5.2 × 5.2 × 3.0
SLF6028T – 4R7N1R6
10
75
1.24
5.2 × 5.2 × 3.0
TOKO
TDK
8.2.2.2 Output Capacitor Selection
The output capacitor is mainly selected to meet the requirement for output ripple and loop stability. This ripple
voltage is related to the capacitance of the capacitor and its equivalent series resistance (ESR). Assuming a
capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated with Equation 8:
(Vout - Vin ) ´ Iout
Cout =
Vout ´ FS ´ Vripple
where
•
Vripple = peak-to-peak output ripple
(8)
. The additional part of the ripple caused by ESR is calculated using:
Additionally, it is sometimes necessary to be aware of the output ripple voltage due to the ESR of the output
capacitor where Vripple_ESR = IOUT × RESR. Due to its low ESR, Vripple_ESR can be neglected for ceramic
capacitors, but must be considered if tantalum or electrolytic capacitors are used. The controller output voltage
also ripples due to the load transient that occurs during PWM dimming. The TPS61183 adopts a patented
technology to limit this type of output ripple even with the minimum recommended output capacitance. In a
typical application, the output ripple is less than 250 mV during PWM dimming with a 4.7-µF output capacitor.
However, the output ripple decreases with higher output capacitances.
8.2.2.3 Isolation FET Selection
The TPS61183 provides a gate driver to an external P channel MOSFET which can be turned off during device
shutdown or fault condition. This MOSFET can provide a true shutdown function and also protect the battery
from output short-circuit conditions. The source of the PMOS must be connected to the input, and a pullup
resistor is required between the source and gate of the FET to keep the FET off during device shutdown. To turn
on the isolation FET, the FAULT pin is pulled low and clamped at 8 V below the VBAT pin voltage. During device
shutdown or fault condition, the isolation FET is turned off, and the input voltage is applied on the isolation
MOSFET. During a short-circuit condition, the catch diode (D2 in the typical application circuit) is forward biased
when the isolation FET is turned off. The drain of the isolation FET swings below ground. The voltage across the
isolation FET can be momentarily greater than the input voltage. Therefore, select a 30-V PMOS for a 24-V
maximum input. The on resistance of the FET has a large impact on power conversion efficiency because the
FET carries the input voltage. Select a MOSFET with Rds(on) less than 100 mΩ to limit the power losses.
18
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8.2.3 Application Curves
100
100
VI = 12 V
VO = 32 V
Efficiency - %
VO = 32 V
VO = 36 V
90
90
VI = 8 V
85
85
80
0
VI = 12 V
95
Efficiency - %
VO = 28 V
95
VI = 24 V
80
0.05
0.1
0.15
IL - Load current - A
0.2
0.25
0
Figure 18. Efficiency vs Load Current By Output Voltage
0.05
0.1
0.15
IL - Load current - A
0.2
0.25
Figure 19. Efficiency vs Load Current By Input Voltage
100
VI = 8 V
80
VI = 24 V
Efficiency - %
VI = 12 V
60
40
20
VO = 30 V
0
0
10
20
30
40
50
60
PWM duty - %
70
80
90
100
Figure 20. Efficiency vs PWM Duty
9 Power Supply Recommendations
The TPS61183 device requires a single-supply input voltage able to supply enough current for a given
application. This voltage can range between 4.5 V to 24 V.
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10 Layout
10.1 Layout Guidelines
As for all switching power supplies, especially those providing high current and using high switching frequencies,
layout is an important design step. If layout is not carefully done, the regulator could show instability as well as
EMI problems. Therefore, use wide and short traces for high-current paths. The input capacitor, C1 in the typical
application circuit (see Typical Programmable PWM-Mode Application), must be close to the VIN pin, as well as
to the GND pin in order to reduce the input ripple detected by the device. The input capacitor, C1 in the typical
application circuit, must also be placed close to the inductor. C2 is the filter and noise decoupling capacitor for
the internal linear regulator powering the internal digital circuits. Place C2 as close as possible between the
VDDIO and AGND pins to prevent any noise insertion to the digital circuits. The SW pin carries high current with
fast rising and falling edges. Therefore, keep the connection between the pin to the inductor and Schottky diode
as short and wide as possible. It is also beneficial to have the ground of the output capacitor C3 close to the
PGND pin as there is a large ground return current flowing between them. When laying out signal grounds, TI
recommends using short traces separated from power ground traces, connected together at a single point, for
example on the thermal pad. The thermal pad must be soldered on to the PCB and connected to the GND pin of
the device. An additional thermal via can significantly improve device power dissipation.
10.2 Layout Example
VIN
OUT
L1
C1
C3
D1
SW
VIN
PWMIN
R8
20
C2
19
PGND
18
17
16
R4
15
VDDIO 1
OVP
EN 2
R7
14
TPS61183
FSW 3
13
RFPWM
OUT
R5
R2
12
IS
E
T
4
= Layer 1 Routing
R3
11
5
R1
6
= Layer 2 Routing
7
8
9
10
IFB1
IFB2
IFB3
= Via
GND
Pin 5 = FPO
IFB4
Pin 17 = NC
IFB5
Pin 18 = FAULT
IFB6
Figure 21. TPS61183 Layout
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS61183RTJR
ACTIVE
QFN
RTJ
20
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPS
61183
TPS61183RTJT
ACTIVE
QFN
RTJ
20
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPS
61183
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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