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TPS61187
SLVSA85E – JUNE 2010 – REVISED DECEMBER 2016
TPS61187 White-LED Driver For Notebooks With PWM Interface and
Automatic Phase Shift
1 Features
•
•
•
•
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
2 Applications
Notebook LCD Display Backlight
Input Voltage 4.5 V to 24 V
Maximum Output Voltage 38 V
Integrated 2-A, 40-V MOSFET
Programmable Switching Frequency 300 kHz to
1 MHz
Adaptive Boost Output to WLED Voltages
Wide PWM Dimming Frequency Range
– 100 Hz to 50 KHz for Direct PWM Mode
– 100 Hz to 22 KHz for Frequency
Programmable Mode
100:1 Dimming Ratio at 20 kHz
10000:1 Dimming Ratio at 200 Hz (Direct PWM
mode)
Small External Components
Integrated Loop Compensation
Six Current Sinks of 30 mA Maximum
1.5% (Typical) Current Matching
PWM Brightness Interface Control
PWM Phase Shift Mode Brightness Dimming
Method or Direct PWM Dimming Method
HBM ESD Protection 4 kV
Programmable Overvoltage Threshold
Built-in WLED Open/Short Protection
Thermal Shutdown
3 Description
The TPS61187 device provides a highly integrated
white-light-emitting-diode (WLED) driver solution for
notebook LCD backlight. This device has a built-in
high efficiency boost regulator with integrated 2-A,
40-V power MOSFET. The six current sink regulators
provide high precision current regulation and
matching. In total, the device can support up to 60
WLEDs. In addition, the boost output automatically
adjusts its voltage to the WLED forward voltage to
optimize efficiency.
The TPS61187 supports the automatic phase-shiftdimming method and direct-PWM-dimming method.
During phase-shift-PWM dimming, the WLED current
is turned on and turned off at the duty cycle
controlled by the input PWM signal, and each
channel is shifted according to the frequency
determined by an integrated pulse-width-modulation
(PWM) signal. The frequency of this signal is resistor
programmable, while the duty cycle is controlled
directly from an external PWM signal input to the
PWM pin. During direct PWM dimming, the WLED
current is turned on and/or turned off synchronized
with the input PWM signal.
Device Information(1)
PART NUMBER
TS61183
PACKAGE
WQFN (20)
BODY SIZE (NOM)
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application – Phase Shift PWM Mode
L1
10uH
4.5V~24V
D1
C3
4.7uF
C1
2.2uF
R4
Open
R5
VIN
C2
1.0 uF
R7
1.2 KW
FAULT
VDDIO
SW
PGND
OVC
EN
FSLCT
R8
10 KW
R3
499 KW
TPS61187
PWM
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
VDD_GPIO
R1
62 KW
Open
ISET
FPO
AGND
19.8 mA
RFPWM
/MODE
R2
9.09 KW
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61187
SLVSA85E – JUNE 2010 – REVISED DECEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
5
5
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 12
8
Application and Implementation ........................ 17
8.1 Application Information............................................ 17
8.2 Typical Application ................................................. 17
9 Power Supply Recommendations...................... 20
10 Layout................................................................... 21
10.1 Layout Guidelines ................................................. 21
10.2 Layout Example .................................................... 21
11 Device and Documentation Support ................. 22
11.1
11.2
11.3
11.4
11.5
11.6
Device Support......................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
22
22
22
22
22
22
12 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (February 2012) to Revision E
Page
•
Added Device Information and Pin Configuration and Functions sections, ESD Ratings and Thermal Information
tables, Feature Description, Device Functional Modes, Application and Implementation, Power Supply
Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable
Information sections................................................................................................................................................................ 1
•
Deleted Ordering table - information in POA ......................................................................................................................... 1
•
Added last 2 sentences of IFB Pin Unused ......................................................................................................................... 12
Changes from Revision C (September 2011) to Revision D
Page
•
Changed Figure 18 X axis unit from mA to A....................................................................................................................... 20
•
Changed Figure 19 X axis unit from mA to A....................................................................................................................... 20
Changes from Revision B (April 2011) to Revision C
•
Added a description paragraph and replaced Figure 15 in the PHASE SHIFT PWM DIMMING section ............................ 13
Changes from Revision A (July 2010) to Revision B
•
Page
Page
Changed in ABS MAX table, in row "All other pins", MAX col: from 3.6 to 3.7 ...................................................................... 4
Changes from Original (June 2010) to Revision A
Page
•
Changed Typical Application graphic ..................................................................................................................................... 1
•
Changed ceramic capacitor value, attached to VDDIO, from 0.1 to 1 µF .............................................................................. 3
•
Changed bypass capacitor value in SUPPLY VOLTAGE section from 0.1 to 1 µF............................................................. 11
•
Changed BRIGHTNESS DIMMING CONTROL section....................................................................................................... 12
•
Deleted PWM BRIGHTNESS CONTROL INTERFACE section .......................................................................................... 13
2
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SLVSA85E – JUNE 2010 – REVISED DECEMBER 2016
5 Pin Configuration and Functions
PWM
VIN
FAULT
NC
SW
RTJ Package
20-Pin QFN With Thermal Pad
Top View
20
19
18
17
16
VDDIO 1
15
PGND
2
14
OVC
13
RFPWM
/ MODE
ISET 4
12
IFB1
FPO 5
11
IFB2
EN
TPS61187
6
7
8
9
10
IFB6
IFB5
IFB4
GND
IFB3
FSLCT 3
Pin Functions
PIN
TYPE
DESCRIPTION
NO.
NAME
1
VDDIO
A
Internal pre-regulator. Connect a 1-µF ceramic capacitor to VDDIO.
2
EN
I
Enable
3
FSLCT
I
Switching frequency selection pin. Use a resistor to set the frequency between 300 kHz
to 1 MHz.
4
ISET
I
Full-scale LED current set pin. Connecting a resistor to the pin programs the current
level.
5
FPO
O
Fault protection output to indicate fault conditions including OVP, OC, and OT.
IFB1 to IFB6
A
Regulated current sink input pins
9,
GND
G
Analog ground
13
RFPWM / MODE
I
Dimming frequency program pin with an external resistor / mode selection, see (1)
14
OVC
A
Overvoltage clamp pin / voltage feedback, see (1)
15
PGND
G
Power ground
16
SW
A
Drain connection of the internal power FET
17
NC
—
No connection
18
FAULT
O
Fault pin to drive external ISO FET
19
VIN
A
Supply input pin
20
PWM
I
PWM signal input pin
—
Thermal Pad
—
6, 7, 8,
10,11,12
Connect to GND plane for better thermal performance.
A: Analog; G: Ground; I: Input: O: Output; P: Power
(1)
See Application and Implementation for details.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
Voltage range (2)
(1)
MIN
MAX
UNIT
VIN, FAULT
–0.3
24
V
FPO
–0.3
7
V
SW
–0.3
40
V
EN, PWM, IFB1 to IFB4
–0.3
20
V
VDDIO
–0.3
3.7
V
All other pins
–0.3
3.6
V
Continuous power dissipation
See Thermal Information
Operating junction temperature range
–40
150
°C
Storage temperature range, Tstg
–65
150
°C
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
6.2 ESD Ratings
VALUE
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±4000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1500
Machine model
(1)
(2)
UNIT
V
200
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage
4.5
24
V
VOUT
Output voltage
VIN
38
V
L1
Inductor, 600-kHz to 1-MHz switching frequency
10
22
µH
L1
Inductor, 300-kHz to 600-kHz switching frequency
22
47
µH
CI
Input capacitor
CO
Output capacitor
FPWM_O
IFBx PWM dimming frequency - frequency programmable mode
0.1
22 (1)
KHz
FPWM_O
IFBx PWM dimming frequency - direct PWM mode
0.1
50
KHz
FPWM_I
PWM input signal frequency
0.1
22
KHz
FBOOST
Boost regulator switching frequency
300
1000
KHz
TA
Operating free-air temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
(1)
4
1
1
µF
4.7
10
µF
5-µs minimum pulse on time.
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6.4 Thermal Information
TPS61187
THERMAL METRIC (1)
RTJ (WQFN)
UNIT
20 PINS
RθJA
Junction-to-ambient thermal resistance
39.9
°C/W
RθJC(top)
Junction-to-case(top) thermal resistance
34.0
°C/W
RθJB
Junction-to-board thermal resistance
9.9
°C/W
ψJT
Junction-to-top characterization parameter
0.6
°C/W
ψJB
Junction-to-board characterization parameter
9.5
°C/W
RθJC(bottom)
Junction-to-case(bottom) thermal resistance
2
°C/W
(1)
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
6.5 Electrical Characteristics
VIN = 12 V, PWM/EN = high, IFB current = 20 mA, IFB voltage = 500 mV, TA = –40°C to +85°C, typical values are at TA =
25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VIN
Input voltage range
4.5
IQ_VIN
Operating quiescent current into VIN
Device enable, switching 1 MHz and
no load,
VIN = 24 V
VDDIO
VDDIO pin output voltage
ILOAD = 5 mA
ISD
Shutdown current
VIN_UVLO
VIN undervoltage lockout threshold
VIN_Hys
VIN undervoltage lockout hysterisis
3
3.3
24
V
4
mA
3.6
VIN = 12 V , EN = low
11
VIN = 24 V, EN = low
16
VIN ramp down
3.5
VIN ramp up
3.75
250
V
µA
V
mV
PWM
VH
EN logic high threshold
EN
VL
EN logic low threshold
EN
VH
PWM logic high threshold
PWM
VL
PWM logic low threshold
PWM
RPD
Pulldown resistor on PWM and EN
2.1
0.8
2.1
V
0.8
400
800
1600
kΩ
1.204
1.229
1.253
V
CURRENT REGULATION
VISET
ISET pin voltage
KISET
Current multiplier
IFB
Current accuracy
Km
(Imax–Imin) / IAVG
Ileak
IFB pin leakage current
IIFB_max
Current sink max output current
IFB = 350 mV
fdim
PWM dimming frequency
RFPWM = 9.09 kΩ
980
IISET = 20 µA, 0°C to 70°C
IISET = 20 µA, –40°C to 85°C
–2%
2%
–2.3%
2.3%
IISET = 20 µA
1.3%
IFB voltage = 15 V, each pin
2
5
IFB voltage = 5 V, each pin
1
2
30
mA
20
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µA
kHz
5
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Electrical Characteristics (continued)
VIN = 12 V, PWM/EN = high, IFB current = 20 mA, IFB voltage = 500 mV, TA = –40°C to +85°C, typical values are at TA =
25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BOOST OUTPUT REGULATION
VIFB_L
Output voltage up threshold
Measured on VIFB(min)
350
mV
VIFB_H
Ouput voltage down threshold
Measured on VIFB(min)
650
mV
0.25
POWER SWITCH
RPWM_SW
PWM FET on-resistance
VIN = 12 V
ILN_NFET
PWM FET leakage current
VSW = 40 V, TA = 25°C
0.35
Ω
2
µA
OSCILLATOR
fS
Oscillator frequency
RFSW = 499 kΩ
Dmax
Maximum duty cycle
IFB = 0
0.8
1
1.2
MHz
94%
OC, SC, OVP, AND SS
ILIM
N-channel MOSFET current limit
D = Dmax
VCLAMP_TH
Ouput voltage clamp program
threshold
VOVP_IFB
IFB overvoltage threshold
Measured on the IFBx pin, IFB on
VFPO_L
FPO Logic low voltage
I_SOURCE = 0.5 mA
VFAULT_HIGH
Fault high voltage
Measured as VIN – VFAULT
VFAULT_LOW
Fault low voltage
Measured as VIN – VFAULT , Sink, 10
µA
IFAULT
Maximum sink current
VIN – VFAULT = 0 V
2
3
A
1.90
1.95
2
V
12
13.5
15
V
0.4
V
FPO, FAULT
0.1
6
8
20
V
10
V
µA
THERMAL SHUTDOWN
Tshutdown
6
Thermal shutdown threshold
150
Thermal shutdown hysteresis
15
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°C
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6.6 Typical Characteristics
6.6.1 Table Of Graphs
TITLE
DESCRIPTION
FIGURE
Dimming linearity
VOUT = 32 V, VIN = 8 V, 12 V, 24 V, FDIM = 20 KHz, L = 10 µH, RISET = 62 kΩ
Figure 1
Dimming linearity
VOUT = 32 V, VIN = 8 V, 12 V, 24 V, FDIM = 200 Hz, L = 10 µH, RISET = 62 kΩ
Figure 2
Boost switching frequency
VIN = 12 V, VOUT = 33.8 V, L = 10 µH, RISET = 62 kΩ
Figure 3
Phase shift dimming frequency
VIN = 12 V, VOUT = 33.8 V, L = 10 µH, RISET = 62 kΩ
Figure 4
Switch waveform
VIN = 8 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 100%, L = 10 µH, RISET = 62 kΩ
Figure 5
Switch waveform
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 100%, L = 10 µH, RISET = 62
kΩ
Figure 6
Phase shift PWM dimming FDIM = 200Hz,
duty = 50%
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 45%, L = 10 µH, RISET = 62 kΩ
Figure 7
Phase shift PWM dimming FDIM = 20KHz,
duty = 50%
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 51%, L = 10 µH, RISET = 62 kΩ
Figure 8
Output ripple of Phase shift PWM
dimming
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 50%, L = 10 µH, RISET = 62 kΩ
Figure 9
Output ripple of Phase shift PWM
dimming
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 70%, L = 10 µH, RISET = 62 kΩ
Figure 10
Start-up waveform
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 100%, L = 10 µH, RISET = 62
kΩ
Figure 11
Start-up waveform
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 50%, L = 10 µH, RISET = 62 kΩ
Figure 12
0.12
0.12
FDIM = 20 KHz
FDIM = 200 Hz
0.1
0.1
VI = 8 V
IO - Output Current - A
IO - Output Current - A
VI = 8 V
0.08
VI = 24 V
VI = 12 V
0.06
0.04
VI = 12 V
VI = 24 V
0.06
0.04
0.02
0.02
0
0
0.08
10
20
30
40
50
60
70
Dimming duty cycle - %
80
90
100
0
0
10
20
30
40
50
60
70
Dimming duty cycle - %
80
90
100
Figure 2. Output Current
Figure 1. Output Current
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1100
20000
VI = 8 V
VI = 8 V
15000
Dimming Frequency - Hz
fs - Switching Frequency - Hz
1000
900
800
700
10000
5000
600
500
500
600
700
800
RFSLCT - kW
900
1000
0
10
Figure 3. Switching Frequency
210
310
410
510
610
RFPWM - kW
710
810
910
Figure 4. Dimming Frequency
VO
100 mV/div
AC
VO
100 mV/div
AC
SW
20 V/div
DC
SW
20 V/div
DC
Inductor
Current
500 mA/div
DC
Inductor
Current
500 mA/div
DC
Figure 6. Switch Waveform
Figure 5. Switch Waveform
IFB1
10 V/div
DC
IFB1
10 V/div
DC
IFB2
10 V/div
DC
IFB2
10 V/div
DC
IFB3
10 V/div
DC
IFB3
10 V/div
DC
Output
Current
50 mA/div
DC
Output
Current
50 mA/div
DC
Figure 7. Phase-Shift Waveform
8
110
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Figure 8. Phase-Shift Waveform
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IFB1
10 V/div
DC
IFB1
10 V/div
DC
IFB2
10 V/div
DC
VO
100 mV/div
AC
IFB2
10 V/div
DC
VO
100 mV/div
AC
Output
Current
50 mA/div
DC
Output
Current
50 mA/div
DC
Figure 10. Output Ripple Waveform
Figure 9. Output Ripple Waveform
EN
5 V/div
DC
EN
5 V/div
DC
VDDIO
5 V/div
DC
VDDIO
5 V/div
DC
VO
10 mV/div
DC
Output
Current
50 mA/div
DC
VO
10 mV/div
DC
Output
Current
50 mA/div
DC
Figure 11. Start-Up Waveform
Figure 12. Start-Up Waveform
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7 Detailed Description
7.1 Overview
The TPS61187 is a high-efficiency, high-output-voltage WLED driver for notebook panel backlighting
applications. The advantages of WLEDs compared to cold cathode fluorescent lamp (CCFL) backlights are
higher power efficiency and lower profile design. Due to the large number of WLEDs required to provide
backlighting for medium to large display panels, the LEDs must be arranged in parallel strings of several LEDs in
series. Therefore, the backlight driver for battery powered systems is almost always a boost regulator with
multiple current sink regulators. Having more WLEDs in series reduces the number of parallel strings, and
therefore improves overall current matching. However, the efficiency of the boost regulator declines due to the
need for high output voltage. Also, there must be enough white LEDs in series to ensure the output voltage stays
above the input voltage range.
The TPS61187 device has integrated all of the key function blocks to power and control up to 60 WLEDs. The
device includes a 40-V, 2-A boost regulator, six 30-mA current sink regulators, and a protection circuit for
overcurrent, overvoltage, open LED, short LED, and output short-circuit failures.
The TPS61187 device integrates auto phase shifted PWM dimming methods with the PWM interface to reduce
the output ripple voltage and audible noise. An optional direct PWM mode is user selectable through the MODE
selection function.
7.2 Functional Block Diagram
Optional
L
Diode
VIN
C1
2.2uF
R6
OUTPUT
C4
C3
4.7uF
FAULT
VIN
VDDIO
19
1
NC
18
Fault
Protection
Linear
Regulator
17
SW
R4
16
Fault
Condition
OVP
Protection
OVC
14
OVC
C2
0.1uF
R
S
VDD_GPIO
R5
Q
Vref
PGND
15
5
Optional
A
Comp
3
R3
FSLCT
R2
RFPWM
/ MODE
Oscillator
13
D
M
U
X
Vref
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
12
IFB1
EA
Maximum
LED current
Current Mirror
Selection
Logic
Dimming
Control
EN
PWM Signal
Generator
Phase
Shift
PWM
/
Direct
PWM
Direct PWM
PWM
Error
Amp
PWM Signal
Generator
/
MODE
selection
4
R1
RISETH
S
Detector
R7
RFPO
Slope
Compensation
20
Frequency /
duty decoding
circuit
Duty
control
Signal
Current Sink
9
AGND
Current Sink
11
IFB2
Current Sink
10
IFB3
Current Sink
8
IFB4
Current Sink
7
IFB5
Current Sink
6
IFB6
oscillator
EN
10
2
Shutdown
IFB no use
OCP
Protection
TSD
Protection
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LED
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7.3 Feature Description
7.3.1 Supply Voltage
The TPS61187 device has a built-in linear regulator to supply the device analog and logic circuit. The VDDIO pin,
output of the regulator, is connected to a 1-µF bypass capacitor for the regulator to be controlled in a stable loop.
VDDIO does not have high current sourcing capability for external use but it can be tied to the EN pin for start
up.
7.3.2 Boost Regulator and Programmable Switch Frequency (FSCLT)
The fixed-frequency PWM boost converter uses current-mode control and has integrated loop compensation.
The internal compensation ensures stable output over the full input and output voltage ranges assuming the
recommended inductance and output capacitance values shown in Typical Application – Phase Shift PWM Mode
are used. The output voltage of the boost regulator is automatically set by the device to minimize voltage drop
across the IFB pins. The device regulates the lowest IFB pin to 350 mV and consistently adjusts the boost output
voltage to account for any changes in LED forward voltages. If the input voltage is higher than the sum of the
WLED forward voltage drops (for example, at low duty cycles), the boost converter is not able to regulate the
output due to its minimum duty cycle limitation. In this case, increase the number of WLEDs in series or include
series ballast resistors in order to provide enough headroom for the converter to boost the output voltage.
Because the TPS61187 integrates a 2-A, 40-V power MOSFET, the boost converter can provide up to a 38-V
output voltage.
The TPS61187 switching frequency can be programmed between 300 kHz to 1 MHz by the resistor value on the
FSLCT pin according to Equation 1:
FSW =
5 ´ 1011
RFSLCT
where
•
RFSLCT = FSCLT pin resistor
(1)
See Figure 3 for boost converter switching frequency adjustment resistor RFSLCT selection.
The adjustable switching frequency feature provides the user with the flexibility of choosing a faster switching
frequency, as well as an inductor with smaller inductance and footprint or slower switching frequency, and
therefore, potentially higher efficiency due to lower switching losses. Use Equation 1 or refer to Table 1 to select
the correct value:
Table 1. RFSLCT Recommendations
RFLCT
FSW
833 kΩ
600 KHz
625 kΩ
800 KHz
499 kΩ
1 MHz
7.3.3 LED Current Sinks
The six current sink regulators embedded in the TPS61187 can be collectively configured to provide up to a
maximum of 30 mA each. These six specialized current sinks are accurate to within ±2% maximum for currents
at 20 mA, with a string-to-string difference of ±1.5% typical.
The IFB current must be programmed to the highest WLED current expected using the ISETH pin resistor and
Equation 2.
V
IFB = ISETH ´ KISET
RISETH
where
•
•
•
KISET = 980 (current multiple)
VISETH = 1.229 V (ISETH pin voltage)
RISETH = ISETH pin resistor
(2)
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7.3.4 Enable and Start-up
The internal regulator which provides VDDIO wakes up as soon as VIN is applied even when EN is low. This
allows the device to start when EN is tied to the VDDIO pin. VDDIO does not come to full regulation until EN is
high. The TPS61187 checks the status of all current feedback channels and shuts down any unused feedback
channels. It is recommended to short the unused channels to ground for faster start-up.
After the device is enabled, if the PWM pin is left floating, the output voltage of the TPS61187 regulates to the
minimum output voltage. Once the device detects a voltage on the PWM pin, the TPS61187 begins to regulate
the IFB pin current, as pre-set per the ISETH pin resistor, according to the duty cycle of the signal on the PWM
pin. The boost converter output voltage rises to the appropriate level to accommodate the sum of the white LED
string with the highest forward voltage drops plus the headroom of the current sink at that current.
Pulling the EN pin low shuts down the device, resulting in the device consuming less than 11 µA in shutdown
mode.
7.3.5 IFB Pin Unused
The TPS61187 has open/short string detection. For an unused IFB string, simply short it to ground or leave it
open. TI recommend shorting unused IFB pins to ground for faster start-up. After EN is pulled high, the
TPS61187 outputs about 40–µA current to each current channel for 4 ms and measures the voltage on each
channel. If the voltage on any channel is less than 600 mV, the channel is turned off and removed from the boost
control loop as unused channel.
7.4 Device Functional Modes
7.4.1 Brightness Dimming Control
The TPS61187 has auto-phase-shifted PWM dimming control with the PWM control interface.
The internal decoder block detects duty information from the input PWM signal, saves it in an eight bit register
and delivers it to the output PWM dimming control circuit. The output PWM dimming control circuit turns on/off
six output current sinks at the PWM frequency set by RFPWM and the duty cycle from the decoder block.
The TPS61187 also has direct PWM dimming control with the PWM control interface. In direct PWM mode, each
current sink turns on/off at the same frequency and duty cycle as the input PWM signal. See the Mode
Selection – Phase-Shift PWM Or Direct PWM Dimming for dimming mode selection.
When in phase-shifted PWM mode, TI recommends insertion of a series resistor of 10 kΩ to 20 kΩ value close to
the PWMIN pin. This resistor together with an internal capacitor forms a low pass R-C filter with 30-ns to 60-ns
time constant. This prevents possible high frequency noises being coupled into the input PWM signal and
causing interference to the internal duty cycle decoding circuit. However, it is not necessary for direct PWM mode
because the duty cycle decoding circuit is disabled during the direct PWM mode.
7.4.2 Adjustable PWM Dimming Frequency and Mode Selection (R_FPWM/MODE)
The TPS61187 can operate in auto phase shift mode or direct PWM mode. Tying the RFPWM/MODE pin to
VDDIO forces the device to operate in direct PWM mode. A resistor between the RFPWM/MODE pin and ground
sets the device into auto-phase-shift mode and the value of the resistor determines the PWM dimming frequency.
Use Equation 3 or refer to Table 2 to select the correct value:
FDIM =
1.818 ´ 108
RFPWM
where
•
12
RFPWM = RFPWM pin resistor
(3)
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Table 2. RFPWM Recommendations
RFPWM
FDIM
866 kΩ
210 Hz
432 kΩ
420 Hz
174 kΩ
1.05 kHz
9.09 kΩ
20 kHz
7.4.3 Mode Selection – Phase-Shift PWM Or Direct PWM Dimming
The phase-shift PWM dimming method or direct PWM dimming method can be selected through the RFPWM
pin. By attaching an external resistor to the RFPWM pin, the default phase shift PWM mode can be selected. To
select direct PWM mode, the RFPWM pin needs to be tied to the VDDIO pin. The RFPWM/MODE pin can be
noise sensitive when R2 has high impedance. In this case, careful layout or a parallel bypassing capacitor
improves noise sensitivity but the value of the parallel capacitor may not exceed 33 pF for oscillator stability.
RFPWM
/MODE
VDDIO
Pin13
RFPWM
/MODE
R2
9.09 KW
Pin13
Figure 13. Phase-Shift PWM-Dimming-Mode Selection
Figure 14. Direct PWM-Dimming-Mode Selection
7.4.3.1 Phase-Shift PWM Dimming
In phase-shift PWM mode, all current feedback channels are turned on and off at FDIM frequency with a constant
delay. However, the number of used channels and PWM dimming frequency determine the delay time between
two neighboring channels per Equation 4.
1
T_delay =
n ´ FDIM
where
•
•
n is the number of used channels
FDIM is the PWM dimming frequency that is determined by the value of RFPWM on the RFPWM pin
(4)
Figure 15 provides the detailed timing diagram of the phase-shift PWM dimming mode.
In phase-shift PWM mode, the internal decoder converts the duty-cycle information from the applied PWM signal
at the PWM pin into an 8-bit digital signal and stores it into a register. The integrated dimming control circuit
reconstructs the PWM duty cycle per the register value and sends it to each of the current sinks. In order to
avoid any flickering while the duty cycle information is reconstructed from the register, one LSB (1/256) of duty
cycle hysteresis is included which results in 1/256 resolution when incrementing the applied signal's duty cycle
but 2/256 resolution when decrementing the duty cycle.
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25%
50 ms
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
8.33 ms
- PWM input 25%, Iset = 20 mA
- PWM output 20 kHz, T = 50 ms
n = 6, T/n = 8.33 ms
Figure 15. Phase-Shift PWM Dimming Timing Diagram
7.4.3.2 Direct PWM Dimming
In direct PWM mode, all current feedback channels are turned on and off and are synchronized with the input
PWM signal.
14
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PWM
IFB_CH1
IFB_CH2
IFB_CH3
IFB_CH4
IFB_CH5
IFB_CH6
Input PWM frequency and 6 - CH output dimming frequency are exactly same.
Figure 16. Direct PWM Dimming Timing Diagram
7.4.4 Overvoltage Clamp and Voltage Feedback (OVC / FB)
The correct divider ratio is important for optimum operation of the TPS61187. Use the following guidelines to
choose the divider value. It can be noise sensitive if Rupper and Rdown have high impedance. Careful layout is
required. Also, choose lower resistance values for Rupper and Rdown when power dissipation allows.
1. Determine the maximum output voltage, VO, for the system according to the number of series WLEDs.
2. Select an Rupper resistor value (1 MΩ for a typical application; a lower value such as 100 kΩ for a noisy
environment).
3. Calculate Rdown using Equation 5
æ Rupper
ö
VOVP = ç
+1÷ ´ VOV_TH
R
è down
ø
where
•
VOV_TH = 1.95 V
(5)
When the device detects that the OVC pin exceeds 1.95 V typical, indicating that the output voltage is over the
set threshold point, the OVC circuitry clamps the output voltage to the set threshold.
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7.4.5 Current-Sink Open Protection
For the TPS61187, if one of the WLED strings is open, the device automatically detects and disables that string.
The device detects the open WLED string by sensing no current in the corresponding IFB pin. As a result, the
device deactivates the open IFB pin and removes it from the voltage feedback loop. Subsequently, the output
voltage drops and is regulated to the minimum voltage required for the connected WLED strings. The IFB current
of the connected WLED strings remains in regulation.
If any IFB pin voltage exceeds the IFB overvoltage threshold (13.5 V typical), the device turns off the
corresponding current sink and removes this IFB pin from the regulation loop. The current regulation of the
remaining IFB pins is not affected. This condition often occurs when there are several shorted WLEDs in one
string. WLED mismatch typically does not create large voltage differences among WLED strings.
The device only shuts down if it detects that all of the WLED strings are open. If an open string is reconnected
again, a power-on reset (POR) or EN pin toggling is required to reactivate a previously deactivated string.
7.4.6 Overcurrent and Short-Circuit Protection
The TPS61187 has a pulse-by-pulse over-current limit of 2 A (minimum). The PWM switch turns off when the
inductor current reaches this current threshold. The PWM switch remains off until the beginning of the next
switching cycle. This protects the device and external components during on overload conditions. When there is
a sustained overcurrent condition, the device turns off and requires a POR or EN pin toggling to restart. Under
severe overload and/or short-circuit conditions, the boost output voltage can be pulled below the required
regulated voltage to keep all of the white LEDs operating. Under thses conditions, the current flows directly from
input to output through the inductor and schottky diode. To protect the TPS61187, the device shuts down
immediately. The device restarts after input POR or EN pin toggling.
7.4.7 Thermal Protection
When the junction temperature of the TPS61187 is over 150°C, the thermal protection circuit is triggered and
shuts down the device immediately. Only a POR or EN pin toggling clears the protection and restarts the device.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS61187 provides a high-performance LED lighting solution for tablets, notebooks, monitors, and a variety
of industrial designs. The device can drive 6 strings of 10 series LEDs in a compact and highly efficient solution.
The TPS61187 provides a gate driver to an external P-channel MOSFET, which can be turned off during device
shutdown or fault condition.
8.2 Typical Application
L1
10uH
4.5V~24V
D1
C3
4.7uF
C1
2.2uF
R4
Open
R5
VIN
C2
1.0 uF
R7
1.2 KW
FAULT
VDDIO
SW
PGND
OVC
EN
FSLCT
R8
10 KW
R3
499 KW
TPS61187
PWM
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
VDD_GPIO
R1
62 KW
Open
ISET
FPO
AGND
19.8 mA
RFPWM
/MODE
R2
9.09 KW
Figure 17. TPS61187 Typical Application
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Typical Application (continued)
8.2.1 Design Requirements
For typical WLED-driver applications, use the parameters listed in Table 3.
Table 3. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage
4 V to 24 V
Output voltage
38 V (maximum)
LED string current
30 mA (maximum)
Switching frequency
280 kHz to 1 MHz
8.2.2 Detailed Design Procedure
8.2.2.1 Inductor Selection
Because selection of the inductor affects power supply steady state operation, transient behavior, and loop
stability, the inductor is the most important component in switching power regulator design. There are three
specifications most important to the performance of the inductor: inductor value, DC resistance (DCR), and
saturation current. The TPS61187 is designed to work with inductor values between 10 µH and 47 µH. A 10-µH
inductor is typically available in a smaller or lower profile package, while a 47-µH inductor may produce higher
efficiency due to a slower switching frequency and/or lower inductor ripple. If the boost output current is limited
by the over-current protection of the device, using a 10-µH inductor and the highest switching frequency
maximizes controller output current capability.
Internal loop compensation for PWM control is optimized for the external component values, including typical
tolerances, recommended in Table 4. Inductor values can have ±20% tolerance with no current bias. When the
inductor current approaches saturation level, its inductance can decrease 20% to 35% from the 0-A value
depending on how the inductor vendor defines saturation. In a boost regulator, the inductor dc current can be
calculated with Equation 6.
Vout ´ Iout
IDC =
Vin ´ h
where
•
•
•
•
VOUT = boost output voltage
IOUT = boost output current
VIN = boost input voltage
η = power conversion efficiency, use 90% for TPS61187 applications
(6)
The inductor current peak-to-peak ripple can be calculated with Equation 7.
1
IPP =
1
1 ö
æ
L ´ ç
+
÷ ´ FS
è Vout - Vin Vin ø
where
•
•
•
•
•
IPP = inductor peak-to-peak ripple
L = inductor value
FS = Switching frequency
VOUT = boost output voltage
VIN = boost input voltage
(7)
Therefore, the peak current seen by the inductor is calculated with Equation 8.
I
IP = IDC + PP
2
(8)
Select an inductor with a saturation current over the calculated peak current. To calculate the worst-case inductor
peak current, use the minimum input voltage, maximum output voltage, and maximum load current.
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Regulator efficiency is dependent on the resistance of its high current path and switching losses associated with
the PWM switch and power diode. Although the TPS61187 device has optimized the internal switch resistances,
the overall efficiency is affected by the inductor DCR. Lower DCR improves efficiency. However, there is a trade
off between DCR and inductor footprint; furthermore, shielded inductors typically have higher DCR than
unshielded ones. Table 4 lists the recommended inductors.
Table 4. Recommended Inductor For TPS61187
L (µH)
DCR (mΩ)
ISAT (A)
SIZE (L × W × H mm)
A915AY – 4R7M
4.7
38
1.87
5.2 × 5.2 × 3.0
A915AY – 100M
10
75
1.24
5.2 × 5.2 × 3.0
SLF6028T – 4R7N1R6
4.7
38
1.87
5.2 × 5.2 × 3.0
SLF6028T – 4R7N1R6
10
75
1.24
5.2 × 5.2 × 3.0
TOKO
TDK
8.2.2.2 Output Capacitor Selection
The output capacitor is mainly selected to meet the requirement for output ripple and loop stability. This ripple
voltage is related to the capacitance of the capacitor and its equivalent series resistance (ESR). Assuming a
capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated with Equation 9:
(Vout - Vin ) ´ Iout
Cout =
Vout ´ FS ´ Vripple
where
•
Vripple = peak-to-peak output ripple
(9)
The additional part of the ripple caused by ESR is calculated using: Vripple_ESR = IOUT × RESR
Due to its low ESR, Vripple_ESR can be neglected for ceramic capacitors, but must be considered if tantalum or
electrolytic capacitors are used. The controller output voltage also ripples due to the load transient that occurs
during PWM dimming. The TPS61187 adopts a patented technology to limit this type of output ripple even with
the minimum recommended output capacitance. In a typical application, the output ripple is less than 250 mV
during PWM dimming with a 4.7-µF output capacitor. However, the output ripple decreases with higher output
capacitances.
8.2.2.3 Isolation FET Selection
The TPS61187 provides a gate driver to an external P-channel MOSFET, which can be turned off during device
shutdown or fault condition. This MOSFET can provide a true shutdown function and also protect the battery
from output short-circuit conditions. The source of the PMOS must be connected to the input, and a pullup
resistor is required between the source and gate of the FET to keep the FET off during device shutdown. To turn
on the isolation FET, the FAULT pin is pulled low and clamped at 8 V below the VBAT pin voltage. During device
shutdown or fault condition, the isolation FET is turned off, and the input voltage is applied on the isolation
MOSFET. During a short-circuit condition, the catch diode (D2 in the typical application circuit) is forward biased
when the isolation FET is turned off. The drain of the isolation FET swings below ground. The voltage across the
isolation FET can be momentarily greater than the input voltage. Therefore, select a 30-V PMOS for a 24-V
maximum input. The on resistance of the FET has a large impact on power conversion efficiency since the FET
carries the input voltage. Select a MOSFET with Rds(on) less than 100 mΩ to limit the power losses.
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8.2.3 Application Curves
100
100
VI = 12 V
VO = 32 V
Efficiency - %
VO = 32 V
VO = 36 V
90
90
VI = 8 V
85
85
80
0
VI = 12 V
95
Efficiency - %
VO = 28 V
95
VI = 24 V
80
0.05
0.1
0.15
IL - Load current - A
0.2
0.25
0
0.05
Figure 18. Efficiency
0.1
0.15
IL - Load current - A
0.2
0.25
Figure 19. Efficiency
100
VI = 8 V
80
VI = 24 V
Efficiency - %
VI = 12 V
60
40
20
VO = 30 V
0
0
10
20
30
40
50
60
PWM duty - %
70
80
90
100
Figure 20. Efficiency
9 Power Supply Recommendations
The TPS61187 device requires a single-supply input voltage able to supply enough current for a given
application. This voltage can range between 4.5 V to 24 V.
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10 Layout
10.1 Layout Guidelines
As for all switching power supplies, especially those providing high current and using high switching frequencies,
layout is an important design step. If layout is not carefully done, the regulator could show instability as well as
EMI problems. Therefore, use wide and short traces for high current paths. The input capacitor, C1 in Typical
Application – Phase Shift PWM Mode, must not only be close to the VIN pin, but also to the GND pin in order to
reduce the input ripple seen by the device. The input capacitor, C1 in Typical Application – Phase Shift PWM
Mode, must also be placed close to the inductor. C2 is the filter and noise decoupling capacitor for the internal
linear regulator powering the internal digital circuits; place C2 as close as possible between the VDDIO and
AGND pins to prevent any noise insertion to the digital circuits. The SW pin carries high current with fast rising
and falling edges. Therefore, the connection from the pin to the inductor and Schottky diode must be kept as
short and wide as possible. It is also beneficial to have the ground of the output capacitor C3 close to the PGND
pin because there is a large ground return current flowing between them. When laying out signal grounds, TI
recommends using short traces separated from power ground traces and connecting them together at a single
point, for example on the thermal pad. The thermal pad must be soldered on to the PCB and connected to the
GND pin of the device. An additional thermal via can significantly improve power dissipation of the device.
10.2 Layout Example
VIN
OUT
L1
C1
C3
D1
SW
VIN
PWM
R8
20
C2
19
PGND
18
17
16
OVC
EN 2
R7
14
TPS61187
FSLCT 3
13
IS
ET
R3
11
5
R1
RFPWM
OUT
R5
R2
12
4
= Layer 1 Routing
R4
15
VDDIO 1
6
7
= Layer 2 Routing
8
9
10
IFB1
IFB2
IFB3
= Via
GND
Pin 5 = FPO
IFB4
Pin 17 = NC
IFB5
Pin 18 = FAULT
IFB6
Figure 21. TPS61187 Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS61187RTJR
ACTIVE
QFN
RTJ
20
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPS
61187
TPS61187RTJT
ACTIVE
QFN
RTJ
20
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPS
61187
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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