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TPS62095
SLVSBD8A – APRIL 2014 – REVISED MAY 2014
TPS62095 4A, High Efficiency Step Down Converter with DCS-Control™ and Low Profile
Solution
1 Features
3 Description
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The TPS62095 device is a high frequency
synchronous step down converter optimized for small
solution size, high efficiency and suitable for battery
powered applications. To maximize efficiency, the
converter operates in PWM mode with a nominal
switching frequency of 1.4MHz and automatically
enters Power Save Mode operation at light load
currents. When used in distributed power supplies
and point of load regulation, the device allows voltage
tracking to other voltage rails and tolerates output
capacitors up to 150µF and beyond. Using the DCSControl™ topology, the device achieves excellent
load transient performance and accurate output
voltage regulation.
1
DCS-Control™ Topology
Pin-to-Pin Compatible with TPS62090
Supports 1.2mm Height Total Solution
95% Converter Efficiency
20µA Operating Quiescent Current
2.5V to 5.5V Input Voltage Range
Power Save Mode
Two Level Short Circuit Protection
100% Duty Cycle for Lowest Dropout
Output Discharge Function
Adjustable Soft Startup
Output Voltage Tracking
0.8V to VIN Adjustable Output Voltage
3mm x 3mm 16-Pin VQFN Package
The output voltage startup ramp is controlled by the
soft startup pin, which allows operation as either a
standalone power supply or in tracking configurations.
Power sequencing is also possible by configuring the
EN and PG pins. In Power Save Mode, the device
operates with typically 20µA quiescent current. Power
Save Mode is entered automatically and seamlessly
maintaining high efficiency over the entire load
current range.
2 Applications
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Notebooks, Computers
Solid State Drives
Hard Disk Drives
Processor Supply
Battery Powered Applications
Device Information (1)
(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS62095
VQFN (16)
3.00 mm × 3.00 mm
For all available packages, see the orderable addendum at
the end of the datasheet.
1.8V Output Application
TPS62095
12
11
C1
22mF
10
3
C3
10nF
13
7
8
PVIN
SW
PVIN
SW
AVIN
VOS
1
Vout
1.8V/4A
R1
200k
2
100
C2
2x22mF
16
DEF
FB 5
EN
PG 4
CP
SS
CN
1.8V Output Application Efficiency
L1
1mH
R2
160k
Power Good
9
AGND 6
90
R3
500k
C4
10nF
Efficiency (%)
Vin
2.5V to 5.5V
80
PGND PGND
14
15
70
60
0.001
VIN = 2.5 V
VIN = 3.3 V
VIN = 4.2 V
VIN = 5.0 V
0.01
0.1
Load (A)
1
5
D001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS62095
SLVSBD8A – APRIL 2014 – REVISED MAY 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
Handling Ratings.......................................................
Recommend Operating Conditions...........................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
7.3 Feature Description................................................... 8
7.4 Device Functional Modes.......................................... 8
8
Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Applications ................................................ 11
9 Power Supply Recommendations...................... 17
10 Layout................................................................... 17
10.1 Layout Guidelines ................................................. 17
10.2 Layout Example .................................................... 17
10.3 Thermal Consideration.......................................... 18
11 Device and Documentation Support ................. 19
11.1
11.2
11.3
11.4
Device Support......................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
19
19
12 Mechanical, Packaging, and Orderable
Information ........................................................... 19
4 Revision History
Changes from Original (April 2014) to Revision A
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2
Page
Changed status from Product Preview to Production Data - removed Product Preview banner .......................................... 1
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5 Pin Configuration and Functions
PG
4
EN
14
13
12
11
Exposed
Thermal Pad*
10
5
6
7
8
CN
3
PGND
DEF
15
CP
2
PGND
SW
16
AGND
1
FB
SW
VOS
16-Pin VQFN with Thermal PAD
RGT
(Top View)
9
PVIN
PVIN
AVIN
SS
Pin Functions
PIN
DESCRIPTION
NAME
NO.
SW
1, 2
DEF
3
This pin is used for internal logic and needs to be pulled high. This pin must be connected to the AVIN
pin.
PG
4
Power good open drain output. A pull up resistor can not be connected to any voltage higher than the
input voltage.
FB
5
Feedback pin, for regulating the output voltage.
AGND
6
Analog ground.
CP
7
Internal charge pump's flying capacitor. Connect a 10nF capacitor between CP and CN.
CN
8
Internal charge pump's flying capacitor. Connect a 10nF capacitor between CP and CN.
SS
9
Soft-start control pin. A capacitor is connected to this pin and sets the soft startup time. Leaving this pin
floating sets the minimum start-up time.
AVIN
10
Analog supply input voltage pin.
PVIN
11,12
Power supply input voltage pin.
EN
PGND
VOS
Thermal Pad
13
14,15
16
Switch pin of the power stage.
Enable pin. This pin has an active pull down resistor of typically 400kΩ.
Power ground.
Output voltage sense pin. This pin must be directly connected to the output voltage.
The exposed thermal pad must be connected to AGND.
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6 Specifications
6.1 Absolute Maximum Ratings (1)
Voltage at pins (2)
Sink current
MIN
MAX
UNIT
PVIN, AVIN, FB, SS, EN, DEF, VOS
-0.3
7.0
V
SW, PG
-0.3
VIN+0.3
PG
Operating junction
temperature
(1)
(2)
-40
1.0
mA
150
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground pin.
6.2 Handling Ratings
MIN
MAX
UNIT
–65
150
°C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins (1)
0
2000
Charged device model (CDM), per JEDEC specification
JESD22-C101, all pins (2)
0
500
Tstg
Storage temperature range
V(ESD)
Electrostatic discharge
(1)
(2)
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommend Operating Conditions
Over operating free-air temperature range, unless otherwise noted.
MIN
VIN
Input voltage range
VPG
Power good pull-up resistor voltage
2.5
VOUT
Output voltage range
IOUT
Output current range
TJ
Operating junction temperature
0.8
MAX
UNIT
5.5
V
VIN
V
VIN
V
0
4.0
A
-40
125
°C
6.4 Thermal Information
THERMAL METRIC (1)
RGT (16 PINS)
RθJA
Junction-to-ambient thermal resistance
47
RθJC(top)
Junction-to-case (top) thermal resistance
60
RθJB
Junction-to-board thermal resistance
20
ψJT
Junction-to-top characterization parameter
1.5
ψJB
Junction-to-board characterization parameter
20
RθJC(bot)
Junction-to-case (bottom) thermal resistance
5.3
(1)
4
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953
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6.5 Electrical Characteristics
VIN = 3.6V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
IQIN
Quiescent current
Not switching, No Load, Into PVIN and AVIN
20
Isd
Shutdown current
Into PVIN and AVIN
0.6
5
Undervoltage lockout threshold
VIN falling
2.2
2.3
UVLO
2.5
2.1
Undervoltage lockout hysteresis
Thermal shutdown
Temperature rising
Thermal shutdown hysteresis
5.5
V
µA
µA
V
200
mV
150
ºC
20
ºC
CONTROL SIGNAL EN
VH
High level input voltage
VIN = 2.5 V to 5.5 V
1
V
VL
Low level input voltage
VIN = 2.5 V to 5.5 V
Ilkg
Input leakage current
EN = VIN
10
RPD
Pull down resistance
EN = Low
400
0.4
V
100
nA
kΩ
SOFT STARTUP
ISS
Softstart current
6.3
7.5
8.7
µA
Output voltage rising
93%
95%
97%
Output voltage falling
88%
90%
92%
0.4
V
100
nA
POWER GOOD
Vth
Power good threshold
VL
Low level voltage
I(sink) = 1 mA
Ilkg
Leakage current
VPG = 3.6 V
10
High side FET on-resistance
ISW = 500 mA
50
mΩ
Low side FET on-resistance
ISW = 500 mA
40
mΩ
POWER SWITCH
RDS(on)
ILIM
High side FET switch current
limit
fSW
Switching frequency
4.7
IOUT = 3 A
5.5
6.7
1.4
A
MHz
OUTPUT
VOUT
Output voltage range
RDIS
Output discharge resistor
0.8
EN = GND, VOUT = 1.8 V
Feedback regulation voltage
VFB
IFB
(1)
Feedback voltage accuracy
(1)
VIN
V
Ω
200
0.8
V
IOUT = 1 A, PWM mode
-1.4%
+1.4%
IOUT = 1 mA, PFM mode, VOUT ≥ 1.8 V
-1.4%
+2.0%
IOUT = 1 mA, PFM mode, VOUT < 1.8 V
-1.4%
+2.5%
Feedback input bias current
VFB = 0.8 V
10
100
nA
Line regulation
VOUT = 1.8 V, PWM operation
0.016
%/V
Load regulation
VOUT = 1.8 V, PWM operation
0.04
%/A
Conditions: L = 1 µH, COUT = 2 x 22 µF.
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80
80
70
70
60
60
50
50
Rdson (m:)
Rdson (m:)
6.6 Typical Characteristics
40
30
20
Tj
Tj
Tj
Tj
10
0
2.5
=
=
=
=
30
20
-40°C
25°C
85°C
125°C
3.0
40
10
3.5
4.0
4.5
Input Voltage (V)
5.0
0
2.5
5.5
Tj
Tj
Tj
Tj
=
=
=
=
-40°C
25°C
85°C
125°C
3.0
3.5
D003
Figure 1. High Side FET On Resistance
4.0
4.5
Input Voltage (V)
5.0
5.5
D004
Figure 2. Low Side FET On Resistance
1
30
Shutdown Current (PA)
Quiescent Current (PA)
0.8
20
10
Tj
Tj
Tj
Tj
0
2.5
=
=
=
=
-40°C
0°C
25°C
85°C
3.0
0.6
0.4
0.2
3.5
4.0
4.5
Input Voltage (V)
5.0
5.5
0
2.5
Tj
Tj
Tj
Tj
=
=
=
=
3.0
D005
3.5
4.0
4.5
Input Voltage (V)
5.0
5.5
D006
Figure 4. Shutdown Current
Figure 3. Quiescent Current
6
-40°C
0°C
25°C
85°C
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7 Detailed Description
7.1 Overview
The TPS62095 synchronous step down converter is based on DCS-Control™ (Direct Control with Seamless
transition into Power Save Mode). This is an advanced regulation topology that combines the advantages of
hysteretic and voltage mode control.
The DCS-Control™ topology operates in PWM (Pulse Width Modulation) mode for medium to heavy load
conditions and in Power Save Mode at light load currents. In PWM, the converter operates with its nominal
switching frequency of 1.4 MHz having a controlled frequency variation over the input voltage range. As the load
current decreases, the converter enters Power Save Mode, reducing the switching frequency and minimizing the
IC's quiescent current to achieve high efficiency over the entire load current range. DCS-Control™ supports both
operation modes using a single building block and therefore has a seamless transition from PWM to Power Save
Mode without effects on the output voltage. The TPS62095 offers excellent DC voltage regulation and load
transient regulation, combined with low output voltage ripple, minimizing interference with RF circuits.
7.2 Functional Block Diagram
CP
PG
PVIN
CN
Charge Pump
for
Gate driver
VFB
Hiccup
current limit
#32 counter
VREF
High Side
Current
Sense
Bandgap
Undervoltage
Lockout
Thermal shutdown
AVIN
PVIN
EN
M1
400 kΩ
SW
MOSFET Driver
Anti Shoot Through
Converter Control
Logic
AGND
SW
DEF
M2
PGND
PGND
Comparator
ramp
Timer
ton
Direct Control
and
Compensation
VOS
Error Amplifier
FB
Vref
0.8V
Vin
DCS - Control™
200Ω
Iss
Voltage clamp
Vref
SS
÷1.56
EN
Output voltage
discharge
logic
M3
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7.3 Feature Description
7.3.1 PWM Operation
In PWM mode, the device operates with a fixed ON-time switching pulse at medium to heavy load currents. A
quasi fixed switching frequency of typical 1.4MHz over the input and output voltage range is achieved by using
an input feed forward. The ON-time is calculated as shown in Equation 2. As the load current decreases, the
converter enters Power Save Mode operation reducing its switching frequency. The device enters Power Save
Mode at the boundary to discontinuous conduction mode (DCM).
7.3.2 Low Dropout Operation (100% Duty Cycle)
The device offers low input to output voltage difference by entering 100% duty cycle mode. In this mode the high
side MOSFET switch is constantly turned on. This is particularly useful in battery powered applications to achieve
longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage
where the output voltage falls below set point is given by:
VIN(min) = VOUT(min) + IOUT x ( RDS(on) + RL )
(1)
Where
RDS(on) = High side FET on-resistance
RL = DC resistance of the inductor
VOUT(min) = Minimum output voltage the load can accept
7.3.3 Power Save Mode Operation
As the load current decreases, the converter enters Power Save Mode operation. During Power Save Mode, the
converter operates with reduced switching frequency and with a minimum quiescent current to maintain high
efficiency. The Power Save Mode is based on a fixed on-time architecture following Equation 2.
V
OUT × 360ns × 2
V
IN
2×I
OUT
f =
æ
ö V -V
V
V
2
IN
OUT
OUT
÷ x IN
ton ç 1 +
ç
÷
V
L
OUT
è
ø
ton =
(2)
In Power Save Mode, the output voltage rises slightly above the nominal output voltage in PWM mode. This
effect is reduced by increasing the output capacitance or the inductor value. This effect is also reduced by
programming the output voltage of the TPS62095 lower than the target value. As an example, if the target output
voltage is 3.3V, then the TPS62095 can be programmed to 3.3V - 0.3%. As a result, the output voltage accuracy
is now -1.7% to +1.7% instead of -1.4% to 2%. The output voltage accuracy in PFM operation is reflected in the
electrical specification table and given for a 2 x 22µF output capacitance.
7.4 Device Functional Modes
7.4.1 Soft Startup
To minimize inrush current during startup, the device has an adjustable startup time depending on the capacitor
value connected to the SS pin. The device charges the SS capacitor with a constant current of typically 7.5µA.
The feedback voltage follows this voltage divided by 1.56, until the internal reference voltage of 0.8V is reached.
The soft startup operation is completed once the voltage at the SS capacitor has reached typically 1.25V. The
soft startup time is calculated using Equation 3. The larger the SS capacitor, the longer the soft startup time. The
relation between the SS pin voltage and the FB pin voltage is estimated using Equation 4. Leaving the SS pin
floating sets the minimum startup time.
1.25V
tSS = CSS x
7.5μA
(3)
VFB =
8
VSS
1.56
(4)
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Device Functional Modes (continued)
During startup the switch current limit is reduced to 1/3 of its typical current limit of 5.5A when the output voltage
is less than 0.6V. Once the output voltage exceeds typically 0.6V, the switch current limit is released to its
nominal value. Thus, the device provides a reduced load current of 1.8A when the output voltage is below 0.6V.
A small or no soft startup time may trigger this reduced switch current limit during startup, especially for larger
output capacitor applications. This is avoided by using a larger soft start up capacitance which extends the soft
startup time. See Short Circuit Protection (Hiccup-Mode) for details of the reduced current limit during startup.
7.4.2 Voltage Tracking
The SS pin can also be used to implement output voltage tracking with other supply rails, as shown in Figure 5.
TPS62095
VIN
2.5V to 5.5V
12
11
C1
22µF
10
3
C3
10nF
13
7
8
V1
Output of external
DC DC converter
PVIN
SW
PVIN
SW
AVIN
VOS
1
L1
1µH
V2
1.8V/4A
R1
200k
2
C2
2 x 22µF
16
DEF
FB 5
EN
PG 4
CP
SS
CN
AGND 6
R2
160k
9
PGND PGND
14
15
R3
R4
Figure 5. Output Voltage Tracking
In voltage tracking applications, the resistance R4 should be set properly to achieve accurate voltage tracking by
taking 7.5μA soft startup current into account. 4.3kΩ is a sufficient value for R4. The relationship between V1 and
V2 is shown in Equation 5. To achieve V1 startup leading V2, as shown in Figure 6, Equation 5 should be less
than 1. To achieve simultaneous tracking, Equation 5 should equal to 1.
V2
1
R4
R1 + R2
=
´
´
V1 1.56 R3 + R4
R2
(5)
Voltage
Voltage
V1 = 3.3V
V1 = 3.3V
V2 = 1.8V
V2 = 1.8V
æ R3
ö
æ R1 ö
+ 1÷
+ 1÷ < 1.56 ´ ç
ç
R
2
R
4
è
ø
è
ø
æ R3
ö
æ R1 ö
+ 1÷
+ 1÷ = 1.56 ´ ç
ç
R
2
R
4
è
ø
è
ø
t
a) V1 startup leading V2
t
b) Simultaneous tracking
Figure 6. Voltage Tracking Applications
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Device Functional Modes (continued)
7.4.3 Short Circuit Protection (Hiccup-Mode)
The device is protected against hard short circuits to GND and over-current events. This is implemented by a two
level short circuit protection. During start-up and when the output is shorted to GND, the switch current limit is
reduced to 1/3 of its typical current limit of 5.5A. Once the output voltage exceeds typically 0.6V the current limit
is released to its nominal value. The full current limit is implemented as a hiccup current limit. Once the internal
current limit is triggered 32 times, the device stops switching and starts a new start-up sequence after a typical
delay time of 66µS passed by. The device repeats these cycles until the high current condition is released.
7.4.4 Output Discharge Function
To make sure the device starts up under defined conditions, the output gets discharged via the VOS pin with a
typical discharge resistor of 200Ω whenever the device shuts down. This happens when the device is disabled or
if thermal shutdown, undervoltage lockout or short circuit hiccup-mode is triggered.
7.4.5 Power Good Output
The power good output is low when the output voltage is below its nominal value. The power good becomes high
impedance once the output is within 5% of regulation. The PG pin is an open drain output and is specified to sink
up to 1mA. This output requires a pull-up resistor to be monitored properly. The pull-up resistor cannot be
connected to any voltage higher than the input voltage of the device.
7.4.6 Undervoltage Lockout
To avoid mis-operation of the device at low input voltages, an undervoltage lockout is included. UVLO shuts
down the device at input voltages lower than typically 2.2V with a 200mV hysteresis.
7.4.7 Thermal Shutdown
The device goes into thermal shutdown once the junction temperature exceeds typically 150°C with a 20°C
hysteresis.
10
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8 Application and Implementation
8.1 Application Information
The TPS62095 is a synchronous step down converter based on DCS-Control™ topology whose output voltage
can be adjusted by component selection. The following section discusses the design of the external components
to complete the power supply design for several input and output voltage options by using typical applications as
a reference.
8.2 Typical Applications
8.2.1
2.5V to 5.5V Input, 1.8V Output Converter
L1
1mH
TPS62095
Vin
2.5V to 5.5V
12
11
C1
22mF
10
3
C3
10nF
13
7
8
PVIN
SW
PVIN
SW
AVIN
VOS
1
Vout
1.8V/4A
R1
200k
2
C2
2x22mF
16
DEF
FB 5
EN
PG 4
CP
SS
CN
AGND 6
R2
160k
R3
500k
Power Good
9
C4
10nF
PGND PGND
14
15
Figure 7. 1.8-V Output Application
8.2.1.1 Design Requirements
For this design example, use the following as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage range
2.5V to 5.5V
Output voltage
1.8V
Output ripple voltage
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