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TPS62671, TPS62672, TPS62674
TPS62675, TPS626751, TPS626765, TPS62679
SLVS952G – APRIL 2010 – REVISED JANUARY 2017
TPS6267x 500-mA/650-mA, 6-MHz High-Efficiency Step-Down Converter
in Low Profile Chip Scale Packaging (Height < 0.4mm)
1 Features
3 Description
•
•
•
•
•
•
•
•
•
•
•
The
TPS6267x
devices
are
high-frequency
synchronous step-down dc-dc converters optimized
for small battery-powered applications. Intended for
low-power applications, the TPS6267x supports up to
650-mA load current and allows the use of low cost
chip inductor and capacitors.
1
•
•
•
•
92% Efficiency at 6MHz Operation
17μA Quiescent Current
Wide VIN Range From 2.3V to 4.8V
6MHz Regulated Frequency Operation
Spread Spectrum, PWM Frequency Dithering
Best in Class Load and Line Transient
±2% Total DC Voltage Accuracy
Low Ripple Light-Load PFM Mode
≥35dB VIN PSRR (1kHz to 10kHz)
Simple Logic Enable Inputs
Supports External Clock Presence Detect Enable
Input
Three Surface-Mount External Components
Required (One 0603 MLCC Inductor, Two 0402
Ceramic Capacitors)
Complete Sub 0.33-mm Component Profile
Solution
Total Solution Size RBW: The receiver is able to properly measure each individual side-band harmonic separately, so the
measurements match with the theoretical calculations.
10.3.5 Short-Circuit Protection
The TPS6267x integrates a P-channel MOSFET current limit to protect the device against heavy load or short
circuits. When the current in the P-channel MOSFET reaches its current limit, the P-channel MOSFET is turned
off and the N-channel MOSFET is turned on. The regulator continues to limit the current on a cycle-by-cycle
basis.
As soon as the output voltage falls below ca. 0.4V, the converter current limit is reduced to half of the nominal
value. Because the short-circuit protection is enabled during start-up, the device does not deliver more than half
of its nominal current limit until the output voltage exceeds approximately 0.5V. This needs to be considered
when a load acting as a current sink is connected to the output of the converter.
10.3.6 Thermal Shutdown
As soon as the junction temperature, TJ, exceeds typically 140°C, the device goes into thermal shutdown. In this
mode, the P- and N-channel MOSFETs are turned off. The device continues its operation when the junction
temperature again falls below typically 130°C.
10.4 Device Functional Modes
10.4.1 Soft Start
The TPS6267x has an internal soft-start circuit that limits the inrush current during start-up. This limits input
voltage drops when a battery or a high-impedance power source is connected to the input of the converter.
The soft-start system progressively increases the on-time from a minimum pulse-width of 35ns as a function of
the output voltage. This mode of operation continues for c.a. 100μs after enable. Should the output voltage not
have reached its target value by this time, such as in the case of heavy load, the soft-start transitions to a second
mode of operation.
The converter then operates in a current limit mode, specifically the P-MOS current limit is set to half the nominal
limit, and the N-channel MOSFET remains on until the inductor current has reset. After a further 100 μs, the
device ramps up to the full current limit operation if the output voltage has risen above 0.5V (approximately).
Therefore, the start-up time mainly depends on the output capacitor and load current.
10.4.2 Enable
The TPS6267x device starts operation when EN is set high and starts up with the soft start as previously
described. For proper operation, the EN pin must be terminated and must not be left floating.
Pulling the EN pin Low, forces the device into shutdown with a shutdown quiescent current of typically 0.1μA. In
this mode, the P and N-channel MOSFETs are turned off, the internal resistor feedback divider is disconnected,
and the entire internal-control circuitry is switched off.
When an external clock signal (EXTCLK), 4MHz to 27MHz, is applied to the TPS62674 or TPS62679, the DC/DC
converter powers-up automatically within approx. 120μs (TPS62674) or 450μs (TPS62679). When the external
clock signal is stopped, the DC/DC converter is powered down and the output capacitor is discharged actively.
10.4.3 Active Output Discharge
The TPS62674, TPS626751, TPS626765 and TPS62679 actively discharge the output capacitor when turned off.
The integrated discharge resistor has a typical resistance of 70 Ω. The required time to discharge the output
capacitor at the output node depends on load current and the output capacitance value.
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Device Functional Modes (continued)
10.4.4 Undervoltage Lockout
The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the
converter from turning on the switch or rectifier MOSFET under undefined conditions. The TPS6267x device
have a UVLO threshold set to 2.05V (typical). Fully functional operation is permitted down to 2.1V input voltage.
18
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SLVS952G – APRIL 2010 – REVISED JANUARY 2017
11 Application and Implementation
11.1 Application Information
TPS6267x are high frequency step-down converters. They can convert from a 2.3V to 4.8V input source to
various fixed output voltages, providing up to 500mA. Needing a minimum amount of external components, the
design procedure is easy to do and usually done by choosing input and output capacitor as well as an
appropriate inductor which is described in the sections below.
11.2 Typical Applications
11.2.1 TPS6267x Point-Of-Load Supply
VBAT
2.3 V .. 4.8 V
CI
TPS62671
L
VIN
SW
EN
FB
2.2 mF
VOUT
1.8 V @ 500mA
0.47 mH
CO
4.7 mF
GND
MODE
Figure 28. 1.8V/0.5A Power Supply Using TPS62671
11.2.1.1 Design Requirements
The TPS6267x devices are optimized to work with the external components as shown in Figure 28, providing
stable operation for the input voltage and load current range up to 500mA. Connecting the MODE pin to GND
provides PWM/PFM operation.
11.2.1.2 Detailed Design Procedure
11.2.1.2.1 Inductor Selection
The TPS6267x series of step-down converters have been optimized to operate with an effective inductance
value in the range of 0.3μH to 1.8μH and with output capacitors in the range of 2.2μF to 4.7μF. The internal
compensation is optimized to operate with an output filter of L = 0.47μH and CO = 2.2μF. Larger or smaller
inductor values can be used to optimize the performance of the device for specific operation conditions. For more
details, see the CHECKING LOOP STABILITY section.
The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage
ripple and the efficiency. The selected inductor has to be rated for its dc resistance and saturation current. The
inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI or VO.
V
V *V
DI
I
O
DI + O
DI
+I
) L
L
L(MAX)
O(MAX)
2
V
L ƒ sw
I
(4)
With:
fSW = switching frequency (6 MHz typical)
L = inductor value
ΔIL = peak-to-peak inductor ripple current
IL(MAX) = maximum inductor current
In high-frequency converter applications, the efficiency is essentially affected by the inductor AC resistance (i.e.
quality factor) and to a smaller extent by the inductor DCR value. To achieve high efficiency operation, care
should be taken in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing
the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor
size, increased inductance usually results in an inductor with lower saturation current.
The total losses of the coil consist of both the losses in the DC resistance, R(DC), and the following frequencydependent components:
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Typical Applications (continued)
•
•
•
•
The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
Additional losses in the conductor from the skin effect (current displacement at high frequencies)
Magnetic field losses of the neighboring windings (proximity effect)
Radiation losses
The following inductor series from different suppliers have been used with the TPS6267x converters.
Table 1. List of Inductors (1)
MANUFACTURER
MURATA
PANASONIC
SEMCO
DIMENSIONS (in mm)
2.0 x 1.2 x 1.0 max. height
LQM21PNR47MC0
2.0 x 1.2 x 0.55 max. height
LQM21PN1R0MC0
2.0 x 1.2 x 0.55 max. height
LQM18PN1R5-B35
1.6 x 0.8 x 0.4 max. height
LQM18PN1R5-A62
1.6 x 0.8 x 0.33 max. height
ELGTEAR82NA
2.0 x 1.2 x 1.0 max. height
CIG21L1R0MNE
2.0 x 1.2 x 1.0 max. height
BRC1608T1R0M6, BRC1608TR50M6
1.6 x 0.8 x 1.0 max. height
CKP1608L1R5M
1.6 x 0.8 x 0.55 max. height
TAIYO YUDEN
(1)
SERIES
LQM21PN1R0NGR
CKP1608U1R5M
1.6 x 0.8 x 0.4 max. height
CKP1608S1R0M, CKP1608S1R5M
1.6 x 0.8 x 0.33 max. height
NM2012NR82, NM2012N1R0
2.0 x 1.2 x 1.0 max. height
TDK
MLP2012SR82T
2.0 x 1.2 x 0.6 max. height
TOKO
MDT2012-CR1R0A
2.0 x 1.2 x 1.0 max. height
See Third-Party Products Disclaimer
11.2.1.2.2 Output Capacitor Selection
The advanced fast-response voltage mode control scheme of the TPS6267x allows the use of tiny ceramic
capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. For best performance, the device should be operated with a minimum effective output
capacitance of 0.8μF. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric
capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies.
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the
voltage step caused by the output capacitor ESL and the ripple current flowing through the output capacitor
impedance.
At light loads, the output capacitor limits the output ripple voltage and provides holdup during large load
transitions. A 2.2μF or 4.7μF ceramic capacitor typically provides sufficient bulk capacitance to stabilize the
output during large load transitions. The typical output voltage ripple is 1% of the nominal output voltage VO.
For best operation (i.e. optimum efficiency over the entire load current range, proper PFM/PWM auto transition),
the TPS6267x requires a minimum output ripple voltage in PFM mode. The typical output voltage ripple is ca. 1%
of the nominal output voltage VO. The PFM pulses are time controlled resulting in a PFM output voltage ripple
and PFM frequency that depends (first order) on the capacitance seen at the converter's output.
11.2.1.2.3 Input Capacitor Selection
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required to prevent large voltage transients that can cause misbehavior of the device or interferences with other
circuits in the system. For most applications, a 1 or 2.2-μF capacitor is sufficient. If the application exhibits a
noisy or erratic switching frequency, the remedy will probably be found by experimenting with the value of the
input capacitor.
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SLVS952G – APRIL 2010 – REVISED JANUARY 2017
Take care when using only ceramic input capacitors. When a ceramic capacitor is used at the input and the
power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce
ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even
damage the part. Additional "bulk" capacitance (electrolytic or tantalum) should in this circumstance be placed
between CI and the power source lead to reduce ringing than can occur between the inductance of the power
source leads and CI.
11.2.1.2.4 Checking Loop Stability
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:
• Switching node, SW
• Inductor current, IL
• Output ripple voltage, VO(AC)
These are the basic signals that need to be measured when evaluating a switching converter. When the
switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the
regulation loop may be unstable. This is often a result of board layout and/or L-C combination.
As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between
the application of the load transient and the turn on of the P-channel MOSFET, the output capacitor must supply
all of the current required by the load. VO immediately shifts by an amount equal to ΔI(LOAD) x ESR, where ESR
is the effective series resistance of CO. ΔI(LOAD) begins to charge or discharge CO generating a feedback error
signal used by the regulator to return VO to its steady-state value. The results are most easily interpreted when
the device operates in PWM mode.
During this recovery time, VO can be monitored for settling time, overshoot or ringing that helps judge the
converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin.
Because the damping factor of the circuitry is directly related to several resistive parameters (e.g., MOSFET
rDS(on)) that are temperature dependant, the loop stability analysis has to be done over the input voltage range,
load current range, and temperature range.
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11.2.1.3 Application Curves
VI = 3.6 V,
VO = 1.8 V
VI = 3.6 V,
VO = 1.8 V
30 to 300 mA Load Step
30 to 300 mA Load Step
2.7V to 3.3V Line Step
3.3V to 3.9V Line Step
MODE = Low
Figure 29. Combined Line/Load Transient Response
VI = 3.6 V,
VO = 1.2 V
MODE = Low
Figure 30. Combined Line/Load Transient Response
VI = 3.6 V,
VO = 1.2 V
50 to 350 mA Load Step
5 to 150 mA Load Step
MODE = Low
Figure 31. Load Transient Response in PFM/PWM
Operation
VI = 2.7 V,
VO = 1.2 V
50 to 350 mA Load Step
MODE = Low
Figure 33. Load Transient Response in PFM/PWM
Operation
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MODE = Low
Figure 32. Load Transient Response in PFM/PWM
Operation
VI = 4.8 V,
VO = 1.2 V
50 to 350 mA Load Step
MODE = Low
Figure 34. Load Transient Response in PFM/PWM
Operation
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VI = 3.6 V,
VO = 1.2 V
SLVS952G – APRIL 2010 – REVISED JANUARY 2017
150 to 500 mA Load Step
VI = 2.7 V,
VO = 1.2 V
150 to 500 mA Load Step
MODE = Low
MODE = Low
Figure 35. Load Transient Response in PWM/PWM
Operation
VI = 4.8 V,
VO = 1.2 V
150 to 500 mA Load Step
Figure 36. Load Transient Response in PWM/PWM
Operation
VI = 3.6 V,
VO = 1.8 V
5 to 150 mA Load Step
MODE = Low
Figure 37. Load Transient Response in PWM/PWM
Operation
VI = 3.6 V,
VO = 1.8 V
50 to 350 mA Load Step
MODE = Low
Figure 39. Load Transient Response in PFM/PWM
Operation
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MODE = Low
Figure 38. Load Transient Response in PFM/PWM
Operation
VI = 3.6 V,
VO = 1.8 V
150 to 500 mA Load
MODE = Low
Figure 40. Load Transient Response in PWM/PWM
Operation
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VI = 3.6 V,
VO = 1.2 V
VI = 3.6 V,
VO = 1.8 V
5 to 300 mA Load Sweep
5 to 300 mA Load Sweep
MODE = Low
MODE = Low
Figure 41. AC Load Transient Response
Figure 42. AC Load Transient Response
VI = 3.6 V,
VO = 1.2 V,
IO = 200 mA
VI = 3.6 V,
VO = 1.2 V,
IO = 150 mA
MODE = Low
Figure 43. Typical PWM Mode Operation
MODE = Low
Figure 44. PWM Mode Operation - SSFM Modulation
VI = 3.6 V, VO = 1.2V, IO = 40 mA
VI = 3.6 V,
VO = 1.8 V,
IO = 0 mA
MODE = Low
Figure 45. Typical Power Save Mode Operation
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MODE = Low
Figure 46. Start-Up
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VI = 3.6 V,
VO = 1.2 V,
IO = 0 mA
VI = 3.6 V,
VO = 1.2 V,
IO = 0 mA
MODE = Low
MODE = High
Figure 47. Start-Up
Figure 48. Start-Up (RF Clock)
VI = 3.6 V,
VO = 1.2 V,
IO = 0 mA,
CO = 4.7uF 6.3V X5R (0402)
MODE = High
Figure 49. Shut-Down (RF Clock)
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11.2.2 1.26V CMOS Sensor Embedded Power Solution — Featuring Sub 0.4mm Profile
VBAT
2.3 V .. 4.8 V
TPS62674
CI
1 mF
VIN
SW
MODE
FB
EN
EXTCLK
L
GND
VOUT
1.26 V @ 500 mA
1.5 mH
CO
2.2 mF
L = muRata LQM18PN1R5-B35
CI = muRata GRM153R60J105M
CO = muRata GRM153R60G225M
Figure 50. 1.26V CMOS Sensor Embedded Power Solution — Featuring Sub 0.4mm Profile
11.2.2.1 Design Requirements
A CMOS sensor power supply providing a voltage of 1.26V is needed. The profile height mustn't exceed 0.4mm
and the device is enabled/switched off by external clock signal.
11.2.2.2 Detailed Design Procedure
See previous Detailed Design Procedure. To provide 1.26V, the TPS62674 or TPS62679 can be used. The
inductor can be chosen from Table 1, selecting low profile device. Startup and shut down sequence with external
clock are shown below.
11.2.2.3 Application Curves
VI = 3.6 V,
VO = 1.26 V,
IO = 0 mA
TPS62679
VI = 3.6 V,
VO = 1.26 V,
IO = 0 mA
L = TY CKP1608S1R0,
CO = TY AMK105BJ225MP
L = TY CKP1608S1R0,
CO = TY AMK105BJ225MP
MODE = Low
Figure 51. Start-Up (RF Clock)
MODE = Low
Figure 52. Shut-Down (RF Clock)
12 Power Supply Recommendations
The power supply of TPS6267X devices needs to have appropriate current rating to support input and output
voltage range for the maximum load current.
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13 Layout
13.1 Layout Guidelines
As for all switching power supplies, the layout is an important step in the design. High-speed operation of the
TPS6267x devices demand careful attention to PCB layout. Care must be taken in board layout to get the
specified performance. If the layout is not carefully done, the regulator could show poor line and/or load
regulation, stability and switching frequency issues as well as EMI problems. It is critical to provide a low
inductance, impedance ground path. Therefore, use wide and short traces for the main current paths.
The ground pins of the dc/dc converter must be strongly connected to the PCB ground (i.e. reference potential
across the system). These ground pins serve as the return path for both the control circuitry and the synchronous
rectifier. Furthermore, due to its high frequency switching circuitry, it is imperative for the input capacitor to be as
close to the SMPS device as possible, and that there is an unbroken ground plane under the TPS6267x and its
external passives. Additionally, minimizing the area between the SW pin trace and inductor will limit high
frequency radiated energy. The feed-back line should be routed away from noisy components and traces (e.g.
SW line).
The output capacitor carries the inductor ripple current. While not as critical as the input capacitor, an unbroken
ground connection from this capacitor’s ground return to the inductor, input capacitor and SMPS device will
reduce the output voltage ripple and it’s associated ESL step. This is a critical aspect to achieve best loop and
frequency stability.
High frequency currents tend to find their way on the ground plane along a mirror path directly beneath the
incident path on the top of the board. If there are slits or cuts in the ground plane due to other traces on that
layer, the current will be forced to go around the slits. If high frequency currents are not allowed to flow back
through their natural least-area path, excessive voltage will build up and radiated emissions will occur. There
should be a group of vias in the surrounding of the dc/dc converter leading directly down to an internal ground
plane. To minimize parasitic inductance, the ground plane should be as close as possible to the top plane of the
PCB (i.e. onto which the components are located).
13.2 Layout Example
MODE
CI
L
VIN
ENABLE
CO
GND
VOUT
Figure 53. Suggested Layout (Top)
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14 Device and Documentation Support
14.1 Device Support
14.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
14.2 Documentation Support
14.2.1 Related Documentation
14.2.1.1 References
"EMI Reduction in Switched Power Converters Using Frequency Modulation Techniques", in IEEE
TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, VOL. 4, NO. 3, AUGUST 2005, pp 569-576 by
Josep Balcells, Alfonso Santolaria, Antonio Orlandi, David González, Javier Gago.
14.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS62671
Click here
Click here
Click here
Click here
Click here
TPS62672
Click here
Click here
Click here
Click here
Click here
TPS62674
Click here
Click here
Click here
Click here
Click here
TPS62675
Click here
Click here
Click here
Click here
Click here
TPS626751
Click here
Click here
Click here
Click here
Click here
TPS626765
Click here
Click here
Click here
Click here
Click here
TPS62679
Click here
Click here
Click here
Click here
Click here
14.4 Trademarks
NanoFree is a trademark of Texas Instruments.
Bluetooth is a trademark of Bluetooth SIG, Inc.
14.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
14.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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15 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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11-Jan-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS62671YFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
NZ
TPS62671YFDT
ACTIVE
DSBGA
YFD
6
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
NZ
TPS62672YFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
1BCS
TPS62672YFDT
ACTIVE
DSBGA
YFD
6
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
1BCS
TPS62674YFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
PN
TPS62674YFDT
ACTIVE
DSBGA
YFD
6
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
PN
TPS626751YFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
E3
TPS626751YFDT
ACTIVE
DSBGA
YFD
6
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
E3
TPS62675YFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
OB
TPS62675YFDT
ACTIVE
DSBGA
YFD
6
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
OB
TPS626765YFDR
ACTIVE
DSBGA
YFD
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
EH
TPS626765YFDT
ACTIVE
DSBGA
YFD
6
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
EH
TPS62679ZYFMR
ACTIVE
DSLGA
YFM
6
3000
RoHS & Green
CUNIPD
Level-1-260C-UNLIM
-40 to 85
TPS62679ZYFMT
ACTIVE
DSLGA
YFM
6
250
RoHS & Green
CUNIPD
Level-1-260C-UNLIM
-40 to 85
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jan-2022
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of