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TPS62730, TPS62732, TPS62733
SLVSAC3D – MAY 2011 – REVISED DECEMBER 2014
TPS6273x Step-Down Converter With Bypass Mode for Ultra Low-Power Wireless
Applications
1 Features
3 Description
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•
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The TPS62730 is a high frequency synchronous stepdown DC-DC converter optimized for ultra low-power
wireless applications. The device is optimized to
supply TI's Low-Power Wireless sub 1-GHz and 2.4GHz RF transceivers and System-On-Chip (SoC)
solutions. The TPS62730 reduces the current
consumption drawn from the battery during TX and
RX mode by a high efficient step-down voltage
conversion. The device provides an output current of
up to 100 mA and allows the use of tiny and low-cost
chip inductors and capacitors. With an input voltage
range of 1.9 V to 3.9 V, the device supports Liprimary battery chemistries such as Li-SOCl2, LiSO2, Li-MnO2, and also two cell alkaline batteries.
1
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•
•
•
•
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•
•
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Input Voltage Range VIN From 1.9 V to 3.9 V
Typ. 30-nA Ultra Low-Power Bypass Mode
Typ. 25-μA DC-DC Quiescent Current
Internal Feedback Divider Disconnect
Typical 2.1-Ω Bypass Switch Between VIN and
VOUT
Automatic Transition from DC-DC to Bypass Mode
Up to 3-MHz Switch Frequency
Up to 95% DC-DC Efficiency
Open-Drain Status Output STAT
Output Peak Current up to 100 mA
Fixed Output Voltages 1.9 V, 2.05 V, 2.1 V, 2.3 V
Small External Output Filter Components 2.2 μH
and 2.2 μF
Optimized For Low Output Ripple Voltage
Small 1 × 1.5 × 0.6-mm3 USON Package
12-mm2 Minimum Solution Size
The TPS62730 features an Ultra Low-Power bypass
mode with typical 30-nA current consumption to
support sleep and low power modes of TI's CC2540
Bluetooth Low Energy and CC430 SoC solutions. In
this bypass mode, the output capacitor of the DC-DC
converter is connected through an integrated typical
2.1-Ω bypass switch to the battery.
Device Information(1)
2 Applications
•
•
•
PART NUMBER
CC2540 Bluetooth™ Low-Energy
System-On-Chip Solution
Low-Power Wireless Applications
RF4CE, Metering
PACKAGE
BODY SIZE (NOM)
USON (6)
1.45 mm x 1.00 mm
TPS62730
TPS62732
TPS62733
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application
CIN
2.2µF
TPS62730
VIN
GND
SW
VOUT
ON
BYP
ON/BYP
STAT
* At VIN < 2.2V, VOUT tracks VIN
L 2.2mH
VOUT
2.1V
29
IBAT NO TPS62730
27
COUT
2.2µF
Rpullup
Battery Current - mA
VIN
2.2V - 3.9V*
Battery Current Reduction Using TPS62730
25
Battery Current
Reduction @
CC2540
0dBm CW TX
Power
23
21
IBAT With TPS62730
19
17
15
2
Battery Current Reduction of CC2540
2.4GHz Bluetooth Low Energy
System-On-Chip Solution
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
3.8
Battery Voltage - VBAT
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS62730, TPS62732, TPS62733
SLVSAC3D – MAY 2011 – REVISED DECEMBER 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Description (Continued) ........................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
3
4
8.1
8.2
8.3
8.4
8.5
8.6
4
4
4
4
5
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 8
9.1 Overview ................................................................... 8
9.2 Functional Block Diagram ......................................... 8
9.3 Feature Description................................................... 8
9.4 Device Functional Modes........................................ 10
10 Application and Implementation........................ 11
10.1 Application Information.......................................... 11
10.2 Typical Application ................................................ 11
10.3 System Examples ................................................. 18
11 Power Supply Recommendations ..................... 19
12 Layout................................................................... 19
12.1 Layout Guidelines ................................................. 19
12.2 Layout Example .................................................... 19
13 Device and Documentation Support ................. 20
13.1
13.2
13.3
13.4
13.5
Device Support......................................................
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
14 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
Changes from Revision C (December 2012) to Revision D
•
2
Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
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Copyright © 2011–2014, Texas Instruments Incorporated
Product Folder Links: TPS62730 TPS62732 TPS62733
TPS62730, TPS62732, TPS62733
www.ti.com
SLVSAC3D – MAY 2011 – REVISED DECEMBER 2014
5 Description (Continued)
In DC-DC operation mode the device provides a fixed output voltage to the system. With a switch frequency up
to 3 MHz, the TPS62730 features low output ripple voltage and low noise even with a small 2.2-uF output
capacitor. The automatic transition into bypass mode during DC-DC operation prevents an increase of output
ripple voltage and noise once the DC-DC converter operates close to 100% duty cycle. The device automatically
enters bypass mode once the battery voltage falls below the transition threshold VIT BYP . The TPS62730 is
available in a 1 × 1.5-mm2 6-pin USON package.
6 Device Comparison Table
TA
PART NUMBER
OUTPUT VOLTAGE [V]
TPS62730
TPS62731
–40°C to 85°C
(1)
AUTOMATIC BYPASS MODE TRANSITION THRESHOLDS
VIT BYP
2.10
(1)
VIT BYP [V]
RISING VIN
VIT BYP [V]
FALLING VIN
VIT BYP [mV]
HYSTERESIS
2.25
2.20
50
2.05
2.2
2.15
50
TPS62732
1.90
2.10
2.05
50
TPS62733
2.3
2.48
2.41
70
TPS62734
(1)
2.10
2.28
2.23
50
TPS62735
(1)
2.10
2.33
2.23
100
Device status is product preview. Contact TI for more details / samples.
7 Pin Configuration and Functions
DRY Package
6 Pins
Top View
STAT
VOUT
ON/BYP
Pin Functions
PIN
NAME
NO
I/O
DESCRIPTION
VIN
3
PWR
VIN power supply pin. Connect this pin close to the VIN terminal of the input capacitor. A ceramic capacitor
of 2.2 µF is required.
GND
4
PWR
GND supply pin. Connect this pin close to the GND terminal of the input and output capacitor.
ON/BYP
5
IN
SW
2
OUT
VOUT
6
IN
STAT
1
OUT
This is the mode selection pin of the device. Pulling this pin to low forces the device into ultra low-power
bypass mode. The output of the DC-DC converter is connected to VIN through an internal bypass switch.
Pulling this pin to high enables the DC-DC converter operation. This pin must be terminated and is
controlled by the system.
This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to this
terminal.
Feedback Pin for the internal feedback divider network and regulation loop. The internal bypass switch is
connected between this pin and VIN. Connect this pin directly to the output capacitor with short trace.
This is the open-drain status output with active low level. An internal comparator drives this output. The pin
is high impedance with ON/BYP = low. With ON/BYP set to high the device and the internal VOUT
comparator becomes active. The active low STAT pin indicates if the DC-DC regulator is settled and the
output voltage above the VTSTAT threshold. If not used, this pin can be left open.
Copyright © 2011–2014, Texas Instruments Incorporated
Product Folder Links: TPS62730 TPS62732 TPS62733
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TPS62730, TPS62732, TPS62733
SLVSAC3D – MAY 2011 – REVISED DECEMBER 2014
www.ti.com
8 Specifications
8.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VIN, SW, VOUT
–0.3
4.2
V
ON/BYP, STAT
–0.3
VIN + 0.3 ≤
4.2
V
Operating junction temperature, TJ
–40
125
°C
Storage temperature, Tstg
–65
150
°C
Voltage (2)
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to network ground pin.
8.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
Machine model (MM), all pins
±150
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
8.3 Recommended Operating Conditions
Operating ambient temperature TA = –40 to 85°C (unless otherwise noted)
MIN
Supply voltage VIN
1.9
Effective inductance
1.5
NOM
MAX
UNIT
3.9
2.2
V
3
μH
μF
Effective output capacitance connected to VOUT
1.0
10
Operating junction temperature range, TJ
–40
125
TA Operating free air temperature range
-40
85
°C
8.4 Thermal Information
TPS6273x
THERMAL METRIC (1)
DRY
UNIT
6 PINS
θJA
Junction-to-ambient thermal resistance
293.8
θJCtop
Junction-to-case (top) thermal resistance
165.1
θJB
Junction-to-board thermal resistance
160.8
ψJT
Junction-to-top characterization parameter
27.3
ψJB
Junction-to-board characterization parameter
159.6
θJCbot
Junction-to-case (bottom) thermal resistance
65.8
(1)
4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Submit Documentation Feedback
Copyright © 2011–2014, Texas Instruments Incorporated
Product Folder Links: TPS62730 TPS62732 TPS62733
TPS62730, TPS62732, TPS62733
www.ti.com
SLVSAC3D – MAY 2011 – REVISED DECEMBER 2014
8.5 Electrical Characteristics
VIN = 3.0 V, VOUT = 2.1 V, ON/BYP = VIN, TA = –40°C to 85°C typical values are at TA = 25°C (unless otherwise noted), CIN =
2.2 μF, L = 2.2 μH, COUT = 2.2 μF
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
IQ
1.9
Operating quiescent current
Shutdown current, Bypass Switch Activated (1)
ISD
3.9
ON/BYP = high, IOUT = 0mA. VIN = 3 V
device not switching
25
IOUT = 0 mA. device switching, VIN = 3.0 V,
VOUT = 2.1 V
34
ON/BYP = high, Bypass switch active, VIN
= VOUT = 2.1 V
23
ON/BYP = GND, leakage current into VIN
30
ON/BYP = GND, leakage current into VIN,
TA = 60°C
110
V
40
μA
550
nA
ON/BYP
VIH TH
Threshold for detecting high ON/BYP
1.9 V ≤ VIN ≤ 3.9 V , rising edge
VIL
Threshold for detecting low ON/BYP
1.9 V ≤ VIN ≤ 3.9 V , falling edge
TH
IIN
0.8
0.4
Input bias Current
1
0.6
0
V
V
50
nA
POWER SWITCH
RDS(ON)
ILIMF
High side MOSFET on-resistance
600
VIN = 3.0 V
Low Side MOSFET on-resistance
Forward current limit MOSFET high side
Forward current limit MOSFET low side
mΩ
350
VIN = 3.0 V, open loop
410
mA
410
mA
BYPASS SWITCH
RDS(ON)
VIT BYP
Bypass Switch on-resistance
Automatic Bypass Switch Transition
Threshold (Activation / Deactivation)
ON/BYP
= high
VIN = 2.1 V, IOUT = 20 mA, TJmax = 85°C
2.9
VIN = 3 V
2.1
TPS62730 (2.1 V)
TPS62731 (2.05 V)
TPS62732 (1.9 V)
TPS62733 (2.3 V)
TPS62734 (2.1 V)
TPS62735 (2.3 V)
(1)
3.8
ON / falling VIN
2.14
2.20
2.3
OFF/ rising VIN
2.19
2.25
2.35
ON / falling VIN
2.15
OFF / rising VIN
2.20
ON / falling VIN
2.05
OFF / rising VIN
2.10
ON / falling VIN
2.41
OFF/ rising VIN
2.48
ON / falling VIN
2.23
OFF / rising VIN
2.28
ON / falling VIN
2.23
OFF / rising VIN
2.33
Ω
V
Shutdown current into VIN pin, includes internal leakage
Copyright © 2011–2014, Texas Instruments Incorporated
Product Folder Links: TPS62730 TPS62732 TPS62733
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SLVSAC3D – MAY 2011 – REVISED DECEMBER 2014
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Electrical Characteristics (continued)
VIN = 3.0 V, VOUT = 2.1 V, ON/BYP = VIN, TA = –40°C to 85°C typical values are at TA = 25°C (unless otherwise noted), CIN =
2.2 μF, L = 2.2 μH, COUT = 2.2 μF
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
STAT STATUS OUTPUT (OPEN DRAIN)
VTSTAT
Threshold level for STAT OUTPUT in % from
VOUT
ON/BYP = high and regulator is ready, VIN
falling
95%
ON/BYP = high and regulator is ready, VIN
rising (2)
98%
VOL
Output Low Voltage
Current into STAT pin I = 500 μA, VIN = 2.3
V
0.4
VOH
Output High Voltage
Open drain output, external pull up resistor
VIN
ILKG
Leakage into STAT pin
ON/BYP = GND, VIN = VOUT = 3 V
V
0
50
nA
REGULATOR
tONmin
Minimum ON time
VIN = 3.0 V, VOUT = 2.1 V, IOUT = 0 mA
tOFFmin
Minimum OFF time
VIN = 2.3 V
tStart
Regulator start up time from transition ON/BYP = VIN = 3.0 V, VOUT = 3.0 V
high to STAT = low
180
ns
50
ns
50
μs
OUTPUT
VREF
Internal Reference Voltage
0.70
VOUT Feedback Voltage Comparator Threshold
Accuracy
VVOUT
ILK_SW
(2)
(3)
6
VIN = 3.0 V
V
TA = 25°C
–1.5%
0%
1.5%
TA = –40°C to
85°C
–2.5%
0%
2.5%
DC output voltage load regulation
IOUT = 1 mA to 50 mA VIN = 3.0 V, VOUT =
2.1 V
DC output voltage line regulation
IOUT = 20 mA, 2.4 V ≤ VIN ≤ 3.9 V
Leakage current into SW pin
VIN = VOUT = VSW = 3.0 V, ON/Byp= GND
(3)
-0.01
%/mA
0.01
%/V
0.0
100
nA
The STAT output comparator is enabled once the rising input voltage exceeds the minimum input voltage VIN min of 1.9 V. In case of
the 1.9 V output voltage option, the STAT output is active once the rising input voltage VIN exceeds 1.9 V.
The internal resistor divider network is disconnected from VOUT pin.
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Product Folder Links: TPS62730 TPS62732 TPS62733
TPS62730, TPS62732, TPS62733
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SLVSAC3D – MAY 2011 – REVISED DECEMBER 2014
8.6 Typical Characteristics
35
TA = 85°C
IQ - Operating Quiescent Current - mA
ISD - Shutdown Current Bypass Mode - nA
1k
TA = 70°C
TA = 60°C
100
TA = 50°C
TA = 25°C
TA = -40°C
10
1.9
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
TA = 50°C
25
20
TA = 25°C
15
TA = -40°C
TA = 0°C
5
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
3.9
VIN - Input Voltage - V
Figure 2. Operating Quiescent Current vs Input Voltage
Figure 1. Shutdown Current Bypass Mode vs Input Voltage
1.6
4
TA = 85°C
rDS(ON) - Drain-Source On-State Resistance - W
rDS(ON) - Drain-Source On-State Resistance - W
TA = -20°C
10
VIN - Input Voltage - V
TA = 70°C
3.5
TA = 60°C
3
TA = 50°C
TA = 25°C
2.5
2
TA = 0°C
TA = -20°C
1.5
TA = -40°C
1
0.5
0
1.9
TA = 85°C
TA = 70°C
30
0
1.9
3.9
TA = 60°C
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
TA = 85°C
TA = 60°C
1.2
TA = 50°C
TA = 25°C
1
TA = 0°C
0.8
0.6
TA = -20°C
TA = -40°C
0.4
0.2
0
1.9
3.9
TA = 70°C
1.4
2.1
2.3
VIN - Input Voltage - V
2.5
2.7
2.9
3.1
3.3
3.5
3.7
3.9
VIN - Input Voltage - V
Figure 3. rDS(ON) Bypass vs Input Voltage
Figure 4. rDS(ON) PMOS vs Input Voltage
rDS(ON) - Drain-Source On-State Resistance - W
0.7
TA = 85°C
TA = 70°C
0.6
TA = 60°C
TA = 50°C
0.5
TA = 25°C
0.4
0.3
TA = 0°C
TA = -20°C
TA = -40°C
0.2
0.1
0
1.9
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5 3.7
3.9
VIN - Input Voltage - V
Figure 5. rDS(ON) NMOS vs Input Voltage
Copyright © 2011–2014, Texas Instruments Incorporated
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SLVSAC3D – MAY 2011 – REVISED DECEMBER 2014
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9 Detailed Description
9.1 Overview
The TPS62730 combines a synchronous buck converter for high efficient voltage conversion and an integrated
ultra low power bypass switch to support low power modes of modern micro controllers and RF ICs.
9.2 Functional Block Diagram
VIN
Automatic
Bypass
Transition
VIT BYP
VIN
+
VREF
0.70 V
Bandgap
Undervoltage
Lockout
Current
Limit Comparator
Limit
High Side
/BYPASS
/BYPASS
PMOS
VOUT
ON/BYP
Softstart
VIN
Min. On Time
Control
Logic
FB
Min. OFF Time
Gate Driver
Anti
Shoot-Through
VREF
NMOS
VOUT
Integrated
Feed Back
Network
SW
Limit
Low Side
Error
Comparator
Zero
Current Limit Comparator
VTSTAT
ON/BYP
GND
STAT
ON/BYP
+
9.3 Feature Description
9.3.1 DCS-Control™
The TPS62730 includes TI's DCS-Control, an advanced regulation topology, that combines the advantages of
hysteretic and voltage mode control architectures. While a comparator stage provides excellent load transient
response, an additional voltage feedback loop ensures high DC accuracy as well. The DCS-Control enables
switch frequencies up to 3 MHz, excellent transient and AC load regulation as well as operation with small and
cost-competitive external components. The TPS6273x devices offer fixed output voltage options featuring
smallest solution size by using only three external components. Furthermore this step-down converter provides
excellent low output voltage ripple over the entire load range which makes this part ideal for RF applications. In
the ultra low-power bypass mode, the output of the device VOUT is directly connected to the input VIN through
the internal bypass switch. In this mode, the buck converter is shut down and consumes only 30 nA typical input
current. Once the device is turned from ultra low-power bypass mode into buck converter operation for an RF
transmission, all the internal circuits of the regulator are activated within a start up time tStart of typical 50 µs.
During this time the bypass switch is still turned on and maintains the output VOUT connected to the input VIN.
Once the DC-DC converter is settled and ready to operate, the internal bypass switch is turned off and the
system is supplied by the output capacitor and the other decoupling capacitors. The buck converter kicks in once
the capacitors connected to VOUT are discharged to the level of the nominal buck converter output voltage.
Once the output voltage falls below the threshold of the internal error comparator, a switch pulse is initiated, and
the high side switch of the DC-DC converter is turned on. The high-side switch remains turned on until a
minimum on time of tONmin expires and the output voltage trips the threshold of the error comparator or the
inductor current reaches the high side switch current limit. Once the high side switch turns off, the low side switch
8
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SLVSAC3D – MAY 2011 – REVISED DECEMBER 2014
Feature Description (continued)
rectifier is turned on and the inductor current ramps down until the high side switch turns on again or the inductor
current reaches zero. The converter operates in the PFM (pulse frequency modulation) mode during light loads,
which maintains high efficiency over a wide load current range. In PFM mode, the device starts to skip switch
pulses and generates only single pulses with the on time tONmin. The PFM mode of TPS62730 is optimized for
low output ripple voltage if small external components are used.
The on time tONmin can be estimated to:
V
t ONmin = OUT ´ 260 ns
VIN
where
•
•
•
•
tONmin: High side switch on time [ns]
VIN: Input voltage [V]
VOUT: Output voltage [V]
(1)
Therefore, the peak inductor current in PFM mode is approximately:
(V - VOUT )
´ t ONmin
ILPFMpeak = IN
L
where
•
•
•
•
VIN: Input voltage [V]
VOUT: Output voltage [V]
L : Inductance [μH]
ILPFMpeak : PFM inductor peak current [mA]
(2)
9.3.2 ON/BYP Mode Selection
The DC-DC converter is activated when ON/BYP is set high. For proper operation, the ON/BYP pin must be
terminated and may not be left floating. This pin is controlled by the RF transceiver or micro controller for proper
mode selection. Pulling the ON/BYP pin low activates the ultra low-power bypass mode with typical 30-nA
current consumption. In this mode, the internal bypass switch is turned on and the output of the DC-DC converter
is connected to the battery VIN. All other circuits like the entire internal-control circuitry, the High Side and Low
Side MOSFETs of the DC-DC output stage are turned off as well the internal resistor feedback divider is
disconnected. The ON/BYP must be controlled by a microcontroller for proper mode selection. In case of
CC2540, connect this to the power down signal which is output on one of the P1.x ports (see CC2540 user
guide).
9.3.3 STAT Open-Drain Output
The STAT output is active when the device is enabled (EN/BYP = high) and indicates the status of the output
voltage. The STAT output is a open-drain output with active low level and needs a external pullup resistor to
indicate a high level. It is driven by an internal comparator which monitors the output voltage VOUT. The STAT pin
is tied to low level, if the output voltage VOUT is considered as valid and exceeding the threshold VTSTAT (95% of
VOUT for falling VIN and 98% of VOUT for rising VIN). The pin is high impedance with the ON/BYP pin set to low
level or VOUT is below the VTSTAT threshold. If not used, the STAT pin can be left open. See Figure 6 and
Figure 7.
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Feature Description (continued)
VIN: 1V to 3.3V
BYPASS:
VO = VIN
VIT_BYP falling
VIT_BYP rising
VO = 2.1V
VSTAT rising
VSTAT falling
Figure 6. Operation Mode Transition ON/BYP = High/Low,
RLoad = 1k
Figure 7. STAT Pin / VOUT Behavior With EN/BYP = High,
RLoad = 1k
9.4 Device Functional Modes
9.4.1 Start-Up
Once the device is supplied with a battery voltage, the bypass switch is activated. If the ON/BYP pin is set to
high, the device operates in bypass mode until the DC-DC converter has settled and can kick in. During start-up,
high peak currents can flow over the bypass switch to charge up the output capacitor and the additional
decoupling capacitors in the system.
9.4.2 Automatic Transition from DC-DC to Bypass Operation
With the ON/BYP pin set to high, the TPS62730 is active and features an automatic transition between DC-DC
and bypass mode to reduce the output ripple voltage to zero. Once the input voltage comes close to the output
voltage of the DC-DC converter, the DC-DC converters operates close to 100% duty cycle operation. At this
operating condition, the switch frequency would start to drop and would lead to increased output ripple voltage.
The internal bypass switch is turned on once the battery voltage at VIN trips the Automatic Bypass Transition
Threshold VIT BYP for falling VIN. The DC-DC regulator is turned off and therefore it generates no output ripple
voltage. Due to the output is connected through the bypass switch to the input, the output voltage follows the
input voltage minus the voltage drop across the internal bypass switch. In this mode the current consumption of
the DC-DC converter is reduced to typically 23 µA. Once the input voltage increases and trips the bypass
deactivation threshold VIT BYP for rising VIN, the DC-DC regulator turns on and the bypass switch is turned off.
See Figure 7 and Figure 24.
9.4.3 Internal Current Limit
The TPS62730 integrates a High Side and Low Side MOSFET current limit to protect the device against heavy
load or short circuit when the DC-DC converter is active. The current in the switches is monitored by current limit
comparators. When the current in the High Side MOSFET reaches its current limit, the High Side MOSFET is
turned off and the Low Side MOSFET is turned on to ramp down the current in the inductor. The High Side
MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has fallen below the
threshold of its current limit comparator. The bypass switch does not feature a current limit to support lowest
current consumption.
10
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The TPS62730 is a high-frequency synchronous step down DC-DC converter optimized for ultra low-power
wireless applications. The device is optimized to supply TI's Low-Power Wireless sub 1-GHz and 2.4-GHz RF
transceivers and system-on-chip (SoC) solutions.
10.2 Typical Application
VIN
2.2V - 3.9V*
CIN
2.2µF
TPS62730
VIN
GND
L 2.2mH
SW
VOUT
COUT
2.2µF
ON
BYP
ON/BYP
VOUT
2.1V
Rpullup
STAT
* At VIN < 2.2V, VOUT tracks VIN
Figure 8. Typical Application
10.2.1 Design Requirements
The TPS6273x is a highly integrated DC-DC converter. The output voltage is internally fixed and does not require
and external feedback divider network. For proper operation only a input- and output capacitor and an inductor is
required. Table 1 shows the components used for the application characteristic curves.
Table 1. List of Components
REFERENCE
DESCRIPTION
VALUE
TPS62730
Step-down converter with bypass
mode
CIN, COUT
Ceramic capacitor 0402 X5R 6.3V
GRM155R60J225
L
Inductor MIPSZ2012 2R2
MANUFACTURER
DIMENSIONS
Texas Instruments
1.5 x 1.0 x 0.55 mm
2.2 µF
Murata
1.0 x 0.5 x 0.5 mm
2.2 µH
FDK
2.0 x 1.2 x 1.0 mm
10.2.2 Detailed Design Procedure
10.2.2.1 Output Filter Design (Inductor and Output Capacitor)
The TPS62730 is optimized to operate with effective inductance values in the range of 1.5 μH to 3 μH and with
effective output capacitance in the range of 1.0 μF to 10 μF. The internal compensation is optimized to operate
with an output filter of L = 2.2 μH and COUT = 2.2 μF, which gives and LC output filter corner frequency of:
fC =
1
2 ´ p ´ (2.2 mH ´ 2.2 mF )
= 72kHz
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10.2.2.2 Inductor Selection
The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage
ripple and the efficiency. The selected inductor must be rated for its DC resistance and saturation current. The
inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI N or VO UT. Equation 4
calculates the maximum inductor current under static load conditions. The saturation current of the inductor
should be rated higher than the maximum inductor current as calculated with Equation 5.
Vout
1Vin
D IL = Vout ´
L ´ ¦
where
•
•
•
f = Switching Frequency
L = Inductor Value
ΔIL= Peak-to-Peak inductor ripple current
ILmax = Ioutmax +
(4)
DIL
2
where
•
•
ΔIL= Peak-to-Peak inductor ripple current
ILmax = Maximum Inductor current
(5)
In high-frequency converter applications, the efficiency is essentially affected by the inductor AC resistance (that
is, quality factor) and to a smaller extent by the inductor DCR value. To achieve high efficiency operation, care
should be taken in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing
the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor
size, increased inductance usually results in an inductor with lower saturation current.
The total losses of the coil consist of both the losses in the DC resistance, R(DC), and the following frequencydependent components:
• The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
• Additional losses in the conductor from the skin effect (current displacement at high frequencies)
• Magnetic field losses of the neighboring windings (proximity effect)
• Radiation losses
The following inductor series from different suppliers have been used with the TPS62730 converters.
Table 2. List of Inductors
INDUCTANCE
[μH]
DIMENSIONS
[mm3]
INDUCTOR TYPE
SUPPLIER
2.2
2.0 × 1.2 × 1.0
LQM21PN2R2NGC
Murata
2.2
2.0 × 1.2 × 1.0
MIPSZ2012
FDK
10.2.2.3 DC-DC Output Capacitor Selection
The DCS-Control scheme of the TPS62730 allows the use of tiny ceramic capacitors. Ceramic capacitors with
low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires
either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance
over temperature, become resistive at high frequencies. At light load currents the converter operate in power
save mode and the output voltage ripple is dependent on the output capacitor value and the PFM peak inductor
current.
10.2.2.4 Additional Decoupling Capacitors
In addition to the output capacitor there are further decoupling capacitors connected to the output of the
TPS62730. These decoupling capacitor are placed closely at the RF transmitter or micro controller. The total
capacitance of these decoupling capacitors should be kept to a minimum and should not exceed the values given
in the reference designs, see Figure 31 and Figure 32. During mode transition from DC-DC operation to bypass
mode the capacitors on the output VOUT are charged up to the battery voltage VIN through the internal bypass
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switch. During mode transition from bypass mode to DC-DC operation, these capacitors must be discharged by
the system supply current to the nominal output voltage threshold until the DC-DC converter will kick in. The
charge change in the output and decoupling capacitors can be calculated according to Equation 6. The energy
loss due to charge and discharge of the output and decoupling capacitors can be calculated according to
Equation 7.
dQCOUT _ CDEC = C COUT _ CDEC ´ (VIN - VOUT _ DC _ DC )
where
•
•
•
•
dQCOUT_CDEC : Charge change needed to charge up and discharge the output and decoupling capacitors from
VOUT_DC_DC to VIN and vice versa
CCOUT_CDEC: Total capacitance on the VOUT pin of the device, includes output and decoupling capacitors
VIN: Input (battery) voltage
VOUT_DC_DC: nominal DC-DC output voltage VOUT
(6)
(
2
ECh arg e _ Loss = 12 ´ C COUT _ CDEC ´ V IN - VOUT _ DC _ DC
2
)
where
•
•
•
CCOUT_CDEC: Total capacitance on the VOUT pin of the device, includes output and decoupling capacitors
VIN: Input (battery) voltage
VOUT_DC_DC: nominal DC-DC output voltage VOUT
(7)
10.2.2.5 Input Capacitor Selection
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering to ensure proper function of the device and to minimize input voltage
spikes. For most applications a 2.2 µF to 4.7 µF ceramic capacitor is recommended. The input capacitor can be
increased without any limit for better input voltage filtering.
Table 3 shows a list of tested input/output capacitors.
10.2.2.5.1 Input Buffer Capacitor Selection
In addition to the small ceramic input capacitor a larger buffer capacitor CBuf is recommended to reduce voltage
drops and ripple voltage. When using battery chemistries like Li-SOCl2, Li-SO2, Li-MnO2, the impedance of the
battery must be considered. These battery types tend to increase their impedance depending on discharge
status and often can support output currents of only a few mA. Therefore a buffer capacitor is recommended to
stabilize the battery voltage during DC-DC operations (for example, for an RF transmission). A voltage drop on
the input of the TPS62730 during DC-DC operation impacts the advantage of the step-down conversion for
system power reduction. Furthermore the voltage drops can fall below the minimum recommended operating
voltage of the device and leads to an early system cut off. Both impacts effects reduce the battery life time. To
achieve best performance and to extract most energy out of the battery, a good procedure is to design the select
the buffer capacitor value for an voltage drop below 50 mVpp during DC-DC operation. The capacitor value
strongly depends on the used battery type, as well the current consumption during an RF transmission as well
the duration of the transmission.
Table 3. List of Capacitor
CAPACITANCE [μF]
SIZE
CAPACITOR TYPE
SUPPLIER
2.2
0402
GRM155R60J225
Murata
10.2.2.6 Checking Loop Stability
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:
• Switching node, SW
• Inductor current, IL
• Output ripple voltage, VOUT(AC)
Basic signals must be measured when evaluating a switching converter. When the switching waveform shows
large duty cycle jitter or the output voltage or inductor current shows oscillations, the regulation loop may be
unstable. This is often a result of board layout and/or L-C combination.
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As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between
the application of the load transient and the turn on of the High Side MOSFET, the output capacitor must supply
all of the current required by the load. VOUT immediately shifts by an amount equal to ΔI(LOAD) x ESR, where ESR
is the effective series resistance of COUT. ΔI(LOAD) begins to charge or discharge CO generating a feedback error
signal used by the regulator to return VOUT to its steady-state value. The results are most easily interpreted when
the device operates in PWM mode.
During this recovery time, VOUT can be monitored for settling time, overshoot or ringing that helps judge the
converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin.
Because the damping factor of the circuitry is directly related to several resistive parameters (for example,
MOSFET rDS(on)) that are temperature dependant, the loop stability analysis must be done over the input voltage
range, load current range, and temperature range.
10.2.3 Application Curves
100
100
IOUT = 50 mA
VIN = 2.1 V
Bypass
95
95
90
75
70
65
55
50
0.1
1
10
IO - Output Current - mA
80
70
IOUT = 100 mA
TPS62730
VOUT = 2.1 V,
ON/BYP = High,
L = 2.2 mH,
COUT = 2.2 mF
60
55
50
2.1
100
2.3
2.5
2.7 2.9 3.1 3.3
VIN - Input Voltage - V
3.5
3.7
3.9
Figure 10. Efficiency vs Input Voltage
2.142
2.226
TPS62730
VOUT = 2.1 V,
ON/BYP = High,
L = 2.2 mH,
2.121 COUT = 2.2 mF
2.205
VIN = 3.3 V
VOUT - Output Voltage DC - V
IOUT = 1 mA
VIN = 3.6 V
2.1
VIN = 2.3 V
VIN = 2.7 V
2.079
0.1
1
10
IOUT - Output Current - mA
IOUT = 10 mA
IOUT = 19 mA
2.163
IOUT = 25 mA
2.142
2.121
2.1
IOUT = 50 mA
2.079
2.058
100
Figure 11. Output Voltage vs Output Current
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2.184
TPS62730
VOUT = 2.1 V,
ON/BYP = High,
L = 2.2 mH,
COUT = 2.2 mF,
VIN rising
IOUT = 100 mA
VIN = 2.1 V
2.058
0
IOUT = 10 mA
75
Figure 9. Efficiency vs Output Current
VIN = 3 V
IOUT = 1 mA
65
TPS62730
VOUT = 2.1 V,
ON/BYP = High,
L = 2.2 mH,
COUT = 2.2 mF
60
VOUT - Output Voltage DC - V
IOUT = 100 mA
85
VIN = 2.3 V
VIN = 2.7 V
VIN = 3 V
VIN = 3.6 V
80
Efficiency - %
Efficiency - %
85
14
IOUT = 25 mA
90
2.037
1.9
2.1
2.3
2.5 2.7 2.9 3.1 3.3
VIN - Input Voltage - V
3.5
3.7
3.9
Figure 12. Output Voltage vs Input Voltage
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2.3
2.3
ON/BYP = high
automatic transition
into bypass mode
falling VIN
IOUT = 1 mA 25ºC
2.2
VOUT - Output Voltage - V
VOUT - Output Voltage - V
2.25
ON/BYP = high
automatic transition
into bypass mode
2.25 rising VIN
IOUT = 1 mA -40ºC
IOUT = 1 mA 85ºC
IOUT = 20 mA -40ºC
2.15 IOUT = 20 mA 25ºC
IOUT = 20 mA 85ºC
2.1
bypass
mode
2
1.9
IOUT = 1 mA 85ºC
2.2 I
OUT = 20 mA -40ºC
IOUT = 20 mA
2.15 I
OUT = 20 mA 85ºC
2.1
2
bypass mode
DC/DC mode
DC/DC
mode
2.1
2.2
2.3
VIN - Input Voltage - V
2.4
2
1.9
2.5
Figure 13. Automatic Transition into Bypass Mode Falling VIN
2
2.1
2.2
2.3
VIN - Input Voltage - V
2.4
2.5
Figure 14. Automatic Transition into Bypass Mode - Rising
VIN
3500
30
L = 2.2 mH Murata LQM21PN2R2,
COUT = 2.2 mF,
3000
ON/BYP = VIN
V =3V
VIN = 3.3 V
IN
VIN = 3 V
VOUT - pktopk - mV
VIN = 2.5 V
2000
1500
20
15
10
VIN = 2.3 V
1000
VIN = 3.6 V
VIN = 3.3 V
500
0
0
10
TPS62730
VOUT = 2.1V
ON/BYP = VIN
L = 2.2mH
COUT = 2.2mF
VIN = 3.6 V
25
VIN = 2.7 V
2500
f - Frequency - kHz
IOUT = 1 mA 25ºC
2.05
2.05
20
30
40
IOUT - Output Current - mA
VIN = 2.5 V
VIN = 2.7 V
5
VIN = 2.3 V
0
0
50
10
20
30
40
IOUT - Output Current - mA
50
Figure 16. VOUT vs IOUT vs VIN
Figure 15. Switching Frequency vs IOUT vs VIN
100
5
90
VIN = 2.7 V,
IOUT = 25 mA,
80
COUT = 2.2 mF,
4.5
4
L = 2.2 mH
VIN = 2.7 V,
IOUT = 25 mA (RLOAD = 84W),
COUT = 2.2 mF,
L = 2.2 mF
70
3.5
Noise Density [mV/√Hz]
PSRR - Power Supply Rejection Ratio - dB
IOUT = 1 mA -40ºC
60
50
40
30
3
2.5
2
1.5
20
1
10
0
0.5
10
100
1k
10k
100k
f - Frequency - Hz
1M
10M
0
100
1k
10k
100k
1M
f - Frequency - Hz
Figure 17. PSRR vs Frequency
Figure 18. Noise Density vs Frequency
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TPS62730
VOUT = 2.1 V
ON/BYP = VIN
www.ti.com
TPS62730
VOUT = 2.1 V
VIN = 3.0 V
ON/BYP = VIN
IOUT = 10mA
L = 2.2 mH
COUT = 2.2 mF
VOUT
IOUT = 1mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
SW
IL
Figure 19. DC-DC Mode Operation IOUT = 10 mA
VOUT
TPS62730
VOUT = 2.1 V
VIN = 3.0 V
ON/BYP = VIN
IOUT = 18mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
SW
Figure 20. DC-DC Mode Operation IOUT = 1 mA
TPS62730
VOUT = 2.1 V
VIN = 3.0 V
ON/BYP = VIN
VOUT
IOUT = 50mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
SW
IL
IL
Figure 22. DC-DC Mode Operation IOUT = 50 mA
Figure 21. DC-DC Mode Operation IOUT = 18 mA
TPS62730
VOUT = 2.1 V
VIN = 2.3V to 2.7V
ON/BYP = VIN
Automatic Bypass Mode
2.1V
TPS62730
VOUT = 2.1 V
VIN = 1.9V to 2.6V
ON/BYP = VIN
1.9V
IOUT = 20mA to1mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
Figure 23. DC-DC Mode Operation Line and Load Transient
Performance
16
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Status Output
IOUT = 30mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
Figure 24. Automatic Bypass Transition with Falling /
Rising Input Voltage VIN
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IOUT = 1mA to 50mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
TPS62730
VOUT = 2.1 V
VIN = 3.0V
ON/BYP = VIN
50mA/Div
50mA/Div
Status Output
IOUT = 1mA to 50mA
TPS62730
VIN = 3.0V
L = 2.2 mH
ON/BYP = GND COUT = 2.2 mF
CLoad = 3.6mF
Status Output
Figure 26. Bypass Mode Operation VOUT AC Behavior
ON/BYP = GND
Figure 25. DC-DC Mode VOUT AC Load Regulation
Performance
1m
TPS62730
VOUT = 2.1 V
VIN = 0V to 3.0 V
ON/BYP = VIN
RLoad = 120W
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
Source resistance = 1W
800m
Output noise [V]
700m
IBAT 1A/Div
Ref. Lev. 1mV
RBW 30kHz
VBW 20kHz
SWT 42ms
TPS62730
VOUT = 2.1 V
ON/BYP = VIN
RLoad = 82W
IOUT = 26mA
L = 2.2 mH
COUT = 2.2 mF
900m
600m
VIN = 2.3V
500m
VIN = 3.6V
400m
VIN = 3.0V
300m
VIN = 2.7V
200m
100m
10n
Start 0Hz
Figure 27. Start-Up Behavior
Stop 10 MHz
1MHz/Div
Frequency
Figure 28. Spurious Output Noise TPS62730 IOUT 26 mA
29
IBAT NO TPS62730
DC/DC Operation
27
Battery Current - mA
Bypass Operation
ON/BYP
25
Battery Current
Reduction @
CC2540
0dBm CW TX
Power
23
TPS62730
VIN = 2.3V
IOUT = 1mA to 50mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
21
IBAT With TPS62730
19
17
15
2
50mA/Div
Battery Current Reduction of CC2540
2.4GHz Bluetooth Low Energy
System-On-Chip Solution
2.2
2.4
2.6
2.8
3
3.2
3.4
Status Output
3.6
3.8
Battery Voltage - VBAT
Figure 29. Battery Current Reduction vs Battery Voltage
Figure 30. Mode Transition ON/BYP Behavior
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10.3 System Examples
TPS62730
3V
Battery
CIN
2.2µF
CBUF
VIN
L 2.2mH
SW
VOUT
GND
VCC2540
2.1V
COUT
2.2µF
STAT
ON/BYP
Power Down Signal
P1.2 PMUX
DVDD 1
DVDD 2
AVDD 6
AVDD 5
AVDD 3
AVDD 1,2,4
L BEAD
VCC2540 1000W
@100MHz
DCOUPL
2.2µF 1µF
CC2540
1µF
5x 100nF
CC2540 power supply decoupling capacitors
Figure 31. System Example CC2540
TPS62730
3V
Battery
CIN
2.2µF
CBUF
VIN
L 2.2mH
SW
VOUT
GND
ON/BYP
VCC430
COUT
2.2µF
2.1V
STAT
CC430
P1.1
Power Down Signal
VCC430
2x
1µF
VCC430
P1.2
DVCC 1,2,3
3x
100nF
L BEAD
12nH
2x
2pF
5x
100nF
AVCC_RF/Guard
1,2,3,4
AVCC
VCC430
1x
1µF
1x
100nF
CC430 power supply decoupling capacitors
Figure 32. System Example CC430
18
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11 Power Supply Recommendations
The power supply to the TPS62730 must have a current rating according to the supply voltage, output voltage
and output current of the TPS62730.
12 Layout
12.1 Layout Guidelines
As for all switching power supplies, the layout is an important step in the design. Especially RF designs demand
careful attention to the PCB layout. Care must be taken in board layout to get the specified performance. If the
layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well as
EMI problems and interference with RF circuits. It is critical to provide a low inductance, impedance ground path.
Therefore, use wide and short traces for the main current paths. The input capacitor should be placed as close
as possible to the IC pins as well as the inductor and output capacitor. Use a common Power GND node and a
different node for the Signal GND to minimize the effects of ground noise. Keep the common path to the GND
PIN, which returns the small signal components and the high current of the output capacitors as short as
possible to avoid ground noise. The VOUT line should be connected to the output capacitor and routed away
from noisy components and traces (for example, SW line).
12.2 Layout Example
L1
V IN
Total area
is less than
12mm²
C1
C2
GND
V OUT
Figure 33. Recommended PCB Layout for TPS62730
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13 Device and Documentation Support
13.1 Device Support
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 4. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS62730
Click here
Click here
Click here
Click here
Click here
TPS62732
Click here
Click here
Click here
Click here
Click here
TPS62733
Click here
Click here
Click here
Click here
Click here
13.3 Trademarks
Bluetooth is a trademark of Bluetooth SIG.
All other trademarks are the property of their respective owners.
13.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
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Copyright © 2011–2014, Texas Instruments Incorporated
Product Folder Links: TPS62730 TPS62732 TPS62733
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS62730DRYR
ACTIVE
SON
DRY
6
5000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RP
TPS62730DRYT
ACTIVE
SON
DRY
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RP
TPS62732DRYR
ACTIVE
SON
DRY
6
5000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RR
TPS62732DRYT
ACTIVE
SON
DRY
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RR
TPS62733DRYR
ACTIVE
SON
DRY
6
5000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
YA
TPS62733DRYT
ACTIVE
SON
DRY
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
YA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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