TPS628113HQWRWYRQ1

TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 TPS6281x-Q1 2.75-V to 6-V Adjustable-Frequency Step-Down Converter 1 Features 3 Description • The TPS6281x-Q1 is family of pin-to-pin 1-A, 2A, 3-A, and 4-A synchronous step-down DC/DC converters. All devices offer high efficiency and ease of use. The TPS6281x-Q1 family is based on a peak current mode control topology. The TPS6281xQ1 is designed for automotive applications such as infotainment and advanced driver assistance systems. Low resistive switches allow up to 4-A continuous output current at high ambient temperature. The switching frequency is externally adjustable from 1.8 MHz to 4 MHz and can also be synchronized to an external clock in the same frequency range. In PWM/PFM mode, the TPS6281x-Q1 automatically enter Power Save Mode at light loads to maintain high efficiency across the whole load range. The TPS6281x-Q1 provide 1% output voltage accuracy in PWM mode which helps design a power supply with high output voltage accuracy. The SS/TR pin allows setting the start-up time or forming tracking of the output voltage to an external source. This allows external sequencing of different supply rails and limiting the inrush current during start-up. • • • • • • • • • • • • • • • AEC-Q100 qualified for automotive applications – Device temperature grade 1: –40°C to +125°C TA Functional Safety-Capable – Documentation available to aid functional safety system design Input voltage range: 2.75 V to 6 V Family of 1 A, 2 A, 3 A and 4 A Quiescent current 15-µA typical Output voltage from 0.6 V to 5.5 V Output voltage accuracy ±1% (PWM operation) Adjustable soft start Forced PWM or PWM and PFM operation Adjustable switching frequency of 1.8 MHz to 4 MHz Precise ENABLE input allows – User-defined undervoltage lockout – Exact sequencing 100% duty cycle mode Active output discharge Spread spectrum clocking - optional Power good output with window comparator Package with wettable flanks 2 Applications • • • • • The TPS6281x-Q1 is available in a 3-mm × 2-mm VQFN package with wettable flanks. Device Information Infotainment head unit Hybrid and reconfigurable cluster Telematics control unit Surround view ECU, ADAS sensor fusion External amplifier PART NUMBER PACKAGE(1) BODY SIZE (NOM) VQFN 3 mm × 2 mm TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 (1) VIN 2.75 V - 6 V TPS62810-Q1 VIN 100 L 0.47 mH VOUT 95 SW 90 R1 EN 85 FB MODE/SYNC R2 COMP/FSET SS/TR CSS CFF PG R3 COUT 2 x 22 mF + 10 mF Efficiency (%) CIN 22 mF RCF For all available packages, see the orderable addendum at the end of the data sheet. 80 75 70 65 60 GND Simplified Schematic VIN = 4.0 V VIN = 5.0 V VIN = 6.0 V 55 50 100P 1m 10m 100m Output Current (A) 1 4 D002 Efficiency vs Output Current; VOUT = 3.3 V; PWM/ PFM; fS = 2.25 MHz An©IMPORTANT NOTICEIncorporated at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, Copyright 2021 Texas Instruments Submit Document Feedback intellectual property matters and other important disclaimers. PRODUCTION DATA. Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Device Comparison Table...............................................4 6 Pin Configuration and Functions...................................5 7 Specifications.................................................................. 6 7.1 Absolute Maximum Ratings ....................................... 6 7.2 ESD Ratings .............................................................. 6 7.3 Recommended Operating Conditions ........................6 7.4 Thermal Information ...................................................6 7.5 Electrical Characteristics ............................................7 7.6 Typical Characteristics................................................ 9 8 Parameter Measurement Information.......................... 10 8.1 Schematic................................................................. 10 9 Detailed Description......................................................12 9.1 Overview................................................................... 12 9.2 Functional Block Diagram......................................... 12 9.3 Feature Description...................................................13 9.4 Device Functional Modes..........................................15 10 Application and Implementation................................ 18 10.1 Application Information........................................... 18 10.2 Typical Application.................................................. 20 10.3 System Examples................................................... 31 11 Power Supply Recommendations..............................34 12 Layout...........................................................................35 12.1 Layout Guidelines................................................... 35 12.2 Layout Example...................................................... 35 13 Device and Documentation Support..........................36 13.1 Device Support....................................................... 36 13.2 Documentation Support.......................................... 36 13.3 Receiving Notification of Documentation Updates..36 13.4 Support Resources................................................. 36 13.5 Trademarks............................................................. 36 13.6 Electrostatic Discharge Caution..............................36 13.7 Glossary..................................................................36 14 Mechanical, Packaging, and Orderable Information.................................................................... 36 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision G (March 2021) to Revision H (April 2021) Page • Added device version to Device Comparison Table .......................................................................................... 4 Changes from Revision F (November 2020) to Revision G (March 2021) Page • Added new voltage spins to Device Comparison Table .....................................................................................4 • Added feedback voltage for fixed voltage version TPS6281326........................................................................ 7 • Added feedback voltage for fixed voltage version TPS628100M....................................................................... 7 Changes from Revision E (April 2020) to Revision F (November 2020) Page • Updated the numbering format for tables, figures and cross-references throughout the document. .................1 • Added functional safety bullet ............................................................................................................................1 • Added new voltage spins to Device Comparison Table .....................................................................................4 • Added feedback voltage for fixed voltage version TPS6281126........................................................................ 7 • Added feedback voltage for fixed voltage version TPS6281228........................................................................ 7 • Added feedback voltage for fixed voltage version TPS6281109........................................................................ 7 • Added feedback voltage for fixed voltage version TPS628132D........................................................................7 • Added feedback voltage for fixed voltage version TPS628132M....................................................................... 7 • Added feedback voltage for fixed voltage version TPS628113H........................................................................7 Changes from Revision D (December 2019) to Revision E (April 2020) Page • Added TPS628122GQWRWYRQ1 into Device Comparison Table ...................................................................4 • Added feedback voltage for fixed voltage version TPS628122G....................................................................... 7 Changes from Revision C (August 2019) to Revision D (December 2019) Page • Added Functional safety capable information and link ...................................................................................... 1 • Added new voltage spins to Device Comparison Table .....................................................................................4 • Changed duty cycle for external synchronization to allow a wider range........................................................... 7 • Added feedback voltage for fixed voltage versions TPS6281206, TPS628110A, TPS628112A, TPS6281008, TPS628112M, TPS628120M ............................................................................................................................. 7 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com • SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 Changed description for Power Save Mode Operation.................................................................................... 15 Changes from Revision B (June 2019) to Revision C (December 2019) Page • Changed marketing status from Advance Information to initial release for the TPS62811-Q1 and TPS62812Q1....................................................................................................................................................................... 1 • Changed Test Condition for Tracking Gain......................................................................................................... 7 • Changed Test Condition for Tracking Offset....................................................................................................... 7 • Added feedback voltage for fixed voltage version TPS6281208........................................................................ 7 • Added FB input current for fixed voltage versions.............................................................................................. 7 • Added feedback voltage accuracy for fixed voltage versions............................................................................. 7 • Deleted Preview label for Systems Example ................................................................................................... 31 Changes from Revision A (March 2019) to Revision B (June 2019) Page • Changed marketing status from Advance Information to initial release for the TPS62810-Q1 and TPS62813Q1....................................................................................................................................................................... 1 • Changed parameter name from RFSET to RCF .................................................................................................. 6 • Changed minimum value for UVLO threshold for falling input voltage ............................................................. 7 • Deleted high-side MOSFET leakage current at TJ = 85°C................................................................................. 7 • Deleted low-side MOSFET leakage current at TJ = 85°C...................................................................................7 • Changed max value for high-side MOSFET current limit of TPS62810 and TPS62813.................................... 7 • Changed min / max value for high-side MOSFET current limit of TPS62812 and TPS62811........................... 7 • Changed min / max value for switching frequency tolerance for fS = 1.8 MHz to 4 MHz...................................7 • Changed min / max value for feedback voltage accuracy with voltage tracking................................................7 • Deleted start-up delay time for VIn ≥ 3.1 V........................................................................................................7 Changes from Revision * (August 2018) to Revision A (March 2019) Page • Added planned device spins to Device Comparison Table ................................................................................4 • Changed max inductance in Recommended Operating Conditions for the frequency range up to 3.5 MHz .... 6 • Changed max inductance in Recommended Operating Conditions for the frequency range above 3.5 MHz....6 • Deleted min/max value for Thermal Shutdown Temperature .............................................................................7 • Changed max value for high-side MOSFET leakage current at TJ = 85°C .......................................................7 • Changed max value for high-side MOSFET leakage current............................................................................. 7 • Changed ax value for Low-Side MOSFET leakage current at TJ = 85°C........................................................... 7 • Changed max value for low-side MOSFET leakage current...............................................................................7 • Added Added spec for SW leakage...................................................................................................................7 • Changed min / max value for PWM switching frequency tolerance for fS = 3 MHz to 4 MHz.............................7 • Changed Changed load regulation from 0.025%/V to 0.05%/V.........................................................................7 • Changed equation for compensation setting 2 ................................................................................................ 13 • Changed RCF range for comp setting 2 in Table 9-1 ........................................................................................13 • Changed RCF range for comp setting 2 in Table 9-2 ........................................................................................13 • Changed CFF from 22 pF to 10 pF in Table 10-2 and all schematics ...............................................................20 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 3 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 5 Device Comparison Table DEVICE NUMBER OUTPUT CURRENT Vout DISCHARGE FOLDBACK CURRENT LIMIT SPREAD SPECTRUM CLOCKING (SSC) OUTPUT VOLTAGE TPS62811QWRWYRQ1 1A ON OFF OFF adjustable TPS6281120QWRWYRQ1 1A ON OFF ON adjustable TPS6281126QWRWYRQ1 1A ON OFF ON fixed 1.0 V TPS6281109QWRWYRQ1 1A ON OFF OFF fixed 1.15 V TPS628110AQWRWYRQ1 1A ON OFF OFF fixed 1.2 V TPS628112AQWRWYRQ1 1A ON OFF ON fixed 1.2 V TPS628112MQWRWYRQ1 1A ON OFF ON fixed 1.8 V TPS628113HQWRWYRQ1 1A ON OFF ON fixed 3.3 V TPS62812QWRWYRQ1 2A ON OFF OFF adjustable TPS6281220QWRWYRQ1 2A ON OFF ON adjustable TPS6281206QWRWYRQ1 2A ON OFF OFF fixed 1.0 V TPS6281208QWRWYRQ1 2A ON OFF OFF fixed 1.1 V TPS6281228QWRWYRQ1 2A ON OFF ON fixed 1.1 V TPS628122GQWRWYRQ1 2A ON OFF ON fixed 1.5 V TPS628120MQWRWYRQ1 2A ON OFF OFF fixed 1.8 V TPS62813QWRWYRQ1 3A ON OFF OFF adjustable TPS6281320QWRWYRQ1 3A ON OFF ON adjustable TPS6281326QWRWYRQ1 3A ON OFF ON fixed 1.0 V TPS628132DQWRWYRQ1 3A ON OFF ON fixed 1.35 V TPS628132MQWRWYRQ1 3A ON OFF ON fixed 1.8 V TPS62810QWRWYRQ1 4A ON OFF OFF adjustable TPS6281020QWRWYRQ1 4A ON OFF ON adjustable TPS6281008QWRWYRQ1 4A ON OFF OFF fixed 1.1 V TPS628100MQWRWYRQ1 4A ON OFF OFF fixed 1.8 V (1) PREVIEW 4 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 6 Pin Configuration and Functions bottom view top view 7 8 8 7 COMP/ FSET EN 6 9 PG VIN 9 6 SS/TR GND SW EN GND SW VIN 3 2 PG FB 2 1 3 4 5 5 4 1 Figure 6-1. RWY Package 9 Pin (VQFN) Top View Table 6-1. Pin Functions PIN NAME NO. I/O DESCRIPTION EN 8 I This is the enable pin of the device. Connect to logic low to disable the device. Pull high to enable the device. Do not leave this pin unconnected. FB 5 I Voltage feedback input, connect the resistive output voltage divider to this pin. For the fixed voltage versions, connect the FB pin directly to the output voltage. GND 4 MODE/SYNC 1 Ground pin I The device runs in PFM/PWM mode when this pin is pulled low. If the pin is pulled high, the device runs in forced PWM mode. Do not leave this pin unconnected. The mode pin can also be used to synchronize the device to an external frequency. See the Section 7 for the detailed specification of the digital signal applied to this pin for external synchronization. COMP/FSET 7 I Device compensation and frequency set input. A resistor from this pin to GND defines the compensation of the control loop as well as the switching frequency if not externally synchronized. If the pin is tied to GND or VIN, the switching frequency is set to 2.25 MHz. Do not leave this pin unconnected. PG 9 O Open drain power good output. Low impedance when not "power good", high impedance when "power good". This pin can be left open or be tied to GND when not used. SS/TR 6 I Soft-Start / Tracking pin. A capacitor connected from this pin to GND defines the rise time for the internal reference voltage. The pin can also be used as an input for tracking and sequencing - see the Section 9.4.7 section. SW 3 This is the switch pin of the converter and is connected to the internal Power MOSFETs. VIN 2 Power supply input. Connect the input capacitor as close as possible between pin VIN and GND. Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 5 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) Pin voltage range(1) MIN MAX VIN -0.3 6.5 SW -0.3 VIN+0.3 V -3 10 V V SW (transient for less than 10 ns)(2) Pin voltage range(1) (2) V FB -0.3 4 PG, SS/TR, COMP/FSET -0.3 VIN+0.3 V EN, MODE/SYNC -0.3 6.5 V -65 150 °C Storage temperature, Tstg (1) UNIT Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. While switching 7.2 ESD Ratings VALUE V(ESD) (1) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 Charged-device model (CDM), per AEC Q100-011 ±750 UNIT V AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 7.3 Recommended Operating Conditions MIN VIN Supply voltage range NOM 6 VOUT Output voltage range L Effective inductance for a switching frequency of 1.8 MHz to 3.5 MHz 0.32 0.47 L Effective inductance for a switching frequency of 3.5 MHz to 4 MHz 0.25 COUT Effective output capacitance for 1A and 2A version(1) 15 COUT Effective output capacitance for 3A and 4A version (1) CIN Effective input 0.6 capacitance(1) RCF TJ (1) MAX 2.75 Operating junction temperature UNIT V 5.5 V 0.9 µH 0.33 0.9 µH 22 470 µF 27 47 470 µF 5 10 4.5 100 kΩ -40 +150 °C µF The values given for the capacitors in the table are effective capacitance, which includes the DC bias effect. Due to the DC bias effect of ceramic capacitors, the effective capacitance is lower than the nominal value when a voltage is applied. Please check the manufacturer´s DC bias curves for the effective capacitance vs DC voltage applied. Further restrictions may apply. Please see the feature description for COMP/FSET about the output capacitance vs compensation setting and output voltage. 7.4 Thermal Information TPS6281x-Q1 THERMAL METRIC(1) RWY UNIT 9 PINS 6 RθJA Junction-to-ambient thermal resistance 71.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 37.2 °C/W RθJB Junction-to-board thermal resistance 16.4 °C/W ψJT Junction-to-top characterization parameter 0.9 °C/W ψJB Junction-to-board characterization parameter 16.1 °C/W Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 TPS6281x-Q1 THERMAL METRIC(1) RWY UNIT 9 PINS RθJC(bot) (1) Junction-to-case (bottom) thermal resistance n/a °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.5 Electrical Characteristics over operating junction temperature (TJ = -40 °C to +150 °C) and VIN = 2.75 V to 6 V. Typical values at VIN = 5 V and TJ = 25 °C. (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY IQ Operating Quiescent Current EN = high, IOUT= 0 mA, Device not switching, TJ= 125 °C IQ Operating Quiescent Current EN = high, IOUT= 0 mA, Device not switching ISD Shutdown Current EN = 0 V, at TJ= 125 °C ISD Shutdown Current EN = 0 V, Nominal value at TJ= 25 °C, Max value at TJ= 150 °C VUVLO Undervoltage Lockout Threshold TSD Thermal Shutdown Temperature 21 15 µA 30 µA 18 µA 1.5 26 µA Rising Input Voltage 2.5 2.6 2.75 V Falling Input Voltage 2.25 2.5 2.6 V Rising Junction Temperature 170 Thermal Shutdown Hysteresis °C 15 CONTROL (EN, SS/TR, PG, MODE/SYNC) VIH High Level Input Voltage for MODE/SYNC Pin VIL Low Level Input Voltage for MODE/SYNC Pin fSYNC Frequency Range on MODE/ requires a resistor from COMP/FSET to GND, see application SYNC Pin for Synchronization section 1.1 V 0.3 Duty Cycle of Synchronization Signal at MODE/SYNC Pin 1.8 20% Time to Lock to External Frequency 4 50% V MHz 80% 50 µs VIH Input Threshold Voltage for EN pin; Rising Edge 1.06 1.1 1.15 V VIL Input Threshold Voltage for EN pin; Falling Edge 0.96 1.0 1.05 V ILKG Input Leakage Current for EN, VIH = VIN or VIL= GND MODE/SYNC 150 nA 2.5 kΩ Resistance from COMP/FSET internal frequency setting with f = 2.25 MHz to GND for Logic Low VTH_PG 0 voltage on COMP/FSET for logic high internal frequency setting with f = 2.25 MHz UVP Power Good Threshold Voltage; dc Level Rising (%VFB) 92% 95% 98% UVP Power Good Threshold Voltage; dc Level Falling (%VFB) 87% 90% 93% OVP Power Good Threshold; dc Level Rising (%VFB) 107% 110% 113% OVP Power Good Threshold; dc Level Falling (%VFB) 104% 107% 111% Power Good De-glitch Time for a high level to low level transition on power good VOL_PG Power Good Output Low Voltage IPG = 2 mA ILKG_PG Input Leakage Current (PG) VPG = 5 V ISS/TR SS/TR Pin Source Current Copyright © 2021 Texas Instruments Incorporated VIN V 40 0.07 2.1 2.5 µs 0.3 V 100 nA 2.8 µA Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 7 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 over operating junction temperature (TJ = -40 °C to +150 °C) and VIN = 2.75 V to 6 V. Typical values at VIN = 5 V and TJ = 25 °C. (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP Tracking Gain VFB / VSS/TR for nominal VFB = 0.6 V Tracking Offset feedback voltage with VSS/TR = 0 V for nominal VFB = 0.6 V 17 MAX UNIT 1 mV POWER SWITCH RDS(ON) High-Side MOSFET ONResistance VIN ≥ 5 V 37 60 mΩ RDS(ON) Low-Side MOSFET ONResistance VIN ≥ 5 V 15 35 mΩ High-Side MOSFET leakage current VIN = 6 V; V(SW) = 0 V 30 µA Low-Side MOSFET leakage current V(SW) = 6 V 55 µA 30 µA SW leakage V(SW) = 0.6 V; current into SW pin ILIMH High-Side MOSFET Current Limit -0.025 dc value, for TPS62810; VIN = 3 V to 6 V 4.8 5.6 6.55 A ILIMH High-Side MOSFET Current Limit dc value, for TPS62813; VIN = 3V to 6 V 3.9 4.5 5.25 A ILIMH High-Side MOSFET Current Limit dc value, for TPS62812; VIN = 3V to 6 V 2.8 3.4 4.2 A ILIMH High-Side MOSFET Current Limit dc value, for TPS62811; VIN = 3V to 6 V 2.0 2.6 3.25 A ILIMNEG Negative Valley Current Limit dc value fS PWM Switching Frequency Range -1.8 A 1.8 2.25 4 MHz with COMP/FSET tied to VIN or GND 2.025 2.25 2.475 MHz PWM Switching Frequency Tolerance using a resistor from COMP/FSET to GND, fs = 1.8 MHz to 4 MHz -19% ton,min Minimum on-time of HS FET TJ = -40 °C to 125 °C, VIN = 3.3 V 50 ton,min Minimum on-time of LS FET VIN = 3.3 V 30 ns Feedback Voltage adjustable output voltage versions 0.6 V VFB Feedback Voltage fixed output voltage TPS6281206, TPS6281126, TPS6281326 1.0 V VFB Feedback Voltage fixed output voltage TPS6281208, TPS6281008, TPS6281228 1.1 V VFB Feedback Voltage fixed output voltage TPS6281109 1.15 V VFB Feedback Voltage fixed output voltage TPS628110A, TPS628112A 1.2 V VFB Feedback Voltage fixed output voltage TPS628132D 1.35 V VFB Feedback Voltage fixed output voltage TPS628122G 1.5 V VFB Feedback Voltage fixed output voltage TPS628112M, TPS628120M, TPS628132D, TPS628100M, TPS628132M 1.8 V VFB Feedback VoltageVoltage fixed output voltage TPS628113H 3.3 V ILKG_FB FB Input Leakage Current for Adjustable Voltage Versions VFB = 0.6 V 1 ILKG_FB FB Input Current for Fixed Voltage Versions VFB voltage at target output voltage 1 VFB Feedback Voltage Accuracy for Adjustable Voltage Versions VIN ≥ VOUT + 1 V PWM Switching Frequency fS 18% 75 ns OUTPUT VFB 8 Submit Document Feedback PWM mode -1% 70 nA µA 1% Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 over operating junction temperature (TJ = -40 °C to +150 °C) and VIN = 2.75 V to 6 V. Typical values at VIN = 5 V and TJ = 25 °C. (unless otherwise noted) PARAMETER TEST CONDITIONS VFB Feedback Voltage Accuracy for Fixed Voltage Versions VFB MIN TYP MAX VIN ≥ VOUT + 1 V PWM mode, Tj = -40°C to 125°C -1% 1% Feedback Voltage Accuracy for Fixed Voltage Versions VIN ≥ VOUT + 1 V PWM mode -1% 1.3% VFB Feedback Voltage Accuracy VIN ≥ VOUT + 1 V; VOUT ≥ 1.5 V PFM mode; Co,eff ≥ 22 µF, L = 0.47 µH -1% 2% VFB Feedback Voltage Accuracy 1 V ≤ VOUT < 1.5 V PFM mode; Co,eff ≥ 47 µF, L = 0.47 µH -1% 2.5% VFB Feedback Voltage Accuracy with Voltage Tracking VIN ≥ VOUT + 1 V; VSS/TR = 0.3 V PWM mode -1% 7% Load Regulation PWM mode operation 0.05 Line Regulation PWM mode operation, IOUT= 1 A, VIN ≥ VOUT + 1 V 0.02 %/A %/V Output Discharge Resistance tdelay Start-up Delay Time IOUT = 0 mA, Time from EN=high to start switching; VIN applied already tramp Ramp time; SS/TR Pin Open IOUT = 0 mA, Time from first switching pulse until 95% of nominal output voltage; device not in current limit UNIT 50 Ω 135 250 470 µs 100 150 200 µs 80 76 72 68 64 60 56 52 48 44 40 36 32 28 24 20 -40 50 VIN VIN VIN VIN VIN = = = = = 2.7V 3.3V 4.0V 5.0V 6.0V VIN VIN VIN VIN VIN 46 42 38 Rds(on) (m:) Rds(on) (m:) 7.6 Typical Characteristics = = = = = 2.7V 3.3V 4.0V 5.0V 6.0V 34 30 26 22 18 14 25 85 Junction Temperature (°C) 125 Figure 7-1. Rds(on) of High-side Switch Copyright © 2021 Texas Instruments Incorporated 10 -40 150 D002 25 85 Junction Temperature (°C) 125 150 D002 Figure 7-2. Rds(on) of Low-side Switch Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 9 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 8 Parameter Measurement Information 8.1 Schematic VIN 2.75 V - 6 V TPS62810-Q1 VIN L 0.47 mH VOUT SW CIN 22 mF R1 EN CFF FB MODE/SYNC R2 R3 COMP/FSET SS/TR RCF CSS COUT 2 x 22 mF + 10 mF PG GND Figure 8-1. Measurement Setup for TPS62810-Q1 and TPS62813-Q1 Table 8-1. List of Components (1) REFERENCE DESCRIPTION MANUFACTURER (1) IC TPS62810-Q1 or TPS62813-Q1 Texas Instruments L 0.47 µH inductor; XEL4030-471MEB Coilcraft CIN 22 µF / 10 V; GCM31CR71A226KE02L Murata COUT 2 x 22 µF / 10 V; GCM31CR71A226KE02L + 1 x 10 µF 6.3 V; GCM188D70J106ME36 Murata CSS 4.7 nF (equal to 1-ms start-up ramp) Any RCF 8.06 kΩ Any CFF 10 pF Any R1 Depending on VOUT Any R2 Depending on VOUT Any R3 100 kΩ Any See the Third-party Products Disclaimer. VIN 2.75 V - 6 V TPS62812-Q1 VIN R1 EN CFF FB MODE/SYNC R2 COMP/FSET SS/TR CSS VOUT SW CIN 22 mF RCF L 0.47 mH R3 COUT 1 x 22 mF + 10 mF PG GND Figure 8-2. Measurement Setup for TPS62812-Q1 and TPS62811-Q1 10 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 Table 8-2. List of Components REFERENCE DESCRIPTION MANUFACTURER (1) IC TPS62812-Q1 or TPS62811-Q1 Texas Instruments L 0.56-µH inductor; XEL4020-561MEB Coilcraft CIN 22 µF / 10 V; GCM31CR71A226KE02L Murata COUT 1 x 22 µF / 10 V; GCM31CR71A226KE02L + 1 x 10 µF 6.3 V; GCM188D70J106ME36 Murata CSS 4.7 nF (equal to 1-ms start-up ramp) Any RCF 8.06 kΩ Any CFF 10 pF Any R1 Depending on VOUT Any R2 Depending on VOUT Any R3 100 kΩ Any Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 11 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 9 Detailed Description 9.1 Overview The TPS6281x-Q1 synchronous switch mode DC/DC converters are based on a peak current mode control topology. The control loop is internally compensated. To optimize the bandwidth of the control loop to the wide range of output capacitance that can be used with TPS6281x-Q1, one of three internal compensation settings can be selected. See Section 9.3.2. The compensation setting is selected either by a resistor from COMP/FSET to GND, or by the logic state of this pin. The regulation network achieves fast and stable operation with small external components and low ESR ceramic output capacitors. The device can be operated without a feedforward capacitor on the output voltage divider, however, using a typically 10-pF feedforward capacitor improves transient response. The devices support forced fixed frequency PWM operation with the MODE pin tied to a logic high level. The frequency is defined as either 2.25 MHz internally fixed when COMP/FSET is tied to GND or VIN, or in a range of 1.8 MHz to 4 MHz defined by a resistor from COMP/FSET to GND. Alternatively, the devices can be synchronized to an external clock signal in a range from 1.8 MHz to 4 MHz, applied to the MODE pin with no need for additional passive components. External synchronization is only possible if a resistor from COMP/FSET to GND is used. If COMP/FSET is directly tied to GND or VIN, the TPS6281x-Q1 cannot be synchronized externally. An internal PLL allows to change from internal clock to external clock during operation. The synchronization to the external clock is done on a falling edge of the clock applied at MODE to the rising edge on the SW pin. This allows a roughly 180° phase shift when the SW pin is used to generate the synchronization signal for a second converter. When the MODE pin is set to a logic low level, the device operates in power save mode (PFM) at low output current and automatically transfers to fixed frequency PWM mode at higher output current. In PFM mode, the switching frequency decreases linearly based on the load to sustain high efficiency down to very low output current. 9.2 Functional Block Diagram SW VIN Bias Regulator Gate Drive and Control Oscillator Izero _ EN + + _ Ipeak MODE gm + PG Device Control Bandgap GND _ + - FB SS/TR Thermal Shutdown COMP/FSET 12 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 9.3 Feature Description 9.3.1 Precise Enable The voltage applied at the Enable pin of the TPS6281x-Q1 is compared to a fixed threshold of 1.1 V for a rising voltage. This allows to drive the pin by a slowly changing voltage and enables the use of an external RC network to achieve a power-up delay. The Precise Enable input provides a user-programmable undervoltage lockout by adding a resistor divider to the input of the Enable pin. The enable input threshold for a falling edge is typically 100 mV lower than the rising edge threshold. The TPS6281x-Q1 starts operation when the rising threshold is exceeded. For proper operation, the EN pin must be terminated and must not be left floating. Pulling the EN pin low forces the device into shutdown, with a shutdown current of typically 1 μA. In this mode, the internal high-side and low-side MOSFETs are turned off and the entire internal control circuitry is switched off. 9.3.2 COMP/FSET This pin allows to set two different parameters independently: • • Internal compensation settings for the control loop The switching frequency in PWM mode from 1.8 MHz to 4 MHz A resistor from COMP/FSET to GND changes the compensation as well as the switching frequency. The change in compensation allows you to adapt the device to different values of output capacitance. The resistor must be placed close to the pin to keep the parasitic capacitance on the pin to a minimum. The compensation setting is sampled at start-up of the converter, so a change in the resistor during operation only has an effect on the switching frequency but not on the compensation. To save external components, the pin can also be directly tied to VIN or GND to set a pre-defined switching frequency / compensation. Do not leave the pin floating. The switching frequency has to be selected based on the input voltage and the output voltage to meet the specifications for the minimum on-time and minimum off-time. For example: VIN = 5 V, VOUT = 1 V --> duty cycle (DC) = 1 V / 5 V = 0.2 • with ton = DC × T --> ton,min = 1 / fs,max × DC • --> fs,max = 1 / ton,min × DC = 1 / 0.075 µs · 0.2 = 2.67 MHz The compensation range has to be chosen based on the minimum capacitance used. The capacitance can be increased from the minimum value as given in Table 9-1 and Table 9-2, up to the maximum of 470 µF in all of the three compensation ranges. If the capacitance of an output changes during operation, for example, when load switches are used to connect or disconnect parts of the circuitry, the compensation has to be chosen for the minimum capacitance on the output. With large output capacitance, the compensation must be done based on that large capacitance to get the best load transient response. Compensating for large output capacitance but placing less capacitance on the output can lead to instability. The switching frequency for the different compensation setting is determined by the following equations. For compensation (comp) setting 1: Space RCF (k W) = 18MHz × k W fS ( MHz ) (1) For compensation (comp) setting 2: Space Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 13 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 RCF (k W) = 60 MHz × k W fS ( MHz ) (2) Space For compensation (comp) setting 3: Space RCF (k W) = 180 MHz × k W fS ( MHz ) (3) Table 9-1. Switching Frequency and Compensation for TPS62810-Q1 (4 A) and TPS62813-Q1 (3 A) COMPENSATION RCF SWITCHING FREQUENCY MINIMUM OUTPUT CAPACITANCE FOR VOUT < 1 V MINIMUM OUTPUT CAPACITANCE FOR 1 V ≤ VOUT < 3.3 V MINIMUM OUTPUT CAPACITANCE FOR VOUT ≥ 3.3 V for smallest output capacitance (comp setting 1) 10 kΩ ... 4.5 kΩ 1.8 MHz (10 kΩ) ... 4 MHz (4.5 kΩ) according to Equation 1 53 µF 32 µF 27 µF for medium output capacitance (comp setting 2) 33 kΩ ... 15 kΩ 1.8 MHz (33 kΩ) ... 4 MHz (15 kΩ) according to Equation 2 100 µF 60 µF 50 µF for large output capacitance (comp setting 3) 100 kΩ ... 45 kΩ 1.8 MHz (100 kΩ) ... 4 MHz (45 kΩ) according to Equation 3 200 µF 120 µF 100 µF for smallest output capacitance (comp setting 1) tied to GND internally fixed 2.25 MHz 53 µF 32 µF 27 µF for large output capacitance (comp setting 3) tied to VIN internally fixed 2.25 MHz 200 µF 120 µF 100 µF Table 9-2. Switching Frequency and Compensation for TPS62812-Q1 (2 A) and TPS62811-Q1 (1 A) COMPENSATION RCF SWITCHING FREQUENCY MINIMUM OUTPUT CAPACITANCE FOR VOUT < 1 V MINIMUM OUTPUT CAPACITANCE FOR 1 V ≤ VOUT < 3.3 V MINIMUM OUTPUT CAPACITANCE FOR VOUT ≥ 3.3 V for smallest output capacitance (comp setting 1) 10 kΩ ... 4.5 kΩ 1.8 MHz (10 kΩ) ... 4 MHz (4.5 kΩ) according to Equation 1 30 µF 18 µF 15 µF for medium output capacitance (comp setting 2) 33 kΩ ... 15 kΩ 1.8 MHz (33 kΩ) ... 4 MHz (15 kΩ) according to Equation 2 60 µF 36 µF 30 µF for large output capacitance (comp setting 3) 100 kΩ ... 45 kΩ 1.8MHz (100 kΩ) ...4 MHz (45 kΩ) according to Equation 3 130 µF 80 µF 68 µF for smallest output capacitance (comp setting 1) tied to GND internally fixed 2.25 MHz 30 µF 18 µF 15 µF for large output capacitance (comp setting 3) tied to VIN internally fixed 2.25 MHz 130 µF 80 µF 68 µF Refer to Section 10.1.3.2 for further details on the output capacitance required depending on the output voltage. A too high resistor value for RCF is decoded as "tied to VIN", a value below the lowest range is decoded as "tied to GND". The minimum output capacitance in Table 9-1 and Table 9-2 is for capacitors close to the output of the device. If the capacitance is distributed, a lower compensation setting can be required. All values are effective capacitance, including all tolerances, aging, dc bias effect, and so forth. 9.3.3 MODE / SYNC When MODE/SYNC is set low, the device operates in PWM or PFM mode, depending on the output current. The MODE/SYNC pin allows to force PWM mode when set high. The pin also allows you to apply an external 14 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 clock in a frequency range from 1.8 MHz to 4 MHz for external synchronization. Similar to COMP/FSET, the specifications for the minimum on-time and minimum off-time have to be taken into account when setting the external frequency. For use with external synchronization on the MODE/SYNC pin, the internal switching frequency must be set by RCF to a similar value than the externally applied clock. This ensures a fast settling to the external clock and, if the external clock fails, the switching frequency stays in the same range and the compensation settings are still valid. When there is no resistor from COMP/FSET to GND but the pin is pulled high or low, external synchronization is not possible. 9.3.4 Spread Spectrum Clocking (SSC) For device versions with SSC enabled, the switching frequency is randomly changed in PWM mode when the internal clock is used. The frequency variation is typically between the nominal switching frequency and up to 288 kHz above the nominal switching frequency. When the device is externally synchronized by applying a clock signal to the MODE/SYNC pin, the TPS6281x-Q1 follows the external clock and the internal spread spectrum block is turned off. SSC is also disabled during soft start. 9.3.5 Undervoltage Lockout (UVLO) If the input voltage drops, the undervoltage lockout prevents mis-operation of the device by switching off both the power FETs. The device is fully operational for voltages above the rising UVLO threshold and turns off if the input voltage trips below the threshold for a falling supply voltage. 9.3.6 Power Good Output (PG) Power good is an open-drain output driven by a window comparator. PG is held low when the device is disabled, in undervoltage lockout, and in thermal shutdown. When the output voltage is in regulation hence, within the window defined in the electrical characteristics, the output is high impedance. Table 9-3. PG Status EN DEVICE STATUS PG STATE X VIN < 2 V undefined low VIN ≥ 2 V low high 2 V ≤ VIN ≤ UVLO OR in thermal shutdown OR VOUT not in regulation low high VOUT in regulation high impedance 9.3.7 Thermal Shutdown The junction temperature (TJ) of the device is monitored by an internal temperature sensor. If TJ exceeds 170°C (typ), the device goes into thermal shutdown. Both the high-side and low-side power FETs are turned off and PG goes low. When TJ decreases by the hysteresis amount of typically 15°C, the converter resumes normal operation, beginning with soft start. During a PFM pause, the thermal shutdown is not active. After a PFM pause, the device needs up to 9 µs to detect a too high junction temperature. If the PFM burst is shorter than this delay, the device does not detect a too high junction temperature. 9.4 Device Functional Modes 9.4.1 Pulse Width Modulation (PWM) Operation TPS6281x-Q1 has two operating modes: Forced PWM mode (discussed in this section) and PWM/PFM (discussed in Section 9.4.2). With the MODE/SYNC pin set to high, the TPS6281x-Q1 operates with pulse width modulation in continuous conduction mode (CCM). The switching frequency is either defined by a resistor from the COMP pin to GND or by an external clock signal applied to the MODE/SYNC pin. With an external clock is applied to MODE/SYNC, the TPS6281x-Q1 follows the frequency applied to the pin. To maintain regulation, the frequency needs to be in a range the TPS6281x-Q1 can operate at, taking the minimum on-time into account. 9.4.2 Power Save Mode Operation (PWM/PFM) When the MODE/SYNC pin is low, power save mode is allowed. The device operates in PWM mode as long as the peak inductor current is above the PFM threshold of about 1.2 A. When the peak inductor current Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 15 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 drops below the PFM threshold, the device starts to skip switching pulses. In power save mode, the switching frequency decreases with the load current maintaining high efficiency. 9.4.3 100% Duty-Cycle Operation The duty cycle of a buck converter operated in PWM mode is given as D = VOUT / VIN. The duty cycle increases as the input voltage comes close to the output voltage and the off-time gets smaller. When the minimum off-time of typically 30 ns is reached, the TPS6281x-Q1 skips switching cycles while it approaches 100% mode. In 100% mode, it keeps the high-side switch on continuously. The high-side switch stays turned on as long as the output voltage is below the target. In 100% mode, the low-side switch is turned off. The maximum dropout voltage in 100% mode is the product of the on-resistance of the high-side switch plus the series resistance of the inductor and the load current. 9.4.4 Current Limit and Short Circuit Protection The TPS6281x-Q1 is protected against overload and short circuit events. If the inductor current exceeds the current limit ILIMH, the high-side switch is turned off and the low-side switch is turned on to ramp down the inductor current. The high-side switch turns on again only if the current in the low-side switch has decreased below the low-side current limit. Due to internal propagation delay, the actual current can exceed the static current limit. The dynamic current limit is given as: Ipeak (typ ) = ILIMH + VL × tPD L (4) where • • • • ILIMH is the static current limit as specified in the electrical characteristics L is the effective inductance at the peak current VL is the voltage across the inductor (VIN - VOUT) tPD is the internal propagation delay of typically 50 ns The current limit can exceed static values, especially if the input voltage is high and very small inductances are used. The dynamic high-side switch peak current can be calculated as follows: Ipeak (typ ) = ILIMH + VIN - VOUT × 50ns L (5) 9.4.5 Foldback Current Limit and Short Circuit Protection This is valid for devices where foldback current limit is enabled. When the device detects current limit for more than 1024 subsequent switching cycles, it reduces the current limit from its nominal value to typically 1.8 A. Foldback current limit is left when the current limit indication goes away. For the case that device operation continues in current limit, it would, after 3072 switching cycles, try again full current limit for again 1024 switching cycles. 9.4.6 Output Discharge The purpose of the discharge function is to ensure a defined down-ramp of the output voltage when the device is being disabled but also to keep the output voltage close to 0 V when the device is off. The output discharge feature is only active once TPS6281x-Q1 has been enabled at least once since the supply voltage was applied. The discharge function is enabled as soon as the device is disabled, in thermal shutdown, or in undervoltage lockout. The minimum supply voltage required for the discharge function to remain active typically is 2 V. Output discharge is not activated during a current limit or foldback current limit event. 9.4.7 Soft Start / Tracking (SS/TR) The internal soft-start circuitry controls the output voltage slope during start-up. This avoids excessive inrush current and ensures a controlled output voltage rise time. It also prevents unwanted voltage drops from high impedance power sources or batteries. When EN is set high to start operation, the device starts switching after 16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 a delay of about 200 μs then the internal reference and hence VOUT rises with a slope controlled by an external capacitor connected to the SS/TR pin. Leaving the SS/TR pin un-connected provides the fastest startup ramp with 150 µs typically. A capacitor connected from SS/TR to GND is charged with 2.5 µA by an internal current source during soft start until it reaches the reference voltage of 0.6 V. The capacitance required to set a certain ramp-time (tramp) therefore is: (6) If the device is set to shutdown (EN = GND), undervoltage lockout, or thermal shutdown, an internal resistor pulls the SS/TR pin to GND to ensure a proper low level. Returning from those states causes a new start-up sequence. A voltage applied at SS/TR can be used to track a master voltage. The output voltage follows this voltage in both directions up and down in forced PWM mode. In PFM mode, the output voltage decreases based on the load current. The SS/TR pin must not be connected to the SS/TR pin of other devices. An external voltage applied on SS/TR is internally clamped to the feedback voltage (0.6 V). It is recommended to set the target for the external voltage on SS/TR slightly above the feedback voltage. Given the tolerances of the resistor divider R5 and R6 on SS/TR, this ensures the device "switches" to the internal reference voltage when the power-up sequencing is finished. See Figure 10-58. Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 17 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 10 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information 10.1.1 Programming the Output Voltage The output voltage of the TPS6281x-Q1 is adjustable. It can be programmed for output voltages from 0.6 V to 5.5 V using a resistor divider from VOUT to GND. The voltage at the FB pin is regulated to 600 mV. The value of the output voltage is set by the selection of the resistor divider from Equation 7. It is recommended to choose resistor values which allow a current of at least 2 µA, meaning the value of R2 must not exceed 400 kΩ. Lower resistor values are recommended for highest accuracy and most robust design. æ VOUT ö R1 = R 2 × ç - 1÷ è VFB ø (7) 10.1.2 External Component Selection 10.1.2.1 Inductor Selection The TPS6281x-Q1 is designed for a nominal 0.47-µH inductor with a switching frequency of typically 2.25 MHz. Larger values can be used to achieve a lower inductor current ripple but they can have a negative impact on efficiency and transient response. Smaller values than 0.47 µH cause a larger inductor current ripple which causes larger negative inductor current in forced PWM mode at low or no output current. For a higher or lower nominal switching frequency, the inductance must be changed accordingly. See Section 7.3 for details. The inductor selection is affected by several effects like inductor ripple current, output ripple voltage, PWM-toPFM transition point, and efficiency. In addition, the inductor selected has to be rated for appropriate saturation current and DC resistance (DCR). Equation 8 calculates the maximum inductor current. I L(max) = I OUT (max) + DI L(max) 2 (8) æ VOUT ö VOUT × ç1 ÷ VIN ø 1 è DIL (max) = × L min fSW (9) where • • • IL(max) is the maximum inductor current ΔIL(max) is the peak-to-peak inductor ripple current Lmin is the minimum inductance at the operating point Table 10-1. Typical Inductors 18 FOR DEVICE NOMINAL SWITCHING FREQUENCY DIMENSIONS [LxBxH] mm MANUFACTURER(2) 3.5 TPS62813-Q1 / 12-Q1 2.25 MHz 4 x 4 x 1.6 Coilcraft 2.25 MHz 4 x 4 x 2.1 Coilcraft 2.25 MHz 4 x 4 x 3.1 Coilcraft TYPE INDUCTANCE [µH] CURRENT [A] XFL4015-471ME 0.47 µH, ±20% (1) XEL4020-561ME 0.56 µH, ±20% 9.9 TPS62810-Q1 / 13-Q1 / 12-Q1 XEL4030-471ME 0.47 µH, ±20% 12.3 TPS62810-Q1 / 13-Q1 / 12-Q1 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 Table 10-1. Typical Inductors (continued) TYPE INDUCTANCE [µH] CURRENT [A] (1) FOR DEVICE NOMINAL SWITCHING FREQUENCY DIMENSIONS [LxBxH] mm MANUFACTURER(2) XEL3515-561ME 0.56 µH, ±20% 4.5 TPS62813-Q1 / 12-Q1 2.25 MHz 3.5 x 3.2 x 1.5 Coilcraft XFL3012-331MEB 0.33 µH, ±20% 2.6 TPS62811-Q1 / 12-Q1 ≥ 3.5 MHz 3 x 3 x 1.3 Coilcraft XPL2010-681ML 0.68 µH, ±20% 1.5 TPS62811-Q1 2.25 MHz 2 x 1.9 x 1 Coilcraft DFE252012PD-R47M 0.47 µH, ±20% see data sheet TPS62813-Q1 / 12-Q1 / 11-Q1 2.25 MHz 2.5 x 2 x 1.2 Murata (1) (2) Lower of IRMS at 20°C rise or ISAT at 20% drop. See the Third-party Products Disclaimer. Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation current of the inductor needed. A margin of about 20% is recommended to add. A larger inductor value is also useful to get lower ripple current, but increases the transient response time and size as well. 10.1.3 Capacitor Selection 10.1.3.1 Input Capacitor For most applications, 22 µF nominal is sufficient and is recommended. The input capacitor buffers the input voltage for transient events and also decouples the converter from the supply. A low-ESR multilayer ceramic capacitor (MLCC) is recommended for best filtering and must be placed between VIN and GND as close as possible to those pins. 10.1.3.2 Output Capacitor The architecture of the TPS6281x-Q1 allows the use of tiny ceramic output capacitors with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its low resistance up to high frequencies and to get narrow capacitance variation with temperature, it is recommended to use dielectric X7R, X7T, or an equivalent. Using a higher value has advantages like smaller voltage ripple and a tighter DC output accuracy in power save mode. By changing the device compensation with a resistor from COMP/FSET to GND, the device can be compensated in three steps based on the minimum capacitance used on the output. The maximum capacitance is 470 µF in any of the compensation settings. The minimum capacitance required on the output depends on the compensation setting as well as on the current rating of the device. TPS62810-Q1 and TPS62813-Q1 require a minimum output capacitance of 27 µF while the lower current versions TPS62812-Q1 and TPS62811-Q1 require 15 µF at minimum. The required output capacitance also changes with the output voltage. For output voltages below 1 V, the minimum increases linearly from 32 µF at 1 V to 53 µF at 0.6 V for the TPS62810-Q1, the TPS62813-Q1 with the compensation setting for smallest output capacitance. Other compensation ranges, ranges for TPS62811-Q1 and TPS62812-Q1, or both are equivalent. See Table 9-1 and Table 9-2 for details. Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 19 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 10.2 Typical Application VIN 2.75 V - 6 V TPS62810-Q1 VIN L 0.47 mH VOUT SW CIN 22 mF R1 EN CFF FB MODE/SYNC R2 R3 COMP/FSET SS/TR RCF CSS COUT 2 x 22 mF + 10 mF PG GND Figure 10-1. Typical Application 10.2.1 Design Requirements The design guidelines provide a component selection to operate the device within the recommended operating conditions. 10.2.2 Detailed Design Procedure æ VOUT ö R1 = R 2 × ç - 1÷ è VFB ø (10) With VFB = 0.6 V: Table 10-2. Setting the Output Voltage 20 NOMINAL OUTPUT VOLTAGE VOUT R1 R2 CFF EXACT OUTPUT VOLTAGE 0.8 V 16.9 kΩ 51 kΩ 10 pF 0.7988 V 1.0 V 20 kΩ 30 kΩ 10 pF 1.0 V 1.1 V 39.2 kΩ 47 kΩ 10 pF 1.101 V 1.2 V 68 kΩ 68 kΩ 10 pF 1.2 V 1.5 V 76.8 kΩ 51 kΩ 10 pF 1.5 V 1.8 V 80.6 kΩ 40.2 kΩ 10 pF 1.803 V 2.5 V 47.5 kΩ 15 kΩ 10 pF 2.5 V 3.3 V 88.7 kΩ 19.6 kΩ 10 pF 3.315 V Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 10.2.3 Application Curves All plots have been taken with a nominal switching frequency of 2.25 MHz when set to PWM mode, unless otherwise noted. The BOM is according to Table 8-1. 100 100 95 95 90 Efficiency (%) Efficiency (%) 85 80 75 70 65 60 VIN = 4.0 V VIN = 5.0 V VIN = 6.0 V 55 50 100P 90 85 80 VIN = 4.0 V VIN = 5.0 V VIN = 6.0 V 75 70 1m VOUT = 3.3 V 10m 100m Output Current (A) PFM 1 0 4 1 D002 VOUT = 3.3 V TA = 25°C Figure 10-2. Efficiency versus Output Current 2 Output Current (A) PWM 3 4 D002 TA = 25°C Figure 10-3. Efficiency versus Output Current 100 100 95 95 90 90 Efficiency (%) Efficiency (%) 85 80 75 70 65 VIN VIN VIN VIN VIN 60 55 50 100P = = = = = 2.7 3.3 4.0 5.0 6.0 V V V V V 85 80 75 VIN VIN VIN VIN VIN 70 65 10m 100m Output Current (A) PFM 1 0 4 1 D002 TA = 25°C VOUT = 1.8 V Figure 10-4. Efficiency versus Output Current 2 Output Current (A) PWM 3 4 D002 TA = 25°C 100 VIN VIN VIN VIN VIN 95 95 90 Efficiency (%) 85 Efficiency (%) V V V V V Figure 10-5. Efficiency versus Output Current 100 80 75 70 65 VIN VIN VIN VIN VIN 60 55 VOUT = 1.2 V 2.7 3.3 4.0 5.0 6.0 60 1m VOUT = 1.8 V 50 100P = = = = = = = = = = 2.7 3.3 4.0 5.0 6.0 V V V V V 90 = = = = = 2.7 3.3 4.0 5.0 6.0 V V V V V 85 80 75 70 1m 10m 100m Output Current (A) PFM 1 4 TA = 25°C Figure 10-6. Efficiency versus Output Current Copyright © 2021 Texas Instruments Incorporated 0 D002 VOUT = 1.2 V 1 2 Output Current (A) PWM 3 4 D002 TA = 25°C Figure 10-7. Efficiency versus Output Current Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 21 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 100 100 95 95 90 90 Efficiency (%) Efficiency (%) 85 80 75 70 65 VIN VIN VIN VIN VIN 60 55 50 100P = = = = = 2.7 3.3 4.0 5.0 6.0 V V V V V 10m 100m Output Current (A) PFM 1 0 4 TA = 25°C VOUT = 1.0 V 85 85 80 80 75 70 65 60 2.7 3.3 4.0 5.0 6.0 V V V V V 2 Output Current (A) PWM 3 4 D002 TA = 25°C 75 70 65 60 VIN = 2.7 V VIN = 3.3 V VIN = 4.0 V 55 VIN = 2.7 V VIN = 3.3 V VIN = 4.0 V 55 50 1m VOUT = 0.6 V 10m 100m Output Current (A) PFM 1 0 4 TA = 25°C VOUT = 0.6 V 3,32 3,32 3,316 3,31 3,312 Output Voltage (V) 3,305 3,3 3,295 3,29 3,285 1m 10m 100m Output Current (A) PFM 1 4 4 D002 TA = 25°C 3,304 3,3 3,296 3,292 3,288 3,276 100P D002 TA = 25°C 3 3,308 VIN = 4.0 V VIN = 5.0 V VIN = 6.0 V 3,28 Figure 10-12. Output Voltage versus Output Current Submit Document Feedback PWM 3,284 VIN = 4.0 V VIN = 5.0 V VIN = 6.0 V 3,275 2 Output Current (A) Figure 10-11. Efficiency versus Output Current 3,315 3,28 1 D002 Figure 10-10. Efficiency versus Output Current VOUT = 3.3 V = = = = = Figure 10-9. Efficiency versus Output Current 90 3,27 100P 1 D002 90 50 100P VIN VIN VIN VIN VIN 65 Efficiency (%) Efficiency (%) 75 70 Figure 10-8. Efficiency versus Output Current Output Voltage (V) 80 60 1m VOUT = 1.0 V 22 85 VOUT = 3.3 V 1m 10m 100m Output Current (A) PWM 1 4 D002 TA = 25°C Figure 10-13. Output Voltage versus Output Current Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 1,82 1,82 1,816 1,816 1,812 1,812 1,808 1,808 Output Voltage (V) Output Voltage (V) www.ti.com 1,804 1,8 1,796 1,792 1,788 1,784 VIN VIN VIN VIN VIN = = = = = 1,78 100P 2.7 3.3 4.0 5.0 6.0 V V V V V 1m PFM 1 TA = 25°C V V V V V 1m 10m 100m Output Current (A) PWM 1 4 D002 TA = 25°C Figure 10-15. Output Voltage versus Output Current 1,2125 1,21 1,2075 Output Voltage (V) 1,205 1,2025 1,2 1,1975 1,195 VIN VIN VIN VIN VIN 1,1925 1,19 = = = = = 1,1875 100P 2.7 3.3 4.0 5.0 6.0 V V V V V 1m 1,205 1,2025 1,2 1,1975 1,195 1,19 PFM 1 4 TA = 25°C 1,006 1,006 1,004 1,004 Output Voltage (V) 1,01 1,002 1 0,998 VOUT = 1.0 V 1m V V V V V 1 4 Figure 10-18. Output Voltage versus Output Current Copyright © 2021 Texas Instruments Incorporated 4 D002 TA = 25°C 1 0,996 VIN VIN VIN VIN VIN 0,99 100P D002 TA = 25°C PWM 1 0,998 0,992 PFM 10m 100m Output Current (A) 1,002 0,994 10m 100m Output Current (A) 1m Figure 10-17. Output Voltage versus Output Current 1,008 0,99 100P V V V V V VOUT = 1.2 V 1,01 2.7 3.3 4.0 5.0 6.0 2.7 3.3 4.0 5.0 6.0 D002 1,008 = = = = = = = = = = 1,1875 100P Figure 10-16. Output Voltage versus Output Current VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN 1,1925 10m 100m Output Current (A) VOUT = 1.2 V 0,992 2.7 3.3 4.0 5.0 6.0 VOUT = 1.8 V 1,2075 0,994 = = = = = D002 1,21 0,996 VIN VIN VIN VIN VIN 1,78 100P 4 1,2125 Output Voltage (V) 1,792 1,784 Figure 10-14. Output Voltage versus Output Current Output Voltage (V) 1,8 1,796 1,788 10m 100m Output Current (A) VOUT = 1.8 V 1,804 VOUT = 1.0 V = = = = = 2.7 3.3 4.0 5.0 6.0 1m V V V V V 10m 100m Output Current (A) PWM 1 4 D002 TA = 25°C Figure 10-19. Output Voltage versus Output Current Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 23 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 0,612 0,606 0,61 0,6045 0,603 Output Voltage (V) Output Voltage (V) 0,608 0,606 0,604 0,602 0,6 0,598 0,596 0,6 0,5985 0,597 VIN = 2.7 V VIN = 3.3 V VIN = 4.0 V 0,594 100P VOUT = 0.6 V 1m VOUT = 3.3 V VIN = 5.0 V 10m 100m Output Current (A) PFM 1 4 PFM TA = 25°C TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A PFM 0,594 100P D002 Figure 10-22. Load Transient Response VOUT = 1.8 V VIN VIN VIN VIN 0,5955 Figure 10-20. Output Voltage versus Output Current VIN = 5.0 V 0,6015 VOUT = 0.6 V 1m 10m 100m Output Current (A) PWM = = = = 2.7 3.3 4.0 5.0 1 V V V V 4 D002 TA = 25°C Figure 10-21. Output Voltage versus Output Current VOUT = 3.3 V VIN = 5.0 V PWM TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A Figure 10-23. Load Transient Response TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A Figure 10-24. Load Transient Response VOUT = 1.8 V VIN = 5.0 V PWM TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A Figure 10-25. Load Transient Response 24 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com VOUT = 1.2 V VIN = 5.0 V SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 PFM TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A Figure 10-26. Load Transient Response VOUT = 1.0 V VIN = 5.0 V PFM TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A Figure 10-28. Load Transient Response VOUT = 0.6 V VIN = 3.3 V PFM TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A Figure 10-30. Load Transient Response Copyright © 2021 Texas Instruments Incorporated VOUT = 1.2 V VIN = 5.0 V PWM TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A Figure 10-27. Load Transient Response VOUT = 1.0 V VIN = 5.0 V PWM TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A Figure 10-29. Load Transient Response VOUT = 0.6 V VIN = 3.3 V PWM TA = 25°C IOUT = 0.4 A to 3.6 A to 0.4 A Figure 10-31. Load Transient Response Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 25 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 VOUT = 3.3 V IOUT = 0.5 A PFM TA = 25°C VIN = 4.5 V to 5.5 V to 4.5 V Figure 10-32. Line Transient Response VOUT = 1.8 V IOUT = 0.5 A PFM TA = 25°C VIN = 4.5 V to 5.5 V to 4.5 V Figure 10-34. Line Transient Response VOUT = 1.2 V IOUT = 0.5 A PFM TA = 25°C VIN = 4.5 V to 5.5 V to 4.5 V Figure 10-36. Line Transient Response 26 Submit Document Feedback VOUT = 3.3 V IOUT = 4 A PWM TA = 25°C VIN = 4.5 V to 5.5 V to 4.5 V Figure 10-33. Line Transient Response VOUT = 1.8 V IOUT = 4 A PWM TA = 25°C VIN = 4.5 V to 5.5 V to 4.5 V Figure 10-35. Line Transient Response VOUT = 1.2 V IOUT = 4 A PWM TA = 25°C VIN = 4.5 V to 5.5 V to 4.5 V Figure 10-37. Line Transient Response Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com VOUT = 1.0 V IOUT = 0.5 A SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 PFM TA = 25°C VIN = 4.5 V to 5.5 V to 4.5 V Figure 10-38. Line Transient Response VOUT = 0.6 V IOUT = 0.5 A PFM TA = 25°C VIN = 3.0 V to 3.6 V to 3.0 V Figure 10-40. Line Transient Response VOUT = 1.0 V IOUT = 4 A PWM TA = 25°C VIN = 4.5 V to 5.5 V to 4.5 V Figure 10-39. Line Transient Response VOUT = 0.6 V IOUT = 4 A PWM TA = 25°C VIN = 3.0 V to 3.6 V to 3.0 V Figure 10-41. Line Transient Response VOUT = 3.3 V PFM TA = 25°C VOUT = 3.3 V PWM TA = 25°C IOUT = 0.5 A VIN = 5.0 V BW = 20 MHz IOUT = 4 A VIN = 5.0 V BW = 20 MHz Figure 10-42. Output Voltage Ripple Copyright © 2021 Texas Instruments Incorporated Figure 10-43. Output Voltage Ripple Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 27 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 VOUT = 1.8 V PFM TA = 25°C VOUT = 1.8 V PWM TA = 25°C IOUT = 0.5 A VIN = 5.0 V BW = 20 MHz IOUT = 4 A VIN = 5.0 V BW = 20 MHz Figure 10-44. Output Voltage Ripple VOUT = 1.2 V PFM TA = 25°C VOUT = 1.2 V PWM TA = 25°C IOUT = 0.5 A VIN = 5.0 V BW = 20 MHz IOUT = 4 A VIN = 5.0 V BW = 20 MHz Figure 10-46. Output Voltage Ripple Figure 10-47. Output Voltage Ripple VOUT = 1.0 V PFM TA = 25°C VOUT = 1.0 V PWM TA = 25°C IOUT = 0.5 A VIN = 5.0 V BW = 20 MHz IOUT = 4 A VIN = 5.0 V BW = 20 MHz Figure 10-48. Output Voltage Ripple 28 Figure 10-45. Output Voltage Ripple Submit Document Feedback Figure 10-49. Output Voltage Ripple Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 VOUT = 0.6 V PFM TA = 25°C VOUT = 0.6 V PWM TA = 25°C IOUT = 0.5 A VIN = 3.3 V BW = 20 MHz IOUT = 4 A VIN = 3.3 V BW = 20 MHz Figure 10-50. Output Voltage Ripple VOUT = 3.3 V PWM TA = 25°C IOUT = 4 A VIN = 5 V CSS = 4.7 nF Figure 10-51. Output Voltage Ripple VOUT = 1.8 V PWM TA = 25°C IOUT = 4 A VIN = 5 V CSS = 4.7 nF Figure 10-53. Start-Up Timing Figure 10-52. Start-Up Timing VOUT = 1.2 V PWM TA = 25°C VOUT = 1.0 V PWM TA = 25°C IOUT = 4 A VIN = 5 V CSS = 4.7 nF IOUT = 4 A VIN = 5 V CSS = 4.7 nF Figure 10-54. Start-Up Timing Copyright © 2021 Texas Instruments Incorporated Figure 10-55. Start-Up Timing Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 29 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 VOUT = 0.6 V PWM TA = 25°C IOUT = 4 A VIN = 3.3 V CSS = 4.7 nF Figure 10-56. Start-up Timing 30 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 10.3 System Examples 10.3.1 Fixed Output Voltage Versions Versions with an internally fixed output voltage allow you to remove the external feedback voltage divider. This not only allows you to reduce the total solution size but also provides higher accuracy as there is no additional error caused by the external resistor divider. The FB pin needs to be tied to the output voltage directly as shown in Figure 10-57. Independent of that, the application shown runs with an internally defined switching frequency of 2.25 MHz by connecting COMP/FSET to GND. VIN 2.75 V - 6 V TPS62812x-Q1 VIN SW EN FB L 0.56 mH VOUT CIN 22 mF MODE/SYNC R3 COMP/FSET SS/TR CSS COUT 1 x 22 mF + 10 mF PG GND Figure 10-57. Schematic for Fixed Output Voltage Versions 10.3.2 Voltage Tracking The TPS6281x-Q1 follows the voltage applied to the SS/TR pin. A voltage ramp on SS/TR to 0.6 V ramps the output voltage according to the 0.6 V feedback voltage. Tracking the 3.3 V of device 1, such that both rails reach their target voltage at the same time, requires a resistor divider on SS/TR of device 2 equal to the output voltage divider of device 1. The output current of 2.5 µA on the SS/TR pin causes an offset voltage on the resistor divider formed by R5 and R6. The equivalent resistance of R5 // R6, so it must be kept below 15 kΩ. The current from SS/TR causes a slightly higher voltage across R6 than 0.6 V, which is desired because device 2 switches to its internal reference as soon as the voltage at SS/TR is higher than 0.6 V. In case both devices need to run in forced PWM mode, it is recommended to tie the MODE pin of device 2 to the output voltage or the power good signal of device 1, the master device. The TPS6281x-Q1 has a duty cycle limitation defined by the minimum on-time. For tracking down to low output voltages, device 2 cannot follow once the minimum duty cycle is reached. Enabling PFM mode while tracking is in progress allows you to ramp down the output voltage close to 0 V. Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 31 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 MODE/SYNC FB EN EN 4.7 nF 8.06 kW SS/TR PG 19.6 kW VIN SW CIN 22 mF EN FB MODE/SYNC 8.06 kW 4.22 kW SS/TR R6 COUT 47 mF GND Device 2 (slave) TPS62810-Q1 R5 3.3 V 10 pF COMP/FSET L 0.47 mH 40.2 kW 80.6 kW CIN 22 mF 12.7 kW 57.6 kW Device 1 (master) L TPS62810-Q1 0.47 mH VIN SW VIN 2.75 V - 6 V 1.8 V 10 pF COUT 47 mF COMP/FSET PG GND Figure 10-58. Schematic for Output Voltage Tracking Figure 10-59. Scope Plot for Output Voltage Tracking 10.3.3 Synchronizing to an External Clock The TPS6281x-Q1 can be externally synchronized by applying an external clock on the MODE/SYNC pin. There is no need for any additional circuitry as long as the input signal meets the requirements given in the electrical specifications. The clock can be applied / removed during operation, allowing you to switch from an externally-defined fixed frequency to power-save mode or to internal fixed frequency operation. The value of the RCF resistor must be chosen so that the internally defined frequency and the externally applied frequency are close to each other. This ensures a smooth transition from internal to external frequency and vice versa. 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 VIN 2.75 V - 6 V TPS62810-Q1 VIN L 0.47 mH CIN 22 mF R1 EN CFF FB MODE/SYNC R2 R3 COUT 47 mF COMP/FSET SS/TR RCF fEXT VOUT SW CSS PG GND Figure 10-60. Schematic Using External Synchronization VIN = 5 V RCF = 8.06 kΩ VOUT = 1.8 V fEXT = 2.5 MHz IOUT = 0.1 A Figure 10-61. Switching from External Synchronization to Power-Save Mode (PFM) Copyright © 2021 Texas Instruments Incorporated VIN = 5 V RCF = 8.06 kΩ VOUT = 1.8 V fEXT = 2.5 MHz IOUT = 1 A Figure 10-62. Switching from External Synchronization to Internal Fixed Frequency Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 33 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 11 Power Supply Recommendations The TPS6281x-Q1 device family has no special requirements for its input power supply. The output current of the input power supply needs to be rated according to the supply voltage, output voltage, and output current of the TPS6281x-Q1. 34 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 12 Layout 12.1 Layout Guidelines A proper layout is critical for the operation of a switched mode power supply, even more at high switching frequencies. Therefore, the PCB layout of the TPS6281x-Q1 demands careful attention to ensure operation and to get the performance specified. A poor layout can lead to issues like poor regulation (both line and load), stability and accuracy weaknesses increased EMI radiation and noise sensitivity. See Section 12.2 for the recommended layout of the TPS6281x-Q1, which is designed for common external ground connections. The input capacitor must be placed as close as possible between the VIN and GND pin. Provide low inductive and resistive paths for loops with high di/dt. Therefore, paths conducting the switched load current must be as short and wide as possible. Provide low capacitive paths (with respect to all other nodes) for wires with high dv/dt. Therefore, the input and output capacitance must be placed as close as possible to the IC pins and parallel wiring over long distances as well as narrow traces must be avoided. Loops that conduct an alternating current must outline an area as small as possible, as this area is proportional to the energy radiated. Sensitive nodes like FB need to be connected with short wires and not nearby high dv/dt signals (for example SW). Since they carry information about the output voltage, they must be connected as close as possible to the actual output voltage (at the output capacitor). The capacitor on the SS/TR pin as well as the FB resistors, R1 and R2, must be kept close to the IC and connect directly to those pins and the system ground plane. The package uses the pins for power dissipation. Thermal vias on the VIN and GND pins help spread the heat into the pcb. The recommended layout is implemented on the EVM and shown in the TPS62810EVM-015 Evaluation Module User's Guide. 12.2 Layout Example GND VOUT GND VIN Figure 12-1. Example Layout Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 35 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 13 Device and Documentation Support 13.1 Device Support 13.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 13.2 Documentation Support 13.2.1 Related Documentation For related documentation see the following: Texas Instruments, TPS62810EVM-015 Evaluation Module, SLVUBG0 13.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 13.4 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 13.5 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 13.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 13.7 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 36 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 PACKAGE OUTLINE RWY0009A VQFN-HR - 1 mm max height SCALE 5.000 PLASTIC QUAD FLATPACK - NO LEAD 2.1 1.9 B A PIN 1 INDEX AREA 3.1 2.9 0.1 MIN (0.05) SECTION A-A SECTION A-A SCALE 30.000 TYPICAL 1 MAX C SEATING PLANE 0.05 0.00 0.08 C 1.1 0.55 0.675 0.575 (0.2) TYP 6 5 A 4 A SYMM 3 2 0.55 0.45 7 0.2 0.05 (0.9) 2 9X 0.5 TYP 8 1 9 0.675 0.575 SYMM 4X 0.4 0.3 0.1 0.05 0.3 0.2 0.1 0.05 C A B C C A B C 4224015/B 01/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 37 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 EXAMPLE BOARD LAYOUT RWY0009A VQFN-HR - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD SYMM (0.65) (0.55) (0.35) 9 SEE SOLDER MASK DETAIL (0.25) 1 8 3X (0.25) (0.5) 2 (0.5) SYMM (2.65) 3 3X (2.3) 4 (R0.05) TYP 5 7 (0.775) 6 (0.775) 0.25 LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 25X 0.05 MAX ALL AROUND METAL EDGE EXPOSED METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAIL 4224015/B 01/2018 NOTES: (continued) 3. This package is designed to be soldered to thermal pads on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 4. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented. www.ti.com 38 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 www.ti.com SLVSDU1H – AUGUST 2018 – REVISED APRIL 2021 EXAMPLE STENCIL DESIGN RWY0009A VQFN-HR - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD (0.25) (0.775) (0.65) (0.31) 9 EXPOSED METAL TYP (0.775) 1 (0.21) 8 2 (0.5) 6X (1.05) SYMM (2.65) 3 4 6X (0.25) 5 7 (R0.05) TYP 6 SYMM (1.25) SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL PADS 1, 5, 7 & 8: 90% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE: 25X 4224015/B 01/2018 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 39 PACKAGE OPTION ADDENDUM www.ti.com 11-Nov-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS6281008QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81008Q TPS628100MQWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 8100MQ TPS6281020QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81020Q TPS62810QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 810Q TPS6281109QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81109Q TPS628110AQWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 8110AQ TPS6281120QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81120Q TPS6281126QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81126Q TPS628112AQWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 8112AQ TPS628112MQWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 8112MQ TPS628113HQWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 8113HQ TPS62811QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 811Q TPS6281206QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81206Q TPS6281208QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81208Q TPS628120MQWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 8120MQ TPS6281220QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81220Q TPS6281228QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81228Q TPS628122GQWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 8122GQ TPS62812QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 812Q TPS6281320QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 81320Q Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 11-Nov-2021 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS6281326QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 120 81326Q TPS628132DQWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 8132DQ TPS628132MQWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 8132MQ TPS62813QWRWYRQ1 ACTIVE VQFN-HR RWY 9 3000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 813Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of