TPS62825DMQT

TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 TPS6282x 2.4-V to 5.5-V Input, 1-, 2-, 3-, 4-A Step-down Converter with 1% Output Accuracy in 1.5-mm × 1.5-mm QFN Package 1 Features 3 Description • The TPS6282x is an easy-to-use synchronous stepdown DC-DC converters family with a very low quiescent current of only 4 μA. Based on the DCSControl topology, it provides a fast transient response. The internal reference allows to regulate the output voltage down to 0.6 V with a high feedback voltage accuracy of 1% over the junction temperature range of –40°C to 125°C. The family devices are pin-topin and BOM-to-BOM compatible. The entire solution requires a small 470-nH inductor, a single 4.7-µF input capacitor and two 10-µF or single 22-µF output capacitor. • • • • • • • • • • • • • • • • Available as an integrated-inductor power module: TPSM82821 and TPSM82822 DCS-Control™ topology 1% feedback or output voltage accuracy (full temperature range) Up to 97% efficiency 26-mΩ and 25-mΩ internal power MOSFETs 2.4-V to 5.5-V input voltage range 4-μA operating quiescent current 2.2-MHz switching frequency Adjustable output voltage from 0.6 V to 4 V Power save mode for light load efficiency 100% duty cycle for lowest dropout Active output discharge Power good output Thermal shutdown protection Hiccup short-circuit protection A forced-PWM version for CCM operation Create a custom design using the TPS6282x with the WEBENCH® Power Designer 2 Applications Solid state drive Portable electronics Analog security and IP network cameras Industrial PC Multifunction printers Generic point of load Device Information PACKAGE(1) PART NUMBER BODY SIZE (NOM) TPS62824x TPS62825x TPS62826x 6-Pin VSON-HR 1.5 mm x 1.5 mm TPS62827x (1) For all available packages, see the orderable addendum at the end of the data sheet. 100 95 90 85 Efficiency (%) • • • • • • The TPS6282x is available in two flavors. The first includes an automatically entered power save mode to maintain high efficiency down to very light loads for extending the system battery run-time. The second runs in forced-PWM maintaining a continuous conduction mode to ensure the least ripple in the output voltage and a quasi-fixed switching frequency. The device features a Power Good signal and an internal soft start circuit. It is able to operate in 100% mode. For fault protection, it incorporates a HICCUP short circuit protection as well as a thermal shutdown. The device is available in a 6-pin 1.5 x 1.5-mm QFN package, offering the highest power density solution. 80 75 70 65 Vout=3.3V Vout=2.5V Vout=1.8V Vout=1.2V Vout=0.6V 60 Typical Application Schematic 55 50 100P 1m 10m Load (A) 100m 1 4 Efficiency at VIN = 5 V An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A www.ti.com SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Device Options................................................................ 3 6 Pin Configuration and Functions...................................3 7 Specifications.................................................................. 4 7.1 Absolute Maximum Ratings ....................................... 4 7.2 ESD Ratings .............................................................. 4 7.3 Recommended Operating Conditions ........................4 7.4 Thermal Information ...................................................4 7.5 Electrical Characteristics ............................................4 7.6 Typical Characteristics................................................ 6 8 Detailed Description........................................................7 8.1 Overview..................................................................... 7 8.2 Functional Block Diagram........................................... 7 8.3 Feature Description.....................................................8 8.4 Device Functional Modes............................................9 9 Application and Implementation.................................. 10 9.1 Application Information............................................. 10 9.2 Typical Application.................................................... 10 10 Power Supply Recommendations..............................21 11 Layout........................................................................... 22 11.1 Layout Guidelines................................................... 22 11.2 Layout Example...................................................... 22 12 Device and Documentation Support..........................23 12.1 Device Support....................................................... 23 12.2 Documentation Support.......................................... 23 12.3 Support Resources................................................. 23 12.4 Trademarks............................................................. 23 12.5 Electrostatic Discharge Caution..............................23 12.6 Glossary..................................................................23 13 Mechanical, Packaging, and Orderable Information.................................................................... 24 4 Revision History Changes from Revision E (December 2020) to Revision F (September 2021) Page • Changed the status of the TPS62824DMQ to Production Data......................................................................... 3 • Added the TPS6282533..................................................................................................................................... 3 Changes from Revision D (October 2020) to Revision E (December 2020) Page • Changed device status of the TPS62825A and TPS62826A from Advance Information to Production Data.... 1 • Added TPS62824A and TPS62827A to data sheet............................................................................................1 • Added TPS62824DMQ device option.................................................................................................................3 • Added switching frequency curves of TPS62827A ..........................................................................................14 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A www.ti.com SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 5 Device Options PART NUMBER OPERATION MODE OUTPUT VOLTAGE TPS62824DMQ Adjustable TPS62825DMQ Adjustable TPS6282518DMQ 1.8 V TPS6282533DMQ 3.3 V TPS62826DMQ 1A 2A PSM/PWM Adjustable TPS6282618DMQ OUTPUT CURRENT 3A 1.8 V TPS62827DMQ Adjustable 4A TPS62824ADMQ Adjustable 1A TPS62825ADMQ Adjustable TPS62826ADMQ Adjustable TPS62827ADMQ Adjustable Forced-PWM 2A 3A 4A 6 Pin Configuration and Functions FB 3 4 GND PG 2 5 SW EN 1 6 VIN Figure 6-1. DMQ Package 6-Pin VSON-HR Bottom View Table 6-1. Pin Functions PIN NAME NO. I/O DESCRIPTION EN 1 I Device enable pin. To enable the device, this pin needs to be pulled high. Pulling this pin low disables the device. Do not leave floating. PG 2 O Power good open-drain output pin. The pullup resistor can be connected to voltages up to 5.5 V. If unused, leave it floating. FB 3 I Feedback pin. For the fixed output voltage versions, this pin must be connected to the output. GND 4 SW 5 PWR Switch pin of the power stage VIN 6 PWR Input voltage pin Ground pin Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A 3 TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A www.ti.com SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 7 Specifications 7.1 Absolute Maximum Ratings MIN Voltage at Pins (1) Temperature (1) (2) MAX VIN, FB, EN, PG –0.3 6 SW (DC) –0.3 VIN + 0.3 SW (DC, in current limit) –1.0 VIN + 0.3 SW (AC, less than 10ns) (2) –2.5 10 Operating junction temperature, TJ –40 150 Storage temperature, Tstg –65 150 UNIT V °C All voltage values are with respect to network ground terminal. While switching. 7.2 ESD Ratings V(ESD) (1) (2) Electrostatic discharge VALUE UNIT Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±500 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions Over operating junction temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN Input voltage range, TPS62824x, TPS62825x and TPS62826x 2.4 5.5 V VIN Input voltage range, TPS62827x 2.5 5.5 V VOUT Output voltage range 0.6 4.0 V IOUT Output current range, TPS62824x 0 1 A IOUT Output current range, TPS62825x 0 2 A IOUT Output current range, TPS62826x 0 3 A IOUT Output current range, TPS62827x 0 4 A ISINK_PG Sink current at PG pin 1 mA VPG Pull-up resistor voltage TJ Operating junction temperature -40 5.5 V 125 °C 7.4 Thermal Information TPS6282xx THERMAL METRIC(1) TPS6282x, JEDEC TPS62826EVM-794 6 PINS 6 PINS UNIT RθJA Junction-to-ambient thermal resistance 129.5 71.4 °C/W RθJC(top) Junction-to-case (top) thermal resistance 103.9 n/a (2) °C/W RθJB Junction-to-board thermal resistance 33.1 n/a (2) °C/W ψJT Junction-to-top characterization parameter 3.8 3.9 °C/W ψJB Junction-to-board characterization parameter 33.1 38.6 °C/W (1) (2) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Not applicable to an EVM. 7.5 Electrical Characteristics TJ = –40°C to 125°C, and VIN = 2.4 V to 5.5 V. Typical values are at TJ = 25°C and VIN = 5 V , unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY 4 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A www.ti.com SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 TJ = –40°C to 125°C, and VIN = 2.4 V to 5.5 V. Typical values are at TJ = 25°C and VIN = 5 V , unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX 10 UNIT IQ Quiescent current EN = High, no load, device not switching 4 IQ Quiescent current EN = High, no load, FPWM devices 8 ISD Shutdown current EN = Low, TJ = -40 ℃ to 85 ℃ Under voltage lock out threshold VIN falling Under voltage lock out hysteresis VIN rising 160 mV Thermal shutdown threshold TJ rising 150 °C Thermal shutdown hysteresis TJ falling 20 °C VUVLO TJSD 2.1 µA mA 0.05 0.5 2.2 2.3 µA V LOGIC INTERFACE EN VIH High-level threshold voltage VIL Low-level threshold voltage IEN,LKG Input leakage current into EN pin 1.0 V 0.4 V 0.1 µA EN = High 0.01 Time from EN high to 95% of VOUT nominal, TPS62827 1.75 ms Time from EN high to 95% of VOUT nominal, TPS62824x/5x/6x/7A 1.25 ms SOFT START, POWER GOOD tSS Soft start time Power good lower threshold VPG Power good upper threshold VPG rising, VFB referenced to VFB nominal 94 96 98 % VPG falling, VFB referenced to VFB nominal 90 92 94 % VPG rising, VFB referenced to VFB nominal 103 105 107 % VPG falling, VFB referenced to VFB nominal 108 110 112 % VPG,OL Low-level output voltage Isink = 1 mA IPG,LKG Input leakage current into PG pin VPG = 5.0 V 0.01 tPG,DLY Power good deglitch delay PG rising edge 100 PG falling edge 20 0.4 V 0.1 µA µs OUTPUT VOUT Output voltage accuracy TPS6282533, PWM mode 3.267 3.3 3.333 VOUT Output voltage accuracy TPS6282x18, PWM mode 1.78 1.8 1.82 V VFB Feedback regulation voltage PWM mode 594 600 606 mV IFB,LKG Feedback input leakage current for adjustable output voltage VFB = 0.6 V 0.01 0.05 µA RFB Internal resistor divider connected to FB pin, for fixed output votlage TPS6282518, TPS6282618, TPS6282533 IDIS Output discharge current VSW = 0.4V; EN = LOW Load regulation IOUT = 0.5 A to 3 A, VOUT = 1.8 V 7.5 75 V MΩ 400 mA 0.1 %/A High-side FET on-resistance 26 mΩ Low-side FET on-resistance 25 POWER SWITCH RDS(on) 1.7 2.1 2.4 A TPS62825x 2.7 3.3 3.9 A TPS62826x 3.7 4.3 5.0 A TPS62827x 4.8 5.6 6.4 A ILIM High-side FET switch current limit, DC ILIM Low-side FET negative current limit, DC TPS62824A/5A/6A/7A fSW PWM switching frequency IOUT = 1 A, VOUT = 1.8 V Copyright © 2021 Texas Instruments Incorporated mΩ TPS62824A -1.6 A 2.2 MHz Submit Document Feedback Product Folder Links: TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A 5 TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A www.ti.com SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 70.0 70.0 60.0 60.0 50.0 50.0 RDS(on) (mOhm) RDS(on) (mOhm) 7.6 Typical Characteristics 40.0 30.0 20.0 10.0 0.0 2.5 10.0 3.5 4.0 4.5 Input Voltage (V) 5.0 0.0 2.5 5.5 3.5 4.0 4.5 Input Voltage (V) 5.0 5.5 D011 8.0 $ TJ = -40 °C TJ = 25 °C TJ = 85 °C TJ = 125 °C 4XLHVFHQW &XUUHQW $ 6KXWGRZQ &XUUHQW 3.0 Figure 7-2. Low-Side FET On-Resistance 0.5 0.3 0.2 0.1 0.0 2.5 TJ = 0 °C TJ = 25 °C TJ = 85 °C TJ = 125 °C D010 Figure 7-1. High-Side FET On-Resistance 0.4 30.0 20.0 TJ = 0 °C TJ = 25 °C TJ = 85 °C TJ = 125 °C 3.0 40.0 3.0 3.5 4.0 4.5 Input Voltage (V) 5.0 6.0 4.0 2.0 0.0 2.5 5.5 TJ = -40 °C TJ = 25 °C TJ = 85 °C TJ = 125 °C 3.0 3.5 D000 Figure 7-3. Shutdown Current 4.0 4.5 Input Voltage (V) 5.0 5.5 D001 Figure 7-4. Quiescent Current 500 Output Discharge Current (mA) 450 400 350 300 250 200 150 TJ = 0 °C TJ = 25 °C TJ = 85 °C TJ = 125 °C 100 50 0 2.5 3.0 3.5 4.0 4.5 Input Voltage (V) 5.0 5.5 D012 Figure 7-5. Output Discharge Current 6 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A www.ti.com SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 8 Detailed Description 8.1 Overview The TPS6282x are synchronous step-down converters based on the DCS-Control topology with an adaptive constant on-time control and a stabilized switching frequency. It operates in PWM (pulse width modulation) mode for medium to heavy loads and in PSM (power save mode) at light load conditions, keeping the output voltage ripple small. The nominal switching frequency is about 2.2 MHz with a small and controlled variation over the input voltage range. As the load current decreases, the converter enters PSM, reducing the switching frequency to keep efficiency high over the entire load current range. Since combining both PWM and PSM within a single building block, the transition between modes is seamless and without effect on the output voltage. In forced-PWM devices, the converter maintains a continuous conduction mode operation and keeps the output voltage ripple very low across the whole load range and at a nominal switching frequency of 2.2 MHz. The devices offer both excellent dc voltage and fast load transient regulation, combined with a very low output voltage ripple. 8.2 Functional Block Diagram PG Control Logic EN VFB VREF Soft-Start UVLO Thermal Shutdown VIN VFB FB Ramp VSW VIN Peak Current Detect VREF EA HICCUP Comp VSW Modulator SW Gate Drive Ton Output Discharge VIN VSW Zero Current Detect 0.6 V Or Fixed Output Voltages Copyright © 2021 Texas Instruments Incorporated GND VREF Submit Document Feedback Product Folder Links: TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A 7 TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A www.ti.com SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 8.3 Feature Description 8.3.1 Pulse Width Modulation (PWM) Operation At load currents larger than half the inductor ripple current, the device operates in pulse width modulation in continuous conduction mode (CCM). The PWM operation is based on an adaptive constant on-time control with stabilized switching frequency. To achieve a stable switching frequency in a steady state condition, the on-time is calculated as: TON = VOUT × 450ns VIN (1) In forced-PWM devices, the device always operates in pulse width modulation in continuous conduction mode (CCM). 8.3.2 Power Save Mode (PSM) Operation To maintain high efficiency at light loads, the device enters power save mode (PSM) at the boundary to discontinuous conduction mode (DCM). This happens when the output current becomes smaller than half of the ripple current of the inductor. The device operates now with a fixed on-time and the switching frequency further decreases proportional to the load current. It can be calculated as: fPSM = 2 × IOUT V éV - VOUT ù 2 × IN ê IN TON ú VOUT ë L û (2) In PSM, the output voltage rises slightly above the nominal target, which can be minimized using larger output capacitance. At duty cycles larger than 90%, the device may not enter PSM. The device maintains output regulation in PWM mode. 8.3.3 Minimum Duty Cycle and 100% Mode Operation There is no limitation for small duty cycles since even at very low duty cycles, the switching frequency is reduced as needed to always ensure a proper regulation. If the output voltage level comes close to the input voltage, the device enters 100% mode. While the high-side switch is constantly turned on, the low-side switch is switched off. The difference between VIN and VOUT is determined by the voltage drop across the high-side FET and the DC resistance of the inductor. The minimum VIN that is needed to maintain a specific VOUT value is estimated as: VIN,MIN = VOUT + IOUT,MAX ´ (RDS(on) + RL ) (3) where • • • • VIN,MIN = Minimum input voltage to maintain an output voltage IOUT,MAX = Maximum output current RDS(on) = High-side FET ON-resistance RL = Inductor ohmic resistance (DCR) 8.3.4 Soft Start About 250 μs after EN goes High, the internal soft-start circuitry controls the output voltage during start-up. This avoids excessive inrush current and ensures a controlled output voltage ramp. It also prevents unwanted voltage drops from high-impedance power sources or batteries. The TPS6282x can start into a pre-biased output. 8.3.5 Switch Current Limit and HICCUP Short-Circuit Protection The switch current limit prevents the device from drawing excessive current in case of externally-caused overcurrent or short circuit condition. Due to an internal propagation delay (typically 60 ns), the actual AC peak current can exceed the static current limit during that time. 8 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A www.ti.com SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 If the current limit threshold is reached, the device delivers its maximum output current. Detecting this condition for 32 switching cycles (about 13 μs), the device turns off the high-side MOSFET for about 100 μs which allows the inductor current to decrease through the low-side MOSFET's body diode and then restarts again with a soft start cycle. As long as the overload condition is present, the device hiccups that way, limiting the output power. In forced PWM devices, a negative current limit (ILIMN) is enabled to prevent excessive current flowing backwards to the input. When the inductor current reaches ILIMN, the low-side MOSFET turns off and the high-side MOSFET turns on and kept on until TON time expires. 8.3.6 Undervoltage Lockout The undervoltage lockout (UVLO) function prevents misoperation of the device if the input voltage drops below the UVLO threshold. It is set to about 2.2 V with a hysteresis of typically 160 mV. 8.3.7 Thermal Shutdown The junction temperature (TJ) of the device is monitored by an internal temperature sensor. If TJ exceeds 150°C (typ.), the device goes in thermal shutdown with a hysteresis of typically 20°C. Once TJ has decreased enough, the device resumes normal operation. 8.4 Device Functional Modes 8.4.1 Enable, Disable, and Output Discharge The device starts operation when Enable (EN) is set High. The input threshold levels are typically 0.9 V for rising and 0.7 V for falling signals. Do not leave EN floating. Shutdown is forced if EN is pulled Low with a shutdown current of typically 50 nA. During shutdown, the internal power MOSFETs as well as the entire control circuitry are turned off and the output voltage is actively discharged through the SW pin by a current sink. Therefore VIN must remain present for the discharge to function. 8.4.2 Power Good The TPS6282x has a built-in power good (PG) function. The PG pin goes high impedance when the output voltage has reached its nominal value. Otherwise, including when disabled, in UVLO or in thermal shutdown, PG is Low (see Table 8-1). The PG function is formed with a window comparator, which has an upper and lower voltage threshold. The PG pin is an open-drain output and is specified to sink up to 1 mA. The power good output requires a pullup resistor connecting to any voltage rail less than 5.5 V. The PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters. Leave the PG pin unconnected when not used. The PG rising edge has a 100-µs blanking time and the PG falling edge has a deglitch delay of 20 µs. Table 8-1. PG Pin Logic DEVICE CONDITIONS EN = High, VFB ≥ 0.576 V LOGIC STATUS HIGH Z LOW √ EN = High, VFB ≤ 0.552 V Enable EN = High, VFB ≤ 0.63 V √ √ EN = High, VFB ≥ 0.66 V √ Shutdown EN = Low √ Thermal Shutdown TJ > TJSD √ UVLO 0.7 V < VIN < VUVLO √ Power Supply Removal VIN < 0.7 V Copyright © 2021 Texas Instruments Incorporated √ Submit Document Feedback Product Folder Links: TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A 9 TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A www.ti.com SLVSEF9F – MARCH 2018 – REVISED SEPTEMBER 2021 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 9.1 Application Information The following section discusses the design of the external components to complete the power supply design for several input and output voltage options by using typical applications as a reference. 9.2 Typical Application Figure 9-1. Typical Application of TPS62826x Figure 9-2. Typical Application of TPS62827 9.2.1 Design Requirements For this design example, use the parameters listed in Table 9-1 as the input parameters. Table 9-1. Design Parameters 10 DESIGN PARAMETER EXAMPLE VALUE Input voltage, TPS62826x 2.4 V to 5.5 V Input voltage, TPS62827x 2.5 V to 5.5 V Output voltage 1.8 V Output ripple voltage