TPS629206DRLR

TPS629206 SLVSGE1 – MARCH 2022 TPS629206 600-mA, 3-V to 17-V Low IQ Buck Converter with DCS-Control 1 Features 3 Description • The TPS6292xx family of devices are highly efficient, small, and highly flexible synchronous step-down DC-DC converters that are easy to use. A wide 3-V to 17-V input voltage range supports a wide variety of systems powered from either 12-V, 5-V, or 3.3-V supply rails, or single-cell or multi-cell LiIon batteries. The TPS629206 can be configured to run at either 2.5 MHz or 1 MHz in a forced PWM mode or a variable frequency (auto PFM) mode. In auto PFM mode, the device automatically transitions to power save mode at light loads to maintain high efficiency. The low 4-µA typical quiescent current also provides high efficiency down to the smallest loads. TI's automatic efficiency enhancement (AEE) mode holds a high conversion efficiency through the whole operation range without the need of using different inductors by automatically adjusting the switching frequency based on input and output voltages. In addition to selecting the switching frequency behavior, the MODE/S-CONF input pin can also be used to select between different combinations of external and internal feedback dividers and enabling and disabling the output voltage discharge capability. In the internal feedback configuration, a resistor between the FB/ VSET pin and GND can be used to select between 18 different output voltage options (see Table 8-2). • • • • • • • • 2 Applications • • • • • • Appliances Building automation Factory automation and control Grid infrastructure Retail automation and payment Wireless infrastructure VIN 3V ± 17V Device Information (1) 2.2 µH VIN 4.7 F PART NUMBER PACKAGE(1) BODY SIZE (NOM) TPS629206 SOT-5X3 (8) 1.60 mm × 2.10 mm (including pins) For all available packages, see the orderable addendum at the end of the data sheet. 100 VOUT 0.4V ± 5.5V 90 SW 22 F EN VOS FB/ VSET MODE/ S-CONF PG GND 80 Vout Accuracy (%) • • • • • High-efficiency DCS-Control topology – Internal compensation – Seamless PWM/PFM transition 4-µA typical low quiescent current Output current up to 0.6 A RDSON: 250-mΩ high side, 85-mΩ low side Output voltage accuracy of ±1% Configurable output voltage options: – VFB external divider: 0.6 V to 5.5 V – VSET internal divider: • 18 options between 0.4 V and 5.5 V Flexibility through the MODE/S-CONF pin – 2.5-MHz or 1.0-MHz switching frequency – Forced PWM or auto (PFM) power save mode with dynamic mode change option – Output discharge on/off No external bootstrap capacitor required Overcurrent and overtemperature protection 100% duty cycle mode Precise enable input Power-good output Pin-to-pin compatible with the TPS629210 and TPS629203 devices 0.5-mm pitch, 8-pin SOT-5X3 package 70 60 50 40 Simplified Schematic VIN = 6V VIN = 9V VIN = 12V VIN = 15V 30 20 1E-5 0.0001 0.001 0.01 Iout (A) 0.1 0.2 0.5 1 Efficiency vs Output Current VOUT = 3.3 V at 1.0-MHz Auto PFM/PWM An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS629206 www.ti.com SLVSGE1 – MARCH 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Device Comparison Table...............................................3 6 Pin Configuration and Functions...................................3 7 Specifications.................................................................. 4 7.1 Absolute Maximum Ratings........................................ 4 7.2 ESD Ratings............................................................... 4 7.3 Recommended Operating Conditions.........................4 7.4 Thermal Information....................................................4 7.5 Electrical Characteristics.............................................5 7.6 Typical Characteristics................................................ 7 8 Detailed Description......................................................10 8.1 Overview................................................................... 10 8.2 Functional Block Diagram......................................... 10 8.3 Feature Description...................................................11 8.4 Device Functional Modes..........................................15 9 Application and Implementation.................................. 19 9.1 Application Information............................................. 19 9.2 Typical Application.................................................... 19 9.3 System Examples..................................................... 38 10 Power Supply Recommendations..............................39 11 Layout........................................................................... 40 11.1 Layout Guidelines................................................... 40 11.2 Layout Example...................................................... 40 12 Device and Documentation Support..........................42 12.1 Device Support....................................................... 42 12.2 Documentation Support.......................................... 42 12.3 Receiving Notification of Documentation Updates..42 12.4 Support Resources................................................. 42 12.5 Trademarks............................................................. 42 12.6 Electrostatic Discharge Caution..............................43 12.7 Glossary..................................................................43 13 Mechanical, Packaging, and Orderable Information.................................................................... 43 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 2 DATE REVISION NOTES March 2022 * Initial Release Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 5 Device Comparison Table Device Number Output Current TPS629203 0 A–0.3 A TPS629206 0 A–0.6 A TPS629210 0 A–1 A TPS629210E 0 A–1 A Operating Temperature Range Input Voltage Switching Frequency –40°C to 125°C 3 V–17 V Selectable 1 MHz or 2.5 MHz options PWM Mode VO Adjust Externally Selectable auto PWM/PFM programmable or 18 or forced PWM internal options –55°C to 150°C EN VIN GND 8 7 6 5 1 2 3 4 PG V OS SW FB/ V S ET MOD E S - CO / NF 6 Pin Configuration and Functions Figure 6-1. TPS629206 8-Pin DRL SOT-5X3 Pinout Table 6-1. Pin Functions Pin Name NO. I/O Description Dependent upon device configuration (see Section 8.3.1) FB/VSET 1 I • • FB: Voltage feedback input. Connect a resistive output voltage divider to this pin. VSET: Output voltage setting pin. Connect a resistor to GND to choose the output voltage according to Table 8-2. PG 2 O Open-drain power-good output VOS 3 I Output voltage sense pin. Connect directly to the positive pin of the output capacitor. SW 4 Switch pin of the converter. Connected to the internal power switches GND 5 Ground pin VIN 6 I Power supply input. Make sure the input capacitor is connected as close as possible between the VIN pin and GND. EN 7 I Enable/disable pin including a threshold comparator. Connect to logic low to disable the device. Pull high to enable the device. Do not leave this pin unconnected. MODE/S-CONF 8 I Device mode selection (auto PFM/PWM or forced PWM operation) and Smart-CONFIG pin. Connect a resistor to configure the device according to Table 8-1. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 3 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 7 Specifications 7.1 Absolute Maximum Ratings over operating temperature range (unless otherwise noted)(1) MIN MAX UNIT Voltage(2) VIN, EN, PG, MODE/S-CONF –0.3 18 V Voltage(2) SW(3) –0.3 VIN + 0.3 V –3.0 23 V –0.3 6 V 10 mA –65 150 °C Voltage(2) SW (AC, less than 10 Voltage(2) FB/VSET, VOS Current PG Tstg Storage temperature (1) (2) (3) ns)(3) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. All voltage values are with respect to network ground terminal. While switching 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002 (2) ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions Over operating junction temperature range (unless otherwise noted) MIN NOM MAX UNIT VI Input voltage range 3.0 17 V VO Output voltage range 0.4 5.5 V CI Effective input capacitance CO Effective output capacitance(1) inductance(2) L Output IOUT Output current ISINK_PG Sink current at the PG pin TJ Junction temperature (5) (1) (2) (3) (4) (5) 3 4.7 10 22 100 µF 2.2 4.7(4) µH 1.0(3) µF 0 0.6 A 1 mA –40 125 °C This is for capacitors directly at the output of the device. More capacitance is allowed if there is a series resistance associated to the capacitor. Nominal inductance value Not recommended for 1-MHz operation Larger values of inductance can be used to reduce the ripple current, but they can have a negative impact on efficiency and the overall transient response. Operating lifetime is derated at junction temperatures greater than 150°C. 7.4 Thermal Information SOT-5X3 (8) THERMAL METRIC(1) 4 JEDEC PCB TPS6292xx EVM UNIT RθJA Junction-to-ambient thermal resistance 120 60 °C/W RθJC(top) Junction-to-case (top) thermal resistance 45 n/a °C/W RθJB Junction-to-board thermal resistance 25 n/a °C/W ΨJT Junction-to-top characterization parameter 1 n/a °C/W Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 SOT-5X3 (8) THERMAL METRIC(1) ΨJB (1) Junction-to-board characterization parameter JEDEC PCB TPS6292xx EVM 20 n/a UNIT °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.5 Electrical Characteristics VIN = 3 V to 17 V, TJ = –40°C to +125°C, typical values at VI = 12 V and TA = 25°C,unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY IQ Operating quiescent current (power save mode) IOUT = 0 mA, device not switching 4 µA IQ;PWM Operating quiescent current (PWM mode) VIN = 12 V, VOUT = 1.2 V; IOUT = 0 mA, device switching 5 mA ISD Shutdown current into the VIN pin EN = 0 V Undervoltage lockout VIN rising 2.85 Undervoltage lockout VIN falling 2.65 VUVLO VUVLO 0.25 Undervoltage lockout hysteresis 1.5 µA 2.95 3.0 V 2.75 2.85 V 200 mV CONTROL AND INTERFACE ILKG EN input leakage current VIH;MODE High-level input voltage at the MODE/S-CONF pin EN = VIN 3 VIL;MODE Low-level input voltage at the MODE/S-CONF pin VIH High-level input voltage at the EN pin 0.97 VIL Low-level input voltage at the EN pin 0.87 VPG Power-good threshold VFB rising, referenced to VFB nominal VFB falling, referenced to VFB nominal VPG_HYS Power-good threshold hysteresis tPG,DLY Power-good delay time 32 tPG,DLY Power-good pulldown resistance 10 VPG,OL Low-level output voltage at the PG pin ISINK = 1 mA IPG,LKG Input leakage current into the PG pin 300 1.0 nA V 0.15 V 1.0 1.03 V 0.9 0.93 V 93% 96% 99% 89% 93% 96% Hysteresis 3% VPG = 5 V 0.01 µs Ω 0.1 V 1 µA POWER SWITCHES RDS;ON ILIM ILIM;SINK High-side FET on resistance 250 Low-side FET on resistance 85 mΩ High-side FET current limit 1.1 1.4 1.7 A Low-side FET current limit 0.9 1.2 1.5 A 1 1.2 A Low-side FET sink current limit 0.8 Thermal shutdown threshold TJ rising 170 Thermal shutdown hysteresis TJ falling 20 fSW Switching frequency 2.5-MHz selection (FPWM mode) 2.5 MHz fSW Switching frequency 1.0-MHz selection (FPWM mode) 1.0 MHz TON(MIN) Minimum on time 40 ns ILKG;SW Leakage current into the SW pin EN = 0 V, VSW = VOS = 5.5 V Output voltage regulation VSET configuration selected, TJ = 25°C TSD 0.1 °C 5 µA OUTPUT VO –0.75% +0.75% Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 5 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 7.5 Electrical Characteristics (continued) VIN = 3 V to 17 V, TJ = –40°C to +125°C, typical values at VI = 12 V and TA = 25°C,unless otherwise noted PARAMETER MIN TYP MAX UNIT VO Output voltage regulation VFB Feedback regulation voltage Adjustable configuration selected VFB Feedback voltage regulation FB option selected, TJ = 25°C VFB Feedback voltage regulation FB option selected, –40°C ≤ TJ ≤ 125°C IFB Input leakage current into the FB pin Adjustable configuration, VFB = 0.6 V 1 100 nA Start-up delay time IO = 0 mA, time from EN rising edge until start switching, external FB configuration selected 700 1500 µs Start-up delay time IO = 0 mA, time from EN rising edge until start switching, VSET configuration selected 1000 1800 µs TSS Soft-start time IO = 0 mA after Tdelay, from first switching pulse until target VO 600 700 µs RDISCH Active discharge resistance Discharge = ON - option selected, EN = LOW 7.5 20 Ω Tdelay 6 TEST CONDITIONS VSET option selected, –40°C ≤ TJ ≤ 125°C Submit Document Feedback –1% +1% 0.6 V –0.5 % + 0.5% –1% +0.5% Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 7.6 Typical Characteristics 10 0.8 9 0.7 IVIN (A) 7 6 5 4 3 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 2 1 0 -40 -25 -10 5 20 35 50 65 Temperature (C) 80 95 Shutdown Current (A) 8 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 110 125 -25 -10 5 20 35 50 65 Temperature (C) 80 95 110 125 Measured with the device not switching Figure 7-2. Typical Shutdown Current vs Temperature Figure 7-1. Typical Quiescent Current vs Temperature 0.3 5.02 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 0.2 0 5.01 5.005 Vout (V) VFB Accuracy (%) 0.1 -0.1 -0.2 5 4.995 4.99 4.985 -0.3 4.98 -0.4 -0.5 -40 -25 -10 Vin = 6V Vin = 12V Vin = 17V 5.015 4.975 5 20 35 50 65 Temperature (C) 80 95 4.97 -40 -25 -10 110 125 5 20 35 50 65 Temperature (C) 80 95 110 125 VOUT = 5.0 V Figure 7-4. Output Voltage Accuracy – VSET Selected Figure 7-3. Output Voltage Accuracy – External Feedback 1.81 3.315 Vin = 6V Vin = 12V Vin = 17V 3.312 1.806 3.306 1.804 3.303 1.802 Vout (V) Vout (V) 3.309 3.3 3.297 1.8 1.798 3.294 1.796 3.291 1.794 3.288 1.792 3.285 -40 -25 -10 5 20 35 50 65 Temperature (C) 80 95 110 125 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 1.808 1.79 -40 -25 -10 VOUT = 3.3 V 5 20 35 50 65 Temperature (C) 80 95 110 125 VOUT = 1.8 V Figure 7-5. Output Voltage Accuracy – VSET Selected Figure 7-6. Output Voltage Accuracy – VSET Selected Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 7 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 7.6 Typical Characteristics (continued) 1.206 0.603 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 1.204 1.2 0.601 Vout (V) Vout (V) 1.202 1.198 1.196 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 0.602 0.6 0.599 0.598 1.194 0.597 1.192 1.19 -40 -25 -10 5 20 35 50 65 Temperature (C) 80 95 0.596 -40 -25 -10 110 125 5 VOUT = 1.2 V 1.1 2.7 1.08 2.6 1.06 2.5 2.4 2.3 2.2 2.1 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 1.8 -40 -25 -10 VOUT = 1.2 V 20 35 50 65 Temperature (C) 80 95 FSW = 2.5 MHz FPWM 1 0.98 0.96 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 0.94 5 VOUT = 1.2 V IOUT = 0 A 20 35 50 65 Temperature (C) 80 95 Fsw = 1.0 MHz FPWM 110 125 IOUT = 0 A Figure 7-10. Switching Frequency vs Temperature 500 160 450 140 400 RDSON_LS (m) RDSON_HS (m) 1.02 0.9 -40 -25 -10 110 125 Figure 7-9. Switching Frequency vs Temperature 350 300 250 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 200 150 -40 -25 -10 5 20 35 50 65 Temperature (C) 80 95 110 125 Figure 7-11. High-Side RDSON vs Temperature 8 110 125 1.04 0.92 5 95 Figure 7-8. Output Voltage Accuracy – VSET Selected Switching Frequency (MHz) Switching Frequency (MHz) Figure 7-7. Output Voltage Accuracy – VSET Selected 1.9 80 VOUT = 0.6 V 2.8 2 20 35 50 65 Temperature (C) 120 100 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 80 60 -40 -25 -10 5 20 35 50 65 Temperature (C) 80 95 110 125 Figure 7-12. Low-Side RDSON vs Temperature Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 7.6 Typical Characteristics (continued) 1.42 1.24 1.415 1.23 1.22 1.21 1.405 ILIM_LS (A) ILIM_HS (A) 1.41 1.4 1.395 1.39 1.38 -40 -25 -10 5 20 35 50 65 Temperature (C) 80 95 1.18 1.17 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 1.385 1.2 1.19 1.15 1.14 -40 -25 -10 110 125 Figure 7-13. High-Side ILIM vs Temperature 1.02 2.95 1.01 ILIM_NEG (A) 1 0.99 0.98 0.97 0.96 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 0.93 -40 -25 -10 5 20 35 50 65 Temperature (C) 80 95 VIN UVLO Thrreshold (V) 3 0.94 2.7 2.6 -40 -25 -10 110 125 1.003 0.898 1.002 1.001 1 0.999 0.998 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 80 95 Rising Falling 5 20 35 50 65 Temperature (C) 80 95 110 125 Figure 7-16. VIN UVLO Thresholds vs Temperature 110 125 Figure 7-17. Precision Enable Threshold vs Temperature VEN Threshold Falling (V) VEN Threshold Rising (V) 2.75 0.9 20 35 50 65 Temperature (C) 110 125 2.8 0.899 5 95 2.85 1.004 0.995 -40 -25 -10 80 2.9 1.005 0.996 20 35 50 65 Temperature (C) 2.65 Figure 7-15. Low-Side INEG vs Temperature 0.997 5 Figure 7-14. Low-Side ILIM vs Temperature 1.03 0.95 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 1.16 0.897 0.896 0.895 0.894 0.893 Vin = 3V Vin = 6V Vin = 12V Vin = 17V 0.892 0.891 0.89 -40 -25 -10 5 20 35 50 65 Temperature (C) 80 95 110 125 Figure 7-18. Precision Enable Threshold vs Temperature Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 9 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 8 Detailed Description 8.1 Overview The TPS629206 synchronous switched mode power converter is based on DCS-Control (Direct Control with Seamless Transition into power save mode), an advanced regulation topology that combines the advantages of hysteretic, voltage mode, and current mode control. This control loop takes information about output voltage changes and feeds it directly to a fast comparator stage. It sets the switching frequency, which is constant for steady state operating conditions, and provides immediate response to dynamic load changes. To get accurate DC load regulation, a voltage feedback loop is used. The internally compensated regulation network achieves fast and stable operation with small external components and low-ESR capacitors. 8.2 Functional Block Diagram VIN PG Ref 1.0V VI – HS Limit + EN VO Internal/External Divider FB/VSET Resistor-toDigital VFB Smart-Enable Ref-System UVLO Start-up Handling Smart-CONFIG PG-Control Thermal Shutdown Power Control Power Save Mode Forced PWM SW Gate Driver 100% Mode Resistor-toDigital MODE/ S-CONF LS Limit MODE Detection VO Direct Control VFB TON timer + Device Control VREF VI – VOS Device Control & Logic VO DCS-Control GND 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 8.3 Feature Description 8.3.1 Mode Selection and Device Configuration (MODE/S-CONF Pin) The MODE/S-CONF pin is an input with two functions. It can be used to customize the device behavior in two ways: • Select the device mode (forced PWM or auto PFM/PWM operation) traditionally with a HIGH or LOW level. • Select the device configuration (switching frequency, internal and external feedback, output discharge, and PFM/PWM mode) by connecting a single resistor to this pin. The device interprets this pin during its start-up sequence after the internal OTP readout and before it starts switching in soft start. If the device reads a HIGH or LOW level, dynamic mode change is active and PFM/PWM mode can be changed during operation. If the device reads a resistor value, there is no further interpretation during operation and the device mode or other configurations cannot be changed afterward. EN & UVLO Precise Enable detection OTP Readout S-CONF Readout VSET Readout Resistor-to-Digitial readout & interpretation No interpretation of MODE/S-CONF or VSET PG -> High Switching Operation Softstart MODE-Pin toggling detection VOUT Figure 8-1. Interpretation of S-CONF and VSET Flow Table 8-1. Smart-CONFIG Setting Table # M ODE/S-CONF Level Or Resistor Value [Ω] (1) FB/VSET Pin FSW (MHz) Output Discharge Mode (Auto Or Forced PWM) Dynamic Mode Change Setting Options by Level 1 GND external FB up to 2.5(2) yes Auto PFM/PWM with AEE 2 HIGH (> 1.8 V) external FB 2.5 yes Forced PWM Active Setting Options by Resistor (1) (2) 3 7.50 k external FB up to 2.5(2) no Auto PFM/PWM with AEE 4 9.31 k external FB 2.5 no Forced PWM 5 11.50 k external FB 1 yes Auto PFM/PWM 6 14.30 k external FB 1 yes Forced PWM 7 17.80 k external FB 1 no Auto PFM/PWM 8 22.10 k external FB 1 no Forced PWM up to 2.5(2) 9 27.40 k VSET yes Auto PFM/PWM with AEE 10 34.00 k VSET 2.5 yes Forced PWM 11 42.20 k VSET up to 2.5(2) no Auto PFM/PWM with AEE 12 52.30 k VSET 2.5 no Forced PWM 13 64.90 k VSET 1 yes Auto PFM/PWM 14 80.60 k VSET 1 yes Forced PWM 15 100.00 k VSET 1 no Auto PFM/PWM 16 124.00 k VSET 1 no Forced PWM not active E96 Resistor Series, 1% accuracy, temperature coefficient better or equal than ±200 ppm/°C FSW varies based on VIN and VOUT. See Section 8.4.3 for more details. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 11 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 8.3.2 Adjustable VO Operation (External Voltage Divider) If the device is configured to operate in classical adjustable VO operation, the FB/VSET pin is used as the feedback pin and needs to sense VO through an external divider network. Figure 8-2 shows the typical schematic for this configuration. VIN 3V ± 17V VOUT 0.6V ± 5.5V 2.2 µH 4.7 F VIN SW EN VOS 22 F FB/ VSET MODE/ S-CONF PG GND Figure 8-2. Adjustable VO Operation Schematic 8.3.3 Selectable VO Operation (VSET and Internal Voltage Divider) If the device is configured to VSET operation, the device interprets the VSET pin value following the MODE/ S-CONF readout (see Figure 8-3). There is no further interpretation of the VSET pin during operation and the output voltage cannot be changed afterward without toggling the EN pin. Figure 8-3 shows the typical schematic for this configuration, where VO is directly sensed at the VOS pin of the device. VO is sensed only through the VOS pin by an internal resistor divider. The target VO is programmed by an external resistor connected between VSET and GND (see Table 8-2). VIN 3V ± 17V VOUT 0.4V ± 5.5V 2.2 µH 4.7 F VIN SW EN VOS 22 F FB/ VSET MODE/ S-CONF PG GND Figure 8-3. Selectable VO Operation Schematic 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 Table 8-2. VSET Selection Table VSET # Resistor Value [Ω](1) Target VO [V] 1 GND 1.2 2 4.87 k 0.4 3 6.04 k 0.6 4 7.50 k 0.8 5 9.31 k 0.85 6 11.50 k 1.0 7 14.30 k 1.1 8 17.80 k 1.25 9 22.10 k 1.3 10 27.40 k 1.35 11 34.00 k 1.8 12 42.20 k 1.9 13 52.30 k 2.5 14 64.90 k 3.8 15 80.60 k 5.0 16 100.00 k 5.1 17 124.00 k 5.5 18 249.00 k or larger/open 3.3 (1) E96 Resistor Series, 1% accuracy, temperature coefficient better or equal to ±200 ppm/°C 8.3.4 Smart Enable with Precise Threshold The voltage applied at the EN pin of the TPS629206 is compared to a fixed threshold rising voltage. This allows the user to drive the pin by a slowly changing voltage and enables the use of an external RC network to achieve a power-up delay. The precise enable input allows the use of a user-programmable undervoltage lockout by adding a resistor divider to the input of the EN pin. The enable input threshold for a falling edge is lower than the rising edge threshold. The TPS629206 starts operation when the rising threshold is exceeded. For proper operation, the EN pin must be terminated and must not be left floating. Pulling the EN pin low forces the device into shutdown. In this mode, the internal high-side and low-side MOSFETs are turned off and the entire internal control circuitry is switched off. An internal resistor pulls the EN pin to GND and avoids the pin to be floating. This prevents an uncontrolled start-up of the device in case the EN pin cannot be driven to a low level safely. With EN low, the device is in shutdown mode. The device is turned on with EN set to a high level. The pulldown control circuit disconnects the pulldown resistor on the EN pin once the internal control logic and the reference have been powered up. With EN set to a low level, the device enters shutdown mode and the pulldown resistor is activated again. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 13 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 8.3.5 Power Good (PG) The TPS629206 has a built-in power-good (PG) feature to indicate whether the output voltage has reached its target and the device is ready. The PG signal can be used for start-up sequencing of multiple rails. The PG pin is an open-drain output that requires a pullup resistor to any voltage up to the recommended input voltage level. PG is low when the device is turned off due to EN, UVLO (undervoltage lockout), or thermal shutdown. VIN must remain present for the PG pin to stay low. If the power-good output is not used, it is recommended to tie to GND or leave open. Table 8-3. Power-Good Indicator Functional Table Logic Signals VI VVIN > UVLO EN Pin HIGH Thermal Shutdown No VO PG Status VO on target High Impedance VO < target LOW Yes x LOW LOW x x LOW 1.8 V < VVIN < UVLO x x x LOW VI < 1.8 V x x x Undefined 8.3.6 Output Discharge Function The purpose of the discharge function is to make sure there is a defined down-ramp of the output voltage when the device is being disabled but also to keep the output voltage close to 0 V when the device is off. The output discharge feature is only active once the TPS629206 has been enabled at least once since the supply voltage was applied. The internal discharge resistor is connected to the VOS pin. The discharge function is enabled as soon as the device is disabled (EN pin = low), in thermal shutdown, or in undervoltage lockout. The minimum supply voltage required for the discharge function to remain active typically is 2 V. 8.3.7 Undervoltage Lockout (UVLO) If the input voltage drops, the undervoltage lockout prevents mis-operation of the device by switching off both the power FETs. The device is fully operational for voltages above the rising UVLO threshold and turns off if the input voltage trips below the threshold for a falling supply voltage. 8.3.8 Current Limit and Short Circuit Protection The TPS629206 is protected against overload and short circuit events. If the inductor current exceeds the current limit, ILIM_HS, the high-side switch is turned off and the low-side switch is turned on to ramp down the inductor current. The high-side FET turns on again only if the current in the low-side FET has decreased below the low-side current limit threshold, ILIM_LS. Due to internal propagation delay, the actual current can exceed the static current limit during that time. The dynamic current limit is given in Equation 1. Ipeak (typ ) = ILIMH + VL ´ tPD L (1) where: • • • • ILIMH is the static current limit as specified in the electrical characteristics. L is the effective inductance at the peak current. VL is the voltage across the inductor (VIN – VOUT). tPD is the internal propagation delay of typically 50 ns. The current limit can exceed static values, especially if the input voltage is high and very small inductances are used. The dynamic high-side switch peak current can be calculated as follows: 14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 I p e a k ( ty p ) = I L I M H + V IN - V O U T ´ 50ns L (2) The TPS629206 also includes a low-side negative current limit (ILIM:SINK) to protect against excessive negative currents that can occur in forced PMW mode under heavy to light load transient conditions. If the negative current in the low-side switch exceeds the ILIM:SINK threshold, the low-side switch is disabled. Both the low-side and high-side switches remain off until an internal timer re-enables the high-side switch based on the selected PWM switching frequency. CAUTION It is recommended that the inductor be sized such that the inductor ripple current, ΔIL (see Equation 9), does not exceed 1.6 A to avoid the potential for continuous operation of the negative current limit with no output load (IO = 0 A). 8.3.9 Thermal Shutdown The junction temperature of the device, TJ, is monitored by an internal temperature sensor. If TJ rises and exceeds the thermal shutdown threshold, TSD, the device shuts down. Both the high-side and low-side power FETs are turned off and PG goes low. When TJ decreases below the hysteresis, the converter resumes normal operation, beginning with soft start. During a PFM skip pause, the thermal shutdown feature is not active. A shutdown or restart is only triggered during a switching cycle. See Section 8.4.2. 8.4 Device Functional Modes 8.4.1 Forced Pulse Width Modulation (PWM) Operation The TPS629206 has two operating modes: forced PWM mode discussed in this section and auto PFM/PWM mode as discussed in Section 8.4.2. With the MODE/S-CONF pin set to forced PWM mode, the device operates with pulse width modulation in continuous conduction mode (CCM) with a nominal switching frequency of either 1.0 MHz or 2.5 MHz. The frequency variation in PWM is controlled and depends on VIN, VOUT, and the inductance. The on time in forced PWM mode is given by Equation 3. TON VOUT 1 u VIN f sw (3) For very small output voltages, an absolute minimum on time of about 40 ns is kept to limit switching losses. The operating frequency is thereby reduced from its nominal value, which keeps efficiency high. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 15 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 8.4.2 Power Save Mode Operation (Auto PFM/PWM) When the MODE/S-CONF pin is configured for auto PFM/PWM mode, power save mode is allowed. The device operates in PWM mode as long the output current is higher than half the ripple current of the inductor. To maintain high efficiency at light loads, the device enters power save mode at the boundary to discontinuous conduction mode (DCM). This happens if the output current becomes smaller than half the ripple current of the inductor. Power save mode is entered seamlessly to make sure there is high efficiency in light-load operation. The device remains in power save mode as long as the inductor current is discontinuous. In power save mode, the switching frequency decreases linearly with the load current maintaining high efficiency. The transition into and out of power save mode is seamless in both directions. The TPS629206 adjusts the on time (TON) in power save mode, depending on the input voltage and the output voltage to maintain highest efficiency. The on time in steady-state operation can be estimated as: With the MODE/S-CONF pin set to 1.0-MHz operation: 610 (µO) = VOUT 8+0 (4) With the MODE/S-CONF pin set to 2.5-MHz operation: TON = 100 ´ VIN [ns ] VIN - VOUT (5) Using TON, the typical peak inductor current in power save mode is approximated by: IL P S M ( peak ) = (V IN - VO U T ) ´ TO N L (6) The output voltage ripple in power save mode is given by Equation 7: DV = L ´ VIN 2 æ 1 1 ö + ÷ ç 200 ´ C è VIN - VOUT VOUT ø (7) Note When VIN decreases to typically 15% above VOUT, the device will not enter power save mode regardless of the load current. The device maintains output regulation in PWM mode. 8.4.3 AEE (Automatic Efficiency Enhancement) When the MODE/S-CONF pin is configured for auto PFM/PWM with AEE mode, the TPS629206 provides the highest efficiency over the entire input voltage and output voltage range by automatically adjusting the switching frequency of the converter (see Equation 8). To keep the efficiency high over the entire duty cycle range, the switching frequency is adjusted while maintaining the ripple current amplitudes. This feature compensates for the very small duty cycles of high VIN to low VOUT conversions, which can limit the control range in other topologies. Fsw ( MHz ) 10 u VOUT u VIN VOUT VIN 2 (8) Traditionally, the efficiency of a switched mode converter decreases if VOUT decreases, VIN increases, or both. By decreasing the switching losses at lower VOUT values or higher VIN values, the AEE feature provides an efficiency enhancement across various duty cycles, especially for the lower VOUT values, where fixed frequency converters suffer from a significant efficiency drop. Furthermore, when used with the recommended 2.2-μH 16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 inductor, the ripple current amplitudes remains low enough to deliver the full output current without reaching current limit across the entire range of input and output voltages (see Figure 8-4). By using the same TON configuration (see Equation 9) across the entire load range in AEE mode, the inductor ripple current in AEE mode becomes effectively independent of the output voltage and can be approximated by Equation 9: Inductor Ripple Current (mA) (9) 800 750 700 650 600 550 500 450 400 350 300 250 200 150 100 2 4 6 L = 2.2 μH 8 10 12 Input Voltage (V) Fsw = 2.5 MHz 14 16 18 Auto PFM/PWM with AEE Figure 8-4. Typical Inductor Ripple Current Versus Input Voltage in AEE Mode The TPS629206 operates in AEE mode as long as the output current is higher than half the ripple current of the inductor. To maintain high efficiency at light loads, the device enters power save mode at the boundary to discontinuous mode (DCM), which happens when the output current becomes smaller than half the inductor ripple current. 8.4.4 100% Duty-Cycle Operation The duty cycle of the buck converter operated in PWM mode is given in Equation 10. VOUT &= (10) 8+0 The duty cycle increases as the input voltage comes close to the output voltage and the off time of the high-side switch gets smaller. When the minimum off time of typically 80 ns is reached, the TPS629206 scales down its switching frequency while it approaches 100% mode. In 100% mode, the device keeps the high-side switch on continuously as long as the output voltage is below the internal set point. This allows the conversion of small input to output voltage differences. For example, getting the longest operation time of battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off. The minimum input voltage to maintain output voltage regulation, depending on the load current and the output voltage level, can be calculated as: VIN (min) = VOUT + IOUT (RDS ( on ) + RL ) (11) where: • IOUT is the output current. • RDS(on) is the on-state resistance of the high-side FET. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 17 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 • RL is the DC resistance of the inductor used. 8.4.5 Starting into a Prebiased Load The TPS629206 is capable of starting into a prebiased output. The device only starts switching when the internal soft-start ramp is equal or higher than the feedback voltage. If the voltage at the feedback pin is biased to a higher voltage than the nominal value, the TPS629206 does not start switching unless the voltage at the feedback pin drops to the target. Performance is the same for devices configured for VSET operation (internal feedback), however, the switching will be delayed until the soft-start ramp reaches the internal feedback voltage. 18 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The TPS629206 device is a highly efficient, small, and highly-flexible synchronous step-down DC-DC converter that is easy to use. A wide input voltage range of 3 V to 17 V supports a wide variety of inputs like 12-V supply rails, single-cell or multi-cell Li-Ion, and 5-V or 3.3-V rails. 9.2 Typical Application L1 2.2 µH VIN 3V ± 17V VIN SW EN VOS C1 4.7 F FB/ VSET MODE/ S-CONF R3 VOUT 0.6V ± 5.5V C2 22 F R1 PG GND R2 Figure 9-1. Typical Application Setup Table 9-1. List of Components Reference Description Manufacturer IC 17-V, 0.6-A Step-Down Converter TPS629206; Texas Instruments L1 2.2-µH inductor XGL3530-222; Coilcraft C1 4.7 µF, 25 V, Ceramic, 1206 C3216X7R1E475K160AC, TDK C2 22 µF, 6.3 V, Ceramic, 0805 GCM21BD70J226ME36L, MuRata R1 Depending on VOUT; see Section 9.2.2.2. Standard 1% metal film R2 Depending on VOUT; see Section 9.2.2.2. Standard 1% metal film R3 Depending on device setting, see Section 8.3.1. Standard 1% metal film Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 19 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 9.2.1 Design Requirements The design guidelines provide a component selection to operate the device within the recommended operating conditions. 9.2.2 Detailed Design Procedure 9.2.2.1 Custom Design With WEBENCH® Tools Click here to create a custom design using the TPS629206 device with the WEBENCH® Power Designer. 1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements. 2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. Compare the generated design with other possible solutions from Texas Instruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability. In most cases, these actions are available: • Run electrical simulations to see important waveforms and circuit performance • Run thermal simulations to understand board thermal performance • Export customized schematic and layout into popular CAD formats • Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH. 9.2.2.2 Programming the Output Voltage The output voltage of the TPS629206 is adjustable. It can be programmed for output voltages from 0.6 V to 5.5 V, using a resistor divider from VOUT to GND. The voltage at the FB pin is regulated to 600 mV. The value of the output voltage is set by the selection of the resistor divider from Table 9-2. It is recommended to choose resistor values that allow a current of at least 2 μA, meaning the value of R2 should not exceed 300 kΩ. Lower resistor values are recommended for highest accuracy and most robust design. æ VOUT ö - 1÷ R1 = R 2 ´ ç è VFB ø (12) where • VFB is 0.6 V. Table 9-2. Setting the Output Voltage Nominal Output Voltage R1 R2 Exact Output Voltage 0.8 V 51 kΩ 150 kΩ 0.804 V 1.2 V 130 kΩ 130 kΩ 1.200 V 1.5 V 150 kΩ 100 kΩ 1.500 V 1.8 V 475 kΩ 237 kΩ 1.803 V 2.5 V 523 kΩ 165 kΩ 2.502 V 3.3 V 619 kΩ 137 kΩ 3.311 V 5V 619 kΩ 84.5 kΩ 4.995 V 9.2.2.3 External Component Selection The external components have to fulfill the needs of the application, but also the stability criteria of the control loop of the device. The TPS629206 is optimized to work within a range of external components. 9.2.2.3.1 Output Filter and Loop Stability The TPS629206 is internally compensated to be stable with a range of LC filter combinations. The LC output filters inductance and capacitance have to be considered together, creating a double pole, responsible for the corner frequency of the converter using Equation 13. 20 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com f LC = SLVSGE1 – MARCH 2022 1 2p L × C (13) Table 9-3 can be used to simplify the output filter component selection. The values in Table 9-3 are nominal values, and the effective capacitance was considered to be +20% and –50%. Different values can work, but care has to be taken on the loop stability which is affected. More information on the sizing of the LC filter of a DCS-Control regulator can be found in the Optimizing the TPS62130/40/50/60 Output Filter Application Note. Table 9-3. Recommended LC Output Filter Combinations 4.7 µF 1 µH 10 µF 1.5 µH 2.2 µH (1) (2) (3) (4) 22 µF 47 µF 100 µF 200 µF √ √ √ √ (2) √ √ √ √ (2) √ √(1) √ √ (2) (3) (4) 3.3 µH √ √ √ √ 4.7 µH √ √ √ √(2) This LC combination is the standard value and recommended for most applications. Output capacitance needs to have an ESR of ≥ 10 mΩ for stable operation. See Section 9.3.1. Not recommended for 1-MHz operation At full load, ILpeak can exceed ILIM_HS at higher input or output voltages. Although the TPS629206 is stable without the pole and zero being in a particular location, an external feedforward capacitor can also be added to adjust their location based on the specific needs of the application. This can provide better performance in power save mode, improved transient response, or both. A more detailed discussion on the optimization for stability versus transient response can be found in the Optimizing Transient Response of Internally Compensated DC-DC Converters Application Note and Feedforward Capacitor to Improve Stability and Bandwidth of TPS621/821-Family Application Note. 9.2.2.3.2 Inductor Selection The TPS629206 is designed for a nominal 2.2-µH inductor. Larger values can be used to achieve a lower inductor current ripple but they can have a negative impact on efficiency and transient response. Smaller values than 2.2 µH cause larger inductor current ripple, which cause larger negative inductor currents in forced PWM mode and higher peak currents at full load. Therefore, they are not recommended at larger voltages across the inductor as it is the case for high input voltages and low output voltages. With low output current in forced PWM mode, this causes a larger negative inductor current peak that can exceed the negative current limit. At low or no output current and small inductor values, the output voltage can therefore not be regulated any more. More detailed information on further LC combinations can be found in the Optimizing the TPS62130/40/50/60 Output Filter Application Note. The inductor selection is affected by several effects like the following: • • • • Inductor ripple current Output ripple voltage PWM-to-PFM transition point Efficiency In addition, the inductor selected has to be rated for appropriate saturation current and DC resistance (DCR). Equation 14 calculates the maximum inductor current. I L(max) = I OUT (max) + DIL (max) = DI L(max) 2 (14) VIN (max) ´100ns L (min) (15) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 21 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 where: • • • IL(max) is the maximum inductor current. ΔIL is the peak-to-peak inductor ripple current. L(min) is the minimum effective inductor value. Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation current of the inductor needed. It is recommended to add a margin of about 20%. A larger inductor value is also useful to get lower ripple current, but increases the transient response time and size as well. The following inductors have been used with the TPS629206 and are recommended for use: Table 9-4. List of Inductors Type Inductance [µH] DCR [mΩ] Current [A](1) Dimensions [L×W×H] mm Manufacturer DFE201210U-1R5M(2) 1.5 µH, ±20% 115 2.5 2.0 × 1.2 × 1.0 muRata DFE252012PD-2R2M 2.2 µH, ±20% 84 2.8 2.5 × 2.0 × 1.2 muRata XGL3530-222ME 2.2 μH, ±20% 20 4.0 3.5 × 3.2 × 3 Coilcraft XGL4020-222ME 2.2 µH, ±20% 19.5 6.2 4 × 4 × 2.1 Coilcraft XGL3530-332ME 3.3 μH, ±20% 33 3.3 3.5 × 3.2 × 3 Coilcraft XGL4020-472ME 4.7 µH, ±20% 43 4.1 4 × 4 × 2.1 Coilcraft (1) (2) ISAT at 30% drop For smaller size solutions that do not require maximum efficiency at the full output current The inductor value also determines the load current at which power save mode is entered: I load ( PSM ) = 1 DI L 2 (16) 9.2.2.3.3 Capacitor Selection 9.2.2.3.3.1 Output Capacitor The recommended value for the output capacitor is 22 µF. The architecture of the TPS629206 allows the use of tiny ceramic output capacitors with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its low resistance up to high frequencies and to get narrow capacitance variation with temperature, it is recommended to use X7R or X5R dielectric. Using a higher value has advantages like smaller voltage ripple and a tighter DC output accuracy in power save mode (see Optimizing the TPS62130/40/50/60 Output Filter Application Note for more information). In power save mode, the output voltage ripple depends on the following: • • • • Output capacitance ESR ESL Peak inductor current Using ceramic capacitors provides small ESR, ESL, and low ripple. The output capacitor needs to be as close as possible to the device, and it is recommended to have the VOS signal and feedback resistors (if used) should be connected to the positive terminal of the output capacitor. For large output voltages, the DC bias effect of ceramic capacitors is large and the effective capacitance has to be observed. 9.2.2.3.3.2 Input Capacitor For most applications, 4.7-µF nominal is sufficient and is recommended, though a larger value reduces input current ripple further. The input capacitor buffers the input voltage for transient events and also decouples the converter from the supply. A low-ESR multilayer ceramic capacitor (MLCC) is recommended for best filtering and should be placed between VIN and GND as close as possible to those pins. 22 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 Table 9-5. List of Capacitors Type Nominal Capacitance [µF] Voltage Rating [V] Size Manufacturer C3216X7R1E475K160AC 4.7 25 1206(1) TDK 25 1206(1) TDK C3216X7R1E106K160AC (1) 10 Smaller (0805 or 0603) options may be used and are available from various manufacturers. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 23 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 9.2.3 Application Curves 100 100 90 90 80 70 Efficiency (%) Efficiency (%) 80 70 60 50 VIN = 7V VIN = 9V VIN = 12V VIN = 15V 30 20 1E-5 0.0001 0.001 0.01 Iout (A) VOUT = 5.0 V 40 L = 2.2 μH 0.05 10 0 0.01 0.2 0.5 0.6 Fsw = 2.5 MHz Auto PFM/PWM 3 2.9 Switching Frequency (MHz) 3 2.75 2.5 2.25 2 1.75 1.5 1.25 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 0.5 5 6 7 8 L = 2.2 μH 0.2 9 2.8 2.7 2.6 2.5 2.4 2.3 2.2 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 2 10 11 12 13 14 15 16 17 18 Input Voltage (V) L = 2.2 μH 0.3 0.40.50.6 Fsw = 2.5 MHz Forced PWM 2.1 VOUT = 5.0 V 6 Fsw = 2.5 MHz Auto PFM/PWM Figure 9-4. Switching Frequency vs Input Voltage 7 8 9 VOUT = 5.0 V 10 11 12 13 14 Input Voltage (V) L = 2.2 μH 15 16 17 18 Fsw = 2.5 MHz Forced PWM Figure 9-5. Switching Frequency vs Input Voltage 0.5 0.25 VIN = 7V VIN = 9V VIN = 12V VIN = 15V 0.45 0.4 0.225 Vout Accuracy (%) 0.35 0.3 0.25 0.2 0.15 0.1 0.2 0.175 0.15 0.05 VIN = 7V VIN = 9V VIN = 12V VIN = 15V 0.125 0 -0.05 0.1 -0.1 0 0.1 VOUT = 5.0 V 0.2 0.3 Iout (A) L = 2.2 μH 0.4 0.5 0.6 Fsw = 2.5 MHz Auto PFM/PWM Figure 9-6. Output Voltage vs Output Current 24 0.05 0.07 0.1 Iout (A) Figure 9-3. Efficiency vs Output Current 3.5 1 0.02 0.03 VOUT = 5.0 V 3.25 0.75 VIN = 7V VIN = 9V VIN =12V VIN = 15V 20 Figure 9-2. Efficiency vs Output Current Switching Frequency (MHz) 50 30 40 Vout Accuracy (%) 60 0 0.06 0.12 0.18 0.24 VOUT = 5.0 V 0.3 0.36 0.42 0.48 0.54 Iout (A) L = 2.2 μH 0.6 Fsw = 2.5 MHz Forced PWM Figure 9-7. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 100 100 90 90 80 70 Efficiency (%) Efficiency (%) 80 70 60 50 VIN = 7V VIN = 9V VIN = 12V VIN = 15V 30 20 1E-5 0.0001 0.001 0.01 Iout (A) VOUT = 5.0 V 40 L = 3.3 μH 0.05 VIN = 7V VIN = 9V VIN = 12V VIN = 15V 20 10 0 0.01 0.2 0.5 0.6 Fsw = 1.0 MHz Auto PFM/PWM 0.02 0.03 0.05 0.07 0.1 Iout (A) VOUT = 5.0 V Figure 9-8. Efficiency vs Output Current 0.2 L = 3.3 μH 0.3 0.40.50.6 Fsw = 1.0 MHz Forced PWM Figure 9-9. Efficiency vs Output Current 1.8 1.1 1.4 1.2 1 0.8 0.6 0.4 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 1.09 Switching Frequency (MHz) IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 1.6 Switching Frequency (MHz) 50 30 40 1.08 1.07 1.06 1.05 1.04 1.03 1.02 1.01 0.2 1 0 6 7 8 VOUT = 5.0 V 9 10 11 12 13 14 Input Voltage (V) L = 3.3 μH 15 16 17 6 18 8 10 12 14 Input Voltage (V) VOUT = 5.0 V Fsw = 1.0 MHz Auto PFM/PWM Figure 9-10. Switching Frequency vs Input Voltage L = 3.3 μH 16 18 Fsw = 1.0 MHz Forced PWM Figure 9-11. Switching Frequency vs Input Voltage 1 0.1 VIN = 7V VIN = 9V VIN = 12V VIN = 15V 0.9 0.8 0.075 Vout Accuracy (%) 0.7 Vout Accuracy (%) 60 0.6 0.5 0.4 0.3 0.2 0.05 0.025 0 VIN = 7V VIN = 9V VIN = 12V VIN = 15V 0.1 -0.025 0 -0.1 -0.05 -0.2 0 0.06 0.12 0.18 0.24 VOUT = 5.0 V 0.3 0.36 0.42 0.48 0.54 Iout (A) L = 3.3 μH 0.6 Fsw = 1.0 MHz Auto PFM/PWM Figure 9-12. Output Voltage vs Output Current 0 0.1 VOUT = 5.0 V 0.2 0.3 Iout (A) L = 3.3 μH 0.4 0.5 0.6 Fsw = 1.0 MHz Forced PWM Figure 9-13. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 25 TPS629206 www.ti.com 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) SLVSGE1 – MARCH 2022 60 50 40 30 10 0 1E-5 0.0001 0.001 0.01 Iout (A) VOUT = 3.3 V 40 L = 2.2 μH 0.05 VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 10 0 0.01 0.2 0.5 0.6 Fsw = 2.5 MHz Auto PFM/PWM 0.02 0.03 0.2 L = 2.2 μH 0.3 0.40.50.6 Fsw = 2.5 MHz Forced PWM Figure 9-15. Efficiency vs Output Current 3 3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 Switching Frequency (MHz) 2.9 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 3 4 5 6 VOUT = 3.3 V 7 2.8 2.7 2.6 2.5 2.4 2.3 2.2 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 2.1 8 2 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) L = 2.2 μH 3 Fsw = 2.5 MHz Auto PFM/PWM Figure 9-16. Switching Frequency vs Input Voltage 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) VOUT = 3.3 V L = 2.2 μH Fsw = 2.5 MHz Forced PWM Figure 9-17. Switching Frequency vs Input Voltage 0.6 0.1 VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.52 0.44 0.075 Vout Accuracy (%) 0.36 0.28 0.2 0.12 0.04 0.05 0.025 -0.04 VIN = 6V VIN = 9V VIN = 12V VIN = 15V -0.12 0 -0.2 0 0.06 0.12 0.18 0.24 VOUT = 3.3 V 0.3 0.36 0.42 0.48 0.54 Iout (A) L = 2.2 μH 0.6 Fsw = 2.5 MHz Auto PFM/PWM Figure 9-18. Output Voltage vs Output Current 26 0.05 0.07 0.1 Iout (A) VOUT = 3.3 V Figure 9-14. Efficiency vs Output Current Switching Frequency (MHz) 50 30 VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 Vout Accuracy (%) 60 0 0.1 VOUT = 3.3 V 0.2 0.3 Iout (A) L = 2.2 μH 0.4 0.5 0.6 Fsw = 2.5 MHz Forced PWM Figure 9-19. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 100 100 90 90 80 70 Efficiency (%) Efficiency (%) 80 70 60 50 VIN = 6V VIN = 9V VIN = 12V VIN = 15V 30 20 1E-5 0.0001 0.001 0.01 Iout (A) VOUT = 3.3 V 40 L = 3.3 μH 0.05 VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 10 0 0.01 0.2 0.5 0.6 Fsw = 1.0 MHz Auto PFM/PWM 0.02 0.03 0.05 0.07 0.1 Iout (A) VOUT = 3.3 V Figure 9-20. Efficiency vs Output Current 0.2 L = 3.3 μH 0.3 0.40.50.6 Fsw = 1.0 MHz Forced PWM Figure 9-21. Efficiency vs Output Current 1.8 1.15 1.4 1.2 1 0.8 0.6 0.4 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 1.125 Switching Frequency (MHz) IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 1.6 Switching Frequency (MHz) 50 30 40 1.1 1.075 1.05 1.025 1 0.975 0.2 0.95 0 4 5 6 7 VOUT = 3.3 V 8 4 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) L = 3.3 μH Fsw = 1.0 MHz Auto PFM/PWM Figure 9-22. Switching Frequency vs Input Voltage 5 6 7 8 VOUT = 3.3 V 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) L = 3.3 μH Fsw = 1.0 MHz Forced PWM Figure 9-23. Switching Frequency vs Input Voltage 0.7 0.1 VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.6 0.4 0.3 0.2 0.1 VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.08 Vout Accuracy (%) 0.5 Vout Accuracy (%) 60 0.06 0.04 0.02 0 0 -0.1 0 0.06 0.12 0.18 0.24 VOUT = 3.3 V 0.3 0.36 0.42 0.48 0.54 Iout (A) L = 3.3 μH 0.6 Fsw = 1.0 MHz Auto PFM/PWM Figure 9-24. Output Voltage vs Output Current 0 0.1 VOUT = 3.3 V 0.2 0.3 Iout (A) L = 3.3 μH 0.4 0.5 0.6 Fsw = 1.0 MHz Forced PWM Figure 9-25. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 27 TPS629206 www.ti.com 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) SLVSGE1 – MARCH 2022 60 50 40 30 10 0 1E-5 0.0001 0.001 0.01 Iout (A) VOUT = 1.8 V L = 2.2 μH 0.05 0 0.01 0.2 0.5 0.6 Fsw = 2.5 MHz Auto PFM/PWM 0.02 0.03 0.05 0.07 0.1 Iout (A) VOUT = 1.8 V 0.2 L = 2.2 μH 0.3 0.40.50.6 Fsw = 2.5 MHz Forced PWM Figure 9-27. Efficiency vs Output Current 3.1 3 Switching Frequency (MHz) 3.5 Switching Frequency (MHz) VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 10 4 3 2.5 2 1.5 1 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 0.5 0 2 4 6 2.9 2.8 2.7 2.6 2.5 2.4 2.3 2.2 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 2.1 2 8 10 12 Input Voltage (V) VOUT = 1.8 V L = 2.2 μH 14 16 18 3 Fsw = 2.5 MHz Auto PFM/PWM Figure 9-28. Switching Frequency vs Input Voltage 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Input Voltage (V) VOUT = 1.8 V L = 2.2 μH Fsw = 2.5 MHz Forced PWM Figure 9-29. Switching Frequency vs Input Voltage 0.8 0.175 0.4 0.2 0.15 Vout Accuracy (%) VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.6 Vout Accuracy (%) 40 20 Figure 9-26. Efficiency vs Output Current 0.125 0.1 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.075 0 0.05 -0.2 0 0.1 VOUT = 1.8 V 0.2 0.3 Iout (A) L = 2.2 μH 0.4 0.5 0.6 Fsw = 2.5 MHz Auto PFM/PWM Figure 9-30. Output Voltage vs Output Current 28 50 30 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 60 0 0.1 VOUT = 1.8 V 0.2 0.3 Iout (A) L = 2.2 μH 0.4 0.5 0.6 Fsw = 2.5 MHz Forced PWM Figure 9-31. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 SLVSGE1 – MARCH 2022 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) www.ti.com 60 50 40 30 10 0 1E-5 0.0001 0.001 0.01 Iout (A) VOUT = 1.8 V L = 3.3 μH 0.05 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 10 0 0.01 0.2 0.5 0.6 Fsw = 1.0 MHz Auto PFM/PWM 0.02 0.03 0.05 0.07 0.1 Iout (A) VOUT = 1.8 V 0.2 L = 3.3 μH 0.3 0.40.50.6 Fsw = 1.0 MHz Forced PWM Figure 9-33. Efficiency vs Output Current 1.4 1.14 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 1 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 0.8 0.6 0.4 Switching Frequency (MHz) 1.12 1.2 Switching Frequency (MHz) 40 20 Figure 9-32. Efficiency vs Output Current 0.2 1.1 1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 0 4 5 6 7 8 2 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) VOUT = 1.8 V L = 3.3 μH 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) VOUT = 1.8 V Fsw = 1.0 MHz Auto PFM/PWM Figure 9-34. Switching Frequency vs Input Voltage L = 3.3 μH Fsw = 1.0 MHz Forced PWM Figure 9-35. Switching Frequency vs Input Voltage 0.5 0.05 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 0.03 Vout Accuracy (%) VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.45 Vout Accuracy (%) 50 30 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 60 0.01 -0.01 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V -0.03 0 -0.05 -0.1 -0.05 0 0.1 VOUT = 1.8 V 0.2 0.3 Iout (A) L = 3.3 μH 0.4 0.5 0.6 Fsw = 1.0 MHz Auto PFM/PWM Figure 9-36. Output Voltage vs Output Current 0 0.1 VOUT = 1.8 V 0.2 0.3 Iout (A) L = 3.3 μH 0.4 0.5 0.6 Fsw = 1.0 MHz Forced PWM Figure 9-37. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 29 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 100 90 80 Efficiency (%) 70 60 50 40 30 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 10 0 0.01 VOUT = 1.2 V L = 2.2 μH Fsw = 2.5 MHz Auto PFM/PWM 0.02 0.03 0.05 0.07 0.1 Iout (A) VOUT = 1.2 V Figure 9-38. Efficiency vs Output Current 0.2 L = 2.2 μH 0.3 0.40.50.6 Fsw = 2.5 MHz Forced PWM Figure 9-39. Efficiency vs Output Current 4 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A Switching Frequency (MHz) 3.5 3 2.5 2 1.5 1 0.5 0 2 4 6 8 10 12 Input Voltage (V) VOUT = 1.2 V L = 2.2 μH 14 16 18 Fsw = 2.5 MHz Auto PFM/PWM Figure 9-40. Switching Frequency vs Input Voltage VOUT = 1.2 V 0.175 0.8 0.6 0.4 0.15 Vout Accuracy (%) VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 1 Vout Accuracy (%) Fsw = 2.5 MHz Forced PWM Figure 9-41. Switching Frequency vs Input Voltage 1.2 0.125 0.1 0.075 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.05 0.025 0.2 0 0 0 0.1 VOUT = 1.2 V 0.2 0.3 Iout (A) L = 2.2 μH 0.4 0.5 0.6 Fsw = 2.5 MHz Auto PFM/PWM Figure 9-42. Output Voltage vs Output Current 30 L = 2.2 μH 0 0.1 VOUT = 1.2 V 0.2 0.3 Iout (A) L = 2.2 μH 0.4 0.5 0.6 Fsw = 2.5 MHz Forced PWM Figure 9-43. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 SLVSGE1 – MARCH 2022 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) www.ti.com 60 50 40 30 10 0 1E-5 0.0001 0.001 0.01 Iout (A) VOUT = 1.2 V L = 3.3 μH 0.05 50 40 30 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 60 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 10 0 0.01 0.2 0.5 0.6 Fsw = 1.0 MHz Auto PFM/PWM 0.02 0.03 0.05 0.07 0.1 Iout (A) VOUT = 1.2 V Figure 9-44. Efficiency vs Output Current 0.2 L = 3.3 μH Fsw = 1.0 MHz Forced PWM Figure 9-45. Efficiency vs Output Current 1.4 1.2 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 1.2 Switching Frequency (MHz) Switching Frequency (MHz) 1.175 1 0.8 0.6 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 0.4 0.2 2 3 4 5 6 7 L = 3.3 μH Fsw = 1.0 MHz Auto PFM/PWM Figure 9-46. Switching Frequency vs Input Voltage 1.15 1.125 1.1 1.075 1.05 1.025 1 0.975 2 8 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) VOUT = 1.2 V 4 6 8 10 12 Input Voltage (V) VOUT = 1.2 V L = 3.3 μH 14 16 18 Fsw = 1.0 MHz Forced PWM Figure 9-47. Switching Frequency vs Input Voltage 0.4 0.1 0.3 0.25 0.2 0.15 0.1 0.05 0.08 0.06 Vout Accuracy (%) VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.35 Vout Accuracy (%) 0.3 0.40.50.6 0.04 0.02 0 -0.02 -0.04 0 -0.06 -0.05 -0.08 -0.1 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V -0.1 0 0.1 VOUT = 1.2 V 0.2 0.3 Iout (A) L = 3.3 μH 0.4 0.5 0.6 Fsw = 1.0 MHz Auto PFM/PWM Figure 9-48. Output Voltage vs Output Current 0 0.1 VOUT = 1.2 V 0.2 0.3 Iout (A) L = 3.3 μH 0.4 0.5 0.6 Fsw = 1.0 MHz Forced PWM Figure 9-49. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 31 TPS629206 www.ti.com 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) SLVSGE1 – MARCH 2022 60 50 40 30 10 0 1E-5 0.0001 VOUT = 0.6 V 0.001 0.01 Iout (A) L = 2.2 μH 0.05 50 40 30 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 60 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 10 0 0.01 0.2 0.5 0.6 Fsw = 2.5 MHz Auto PFM/PWM 0.02 0.03 VOUT = 0.6 V Figure 9-50. Efficiency vs Output Current 0.05 0.07 0.1 Iout (A) L = 2.2 μH 0.2 0.3 0.40.50.6 Fsw = 2.5 MHz Forced PWM Figure 9-51. Efficiency vs Output Current 2.7 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A Switching Frequency (MHz) 2.4 2.1 1.8 1.5 1.2 0.9 0.6 0.3 0 2 4 VOUT = 0.6 V 6 8 10 12 Input Voltage (V) L = 2.2 μH 14 16 18 Fsw = 2.5 MHz Forced PWM 0.15 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.125 0.1 0.075 0.05 0.025 0 -0.025 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V -0.05 -0.075 -0.1 0 0.06 0.12 0.18 0.24 VOUT = 0.6 V 0.3 0.36 0.42 0.48 0.54 Iout (A) L = 2.2 μH 0.6 Fsw = 2.5 MHz Auto PFM/PWM Figure 9-54. Output Voltage vs Output Current 32 L = 2.2 μH Figure 9-53. Switching Frequency vs Input Voltage Vout Accuracy (%) Vout Accuracy (%) Figure 9-52. Switching Frequency vs Input Voltage 3 2.75 2.5 2.25 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 -0.25 -0.5 VOUT = 0.6 V Fsw = 2.5 MHz Auto PFM/PWM 0 0.06 0.12 0.18 0.24 VOUT = 0.6 V 0.3 0.36 0.42 0.48 0.54 Iout (A) L = 2.2 μH 0.6 Fsw = 2.5 MHz Forced PWM Figure 9-55. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 SLVSGE1 – MARCH 2022 100 90 90 80 80 70 70 Efficiency (%) 100 60 50 40 30 20 10 0 1E-5 0.0001 0.001 0.01 Iout (A) VOUT = 0.6 V L = 3.3 μH 0.05 Switching Frequency (MHz) 50 40 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 20 10 0 0.01 0.2 0.5 0.6 Fsw = 1.0 MHz Auto PFM/PWM 0.02 0.03 0.05 0.07 0.1 Iout (A) VOUT = 0.6 V 0.2 L = 3.3 μH 0.3 0.40.50.6 Fsw = 1.0 MHz Forced PWM Figure 9-56. Efficiency vs Output Current Figure 9-57. Efficiency vs Output Current 1.3 1.3 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 1.25 1.2 1.15 1.1 1.05 1 IOUT = 0.1A IOUT = 0.3A IOUT = 0.6A 1.25 0.95 1.2 1.15 1.1 1.05 1 0.95 0.9 0.9 2 4 6 8 10 12 Input Voltage (V) VOUT = 0.6 V L = 3.3 μH 14 16 18 2 Fsw = 1.0 MHz Auto PFM/PWM Figure 9-58. Switching Frequency vs Input Voltage 3 4 5 6 7 VOUT = 0.6 V 8 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) L = 3.3 μH Fsw = 1.0 MHz Forced PWM Figure 9-59. Switching Frequency vs Input Voltage 0.5 0.4 0.3 0.25 0.2 0.15 0.1 0.05 0 -0.05 -0.1 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.4 Vout Accuracy (%) VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V 0.35 Vout Accuracy (%) 60 30 VIN = 3V VIN = 6V VIN = 9V VIN = 12V VIN = 15V Switching Frequency (MHz) Efficiency (%) www.ti.com 0.3 0.2 0.1 0 -0.1 -0.15 -0.2 0 0.1 VOUT = 0.6 V 0.2 0.3 Iout (A) L = 3.3 μH 0.4 0.5 0.6 Fsw = 1.0 MHz Auto PFM/PWM Figure 9-60. Output Voltage vs Output Current -0.2 0 0.1 VOUT = 0.6 V 0.2 0.3 Iout (A) L = 3.3 μH 0.4 0.5 0.6 Fsw = 1.0 MHz Forced PWM Figure 9-61. Output Voltage vs Output Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 33 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0 A Fsw = 2.5 MHz Auto PFM/PWM VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0.6 A Fsw = 2.5 MHz Forced PWM Figure 9-63. Start-Up Timing Figure 9-62. Start-Up Timing VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0 A Fsw = 2.5 MHz Forced PWM Figure 9-64. Start-Up into Prebiased Output VIN = 12 V VOUT = 3.3 V L = 3.3 μH IO = 10 mA Fsw = 1.0 MHz Auto PFM/PWM Figure 9-66. Shutdown Timing with Output Discharge Enabled 34 VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0 A Fsw = 2.5 MHz Auto PFM/PWM Figure 9-65. Shutdown Timing with Output Discharge Enabled VIN = 12 V VOUT = 3.3 V L = 3.3 μH IO = 10 mA Fsw = 1.0 MHz Auto PFM/PWM Figure 9-67. Shutdown Timing with Output Discharge Disabled Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 VIN = 12 V VOUT = 3.3 V L = 3.3 μH IO = 10 mA Fsw = 1.0 MHz Forced PWM Figure 9-68. Shutdown Timing with Output Discharge Enabled VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0 A to 0.3 A Fsw = 2.5 MHz Auto PFM/PWM VIN = 12 V VOUT = 3.3 V L = 3.3 μH IO = 10 mA Fsw = 1.0 MHz Forced PWM Figure 9-69. Shutdown Timing with Output Discharge Disabled VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0.3 A to 0.6 A Fsw = 2.5 MHz Forced PWM Figure 9-70. Load Transient Response Figure 9-71. Load Transient Response VIN = 12 V VOUT = 3.3 V VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0 A Fsw = 2.5 MHz Auto PFM/PWM Figure 9-72. Output Voltage Ripple L = 2.2 μH IO = 0 A Fsw = 2.5 MHz Forced PWM Figure 9-73. Output Voltage Ripple Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 35 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0.6 A Fsw = 2.5 MHz Auto PFM/PWM Figure 9-74. Output Voltage Ripple VIN = 12 V VOUT = 3.3 V L = 3.3 μH IO = 0.6 A Fsw = 1.0 MHz Auto PFM/PWM Figure 9-76. Output Voltage Ripple VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0.6 A Fsw = 2.5 MHz Auto PFM/PWM Figure 9-78. Input Voltage Ripple 36 VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0.6 A Fsw = 2.5 MHz Forced PWM Figure 9-75. Output Voltage Ripple VIN = 12 V VOUT = 3.3 V L = 3.3 μH IO = 0.6 A Fsw = 1.0 MHz Forced PWM Figure 9-77. Output Voltage Ripple VIN = 12 V VOUT = 3.3 V L = 2.2 μH IO = 0.6 A Fsw = 2.5 MHz Forced PWM Figure 9-79. Input Voltage Ripple Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 VIN = 12 V VOUT = 0.6 V 100000 Frequency (Hz) L = 2.2 μH IO = 0.6 A 240 210 180 150 120 90 60 30 0 -30 -60 -90 -120 -150 -180 1000000 Fsw = 2.5 MHz Forced PWM 40 35 30 25 20 15 10 5 0 -5 -10 -15 -20 Gain -25 Phase -30 1000 2000 5000 10000 VIN = 12 V VOUT = 0.6 V Figure 9-80. Bode Plot 100000 Frequency (Hz) L = 3.3 μH IO = 0.6 A 240 210 180 150 120 90 60 30 0 -30 -60 -90 -120 -150 -180 1000000 Phase (Deg) 40 35 30 25 20 15 10 5 0 -5 -10 -15 -20 Gain -25 Phase -30 1000 2000 5000 10000 Gain (db) SLVSGE1 – MARCH 2022 Phase (Deg) Gain (db) www.ti.com Fsw = 1.0 MHz Forced PWM Figure 9-81. Bode Plot Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 37 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 9.3 System Examples 9.3.1 Powering Multiple Loads In applications where the TPS629206 is used to power multiple load circuits, it is possible that the total capacitance on the output is very large. In order to properly regulate the output voltage, there needs to be an appropriate AC signal level on the VOS pin. Tantalum capacitors have a large enough ESR to keep output voltage ripple sufficiently high on the VOS pin. With low-ESR ceramic capacitors, the output voltage ripple can get very low, so it is not recommended to use a large capacitance directly on the output of the device. If there are several load circuits with their associated input capacitor on a PCB, these loads are typically distributed across the board. This adds enough trace resistance (Rtrace) to keep a large enough AC signal on the VOS pin for proper regulation. The minimum total trace resistance on the distributed load is 10 mΩ. The total capacitance n × CIN in Figure 9-82 was 32 × 47 μF of ceramic X7R capacitors. Load1 Rtrace VIN 3V – 17V VIN SW C2 22 F VOS EN C1 4.7
F CIN VOUT 0.4V – 5.5V L1 TPS6292xx Load2 Rtrace CIN FB/ VSET MODE/ S-CONF R1 PG R2 GND Loadn Rtrace CIN Figure 9-82. Multiple Loads Example 9.3.2 Inverting Buck-Boost (IBB) The need to generate negative voltage rails for electronic designs is a common challenge. The wide 3-V to 17-V input voltage range of the TPS629206 makes it ideal for an inverting buck-boost (IBB) circuit, where the output voltage is inverted or negative with respect to ground. The circuit operation in the IBB topology differs from that in the traditional buck topology. Though the components are connected the same as with a traditional buck converter, the output voltage terminals are reversed. See Figure 9-83 and Figure 9-84. The maximum input voltage that can be applied to an IBB converter is less than the maximum voltage that can be applied to the TPS629206 in a typical buck configuration. This is because the ground pin of the IC is connected to the (negative) output voltage. Therefore, the input voltage across the device is VIN to VOUT, and not VIN to ground. Thus, the input voltage range of the TPS629206 in an IBB configuration becomes 3 V to 17 V + VOUT, where VOUT is a negative value. The output voltage range is the same as when configured as a buck converter, but only negative. Thus, the output voltage for a TPS629206 in an IBB configuration may be set between –0.4 V and –5.5 V. The maximum output current for the TPS629206 in an IBB topology is normally lower than a traditional buck configuration due to the average inductor current being higher in an IBB configuration. Traditionally, lower input or (more negative) output voltages results in a lower maximum output current. However, using a larger inductor value or the higher 2.5-MHz frequency setting can be used to recover some or all of this lost maximum current capability. 38 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 When implementing an IBB design, it is important to understand that the IC ground is tied to the negative voltage rail, and in turn, the electrical characteristics of the TPS629206 device are referenced to this rail. During power up, as there is no charge in the output capacitor, the IC GND pin (and VOUT) are effectively 0 V, thus parameters such as the VIN UVLO and EN thresholds are the same as in a typical buck configuration. However, after the output voltage is in regulation, due to the negative voltage on the IC GND pin, the device traditionally continues to operate below what could appear to be the normal UVLO/EN falling thresholds relative to the system ground. Thus, special care needs to be taken if the user is utilizing the dynamic mode change feature on the MODE pin of the TPS629206 or driving the EN pin from an upstream microcontroller as the high and low thresholds are relative to the negative rail and not the system ground. More information on using a DCS regulator in an IBB configuration can be found in the Description Compensating the Current Mode Boost Control Loop Application Note and Using the TPS6215x in an Inverting Buck-Boost Topology Application Note. TPS6292xx 2.2 µH VIN 10
F VIN SW EN VOS 22 F FB/ VSET MODE/ S-CONF PG VOUT -0.6V to -5.5V GND Figure 9-83. IBB Example with Adjustable Feedback TPS6292xx 2.2 µH VIN 10
F VIN SW EN VOS 22 F FB/ VSET MODE/ S-CONF PG GND VOUT -0.4V to -5.5V Figure 9-84. IBB Example with Internal Feedback 10 Power Supply Recommendations The power supply to the TPS629206 needs to have a current rating according to the supply voltage, output voltage, and output current of the TPS629206. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 39 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 11 Layout 11.1 Layout Guidelines A proper layout is critical for the operation of a switched mode power supply, even more so at high switching frequencies. Therefore, the PCB layout of the TPS629206 demands careful attention to make sure proper operation and to get the performance specified. A poor layout can lead to issues like the following: • • • • Poor regulation (both line and load) Stability and accuracy weaknesses Increased EMI radiation Noise sensitivity See Figure 11-1 for the recommended layout of the TPS629206, which is designed for common external ground connections. The input capacitor should be placed as close as possible between the VIN and GND pin of the TPS629206. Provide low inductive and resistive paths for loops with high di/dt. Therefore, paths conducting the switched load current should be as short and wide as possible. Provide low capacitive paths (with respect to all other nodes) for wires with high dv/dt. Therefore, the input and output capacitance should be placed as close as possible to the IC pins and parallel wiring over long distances as well as narrow traces should be avoided. Loops that conduct an alternating current should outline an area as small as possible, as this area is proportional to the energy radiated. Sensitive nodes like FB and VOS need to be connected with short wires and not nearby high dv/dt signals (for example, SW). As they carry information about the output voltage, they should be connected as close as possible to the actual output voltage (at the output capacitor). The FB resistors, R1 and R2, should be kept close to the IC and connect directly to those pins and the system ground plane. The same applies for the S-CONFIG/MODE and VSET programming resistors. The package uses the pins for power dissipation. Thermal vias on the VIN, GND, and SW pins help to spread the heat through the PCB. In case any of the digital inputs (EN or S-CONF/MODE pins) need to be tied to the input supply voltage at VIN, the connection must be made directly at the input capacitor as indicated in the schematics. The recommended layout is implemented on the EVM and shown in the TPS629206EVM User's Guide. 11.2 Layout Example GND VOUT GND SW VIN VOS EN PG S-CONFIG FB VIN Figure 11-1. TPS629206 Layout 40 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 11.2.1 Thermal Considerations Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component. The following are basic approaches for enhancing thermal performance: • • Improving the power dissipation capability of the PCB design (for example, increasing copper thickness, thermal vias, number of layers) Introducing airflow in the system For more details on how to use the thermal parameters, see the Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs Application Note and Semiconductor and IC Package Thermal Metrics Application Note. The TPS629206 is designed for a maximum operating junction temperature (TJ) of 150°C. Therefore, the maximum output power is limited by the power losses that can be dissipated over the actual thermal resistance, given by the package and the surrounding PCB structures. If the thermal resistance of the package is given, the size of the surrounding copper area and a proper thermal connection of the IC can reduce the thermal resistance. To get an improved thermal behavior, it is recommended to use top layer metal to connect the device with wide and thick metal lines. Internal ground layers can connect to vias directly under the IC for improved thermal performance. If short circuit or overload conditions are present, the device is protected by limiting internal power dissipation. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 41 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 12.1.2 Development Support 12.1.2.1 Custom Design With WEBENCH® Tools Click here to create a custom design using the TPS629206 device with the WEBENCH® Power Designer. 1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements. 2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. Compare the generated design with other possible solutions from Texas Instruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability. In most cases, these actions are available: • Run electrical simulations to see important waveforms and circuit performance • Run thermal simulations to understand board thermal performance • Export customized schematic and layout into popular CAD formats • Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH. 12.2 Documentation Support 12.2.1 Related Documentation For related documentation see the following: • • • • • • • • Texas Instruments, Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs Application Note Texas Instruments, Semiconductor and IC Package Thermal Metrics Application Note Texas Instruments, TPS629206EVM User's Guide Texas Instruments, Description Compensating the Current Mode Boost Control Loop Application Note Texas Instruments, Using the TPS6215x in an Inverting Buck-Boost Topology Application Note Texas Instruments, Optimizing the TPS62130/40/50/60 Output Filter Application Note Texas Instruments, Optimizing Transient Response of Internally Compensated DC-DC Converters Application Note Texas Instruments, Description Compensating the Current Mode Boost Control Loop Application Note 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.4 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.5 Trademarks TI E2E™ is a trademark of Texas Instruments. 42 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 TPS629206 www.ti.com SLVSGE1 – MARCH 2022 All trademarks are the property of their respective owners. 12.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.7 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS629206 43 PACKAGE OPTION ADDENDUM www.ti.com 30-Mar-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS629206DRLR ACTIVE SOT-5X3 DRL 8 4000 RoHS & Green Call TI | SN Level-1-260C-UNLIM -40 to 150 T06C (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of