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TPS63020, TPS63021
SLVS916I – JULY 2010 – REVISED OCTOBER 2019
TPS6302x High Efficiency Single Inductor Buck-boost Converter with 4-A Switches
1 Features
3 Description
•
•
•
•
The TPS6302x devices provide a power supply
solution for products powered by either a two-cell or
three-cell alkaline, NiCd or NiMH battery, a one-cell
Li-ion or Li-polymer battery, supercapacitors or other
supply rails. Output currents up to 3 A are supported.
When using batteries, they can be discharged down
to below 2 V. The buck-boost converter is based on a
fixed frequency, pulse width modulation (PWM)
controller using synchronous rectification to obtain
maximum efficiency. At low load currents, the
converter enters power save mode to maintain high
efficiency over a wide load current range. The power
save mode can be disabled, forcing the converter to
operate at a fixed switching frequency. The maximum
average current in the switches is limited to a typical
value of 4 A. The output voltage is programmable
using an external resistor divider, or is fixed internally
on the chip. The converter can be disabled to
minimize battery drain. During shutdown, the load is
disconnected from the battery.
1
•
•
•
•
Input voltage range: 1.8 V to 5.5 V
Adjustable output voltage: 1.2 V to 5.5 V
Output current for VIN > 2.5 V, VOUT = 3.3 V: 2 A
High efficiency over the entire load range
– Operating quiescent current: 25 µA
– Power save mode with mode selection
Average current mode buck-boost architecture
– Automatic transition between modes
– Fixed frequency operation at 2.4 MHz
– Synchronization possible
Power good output
Safety and robust operation features
– Overtemperature, overvoltage protection
– Load disconnect during shutdown
Create a custom design using the
– TPS63020 with WEBENCH Power Designer
– TPS63021 with WEBENCH Power Designer
2 Applications
•
•
•
Pre-regulation in battery-powered devices: EPOS
(portable data terminal, barcode scanner), ecigarette, single board computer, IP network
camera, video doorbell, land mobile radios
Voltage stabilizer: wired communication, wireless
communication, PLC, optical module
Backup supercapacitor supply: electricity meter,
solid state drive (SSD) - enterprise
SPACE
The TPS6302x devices operate over a free air
temperature range of –40°C to 85°C. The devices are
packaged in a 14-pin VSON package measuring 3
mm × 4 mm (DSJ).
Device Information(1)
PART NUMBER
OUTPUT VOLTAGE
TPS63020
Adjustable
TPS63021
3.3 V
PACKAGE
VSON (14)
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
space
Simplified Schematic
Efficiency vs Output Current
L1
1.5 µH
100
90
VIN
1.8 V to 5.5 V
VIN
L2
VOUT
TPS63020
C1
2×10 µF
C3
100 nF
70
R1
1 0Ÿ
FB
R2
180 NŸ
VINA
EN
PS/SYNC
PG
GND
PGND
80
VOUT
3.3 V
C2
3×22 µF
R3
1 0Ÿ
Efficiency (%)
L1
60
50
40
30
Power
Good
20
10
VIN = 1.8 V, VOUT = 2.5 V
VIN = 3.6 V, VOUT = 2.5 V
VIN = 2.4 V, VOUT = 4.5 V
VIN = 3.6 V, VOUT = 4.5 V
Power-save mode enabled
0
100P
1m
10m
100m
Output Current (A)
1
D001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS63020, TPS63021
SLVS916I – JULY 2010 – REVISED OCTOBER 2019
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
5
6.1
6.2
6.3
6.4
6.5
6.6
5
5
5
5
6
7
Detailed Description .............................................. 8
7.1
7.2
7.3
7.4
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Overview ................................................................... 8
Functional Block Diagram ......................................... 8
Feature Description................................................... 9
Device Functional Modes........................................ 10
Application and Implementation ........................ 13
8.1 Application Information............................................ 13
8.2 Typical Application .................................................. 13
8.3 System Examples ................................................... 21
9 Power Supply Recommendations...................... 23
10 Layout................................................................... 23
10.1 Layout Guidelines ................................................. 23
10.2 Layout Example .................................................... 23
10.3 Thermal Considerations ........................................ 24
11 Device and Documentation Support ................. 25
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
Receiving Notification of Documentation Updates
Device Support......................................................
Documentation Support ........................................
Related Links ........................................................
Support Resources ...............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
25
25
25
25
25
26
26
26
12 Mechanical, Packaging, and Orderable
Information ........................................................... 26
4 Revision History
Changes from Revision H (August 2019) to Revision I
Page
•
Changed ESD numbers to reflect latest test insights ............................................................................................................. 5
•
Changed Footnotes in order to reflect wording of latest JEP155 and JEP157 specifications ............................................... 5
•
Changed VFB naming and description for better readability ................................................................................................... 6
Changes from Revision G (March 2019) to Revision H
•
Page
Changed R3 68 kΩ To: R4 68 kΩ in Figure 28 .................................................................................................................... 21
Changes from Revision F (March 2019) to Revision G
Page
•
Changed the Simplified Schematic, removed the connection from VINA to VIN .................................................................. 1
•
Changed Figure 7, removed the connection from VINA to VIN .......................................................................................... 13
•
Changed Figure 28, removed the connection from VINA to VIN ........................................................................................ 21
Changes from Revision E (May 2017) to Revision F
Page
•
Updated Features and Applications on the 1st page ............................................................................................................. 1
•
Changed the Body Size column To: Output Voltage in the Device Information table ........................................................... 1
•
Changed the Pin Configuration image .................................................................................................................................. 4
•
Changed Chapter order in Application Information . ............................................................................................................ 13
•
Updated output capacitor selection section ......................................................................................................................... 15
•
Added Table of Typical Characteristics Curves. ................................................................................................................. 17
•
Changed Figure 24 and Figure 25 ....................................................................................................................................... 19
•
Added Figure 26 and Figure 27 ........................................................................................................................................... 20
•
Changed Figure 28 .............................................................................................................................................................. 21
•
Added system examples Supercapacitor Backup Power Supply With Active Cell Balancing and Low-Power TEC Driver 22
2
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SLVS916I – JULY 2010 – REVISED OCTOBER 2019
Changes from Revision D (October 2015) to Revision E
•
Page
Added Voltage AC-spec to Absolute Maximum Ratings table for L1, L2. ............................................................................. 5
Changes from Revision C (February 2013) to Revision D
•
Page
Added Handling Rating table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1
Changes from Revision B (August 2012) to Revision C
Page
•
Changed Figure 7 schematic to show correct component values. ...................................................................................... 13
•
Changed Figure 28 schematic to show correct component values. .................................................................................... 21
Changes from Revision A (December 2011) to Revision B
•
Page
Changed the Duty cycle in step down conversion values, added MIN = 20%, deleted TYP = 30% and MAX = 40% .......... 6
Changes from Original (April 2010) to Revision A
•
Page
Updated Figure 31 - PCB Layout Suggestion ...................................................................................................................... 23
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5 Pin Configuration and Functions
PGND
PGND
PGND
PGND
DSJ Package
14-Pin VSON with Exposed Thermal Pad
Top View
VINA
1
14
PG
GND
2
13
PS/SYNC
FB
3
12
EN
Thermal Pad
VOUT
5
10
VIN
L2
6
9
L1
L2
7
8
L1
No t to scale
PGND
VIN
PGND
11
PGND
4
PGND
VOUT
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
EN
12
I
Enable input (1 enabled, 0 disabled), must not be left open
FB
3
I
Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage
versions
GND
2
–
Control / logic ground
L1
8, 9
I
Connection for inductor
L2
6, 7
I
Connection for inductor
PG
14
O
Output power good (1 good, 0 failure; open-drain), can be left open
–
Power ground
13
I
Enable / disable power save mode (1 disabled, 0 enabled, clock signal for synchronization), must
not be left open
PGND
PS/SYNC
VIN
10, 11
I
Supply voltage for power stage
VINA
1
I
Supply voltage for control stage
VOUT
4, 5
O
Buck-boost converter output
Exposed
Thermal Pad
4
–
The exposed thermal pad is connected to PGND.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VIN, VINA, VOUT, PS/SYNC, EN, FB, PG
–0.3
7
V
L1, L2 (DC)
–0.3
7
V
–3
10
V
Operating junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
Voltage
(2)
L1, L2 (AC, less than 10 ns) (3)
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
All voltages are with respect to network ground terminal.
Normal switching operation
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001,
pins VIN, VINA, L1 (1)
±500
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001,
all other pins (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)
±1500
UNIT
V
JEDEC document JEP155 states that, with basic ESD control methods applied, 500 V HBM allows a safe manufacturing with proven
margin.
JEDEC document JEP157 states that, with basic ESD control methods applied, 250 V CDM allows a safe manufacturing.
6.3 Recommended Operating Conditions
MIN
NOM
MAX
UNIT
Supply voltage at VIN, VINA
1.8
5.5
V
Operating free air temperature, TA
–40
85
°C
Operating junction temperature, TJ
–40
125
°C
6.4 Thermal Information
TPS6302x
THERMAL METRIC (1)
DSJ (VSON)
UNIT
14 PINS
RθJA
Junction-to-ambient thermal resistance
41.8
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
47
°C/W
Junction-to-board thermal resistance
17
°C/W
ψJT
Junction-to-top characterization parameter
0.9
°C/W
ψJB
Junction-to-board characterization parameter
16.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
3.6
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature
range of 25°C) (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC/DC STAGE
Input voltage
VIN
VOUT
5.5
V
1.5
1.8
1.9
V
Minimum input voltage for start-up
1.5
1.8
2.0
V
TPS63020 output voltage
1.2
5.5
V
mV
Duty cycle in step down conversion
VFB_PWM
VFB_PS
1.8
0°C ≤ TA ≤ 85°C
Minimum input voltage for start-up
20%
TPS63020 feedback voltage
PS/SYNC = VIN
TPS63021 output voltage
TPS63020 feedback voltage / TPS63021 output
voltage regulation in PS mode
PS/SYNC = GND; referenced to
VFB_PWM
495
500
505
3.267
3.3
3.333
0.6%
Maximum line regulation
ISW
Iq
IS
5%
0.5%
Maximum load regulation
f
V
0.5%
Oscillator frequency
2200
2400
2600
kHz
Frequency range for synchronization
2200
2400
2600
kHz
3500
4000
4500
mA
Average switch current limit
VIN = VINA = 3.6 V, TA = 25°C
High side switch on resistance
VIN = VINA = 3.6 V
50
Low side switch on resistance
VIN = VINA = 3.6 V
50
IOUT = 0 mA, VEN = VIN = VINA = 3.6
V,
VOUT = 3.3 V
25
50
μA
5
10
μA
Quiescent
current
VIN and VINA
VOUT
TPS63021 FB input impedance
VEN = HIGH
Shutdown current
VEN = 0 V, VIN = VINA = 3.6 V
mΩ
mΩ
1
MΩ
0.1
1
1.5
1.6
μA
CONTROL STAGE
UVLO
Under voltage lockout threshold
VINA voltage decreasing
1.4
Under voltage lockout hysteresis
VIL
EN, PS/SYNC input low voltage
VIH
EN, PS/SYNC input high voltage
200
0.4
V
μA
1.2
V
EN, PS/SYNC input current
Clamped to GND or VINA
0.01
0.1
PG output low voltage
VOUT = 3.3 V, IPGL = 10 μA
0.04
0.4
V
0.01
0.1
μA
PG output leakage current
Output overvoltage protection
6
V
mV
5.5
7
V
Overtemperature protection
140
°C
Overtemperature hysteresis
20
°C
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6.6 Typical Characteristics
4
4
TPS63021
3.5
3.5
3
3
Maximum Output Current (A)
Maximum Output Current (A)
TPS63020
2.5
2
1.5
1
2.5
2
1.5
1
0.5
0.5
VOUT = 2.5V
VOUT = 4.5V
0
1.8
2.2
2.6
3
3.4
3.8
4.2
Input Voltage (V)
4.6
5
5.4
Figure 1. Maximum Output Current Versus Input Voltage,
TPS63020, VOUT = 2.5 V/4.5 V
VOUT = 3.3V
0
1.8
2.2
2.6
3
3.4
3.8
4.2
Input Voltage (V)
4.6
5
5.4
Figure 2. Maximum Output Current Versus Input Voltage,
TPS63021, VOUT = 3.3V
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7 Detailed Description
7.1 Overview
The control circuit of the device is based on an average current mode topology. The controller also uses input
and output voltage feed forward. Changes of input and output voltage are monitored and can immediately
change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier
gets its feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must be
connected to that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense the
voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage will be
compared with the internal reference voltage to generate a stable and accurate output voltage.
The device uses four internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range.
To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND and
PGND are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point, ideally close to the GND pin. Due to the
4-switch topology, the load is always disconnected from the input during shutdown of the converter. To protect
the device from overheating an internal temperature sensor is implemented.
7.2 Functional Block Diagram
L1
L2
VIN
VOUT
Current
Sensor
VINA
VIN
VOUT
PGND
_
VINA
Modulator
PG
PS/SYNC
PGND
Gate
Control
+
_
+
Oscillator
+
-
Device
Control
EN
FB
Temperature
Control
VREF
PGND
GND
PGND
Figure 3. Functional Block Diagram (TPS63020)
8
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Functional Block Diagram (continued)
L1
L2
VIN
VOUT
Current
Sensor
VINA
VIN
VOUT
PGND
FB
_
VINA
Modulator
PG
PS/SYNC
PGND
Gate
Control
+
Oscillator
Device
Control
+
_
+
-
VREF
EN
Temperature
Control
GND
PGND
PGND
Figure 4. Functional Block Diagram (TPS63021)
7.3 Feature Description
7.3.1 Dynamic Voltage Positioning
As detailed in Figure 6, the output voltage is typically 3% above the nominal output voltage at light load currents,
as the device is in power save mode. This gives additional headroom for the voltage drop during a load transient
from light load to full load. This allows the converter to operate with a small output capacitor and still have a low
absolute voltage drop during heavy load transient changes.
7.3.2 Dynamic Current Limit
To protect the device and the application, the average inductor current is limited internally on the IC. At nominal
operating conditions, this current limit is constant. The current limit value can be found in the electrical
characteristics table. If the supply voltage at VIN drops below 2.3 V, the current limit is reduced. This can happen
when the input power source becomes weak. Increasing output impedance, when the batteries are almost
discharged, or an additional heavy pulse load is connected to the battery, can cause the VIN voltage to drop. The
dynamic current limit has its lowest value when reaching the minimum recommended supply voltage at VIN. At
this voltage, the device is forced into burst mode operation, trying to stay active as long as possible even with a
weak input power source.
If the die temperature increases above the recommended maximum temperature, the dynamic current limit
becomes active. Similar to the behavior when the input voltage at VIN drops, the current limit is reduced with
temperature increasing.
7.3.3 Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load is
disconnected from the input. This means that the output voltage can drop below the input voltage during
shutdown. During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high
peak currents flowing from the input.
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Feature Description (continued)
7.3.4 Power Good
The device has a built-in power-good function to indicate whether the output voltage is regulated properly. As
soon as the average inductor current limit is reached, the power-good output gets low impedance. The output is
open-drain and can be left open if not needed. By connecting a pullup resistor to the supply voltage of the
externally connected logic, it is possible to adjust the voltage level within the absolute maximum ratings.
Because it is monitoring the status of the current control loop, the power-good output provides the earliest
indication possible for an output voltage break down and leaves the connected application a maximum time to
safely react.
7.3.5 Overvoltage Protection
If, for any reason, the output voltage is not fed back properly to the input of the voltage amplifier, control of the
output voltage will not work anymore. Therefore, overvoltage protection is implemented to avoid the output
voltage exceeding critical values for the device and possibly for the system it is supplying. The implemented
overvoltage protection circuit monitors the output voltage internally as well. In case it reaches the overvoltage
threshold, the voltage amplifier regulates the output voltage to this value.
7.3.6 Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VINA is lower than
approximately its threshold (see Electrical Characteristics). When in operation, the device automatically enters
the shutdown mode if the voltage at VINA drops below the undervoltage lockout threshold. The device
automatically restarts if the input voltage recovers to the minimum operating input voltage.
7.3.7 Overtemperature Protection
The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature
exceeds the programmed threshold (see Electrical Characteristics), the device stops operating. As soon as the
IC temperature has decreased below the programmed threshold, it starts operating again. There is a built-in
hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold.
7.4 Device Functional Modes
7.4.1 Soft-start and Short Circuit Protection
After being enabled, the device starts operating. The average current limit ramps up from an initial 400 mA
following the output voltage increasing. At an output voltage of about 1.2 V, the current limit is at its nominal
value. If the output voltage does not increase, the current limit does not increase. There is no timer implemented.
Thus, the output voltage overshoot at start-up, as well as the inrush current, is kept at a minimum. The device
ramps up the output voltage in a controlled manner even if a large capacitor is connected at the output. When
the output voltage does not increase above 1.2 V, the device assumes a short circuit at the output, and keeps
the current limit low to protect itself and the application. At a short on the output during operation, the current limit
also is decreased accordingly.
7.4.2 Buck-Boost Operation
To regulate the output voltage at all possible input voltage conditions, the device automatically switches from
step-down operation to boost operation and back as required by the configuration. It always uses one active
switch, one rectifying switch, one switch permanently on, and one switch permanently off. Therefore, it operates
as a step-down converter (buck) when the input voltage is higher than the output voltage, and as a boost
converter when the input voltage is lower than the output voltage. There is no mode of operation in which all four
switches are permanently switching. Controlling the switches this way allows the converter to maintain high
efficiency at the most important point of operation when input voltage is close to the output voltage. The RMS
current through the switches and the inductor is kept at a minimum to minimize switching and conduction losses.
For the remaining two switches, one is kept permanently on and the other is kept permanently off, thus causing
no switching losses.
10
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Device Functional Modes (continued)
7.4.3
Control Loop
The controller circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. Figure 5 shows the
control loop.
The non-inverting input of the transconductance amplifier, gmv, is assumed to be constant. The output of gmv
defines the average inductor current. The inductor current is reconstructed by measuring the current through the
high-side buck MOSFET. This current corresponds exactly to the inductor current in boost mode. In buck mode,
the current is measured during the on-time of the same MOSFET. During the off-time, the current is
reconstructed internally starting from the peak value at the end of the on-time cycle. The average current and the
feedback from the error amplifier gmv forms the correction signal gmc. This correction signal is compared to the
buck and the boost sawtooth ramp giving the PWM signal. Depending on which of the two ramps, the gmc output
crosses either the buck or the boost stage is initiated. When the input voltage is close to the output voltage, one
buck cycle is always followed by a boost cycle. In this condition, no more than three cycles in a row of the same
mode are allowed. This control method in the buck-boost region ensures a robust control and the highest
efficiency.
The buck-boost overlap control makes sure that the classical buck-boost function, which would cause two
switches to be on every half a cycle, is avoided. Thanks to this block, whenever all switches becomes active
during one clock cycle, the two ramps are shifted away from each other. On the other hand, when there is no
switching activities because there is a gap between the ramps, the ramps are moved closer together. As a result,
the number of classical buck-boost cycles or no switching is reduced to a minimum and high efficiency values
has been achieved.
TM
Figure 5. Average Current Mode Control
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Device Functional Modes (continued)
7.4.4 Power Save Mode and Synchronization
The PS/SYNC pin can be used to select different operation modes. Power save mode is used to improve
efficiency at light load. To enable power save mode, PS/SYNC must be set low. If PS/SYNC is set low, then
power save mode is entered when the average inductor current gets lower than about 100 mA. At this point, the
converter operates with reduced switching frequency and with a minimum quiescent current to maintain high
efficiency. See Figure 6 for detailed operation of the power save mode.
During the power save mode, the output voltage is monitored with a comparator by the threshold comp low and
comp high. When the device enters power save mode, the converter stops operating and the output voltage
drops. The slope of the output voltage depends on the load and the value of output capacitance. As the output
voltage falls below the comp low threshold set to 2.5% typical above VOUT, the device ramps up the output
voltage again, by starting operation using a programmed average inductor current higher than required by the
current load condition. Operation can last one or several pulses. The converter continues these pulses until the
comp high threshold, set to typically 3.5% above VOUT nominal, is reached and the average inductance current
gets lower than about 100 mA. When the load increases above the minimum forced inductor current of about 100
mA, the device automatically switches to pulse width modulation (PWM) mode.
The power save mode can be disabled by programming high at the PS/SYNC. Connecting a clock signal at
PS/SYNC forces the device to synchronize to the connected clock frequency.
Synchronization is done by a phase-locked loop (PLL), so synchronizing to lower and higher frequencies
compared to the internal clock works without any issues. The PLL can also tolerate missing clock pulses without
the converter malfunctioning. The PS/SYNC input supports standard logic thresholds.
Heavy Load transient step
3.5%
Power save mode at light load
current
Comparator High
3%
Comparator low
2.5%
Vo
PWM mode
Absolute Voltage drop
with positioning
Figure 6. Power Save Mode Thresholds and Dynamic Voltage Positioning
12
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS6302x are high efficiency, low quiescent current, non-inverting buck-boost converters suitable for
applications that need a regulated output voltage from an input supply that can be higher, lower, or equal to the
output voltage. Output currents can go as high as 2 A in boost mode and as high as 4 A in buck mode. The
average current in the switches is limited to a typical value of 4 A.
8.2 Typical Application
L1
1.5 µH
L1
VIN
2.5 V to 5.5 V
VIN
L2
VOUT
TPS630 20
R1
1 MŸ
C1
2×10 µF
FB
C2
3×22 µF
R3
1 MŸ
R2
180 kŸ
VINA
EN
PS/SYNC
C3
100 nF
VOUT
3.3 V at 1.5 A
Power
Goo d
PG
GND
PGND
Figure 7. Application Circuit
8.2.1 Design Requirements
The design guideline provides a component selection to operate the device within the recommended operating
conditions. See Table 1 for possible inductor and capacitor combinations.
For the fixed output voltage option, the feedback pin needs to be connected to the VOUT pin.
Table 1. Matrix of Output Capacitor and Inductor Combinations
NOMINAL
INDUCTOR VALUE
[µH] (1)
NOMINAL OUTPUT CAPACITOR VALUE [µF] (2)
3×22
4×22
≥ 100
1.0
+
+
+
1.5
(3)
+
+
+
+
2×22
+
+
2.2
(1)
(2)
(3)
Inductor tolerance and current derating is anticipated. The effective inductance can vary by 20% and –30%.
Capacitance tolerance and DC bias voltage derating is anticipated. The effective capacitance can vary by 20% and –50%.
Typical application. Other check marks indicate possible filter combinations.
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8.2.2 Detailed Design Procedure
The TPS6302x series of buck-boost converter has internal loop compensation. Therefore, the external inductor
and output capacitors have to be selected to work with the internal compensation. When selecting the external
components, a low limit for the inductor value exists to avoid subharmonic oscillation which can be caused by a
far too fast ramp up of the inductor current. For the TPS6302x series, the inductor value must be kept at or
above 1 µH.
In particular, either 1 µH or 1.5 µH is recommended working at an output current between 1.5 A and 2 A. If
operating with a lower load current, it is also possible to use 2.2 µH.
Selecting a larger output capacitor value is less critical because the corner frequency moves to lower
frequencies.
8.2.2.1 Custom Design with WEBENCH Tools
Click here to create a custom design using the TPS63020 device with the WEBENCH® Power Designer.
1. Start by entering your VIN, VOUT and IOUT requirements.
2. Optimize your design for key parameters like efficiency, footprint or cost using the optimizer dial and
compare this design with other possible solutions from Texas Instruments.
3. WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real
time pricing and component availability.
4. In most cases, you will also be able to:
– Run electrical simulations to see important waveforms and circuit performance,
– Run thermal simulations to understand the thermal performance of your board,
– Export your customized schematic and layout into popular CAD formats,
– Print PDF reports for the design, and share your design with colleagues.
5. Get more information about WEBENCH tools at www.ti.com/webench.
8.2.2.2 Inductor Selection
The inductor selection is affected by several parameters such as the following:
• Inductor ripple current
• Output voltage ripple
• Transition point into Power Save Mode
• Efficiency
See Table 2 for a list of typical inductors.
For high efficiencies, the inductor must have a low DC resistance to minimize conduction losses. Especially at
high-switching frequencies, the core material has a high impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. Use Equation 2 to avoid saturation of the inductor when
calculating the peak current for the inductor in steady state operation. Only the equation which defines the switch
current in boost mode is shown because this provides the highest value of current and represents the critical
current value for selecting the right inductor.
Duty Cycle Boost
IPEAK
D=
V
-V
IN
OUT
V
OUT
(1)
Iout
Vin ´ D
=
+
η ´ (1 - D)
2 ´ f ´ L
where
•
•
•
•
14
D = duty cycle in boost mode
f = converter switching frequency (typical 2.5 MHz)
L = inductor value
η = estimated converter efficiency (use the number from the efficiency curves or 0.9 as an assumption)
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(2)
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NOTE
The calculation must be done for the minimum input voltage in boost mode.
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It is recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 2. Table 2 lists the possible inductors.
Table 2. List of Recommended Inductors
(1)
INDUCTOR
VALUE [µH]
SATURATION
CURRENT [A]
DCR [mΩ]
PART NUMBER
MANUFACTURER
SIZE (LxWxH
mm)
1.5
5.1
15
XFL4020-152ME
Coilcraft
4 x 4 x 2.1
1.5
5.4
24
FDV0530S-H-1R5M
muRata
5x5x3
(1)
See Third-party Products Disclaimer.
8.2.2.3
Output Capacitor Selection
For the output capacitor, it is recommended to use of small ceramic capacitors placed as close as possible to the
VOUT and PGND pins of the IC. The recommended nominal output capacitors are three times 22 µF. If, for any
reason, the application requires the use of large capacitors that cannot be placed close to the IC, use a smaller
ceramic capacitor in parallel to the large capacitor. Place the small capacitor as close as possible to the VOUT
and PGND pins of the IC.
There are no additional requirements regarding minimum ESR. There is also no upper limit for the output
capacitance value. Larger capacitors cause lower output voltage ripple as well as lower output voltage drop
during load transients.
8.2.2.4
Input Capacitor Selection
A 10 µF input capacitor is recommended to improve line transient behavior of the regulator and EMI behavior of
the total power supply circuit. An X5R or X7R ceramic capacitor placed as close as possible to the VIN and
PGND pins of the IC is recommended. This capacitance can be increased without limit. If the input supply is
located more than a few inches from the TPS6302x converter, additional bulk capacitance can be required in
addition to the ceramic bypass capacitors. An electrolytic or tantalum capacitor with a value of 47 µF is a typical
choice.
8.2.2.5
Bypass Capacitor
To make sure that the internal control circuits are supplied with a stable low noise supply voltage, a capacitor can
be connected between VINA and GND. Using a ceramic capacitor with a value of 0.1 µF is recommended. The
value of this capacitor must not be higher than 0.22 µF.
8.2.3 Setting The Output Voltage
When the adjustable output voltage version TPS63020 is used, the output voltage is set by an external resistor
divider. The resistor divider must be connected between VOUT, FB, and GND. The feedback voltage is 500 mV
nominal. The low-side resistor R2 (between FB and GND) must be kept in the range of 200 kΩ. Use Equation 3
to calculate the high-side resistor R1 (between VOUT and FB).
æV
ö
R1 = R2 × ç OUT - 1÷
V
è FB
ø
where
•
VFB= 500 mV
(3)
Table 3. Resistor Selection For Typical Output Voltages
VOUT
R1
R2
2.5 V
750 kΩ
180 kΩ
3.3 V
1 MΩ
180 kΩ
3.6 V
1.1 MΩ
180 kΩ
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Table 3. Resistor Selection For Typical Output Voltages (continued)
VOUT
R1
R2
4.5 V
1.43 MΩ
180 kΩ
5V
1.6 MΩ
180 kΩ
8.2.4 Application Curves
Table 4. Components for Application Characteristic Curves for VOUT = 3.3 V (1) (2)
REFERENCE
DESCRIPTION
PART NUMBER
MANUFACTURER
U1
High Efficiency Single Inductor Buck-Boost
Converter With 4-A Switches
TPS63020 or TPS63021
Texas Instruments
L1
1.5 μH, 4 mm x 4 mm x 2 mm
XFL4020-152ML
Coilcraft
C1
2 × 10 μF 6.3 V, 0603, X5R ceramic
GRM188R60J106ME84D
muRata
C2
3 × 22 μF 6.3 V, 0603, X5R ceramic
GRM188R60J226MEAOL
muRata
C3
0.1 μF, X5R or X7R ceramic
Standard
Standard
R1
1 MΩ at TPS63020, 0 Ω at TPS63021
Standard
Standard
R2
180 kΩ at TPS63020, not used at TPS63021
Standard
Standard
R3
1 MΩ
Standard
Standard
(1)
(2)
16
See Third-Party Products Discalimer.
For other output voltages, refer to Table 3 for resistor values.
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Table 5. Typical Characteristics Curves
PARAMETER
CONDITIONS
FIGURE
EFFICIENCY
Efficiency vs Output Current, TPS63020 (Power save mode
enabled)
VIN = 1.8 V, 2.4 V, 3.6 V, VOUT = 2.5 V, 4.5 V,
PS/SYNC = Low
Figure 8
Efficiency vs Output Current, TPS63020 (PWM only)
VIN = 1.8 V, 2.4 V, 3.6 V, VOUT = 2.5 V, 4.5 V,
PS/SYNC = High
Figure 9
Efficiency vs Output Current, TPS63021 (Power save mode
enabled)
VIN = 2.4 V, 3.6 V, VOUT = 3.3 V, PS/SYNC =
Low
Figure 10
Efficiency vs Output Current, TPS63021 (PWM only)
VIN = 2.4 V, 3.6 V, VOUT = 3.3 V, PS/SYNC =
High
Figure 11
Efficiency vs Input Voltage, TPS63020 (Power save mode
enabled)
VOUT = 2.5 V, Load = 10 mA, 500 mA, 1 A, 2 A,
PS/SYNC = Low
Figure 12
Efficiency vs Input Voltage, TPS63020 (Power save mode
enabled)
VOUT = 4.5 V, Load = 10 mA, 500 mA, 1 A, 2 A,
PS/SYNC = Low
Figure 13
Efficiency vs Input Voltage, TPS63020 (PWM only)
VOUT = 2.5 V, Load = 10 mA, 500 mA, 1 A, 2 A,
PS/SYNC = Low
Figure 14
Efficiency vs Input Voltage, TPS63020 (PWM only)
VOUT = 2.5 V, Load = 10 mA, 500 mA, 1 A, 2 A,
PS/SYNC = Low
Figure 15
Efficiency vs Input Voltage, TPS63021 (Power save mode
enabled)
VOUT = 3.3 V, Load = 10 mA, 500 mA, 1 A, 2 A,
PS/SYNC = Low
Figure 16
Efficiency vs Input Voltage, TPS63021 (PWM only)
VOUT = 3.3 V, Load = 10 mA, 500 mA, 1 A, 2 A,
PS/SYNC = Low
Figure 17
Load Regulation, PWM Boost Operation, TPS63020
VIN = 3.6 V , VOUT = 4.5 V, PS/SYNC = High
Figure 18
Load Regulation, PWM Buck Operation, TPS63020
VIN = 3.6 V, VOUT = 2.5 V, PS/SYNC = High
Figure 19
Load Regulation, PWM Operation, TPS63021
VIN = 3.6 V, VOUT = 3.3 V, PS/SYNC = High
Figure 20
Load Transient, TPS63021
VIN = 2.4 V, VOUT = 3.3 V, Load = 500 mA to
1.5 A
Figure 21
Load Transient, TPS63021
VIN = 4.2 V, VOUT = 3.3 V, Load = 500 mA to 1.5
A
Figure 22
Line Transient, TPS63021
VIN = 3.0 V to 3.7 V, VOUT = 3.3 V, Load = 1.5 A
Figure 23
Start-up Behavior from Rising Enable, TPS63021
VIN = 2.4 V, VOUT = 3.3 V, Load = 2.2 Ω
Figure 24
Start-up Behavior from Rising Enable, TPS63021
VIN = 4.2 V, VOUT = 3.3 V, Load = 2.2 Ω
Figure 25
Start-up Behavior from Rising Enable, TPS63021
VIN = 2.4 V, VOUT = 3.3 V, Load = 2.2 Ω
Figure 26
Start-up Behavior from Rising Enable, TPS63021
VIN = 4.2 V, VOUT = 3.3 V, Load = 2.2 Ω
Figure 27
REGULATION ACCURACY
START-UP
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100
100
90
90
80
80
70
70
60
60
Efficiency (%)
Efficiency (%)
SLVS916I – JULY 2010 – REVISED OCTOBER 2019
50
40
30
50
40
30
VIN = 1.8V, VOUT = 2.5V
VIN = 3.6V, VOUT = 2.5V
VIN = 2.4V, VOUT = 4.5V
VIN = 3.6V, VOUT = 4.5V
20
10
VIN = 1.8V, VOUT = 2.5V
VIN = 3.6V, VOUT = 2.5V
VIN = 2.4V, VOUT = 4.5V
VIN = 3.6V, VOUT = 4.5V
20
10
TPS63020, Power Save Enabled
0
100µ
1m
10m
100m
Output Current (A)
1
TPS63020, Power Save Disabled
Figure 8. Efficiency Versus Output Current, TPS63020,
Power Save Enabled
100
100
90
90
80
80
70
70
60
60
50
40
1m
10m
100m
Output Current (A)
30
50
40
20
VIN = 2.4V
VIN = 3.6V
10
VIN = 2.4V
VIN = 3.6V
10
TPS63021, Power Save Enabled
0
100µ
1m
10m
100m
Output Current (A)
1
TPS63021, Power Save Disabled
100
100
90
90
80
80
70
70
60
60
50
40
30
1m
10m
100m
Output Current (A)
1
4
Figure 11. Efficiency Versus Output Current, TPS63021,
Power Save Disabled
Efficiency (%)
Efficiency (%)
0
100µ
4
Figure 10. Efficiency Versus Output Current, TPS63021,
Power Save Enabled
50
40
30
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
20
10
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
20
10
TPS63020, VOUT = 2.5V, Power Save Enabled
2.2
2.6
3
3.4
3.8
4.2
Input Voltage (V)
4.6
5
5.4
Figure 12. Efficiency Versus Input Voltage, TPS63020,
VOUT = 2.5 V, Power Save Enabled
18
4
30
20
0
1.8
1
Figure 9. Efficiency Versus Output Current, TPS63020,
Power Save Disabled
Efficiency (%)
Efficiency (%)
0
100µ
4
Submit Documentation Feedback
TPS63020, VOUT = 4.5V, Power Save Enabled
0
1.8
2.2
2.6
3
3.4
3.8
4.2
Input Voltage (V)
4.6
5
5.4
Figure 13. Efficiency Versus Input Voltage, TPS63020,
VOUT = 4.5 V, Power Save Enabled
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100
100
90
90
80
80
70
70
60
60
Efficiency (%)
Efficiency (%)
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50
40
30
20
10
40
30
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
20
10
TPS63020, VOUT = 2.5V, Power Save Disabled
0
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
Input Voltage (V)
TPS63020, VOUT = 4.5V, Power Save Disabled
5
0
1.8
5.4
Figure 14. Efficiency Versus Input Voltage, TPS63020,
VOUT = 2.5 V, Power Save Disabled
100
100
90
90
80
80
70
70
60
60
50
40
2.2
2.6
3
30
10
5
5.4
50
40
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
20
10
TPS63021, Power Save Enabled
2.2
2.6
3
3.4
3.8
4.2
Input Voltage (V)
4.6
5
TPS63021, Power Save Disabled
0
1.8
5.4
Figure 16. Efficiency Versus Input Voltage, TPS63021,
Power Save Enabled
2.2
2.6
3
3.4
3.8
4.2
Input Voltage (V)
4.6
5
5.4
Figure 17. Efficiency Versus Input Voltage, TPS63021,
Power Save Disabled
4.6
2.6
VIN = 3.6V
VIN = 3.6V
2.55
Output Voltage (V)
4.55
Output Voltage (V)
4.6
30
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
20
0
1.8
3.4
3.8
4.2
Input Voltage (V)
Figure 15. Efficiency Versus Input Voltage, TPS63020,
VOUT = 4.5 V, Power Save Disabled
Efficiency (%)
Efficiency (%)
50
4.5
4.45
2.5
2.45
TPS63020, Power Save Disabled
4.4
100µ
1m
10m
100m
Output Current (A)
1
5
Figure 18. Output Voltage Versus Output Current,
TPS63020, Power Save Disabled
TPS63020, Power Save Disabled
2.4
100µ
1m
10m
100m
Output Current (A)
1
5
Figure 19. Output Voltage Versus Output Current,
TPS63020, Power Save Enabled
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3.4
VIN = 3.6V
Output Voltage
50 mV/div, AC
Output Voltage (V)
3.35
3.3
Output Current
500 mA/div, DC
3.25
TPS63021, Power Save Disabled
3.2
100µ
1m
10m
100m
Output Current (A)
TPS63021
1
VIN = 2.4 V, IOUT = 500 mA to 1500 mA
Time 2 ms/div
5
Figure 20. Output Voltage Versus Output Current,
TPS63021, Power Save Disabled
Figure 21. Load Transient Response, TPS63021
Output Voltage
50 mV/div, AC
Output Voltage
50 mV/div, AC
Output Current
500 mA/div, DC
Input Voltage
500 mV/div, AC
TPS63021
VIN = 4.2 V, IOUT = 500 mA to 1500 mA
TPS63021
VIN = 3.0 V to 3.7 V, IOUT = 1500 mA
Time 2 ms/div
Time 2 ms/div
Figure 22. Load Transient Response, TPS63021
Enable
2 V/div, DC
Figure 23. Line Transient Response, TPS63021
Enable
2 V/div, DC
Output Voltage
1 V/div, DC
Inductor Current
Inductor Current
1 A/div, DC
1 A/div, DC
Voltage at L2
5 V/div, DC
Voltage at L1
5 V/div, DC
TPS63020
VIN = 2.4 V, VOUT = 3.3 V, RL = 2.2 W
TPS63020
VIN = 4.2 V, VOUT = 3.3 V, RL = 2.2 W
Time 100 ms/div
Time 100 ms/div
Figure 24. Start-up Behavior from Rising Enable,
TPS63020
20
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Output Voltage
1 V/div, DC
Figure 25. Start-up Behavior from Rising Enable,
TPS63020
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Enable
2 V/div, DC
Enable
2 V/div, DC
Output Voltage
1 V/div, DC
Output Voltage
1 V/div, DC
Inductor Current
1 A/div, DC
Inductor Current
1 A/div, DC
Voltage at L2
2 V/div, DC
Voltage at L2
2 V/div, DC
TPS63020
TPS63020
VIN = 2.4 V, VOUT = 3.3 V, RL = 2.2 W
VIN = 4.2 V, VOUT = 3.3 V, RL = 2.2 W
Time 100 ms/div
Time 400 ms/div
Figure 27. Start-up Behavior from Rising Enable,
TPS63020
Figure 26. Start-up Behavior from Rising Enable,
TPS63020
8.3 System Examples
8.3.1 Improved Transient Response for 2 A Load Current
Capacitor C4 and resistor R4 are added for improved load transient performance.
L1
1 µH
L1
VIN
2.5 V to 5.5 V
VIN
L2
VOUT
3.3 V at 2 A
VOUT
TPS630 20
R1
1 MŸ
C1
2×10 µF
C3
100 nF
C2
4×22 µF
R3
1 MŸ
C4
4.7 pF
FB
VINA
EN
PS/SYNC
R4
68 kŸ
R2
180 kŸ
Power
Goo d
PG
GND
PGND
Figure 28. Application Circuit for 2 A Load Current
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System Examples (continued)
8.3.2 Supercapacitor Backup Power Supply With Active Cell Balancing
The TPS63020 can be used to charge backup capacitors to a user-defined voltage level while the main power
supply is supplying a system, and discharges these capacitors into the system when the main power supply is
interrupted. With this design, the system voltage during backup operation keeps constant independent of the
voltage reduction on the backup capacitors. Refer to the PMP9766 Test Results Application Report for more
details.
Normal operation
Reverse
Main power
System
blocking
Charge operation
Pre-charge
operation
TPS63020
+
Active Cell
Balancing
+
Backup operation
Backup
Capacitor
Figure 29. Simplified Block Diagram of a Backup Power System
8.3.3 Low-Power TEC Driver
Controlling the operating temperature of electronic circuits helps attain the best system performance. For passive
control, that is, when heat sinks is not giving the right performance, active cooling using a thermoelectric cooler
(TEC) might be able to solve the thermal issue. Figure 30 shows an example driving such a TEC element with
the TPS63020. Refer to the Low-power TEC Driver Application Report.
TEC
VIN
TPS63020
VCTRL
Figure 30. Low-Power TEC Driver Schematic
22
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Product Folder Links: TPS63020 TPS63021
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SLVS916I – JULY 2010 – REVISED OCTOBER 2019
9 Power Supply Recommendations
The TPS6302x devices have no special requirements for its input power supply. The output current of the input
power supply needs to be rated according to the supply voltage, output voltage, and output current of the
TPS6302x.
10 Layout
10.1 Layout Guidelines
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator can show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. Place the input capacitor, output capacitor, and the inductor as close as possible to the IC. Use a
common ground node for power ground and a different one for control ground to minimize the effects of ground
noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider must be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, short traces are recommended as well, separation from the power ground traces. This avoids
ground shift problems, which can occur due to superimposition of power ground current and control ground
current.
10.2 Layout Example
L1
GND
GND
C1
C2
U1
VOUT
VIN
R2
C3
EN
PS/SYNC
PG
GND
R1
Figure 31. PCB Layout Suggestion
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Product Folder Links: TPS63020 TPS63021
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10.3 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB by soldering the exposed thermal pad
• Introducing airflow in the system
Refer to the Thermal Characteristics Application Note and the Semiconductor and IC Package Thermal Metrics
Application Note for more details on how to use the thermal parameters.
24
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SLVS916I – JULY 2010 – REVISED OCTOBER 2019
11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.2 Device Support
11.2.1 Custom Design with WEBENCH Tools
Click here to create a custom design using the TPS63021 device with the WEBENCH® Power Designer.
1. Start by entering your VIN, VOUT and IOUT requirements.
2. Optimize your design for key parameters like efficiency, footprint and cost using the optimizer dial and
compare this design with other possible solutions from Texas Instruments.
3. WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real
time pricing and component availability.
4. In most cases, you will also be able to:
– Run electrical simulations to see important waveforms and circuit performance,
– Run thermal simulations to understand the thermal performance of your board,
– Export your customized schematic and layout into popular CAD formats,
– Print PDF reports for the design, and share your design with colleagues.
5. Get more information about WEBENCH tools at www.ti.com/webench.
11.2.2 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.3 Documentation Support
11.3.1 Related Documentation
For related documentation see the following:
• Texas Instruments, Thermal Characteristics Application Note
• Texas Instruments, IC Package Thermal Metrics Application Note
11.4 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 6. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS63020
Click here
Click here
Click here
Click here
Click here
TPS63021
Click here
Click here
Click here
Click here
Click here
11.5 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
Copyright © 2010–2019, Texas Instruments Incorporated
Product Folder Links: TPS63020 TPS63021
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www.ti.com
11.6 Trademarks
E2E is a trademark of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.7 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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Product Folder Links: TPS63020 TPS63021
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS63020DSJR
ACTIVE
VSON
DSJ
14
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PS63020
TPS63020DSJT
ACTIVE
VSON
DSJ
14
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PS63020
TPS63021DSJR
ACTIVE
VSON
DSJ
14
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PS63021
TPS63021DSJT
ACTIVE
VSON
DSJ
14
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PS63021
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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