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TPS63027
SLVSDK8 – DECEMBER 2016
TPS63027 High Current, High Efficiency Single Inductor Buck-Boost Converter
1 Features
3 Description
•
The TPS63027 is a high efficiency, low quiescent
current buck-boost converters suitable for application
where the input voltage is higher or lower than the
output. Output currents can go as high as 2 A in
boost mode and as high as 4 A in buck mode. The
maximum average current in the switches is limited to
a typical value of 4.5 A. The TPS63027 regulates the
output voltage over the complete input voltage range
by automatically switching between buck or boost
mode depending on the input voltage ensuring a
seamless transition between modes. The buck-boost
converter is based on a fixed frequency, pulse-widthmodulation (PWM) controller using synchronous
rectification to obtain highest efficiency. At low load
currents, the converter enters Power Save Mode to
maintain high efficiency over the complete load
current range. There is a PFM/PWM pin that allows
the user to choose between automatic PFM/PWM
mode operation and forced PWM operation. During
PWM mode a fixed-frequency of typically 2.5 MHz is
used. The output voltage is programmable using an
external resistor divider, or is fixed internally on the
chip. The converter can be disabled to minimize
battery drain. During shutdown, the load is
disconnected from the battery. The device is
packaged in a 25-pin WCSP package measuring 2.1
mm x 2.1 mm.
1
•
•
•
•
•
•
•
•
•
•
•
•
•
Real Buck or Boost Operation with Automatic and
Seamless Transition Between Buck and Boost
Operation
2.3 V to 5.5 V Input Voltage Range
1.0V to 5.5V Output Voltage Range
2 A Continuous Output Current : VIN≥ 2.5 V,
VOUT= 3.5 V
Efficiency up to 96%
2.5MHz Typical Switching Frequency
35-μA Operating Quiescent Current
Integrated Soft Start
Power Save Mode
True Shutdown Function
Output Capacitor Discharge Function
Over-Temperature Protection and Over-Current
Protection
Wide Capacitance Selection
Small 2.1 mm x 2.1 mm, 25-pin WCSP
2 Applications
•
•
•
•
•
Cellular Phones, Smart Phones
Tablets PC
PC and Smart Phone accessories
Point of Load Regulation
Battery Powered Applications
Device Information(1)
PART NUMBER
TPS63027
PACKAGE
DSBGA (25)
BODY SIZE (NOM)
2.1 mm × 2.1 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Typical Application
sp
Efficiency vs Output Current
1uH
L1
L2
VOUT
up to 5.5V / 2A
VIN
2.3V - 5.5V
VIN
10µF
VOUT
AVIN
FB
EN
MODE
GND
AGND
2x
22µF
TPS63027
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS63027
SLVSDK8 – DECEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Typical Application ................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
2
3
3
4
8.1
8.2
8.3
8.4
8.5
8.6
8.7
4
4
4
4
5
6
6
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Typical Characteristics ..............................................
9.3 Feature Description................................................... 7
9.4 Device Functional Modes.......................................... 9
10 Application and Implementation........................ 12
10.1 Application Information.......................................... 12
10.2 Typical Applications ............................................. 12
11 Power Supply Recommendations ..................... 18
12 Layout................................................................... 18
12.1 Layout Guidelines ................................................. 18
12.2 Layout Example .................................................... 18
13 Device and Documentation Support ................. 19
13.1
13.2
13.3
13.4
13.5
13.6
13.7
Detailed Description .............................................. 7
9.1 Overview ................................................................... 7
9.2 Functional Block Diagram ......................................... 7
Device Support ....................................................
Documentation Support .......................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
19
19
19
19
19
14 Mechanical, Packaging, and Orderable
Information ........................................................... 19
5 Revision History
2
DATE
REVISION
NOTES
December 2016
*
Initial release
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SLVSDK8 – DECEMBER 2016
Device Comparison Table
PART NUMBER
VOUT
TPS63027
Adjustable
7 Pin Configuration and Functions
YFF Package
DSBGA 25-Pin
Top View
1
2
3
4
5
A
VIN
VIN
VIN
VIN
AVIN
B
L1
L1
L1
L1
EN
C
GND
GND
GND
MODE
AGND
D
L2
L2
L2
L2
AGND
E
VOUT
VOUT
VOUT
VOUT
FB
Pin Functions
PIN
NAME
VIN
AVIN
L1
EN
GND
MODE
AGND
DESCRIPTION
NO
A1, A2, A3, Supply voltage for power stage
A4
A5
Supply voltage for control stage
B1, B2, B3, Connection for Inductor
B4
B5
C1,C2,C3
C4
C5, D5
Enable input. Set high to enable and low to disable. It must not be left floating
Power Ground
PFM/PWM Mode selection. Set HIGH for PFM mode, set LOW for forced PWM mode. It must not be left
floating
Analog Ground
L2
D1, D2, D3, Connection for Inductor
D4
VOUT
E1, E2, E3, Buck-Boost converter output
E4
FB
E5
Voltage feedback of adjustable version, must be connected to VOUT on fixed output voltage versions
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SLVSDK8 – DECEMBER 2016
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8 Specifications
D/S
8.1 Absolute Maximum Ratings
over junction temperature range (unless otherwise noted) (1)
MIN
Voltage
(2)
VIN, L1, L2, EN, VINA, PFM/PWM, VOUT, FB
–0.3
Continuos average current into L1 (3)
Input current
MAX
UNIT
7
V
2.7
A
Operating junction temperature, TJ
–40
125
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground pin.
Maximum continuos average input current 3.5 A, under those condition do not exceed 105°C for more than 25% operating time.
8.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 Recommended Operating Conditions
(1)
See
MIN
VIN
Input voltage
VOUT
Output voltage
TA
TJ
(1)
NOM
MAX
UNIT
2.3
5.5
1
5.5
V
V
Operating ambient temperature
–40
85
°C
Operating virtual junction temperature
–40
125
°C
Refer to the Application and Implementation section for further information
8.4 Thermal Information
TPS63027
THERMAL METRIC (1)
YFF (DSBGA)
UNIT
25 PINS
RθJA
Junction-to-ambient thermal resistance
62.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
0.4
°C/W
RθJB
Junction-to-board thermal resistance
10.4
°C/W
ψJT
Junction-to-top characterization parameter
0.2
°C/W
ψJB
Junction-to-board characterization parameter
10.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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8.5 Electrical Characteristics
VIN= 2.3 V to 5.5 V, TJ= –40°C to +125°C, typical values are at TA= 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
VIN;LOAD
Minimum input voltage to turn on into full load
IOUT = 2 A
IOUT
Continuous output current (1)
VIN ≥ 2.5 V, VOUT = 3.3 V
Quiescent current, VIN
IOUT = 0 mA, EN = VIN = 3.6 V,
VOUT = 3.3 V TJ = –40°C to +85°C,
not switching (PFM Mode)
Quiescent current, VOUT
IOUT = 0 mA, EN = VIN = 3.6 V,
VOUT = 3.3 V TJ = –40°C to +85°C,
not switching (PFM Mode)
Shutdown current
EN = low, TJ = –40°C to +85°C
Undervoltage lockout threshold
VIN falling
IQ
ISD
UVLO
2.3
1.6
Temperature rising
Thermal shutdown hysteresis
V
V
2
A
35
Undervoltage lockout hysteresis
Thermal shutdown
5.5
2.8
70
μA
12
μA
0.1
2
μA
1.7
2
V
60
mV
140
°C
20
°C
LOGIC SIGNALS EN, PFM/PWM
VIH
High-level input voltage
VIN = 2.3 V to 5.5 V
VIL
Low-level input voltage
VIN = 2.3 V to 5.5 V
1.2
V
Ilkg
Input leakage current
EN = GND or VIN
VOUT
Output voltage range
VIN = 3.6 V, IOUT = 100 mA
VFB
Feedback regulation voltage
VFB
Feedback voltage accuracy
PWM mode
–1%
VFB
Feedback voltage accuracy (2)
PFM mode
–1%
IPWM/PFM
Output current to enter PFM mode
VIN = 3 V; VOUT = 3.3 V
IFB
Feedback input bias current
VFB = 0.8 V
10
RDS;ON(Buc
High-side FET on-resistance
VIN = 3 V, VOUT = 3.3 V
48
mΩ
k)
Low-side FET on-resistance
VIN = 3 V, VOUT = 3.3 V
56
mΩ
RDS;ON(Boo High-side FET on-resistance
st)
Low-side FET on-resistance
VIN = 3 V, VOUT = 3.3 V
33
mΩ
VIN = 3 V, VOUT = 3.3 V
56
mΩ
0.01
0.4
V
0.2
μA
5.5
V
OUTPUT
1
0.8
VIN = 3 V, VOUT = 3.3 V TJ = 65°C to
125°C
V
1%
1.3%
3%
350
mA
100
nA
IIN
Average input current limit (3)
fSW
Switching frequency
RON_DISC
Discharge ON-resistance
EN = low
120
Ω
Line regulation
VIN = 2.8 V to 5.5 V, IOUT = 2 A
7.4
mV/V
Load regulation
VIN= 3.6 V, IOUT = 0 A to 2 A
5
mV/A
(1)
(2)
(3)
3.5
4.5
5
2.5
A
MHz
For minimum output current in a specific working point see Figure 6 and Equation 1 trough Equation 4.
Conditions: L = 1 µH, COUT = 2 × 22 µF.
For variation of this parameter with Input voltage and temperature see Figure 6.
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8.6 Timing Requirements
VIN= 2.3 V to 5.5 V, TJ= –40°C to +125°C, typical values are at TA= 25°C (unless otherwise noted)
MIN
NOM
MAX
UNIT
OUTPUT
tSS
Soft-start time
td
Start up delay
VOUT = EN = low to high, Buck mode VIN = 3.6 V,
VOUT = 3.3 V, IOUT = 2 A
450
µs
VOUT = EN = low to high, Boost mode VIN = 2.8 V,
VOUT = 3.3 V, IOUT = 2 A
700
µs
Time from when EN = high to when device starts
switching
100
µs
8.7 Typical Characteristics
100
Q u ie s c e n t C u r re n t [mA]
90
R e s is ta n c e [mW]
80
70
60
50
40
30
TPS63027 VOUT = 3.3V
20
-40°C
25 °C
85°C
10
0
2,5
6
2,75
3
3,25
3,5
3,75
4
4,25
4,5
4,75
5
5,25
5,5
50
47,5
45
42,5
40
37,5
35
32,5
30
27,5
25
22,5
20
17,5
15
12,5
10
7,5
5
2,5
0
2,5
TPS63027 VOUT = 3.3V
-40°C
25 °C
85°C
2,75
3
3,25
3,5
3,75
4
4,25
4,5
4,75
5
Input Voltage [V]
Input Voltage [V]
Figure 1. High Side FET On-Resistance vs Input Voltage
Figure 2. Quiescent Current vs Input Voltage
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5,5
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9 Detailed Description
9.1 Overview
The TPS63027 use 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over the complete input voltage and output
power range. To regulate the output voltage at all possible input voltage conditions, the device automatically
switches from buck operation to boost operation and back as required by the configuration. It always uses one
active switch, one rectifying switch, one switch is held on, and one switch held off. Therefore, it operates as a
buck converter when the input voltage is higher than the output voltage, and as a boost converter when the input
voltage is lower than the output voltage. There is no mode of operation in which all 4 switches are switching at
the same time. Keeping one switch on and one switch off eliminates their switching losses. The RMS current
through the switches and the inductor is kept at a minimum, to minimize switching and conduction losses.
Controlling the switches this way allows the converter to always keep higher efficiency.
The device provides a seamless transition from buck to boost or from boost to buck operation.
9.2 Functional Block Diagram
L1
L2
VIN
VOUT
Current
Sensor
VIN
VOUT
EN
PGND
_
Oscillator
PFM/PWM
Device
Control
EN
PGND
Gate
Control
Modulator
VINA
PGND
+
_
FB
+
+
-
Temperature
Control
GND
VREF
PGND
PGND
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9.3 Feature Description
9.3.1 Undervoltage Lockout (UVLO)
To avoid mis-operation of the device at low input voltages, an undervoltage lockout is included. UVLO shuts
down the device at low input voltages to ensure proper operation. See eletrical characteristics table for the
dedicated values.
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Feature Description (continued)
9.3.2 Output Discharge Function
When the device is disabled by pulling enable low and the supply voltage is still applied, the internal transistor
use to discharge the output capacitor is turned on, and the output capacitor is discharged until UVLO is reached.
This means, if there is no supply voltage applied the output discharge function is also disabled. The transistor
which is responsible of the discharge function, when turned on, operates like an equivalent 120-Ω resistor,
ensuring typically less than 10ms discharge time for 20-µF output capacitance and a 3.3 V output.
9.3.3 Thermal Shutdown
The device goes into thermal shutdown once the junction temperature exceeds typically 140°C with a 20°C
hysteresis.
9.3.4
Softstart
To minimize inrush current and output voltage overshoot during start up, the device has a Softstart. At turn on,
the input current raises monotonic until the output voltage reaches regulation. During Softstart, the input current
follows the current ramp charging the internal Softstart capacitor. The device smoothly ramps up the input current
bringing the output voltage to its regulated value even if a large capacitor is connected at the output.
The Softstart time is measured as the time from when the EN pin is asserted to when the output voltage has
reached 90% of its nominal value. There is a delay time from when the EN pin is asserted to when the device
starts the switching activity. The Softstart time depends on the load current, the input voltage, and the output
capacitor. The Softstart time in boost mode is longer then the time in buck mode.
The inductor current is able to increase and always assure a soft start unless a real short circuit is applied at the
output.
9.3.5
Short Circuit Protection
The TPS63027 provides short circuit protection to protect itself and the application. When the output voltage
does not increase above 1.2V, the device assumes a short circuit at the output and limits the input current to 4 A.
8
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9.4 Device Functional Modes
9.4.1
Control Loop Description
Ramp and Clock
Generator
0.8V
Figure 3. Average Current Mode Control
The controller circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. Figure 3 shows the
control loop.
The non inverting input of the transconductance amplifier, gmv, is assumed to be constant. The output of gmv
defines the average inductor current. The inductor current is reconstructed by measuring the current through the
high side buck MOSFET. This current corresponds exactly to the inductor current in boost mode. In buck mode
the current is measured during the on time of the same MOSFET. During the off time, the current is
reconstructed internally starting from the peak value at the end of the on time cycle. The average current and the
feedback from the error amplifier gmv forms the correction signal gmc. This correction signal is compared to the
buck and the boost sawtooth ramp giving the PWM signal. Depending on which of the two ramps the gmc output
crosses either the Buck or the Boost stage is initiated. When the input voltage is close to the output voltage, one
buck cycle is always followed by a boost cycle. In this condition, no more than three cycles in a row of the same
mode are allowed. This control method in the buck-boost region ensures a robust control and the highest
efficiency.
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Device Functional Modes (continued)
9.4.2 Power Save Mode Operation
Heavy Load transient step
PFM mode at light load
current
Comparator High
30mV ripple
Vo+1.3%*Vo
Comparator low
Vo
PWM mode
Absolute Voltage drop
with positioning
Figure 4. Power Save Mode Operation
Depending on the load current, in order to provide the best efficiency over the complete load range, the device
works in PWM mode at load currents of typically 350mA or higher. At lighter loads, the device switches
automatically into Power Save Mode to reduce power consumption and extend battery life. The MODE pin is
used to select between the two different operation modes. To enable Power Save Mode, the MODE pin must be
set HIGH.
During Power Save Mode, the part operates with a reduced switching frequency and lowest supply current to
maintain high efficiency. The output voltage is monitored with a comparator at every clock cycle by the thresholds
comp low and comp high. When the device enters Power Save Mode, the converter stops operating and the
output voltage drops. The slope of the output voltage depends on the load and the output capacitance. When the
output voltage reaches the comp low threshold, at the next clock cycle the device ramps up the output voltage
again, by starting operation. Operation can last for one or several pulses until the comp high threshold is
reached. At the next clock cycle, if the load is still lower than about 350mA, the device switches off again and the
same operation is repeated. Instead, if at the next clock cycle, the load is above 350mA, the device automatically
switches to PWM mode.
In order to keep high efficiency in PFM mode, there is only one comparator active to keep the output voltage
regulated. The AC ripple in this condition is increased, compared to the PWM mode. The amplitude of this
voltage ripple is typically 30 mV pk-pk, with 2-µF effective output capacitance. In order to avoid a critical voltage
drop when switching from 0A to full load, the output voltage in PFM mode is typically 1.3% above the nominal
value in PWM mode. This is called Dynamic Voltage Positioning and allows the converter to operate with a small
output capacitor and still have a low absolute voltage drop during heavy load transients.
Power Save Mode is disabled by setting the MODE pin LOW.
10
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Device Functional Modes (continued)
9.4.3 Current Limit
The current limit variation depends on the difference between the input and output voltage. The maximum current
limit value is at the highest difference.
Given the curves provided in Figure 6, it is possible to calculate the output current reached in boost mode, using
Equation 1 and Equation 2 and in buck mode using Equation 3 and Equation 4.
Duty Cycle Boost
Output Current Boost
Duty Cycle Buck
Output Current Buck
D=
V
-V
IN
OUT
V
OUT
(1)
IOUT = 0 x IIN (1-D)
D=
(2)
V
OUT
V
IN
(3)
IOUT = ( 0 x IIN ) / D
where
•
•
η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
IIN= Minimum average input current (Figure 6)
(4)
9.4.4 Supply and Ground
The TPS63027 provides two input pins (VIN and AVIN) and two ground pins (GND and AGND).
The VIN pin supplies the input power, while the AVIN pin provides voltage for the control circuits. A similar
approach is used for the ground pins. AGND and GND are used to avoid ground shift problems due to the high
currents in the switches. The reference for all control functions is the AGND pin. The power switches are
connected to GND. Both grounds must be connected on the PCB at only one point, ideally, close to the AGND
pin.
9.4.5 Device Enable
The device starts operation when the EN pin is set high. The device enters shutdown mode when the EN pin is
set low. In shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load
is disconnected from the input.
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The TPS63027 are high efficiency, low quiescent current buck-boost converters suitable for application where the
input voltage is higher, lower or equal to the output. Output currents can go as high as 2A in boost mode and as
high as 5A in buck mode. The maximum average current in the switches is limited to a typical value of 4.5 A.
10.2 Typical Applications
L1
1uH
L1
L2
VOUT
3.5V
VIN
2.3V - 5.5V
VIN
VOUT
R1
510kΩ
C1
10µF
AVIN
FB
C2
22µF
R2
150kΩ
EN
MODE
GND
AGND
C3
22µF
TPS63027
Figure 5. 3.3-V Output Voltage
10.2.1 Design Requirements
The design guideline provides a component selection to operate the device within the recommended operating
conditions.
Table 1 shows the list of components for the Application Characteristic Curves.
Table 1. Components for Application Characteristic Curves (1)
REFERENCE
DESCRIPTION
MANUFACTURER
TPS63027
Texas Instruments
L1
1 μH, 8.75A, 13mΩ, SMD
XAL4020-102MEB, Coilcraft
C1
10 μF 6.3V, 0603, X5R ceramic
Standard
C2
47 μF 6.3V, 0603, X5R ceramic
Standard
R1
510kΩ
Standard
R2
150kΩ
Standard
(1)
See Third-Party Products Discalimer
12
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10.2.2 Detailed Design Procedure
The first step is the selection of the output filter components. To simplify this process Table 2 outlines possible
inductor and capacitor value combinations.
10.2.2.1 Output Filter Design
Table 2. Matrix of Output Capacitor and Inductor Combinations
NOMINAL OUTPUT CAPACITOR VALUE [µF] (2)
NOMINAL
INDUCTOR
VALUE [µH] (1)
2x22
47
66
88
100
0.680
+
+
+
+
+
1.0
+ (3)
+
+
+
+
+
+
+
1.5
(1)
(2)
(3)
Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by 20% and –30%.
Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by 20% and –50%.
Typical application. Other check mark indicates recommended filter combinations
10.2.2.2 Inductor Selection
The inductor selection is affected by several parameter like inductor ripple current, output voltage ripple,
transition point into Power Save Mode, and efficiency. See Table 3 for typical inductors.
Table 3. List of Recommended Inductors (1)
(1)
INDUCTOR VALUE
COMPONENT SUPPLIER
SIZE (LxWxH mm)
Isat/DCR
1 µH
Coilcraft XAL4020-102ME
4 X 4 X 2.10
4.5A/10mΩ
1 µH
Toko, DFE322512C
3.2 X 2.5 X 1.2
4.7A/34mΩ
1 µH
TDK, SPM4012
4.4 X 4.1 X 1.2
4.1A/38mΩ
1 µH
Wuerth, 74438334010
3 X 3 X 1.2
6.6A/42.10mΩ
0.6 µH
Coilcraft XFL4012-601ME
4 X 4 X 1.2
5A/17.40mΩ
0.68µH
Wuerth,744383340068
3 X 3 X 1.2
7.7A/36mΩ
See Third-Party Products Desclaimer
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high-switching frequencies, the core material has a high impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the peak current for
the inductor in steady state operation is calculated using Equation 6. Only the equation which defines the switch
current in boost mode is shown, because this provides the highest value of current and represents the critical
current value for selecting the right inductor.
Duty Cycle Boost
IPEAK
D=
V
-V
IN
OUT
V
OUT
(5)
Iout
Vin ´ D
=
+
η ´ (1 - D)
2 ´ f ´ L
where
•
•
•
•
D =Duty Cycle in Boost mode
f = Converter switching frequency (typical 2.5MHz)
L = Inductor value
η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
(6)
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It's recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 6. Possible inductors are listed in Table 3.
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10.2.2.3 Capacitor Selection
10.2.2.3.1
Input Capacitor
At least a 10μF input capacitor is recommended to improve line transient behavior of the regulator and EMI
behavior of the total power supply circuit. An X5R or X7R ceramic capacitor placed as close as possible to the
VIN and PGND pins of the IC is recommended. This capacitance can be increased without limit. If the input
supply is located more than a few inches from the TPS63027 converter additional bulk capacitance may be
required in addition to the ceramic bypass capacitors. An electrolytic or tantalum capacitor with a value of 47 μF
is a typical choice.
10.2.2.3.2
Output Capacitor
For the output capacitor, use of a small ceramic capacitors placed as close as possible to the VOUT and PGND
pins of the IC is recommended. The recommended effective output capacitance value is 20 µF with a variance as
outlined in Table 2 . This translates into a 44uF nominal cpacitor (6.3V rated) for output voltages up to 3.5V.
There is also no upper limit for the output capacitance value. Larger capacitors causes lower output voltage
ripple as well as lower output voltage drop during load transients.
10.2.2.4 Setting The Output Voltage
When the adjustable output voltage version TPS63027 is used, the output voltage is set by an external resistor
divider. The resistor divider must be connected between VOUT, FB and GND. When the output voltage is
regulated properly, the typical value of the voltage at the FB pin is 800 mV. The current through the resistive
divider should be about 10 times greater than the current into the FB pin. The typical current into the FB pin is
0.1 μA, and the voltage across the resistor between FB and GND, R2, is typically 800 mV. Based on these two
values, the recommended value for R2 should be lower than 180 kΩ, in order to set the divider current at 4μA or
higher. It is recommended to keep the value for this resistor in the range of 180kΩ. From that, the value of the
resistor connected between VOUT and FB, R1, depending on the needed output voltage (VOUT), can be
calculated using Equation 7:
æV
ö
R1 = R2 × ç OUT - 1÷
V
è FB
ø
14
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SLVSDK8 – DECEMBER 2016
10.2.3 Application Curves
5
7
4,5
6
4
3,5
C u rr e n t [A ]
C u r re n t [A ]
5
4
3
3
2,5
2
1,5
2
TPS63027 VOUT = 3.3V
0
2,5
1
-40°C
25 °C
85°C
1
2,75
3
3,25
3,5
3,75
4
4,25
4,5
4,75
5
5,25
3.3 VOUT
3.5 VOUT
4A Load
0,5
0
2,5
5,5
3
3,5
Input Voltage [V]
4
4,5
5
5,5
Input Voltage [V]
Figure 6. Average Input Current vs Input Voltage
Figure 7. Maximum Output Current for a 4A Load
3,6
V o lta g e [V ]
3,5
3,4
3,3
3,2
TPS63027 VOUT = 3.3V
2.5VIN
3.0VIN
3.3VIN
3.7VIN
4.3VIN
3,1
3
1m
Figure 8. Efficiency vs Output Current
10m
100m
Current [A]
1
Figure 9. Output Voltage vs Output Current
L1 (5V/DIV)
L1 (5V/DIV)
0V
0V
L2 (5V/DIV)
L2 (5V/DIV)
0V
0V
VOUT (50mV/DIV)
VOUT (50mV/DIV)
3.5V
3.5V
ICOIL (500mA/DIV)
ICOIL (500mA/DIV)
0A
0A
Timebase 1us/DIV
Figure 10. Output Voltage Ripple in Buck-Boost Mode, VIN
= 3.6 V, VOUT = 3.5 V, no Load
Copyright © 2016, Texas Instruments Incorporated
Timebase 400ns/DIV
Figure 11. Switching Waveforms in Boost Mode, VIN = 3.0
V, VOUT = 3.5 V, 1-A Load
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L1 (5V/DIV)
L1 (5V/DIV)
0V
0V
L2 (5V/DIV)
L2 (5V/DIV)
0V
0V
VOUT (50mV/DIV)
VOUT (50mV/DIV)
3.5V
3.5V
ICOIL (500mA/DIV)
ICOIL (500mA/DIV)
0A
0A
Timebase 400ns/DIV
Timebase 400ns/DIV
Figure 12. Switching Waveforms in Buck Mode, VIN = 4.3
V, VOUT = 3.5 V, 1-A Load
Figure 13. Switching Waveforms in Buck-Boost Mode, VIN
= 3.55 V, VOUT = 3.5 V, 1-A Load
VOUT (200mV/DIV)
VOUT (200mV/DIV)
3.5V
3.5V
Load Current (1A/DIV)
Load Current (1A/DIV)
0A
0A
Timebase 200us/DIV
Timebase 200us/DIV
Figure 15. Load Transient Response Buck Mode, VIN = 4.3
V, VOUT = 3.5 V
Figure 14. Load Transient Response Boost Mode, VIN =
3.0 V, VOUT = 3.5 V
VIN (500mV/DIV)
VOUT (100mV/DIV)
3.5V
VOUT (100mV/DIV)
3.5V
Load Current (500mA/DIV)
0A
Timebase 200us/DIV
Figure 16. Load Transient Response, VIN = 3.5 V, VOUT =
3.5 V, PFM Mode
16
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Timebase 1ms/DIV
Figure 17. Line Sweep Response, VOUT = 3.5 V, 2-A Load
Copyright © 2016, Texas Instruments Incorporated
TPS63027
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SLVSDK8 – DECEMBER 2016
EN (5V/DIV)
VIN (500mV/DIV)
VOUT (1V/DIV)
3.5V
VOUT (50mV/DIV)
ICOIL (500mA/DIV)
0V
Timebase 1ms/DIV
Timebase 100µs/DIV
Figure 18. Line Transient Response,
VOUT = 3.5 V, 1-A Load
Figure 19. Start Up After Enable, VIN = 3.7 V, VOUT = 3.5
V, no Load
EN (5V/DIV)
VOUT (1V/DIV)
ICOIL (500mA/DIV)
Timebase 100µs/DIV
Figure 20. Start Up After Enable, VIN = 3.7 V, VOUT = 3.5 V, 1-A Load
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11 Power Supply Recommendations
The TPS63027 device family has no special requirements for its input power supply. The input power supply’s
output current needs to be rated according to the supply voltage, output voltage and output current of the
TPS63027.
12 Layout
12.1 Layout Guidelines
The PCB layout is an important step to maintain the high performance of the TPS63027 devices.
• Place input and output capacitors as close as possible to the IC. Traces need to be kept short. Routing wide
and direct traces to the input and output capacitor results in low trace resistance and low parasitic inductance.
• Use a common-power GND
• Use separate traces for the supply voltage of the power stage; and, the supply voltage of the analog stage.
• The sense trace connected to FB is signal trace. Keep these traces away from L1 and L2 nodes.
AVIN
CIN
R2
GND
FB
R1
VIN
MODE
EN
GND
12.2 Layout Example
VOUT
COUT
CIN
GND
COUT
L
Figure 21. TPS63027 Layout
18
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TPS63027
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SLVSDK8 – DECEMBER 2016
13 Device and Documentation Support
13.1 Device Support
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.2 Documentation Support
13.2.1 Related Documentation
For related documentation see the following:
• TPS63027EVM-813 User's Guide, TPS63027 High Current, High Efficiency Single Inductor Buck-Boost
Converter, SLVUA24
13.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS63027YFFR
ACTIVE
DSBGA
YFF
25
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
TPS
63027
TPS63027YFFT
ACTIVE
DSBGA
YFF
25
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
TPS
63027
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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