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TPS63030, TPS63031
SLVS696D – OCTOBER 2008 – REVISED APRIL 2020
TPS6303x High Efficiency Single Inductor Buck-Boost Converter With 1-A Switches
1 Features
3 Description
•
•
The TPS6303x devices provide a power supply
solution for products powered by either a two-cell or
three-cell alkaline, NiCd or NiMH battery, or a onecell Li-ion or Li-polymer battery. Output currents can
go as high as 600 mA while using a single-cell Li-ion
or Li-polymer battery, and discharge it down to 2.5 V
or lower. The buck-boost converter is based on a
fixed-frequency, pulse width modulation (PWM)
controller using synchronous rectification to obtain
maximum efficiency. At low-load currents, the
converter enters power-save mode to maintain high
efficiency over a wide load current range. The powersave mode can be disabled, forcing the converter to
operate at a fixed switching frequency. The maximum
average current in the switches is limited to a typical
value of 1000 mA. The output voltage is
programmable using an external resistor divider, or is
fixed internally on the chip. The converter can be
disabled to minimize battery drain. During shutdown,
the load is disconnected from the battery.
1
•
•
•
•
•
•
•
•
•
•
Input voltage range: 1.8 V to 5.5 V
Fixed and adjustable output voltage options from
1.2 V to 5.5 V
Up to 96% efficiency
800-mA Output current at 3.3 V in step-down
mode (VIN = 3.6 V to 5.5 V)
Up to 500-mA output current at 3.3 V in boost
mode (VIN > 2.4 V)
Automatic transition between step-down and
boost mode
Device quiescent current less than 50 μA
Power-save mode for improved efficiency at lowoutput power
Forced fixed frequency operation and
synchronization possible
Load disconnect during shutdown
Overtemperature protection
Available in a small 2.5-mm × 2.5-mm 10-pin
VSON package (QFN)
2 Applications
•
All two-cell and three-cell alkaline, NiCd or NiMH,
or single-cell Li battery powered products
– Smartphone
– Portable media player
– IP network camera
– Blood glucose monitor
– Portable data terminal
The TPS6303x devices operate over a free air
temperature range of –40°C to 85°C. The devices are
packaged in a 10-pin VSON package measuring 2.5mm × 2.5-mm (DSK).
Device Information(1)
PART NUMBER
TPS63030
TPS63031
PACKAGE
VSON (10)
BODY SIZE (NOM)
2.50 mm x 2.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Schematic
Efficiency versus Output Current
L1
100
1.5 µH
VI = 3.6 V, VO = 3.3 V
90
L2
L1
VIN
C1
10 µF
VOUT
VINA
C3
0.1µF
EN
FB
PS/SYNC
GND
PGND
TPS63031
C2
2X10 µF
VOUT
3.3 V up to
800 mA
80
70
Efficiency - %
VIN
1.8 V to
5.5 V
VI = 2.4 V, VO = 3.3 V
60
50
40
30
20
10
0
0.1
TPS63031
Power Save Enabled
100
1
10
IO - Output Current - mA
1000
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS63030, TPS63031
SLVS696D – OCTOBER 2008 – REVISED APRIL 2020
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Output Voltage Options ........................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 7
8.1
8.2
8.3
8.4
Overview ...................................................................
Functional Block Diagrams .......................................
Feature Description...................................................
Device Functional Modes..........................................
7
7
8
9
9
Application and Implementation ........................ 10
9.1 Application Information............................................ 10
9.2 Typical Application .................................................. 10
10 Power Supply Recommendations ..................... 17
11 Layout................................................................... 17
11.1 Layout Guidelines ................................................. 17
11.2 Layout Example .................................................... 17
11.3 Thermal Considerations ........................................ 17
12 Device and Documentation Support ................. 18
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Device Support......................................................
Documentation Support ........................................
Related Links ........................................................
Support Resources ...............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
18
18
18
18
13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (August 2014) to Revision D
Page
•
Changed the max average switch current limit to 1300 mA .................................................................................................. 5
•
Updated the Soft Start and Short Circuit Protection section .................................................................................................. 9
•
Corrected typos .................................................................................................................................................................... 10
•
Added Table 4 ..................................................................................................................................................................... 13
•
Corrected to TPS63030 ....................................................................................................................................................... 14
•
Corrected to TPS63030 ....................................................................................................................................................... 14
Changes from Revision B (March 2012) to Revision C
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
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SLVS696D – OCTOBER 2008 – REVISED APRIL 2020
5 Output Voltage Options (1)
Table 1. Output Voltage Options
OUTPUT VOLTAGE DC/DC
PACKAGE MARKING
Adjustable
CEF
3.3 V
CEF
(1)
(1)
PACKAGE
10-pin VSON
PART NUMBER (1)
TPS63030DSK
TPS63031DSK
Contact the factory to check availability of other fixed output voltage versions.
The DSK package is available taped and reeled. Add R suffix to device type (for example, TPS63030DSKR) to order quantities of 3000
devices per reel. Add T suffix to device type (for example, TPS63030DSKT) to order quantities of 250 devices per reel.
6 Pin Configuration and Functions
DSK Package
10-Pin VSON
Top View
VOUT
L2
PGND
L1
VIN
(1)
Exposed
Thermal
(1)
Pad
FB
GND
VINA
PS/SYNC
EN
The exposed thermal pad is connected to PGND.
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
EN
6
IN
Enable input (1 enabled, 0 disabled)
FB
10
IN
Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage versions
GND
9
—
Control / logic ground
L1
4
IN
Connection for inductor
L2
2
IN
Connection for inductor
PGND
3
—
Power ground
PS/SYNC
7
IN
Enable / disable power save mode (1 disabled, 0 enabled, clock signal for synchronization)
VIN
5
IN
Supply voltage for power stage
VINA
8
IN
Supply voltage for control stage
VOUT
1
OUT
Exposed
Thermal Pad
—
—
Buck-boost converter output
The exposed thermal pad is connected to PGND.
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7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
Input voltage on VIN, VINA, L1, L2, VOUT, ILIM, EN, FB, SS
–0.3
7
V
Operating virtual junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
7.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
2000
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2)
1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
MAX
Supply voltage at VIN, VINA
1.8
5.5
UNIT
V
Operating free air temperature, TA
–40
85
°C
Operating virtual junction temperature, TJ
–40
125
°C
7.4 Thermal Information
TPS6303x
THERMAL METRIC (1)
DSK (VSON)
UNIT
10 PINS
RθJA
Junction-to-ambient thermal resistance
60.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
—
°C/W
RθJB
Junction-to-board thermal resistance
26
°C/W
ψJT
Junction-to-top characterization parameter
—
°C/W
ψJB
Junction-to-board characterization parameter
—
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
6.3
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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SLVS696D – OCTOBER 2008 – REVISED APRIL 2020
7.5 Electrical Characteristics
over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature
range of 25°C) (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC/DC STAGE
VIN
Input voltage range
VIN
Minimum input voltage for start-up
VIN
VOUT
1.8
5.5
V
1.6
1.8
1.9
V
Minimum input voltage for start-up
1.6
1.8
2.0
V
TPS63030 output voltage range
1.2
5.5
V
0°C ≤ TA ≤ 85°C
Minimum duty cycle in step-down conversion
VFB
VFB
f
TPS63030 feedback voltage
30%
PS/SYNC = VIN
TPS63031 output voltage
Iq
IS
505
3.267
3.3
3.333
PS/SYNC = GND Referenced to 500 mV
-3%
TPS63031 output voltage
PS/SYNC = GND Referenced to 3.3 V
-3%
Frequency range for synchronization
ISW
500
TPS63030 feedback voltage
Oscillator frequency
40%
495
mV
V
+6%
+6%
2200
2400
2600
kHz
2200
2400
2600
kHz
900
1000
1300
Average switch current limit
VIN = VINA = 3.6 V, TA = 25°C
High-side switch ON-resistance
VIN = VINA = 3.6 V
200
mΩ
Low-side switch ON-resistance
VIN = VINA = 3.6 V
200
mΩ
Maximum line regulation
0.5%
Maximum load regulation
0.5%
Quiescent
current
VIN and VINA
IOUT = 0 mA, VEN = VIN = VINA = 3.6 V,
VOUT = 3.3 V
VOUT
TPS63031 FB input impedance
VEN = HIGH
Shutdown current
VEN = 0 V, VIN = VINA = 3.6 V
25
35
4
6
1
mA
μA
μA
MΩ
0.1
0.9
μA
1.5
1.6
V
0.4
V
CONTROL STAGE
VUVLO
Under voltage lockout threshold
VIL
EN, PS/SYNC input low voltage
VIH
EN, PS/SYNC input high voltage
VINA voltage decreasing
1.4
1.2
EN, PS/SYNC input current
Clamped on GND or VINA
V
0.01
0.1
μA
Overtemperature protection
140
°C
Overtemperature hysteresis
20
°C
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7.6 Typical Characteristics
1200
1100
TPS63030
TPS63031
VO = 2.5 V
1000
1000
Maximum Output Current - mA
Maximum Output Current - mA
900
800
700
VO = 4.5 V
600
500
400
300
200
VO = 3.3 V
800
600
400
200
100
0
1.8
2.2
2.6
3
3.4 3.8 4.2 4.6
VI - Input Voltage - V
5
5.4
Figure 1. Maximum Output Current versus Input Voltage,
TPS63030
6
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1.8 2.2
2.6
3
3.4 3.8 4.2 4.6
VI - Input Voltage - V
5
5.4
Figure 2. Maximum Output Current versus Input Voltage,
TPS63031
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SLVS696D – OCTOBER 2008 – REVISED APRIL 2020
8 Detailed Description
8.1 Overview
The controlling circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. The controller also uses
input and output voltage feed forward. Changes of input and output voltage are monitored and can immediately
change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier
gets its feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must be
connected to that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense the
voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage is compared
with the internal reference voltage to generate a stable and accurate output voltage.
The controller circuit also senses the average input current as well as the peak input current. With this, maximum
input power can be controlled as well as the maximum peak current to achieve a safe and stable operation under
all possible conditions. To finally protect the device from overheating, an internal temperature sensor is
implemented.
The device uses four internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range.
To avoid ground shift problems due to the high currents in the switches, two separate ground pins, GND and
PGND, are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point ideally close to the GND pin. Due to the
4-switch topology, the load is always disconnected from the input during shutdown of the converter.
8.2 Functional Block Diagrams
L1
L2
VIN
VOUT
Current
Sensor
VINA
VBAT
VOUT
PGND PGND
Gate
Control
_
VINA
Modulator
+
+
_
FB
VREF
Oscillator
PS/SYNC
+
-
Device
Control
EN
Temperature
Control
PGND
PGND
GND
Figure 3. Functional Block Diagram (TPS63030)
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Functional Block Diagrams (continued)
L1
L2
VIN
VOUT
Current
Sensor
VINA
VBAT
VOUT
VINA
PGND PGND
Gate
Control
FB
_
Modulator
+
_
+
Oscillator
PS/SYNC
+
-
VREF
Device
Control
EN
Temperature
Control
PGND
PGND
GND
Figure 4. Functional Block Diagram (TPS63031)
8.3 Feature Description
8.3.1 Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load is
disconnected from the input. This also means that the output voltage can drop below the input voltage during
shutdown. During the start-up of the converter, the duty cycle and the peak current are limited to avoid high peak
currents flowing from the input.
8.3.2 Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage at VINA is lower than
approximately its threshold (see the Electrical Characteristics). When in operation, the device automatically
enters the shutdown mode if the voltage at VINA drops below the undervoltage lockout threshold. The device
automatically restarts if the input voltage recovers to the minimum operating input voltage.
8.3.3 Overtemperature Protection
The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature
exceeds the programmed threshold (see the Electrical Characteristics), the device stops operating. As soon as
the IC temperature has decreased below the programmed threshold, it starts operating again. There is a built-in
hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold.
8
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8.4 Device Functional Modes
8.4.1 Soft Start and Short Circuit Protection
After being enabled, the device starts operating. The average current limit ramps up from zero to the nominal
current limit value. Thus, the output voltage overshoot at start-up, as well as the inrush current, is kept at a
minimum. The device ramps up the output voltage in a controlled manner, even if a very large capacitor is
connected at the output.
At an overload or short circuit condition at the output, the average current limit protects the device itself and the
application. Higher change rates of output current or input voltage can trigger an additional built-in short circuit
protection mode, which reduces the current limit to less than 50% of the nominal current limit. In this mode, the
switching frequency can be reduced as well.
8.4.2 Buck-Boost Operation
To regulate the output voltage properly at all possible input voltage conditions, the device automatically switches
from step-down operation to boost operation and back as required by the configuration. It always uses one active
switch, one rectifying switch, one switch permanently on, and one switch permanently off. Therefore, it operates
as a step-down converter (buck) when the input voltage is higher than the output voltage, and as a boost
converter when the input voltage is lower than the output voltage. There is no mode of operation where all four
switches are permanently switching. Controlling the switches this way allows the converter to maintain high
efficiency at the most important point of operation, when input voltage is close to the output voltage. The RMS
current through the switches and the inductor is kept at a minimum to minimize switching and conduction losses.
Switching losses are also kept low by using only one active and one passive switch. For the remaining two
switches, one is kept permanently on and the other is kept permanently off, thus causing no switching losses.
8.4.3 Power-Save Mode and Synchronization
The PS/SYNC pin can be used to select different operation modes. To enable power-save, PS/SYNC must be
set low. Power-save mode is used to improve efficiency at light load. If power-save mode is enabled, the
converter stops operating if the average inductor current gets lower than about 100 mA and the output voltage is
at or above its nominal value. If the output voltage decreases below its nominal value, the device ramps up the
output voltage again by starting operation using a programmed average inductor current higher than required by
the current load condition. Operation can last for one or several pulses. The converter again stops operating
once the conditions for stopping operation are met again.
The power save mode can be disabled by programming high at the PS/SYNC. Connecting a clock signal at
PS/SYNC forces the device to synchronize to the connected clock frequency. Synchronization is done by a
phase-locked loop (PLL), so synchronizing to lower and higher frequencies compared to the internal clock works
without any issues. The PLL can also tolerate missing clock pulses without the converter malfunctioning. The
PS/SYNC input supports standard logic thresholds.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TPS63030 and TPS63031 are buck-boost converters suitable for applications that need a regulated output
voltage from an input supply that is higher or lower than the desired output voltage.
9.2 Typical Application
L1
1.5 µH
L1
VIN
1.8 V to
5.5 V
L2
VIN
C1
10 µF
VOUT
3.3 V up to
800 mA
VOUT
VINA
R1
C3
0.1 µF
EN
C2
2X10 µF
FB
PS/SYNC
R2
PGND
GND
TPS63030
Figure 5. Typical Application Circuit for Adjustable Output Voltage
L1
1.5 µH
VIN
1.8 V to
5.5 V
L1
L2
VIN
C1
10 µF
VOUT
VINA
C3
0.1µF
EN
C2
2X10 µF
FB
VOUT
3.3 V up to
800 mA
PS/SYNC
GND
PGND
TPS63031
Figure 6. Typical Application Circuit for 3.3-V Fixed Output Voltage Option
9.2.1 Design Requirements
The design guideline provides a component selection to operate the device within the Recommended Operating
Conditions.
Table 2 shows ths list of components for the application curves.
10
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Typical Application (continued)
Table 2. List of Components
REFERENCE
DESCRIPTION
MANUFACTURER
TPS6303 0 / 1
Texas Instruments
L1
1.5 μH, 3 mm x 3 mm x 1.5 mm
LPS3015-1R5, Coilcraft
C1
10 μF 6.3V, 0603, X7R ceramic
GRM188R60J106KME84D, Murata
C2
2 × 10 μF 6.3V, 0603, X7R ceramic
GRM188R60J106KME84D, Murata
C3
0.1 μF, X7R ceramic
R1, R2
Depending on the output voltage at TPS63030, not used at TPS63031
9.2.2 Detailed Design Procedure
9.2.2.1 Programming the Output Voltage
Within the TPS6303x family, there are fixed and adjustable output voltage versions available. To properly
configure the fixed output voltage devices, the FB pin is used to sense the output voltage. This means that it
must be connected directly to VOUT. At the adjustable output voltage versions, an external resistor divider is
used to adjust the output voltage. The resistor divider must be connected between VOUT, FB, and GND. When
the output voltage is regulated properly, the typical value of the voltage at the FB pin is 500 mV. The maximum
recommended value for the output voltage is 5.5 V. The current through the resistive divider must be about 100
times greater than the current into the FB pin. The typical current into the FB pin is 0.01 μA, and the voltage
across the resistor between FB and GND, R2, is typically 500 mV. Based on those two values, the recommended
value for R2 must be lower than 500 kΩ, in order to set the divider current at 1 μA or higher. TI recommends to
keep the value for this resistor in the range of 200 kΩ. From that, the value of the resistor connected between
VOUT and FB, R1, depending on the needed output voltage (VOUT), can be calculated using Equation 1.
R 1 + R2
ǒ
VOUT
V FB
Ǔ
*1
(1)
9.2.2.2 Inductor Selection
The inductor selection is affected by several parameter like inductor ripple current, output voltage ripple,
transition point into power-save mode, and efficiency. See Table 3 for typical inductors.
Table 3. List of Recommended Inductors
VENDOR
INDUCTOR SERIES
LPS3015
Coilcraft
EPL3010
Murata
LQH3NP
Tajo Yuden
NR3015
For high efficiencies, the inductor must have a low DC resistance to minimize conduction losses. Especially at
high-switching frequencies, the core material has a high impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the peak current for
the inductor in steady state operation is calculated using Equation 3. Only the equation which defines the switch
current in boost mode is shown, because this provides the highest value of current and represents the critical
current value for selecting the right inductor.
Duty Cycle Boost
IPEAK =
D=
V
-V
IN
OUT
V
OUT
(2)
Iout
Vin ´ D
+
η ´ (1 - D)
2 ´ f ´ L
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where
•
•
•
•
D = duty cycle in boost mode
f = converter switching frequency (typical 2.5 MHz)
L = inductor value
η = estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
(3)
NOTE
The calculation must be done for the minimum input voltage which is possible to have in
boost mode.
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. TI recommends to choose an inductor with a saturation current 20% higher than
the value calculated using Equation 3. Possible inductors are listed in Table 3.
9.2.2.3 Capacitor Selection
9.2.2.3.1
Input Capacitor
At least a 4.7-μF input capacitor is recommended to improve transient behavior of the regulator and EMI
behavior of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and PGND
pins of the IC is recommended.
9.2.2.3.2
Bypass Capacitor
To make sure that the internal control circuits are supplied with a stable low noise supply voltage, a capacitor can
be connected between VINA and GND. Using a ceramic capacitor with a value of 0.1 μF is recommended. The
value of this capacitor should not be higher than 0.22 μF.
9.2.2.3.3
Output Capacitor
For the output capacitor, use of a small ceramic capacitors placed as close as possible to the VOUT and PGND
pins of the IC is recommended. The recommended nominal output capacitance value is 10 µF.
There is also no upper limit for the output capacitance value. Larger capacitors causes lower output voltage
ripple as well as lower output voltage drop during load transients.
12
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9.2.3 Application Curves
Table 4. Application Curves
PARAMETER
CONDITION
FIGURE
Efficiency versus Output Current, TPS63030, Power-Save Enabled
Figure 7
Efficiency versus Output Current, TPS63030, Power-Save Disabled
Figure 8
Efficiency versus Output Current, TPS63031, Power-Save Enabled
Figure 9
Efficiency versus Output Current, TPS63031, Power-Save Disabled
Figure 10
Efficiency versus Input Voltage, TPS63030, Power-Save Enabled
VOUT = 2.5 V
Figure 11
Efficiency versus Input Voltage, TPS63030, Power-Save Enabled
VOUT = 4.5 V
Figure 13
Efficiency versus Input Voltage, TPS63030, Power-Save Disabled
VOUT = 2.5 V
Figure 13
Efficiency versus Input Voltage, TPS63030, Power-Save Disabled
VOUT = 3.3 V
Figure 14
Efficiency versus Input Voltage, TPS63031, Power-Save Enabled
VOUT = 3.3 V
Figure 15
Efficiency versus Input Voltage, TPS63031, Power-Save Disabled
VOUT = 3.3 V
Figure 16
Output Voltage versus Output Current, TPS63031, Power-Save Disabled
VIN = 3.6 V / VOUT = 2.5 V
Figure 17
Output Voltage versus Output Current, TPS63031, Power Save Disabled
VIN = 3.6 V / VOUT = 3.3 V
Figure 19
Load Transient Response, TPS63031
VIN = 2.4 V / VOUT = 3.3 V
Figure 20
Load Transient Response, TPS63031
VIN = 4.2 V / VOUT = 3.3 V
Figure 21
Line Transient Response, TPS63031
VIN = 3.0 V / VOUT = 3.3 V
Figure 22
Start-up After Enable, TPS63031
VIN = 2.4 V / VOUT = 3.3 V
Figure 23
Start-up After Enable, TPS63031
VIN = 4.2 V / VOUT = 3.3 V
Figure 24
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100
100
VI = 3.6 V, VO = 2.5 V
90
80
80
VI = 3.6 V, VO = 4.5 V
70
VI = 2.4 V, VO = 4.5 V
Efficiency - %
Efficiency - %
70
VI = 3.6 V, VO = 4.5 V
60
50
VI = 2.4 V, VO = 2.5 V
40
60
40
30
20
20
TPS63030
Power Save Enabled
10
0
0.1
1
10
100
IO - Output Current - mA
100
0
0.1
1000
80
80
70
VI = 3.6 V, VO = 3.3 V
70
Efficiency - %
VI = 2.4 V, VO = 3.3 V
60
50
40
60
VI = 2.4 V, VO = 3.3 V
50
40
30
30
20
20
TPS63031
Power Save Enabled
10
0
0.1
100
1
10
IO - Output Current - mA
0
0.1
1000
1
10
100
IO - Output Current - mA
1000
Figure 10. Efficiency versus Output Current, TPS63031,
Power-Save Disabled
100
IO = 100 mA
VO = 2.5 V
TPS63031
Power Save Disabled
10
Figure 9. Efficiency versus Output Current, TPS63031,
Power-Save Enabled
VO = 4.5 V
90
IO = 100 mA
90
80
80
IO = 10 mA
70
Efficiency - %
IO = 500 mA
60
IO = 10 mA
70
50
40
IO = 500 mA
60
50
40
30
30
20
20
TPS63030
Power Save Enabled
10
2.2
2.6
3
3.4 3.8 4.2 4.6
VI - Input Voltage - V
5
5.4
TPS63030
Power Save Enabled
10
0
1.8
2.2
VOUT = 2.5 V
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2.6
3 3.4 3.8 4.2 4.6
VI - Input Voltage - V
5
5.4
VOUT = 4.5 V
Figure 11. Efficiency versus Input Voltage, TPS63030,
Power-Save Enabled
14
1000
10
100
IO - Output Current - mA
100
VI = 3.6 V, VO = 3.3 V
90
0
1.8
1
Figure 8. Efficiency versus Output Current, TPS63030,
Power-Save Disabled
90
100
TPS63030
Power Save Disabled
10
Figure 7. Efficiency versus Output Current, TPS63030,
Power-Save Enabled
Efficiency - %
VI = 2.4 V, VO = 4.5 V
50
30
Efficiency - %
VI = 3.6 V, VO = 2.5 V
VI = 2.4 V, VO = 2.5 V
90
Figure 12. Efficiency versus Input Voltage, TPS63030,
Power-Save Enabled
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100
VO = 2.5 V
100
IO = 100 mA
90
80
Efficiency - %
70
60
50
IO = 10 mA
40
30
60
IO = 500 mA
50
IO = 10 mA
40
30
20
20
TPS63030
Power Save Disabled
10
0
1.8
2.2
2.6
3 3.4 3.8 4.2 4.6
VI - Input Voltage - V
5
TPS63030
Power Save Disabled
10
0
1.8
5.4
2.2
2.6
VOUT = 2.5 V
100
100
90
5.4
VO = 3.3 V
IO = 100 mA
90
80
80
IO = 500 mA
IO = 10 mA
60
50
40
60
IO = 10 mA
50
40
30
30
20
20
TPS63031
Power Save Enabled
10
0
1.8
2.2
2.6
3 3.4 3.8 4.2 4.6
VI - Input Voltage - V
IO = 500 mA
70
Efficiency - %
70
Efficiency - %
5
Figure 14. Efficiency versus Input Voltage, TPS63030,
Power-Save Disabled
IO = 100 mA
VO = 3.3 V
3 3.4 3.8 4.2 4.6
VI - Input Voltage - V
VOUT = 4.5 V
Figure 13. Efficiency versus Input Voltage, TPS63030,
Power-Save Disabled
5
TPS63031
Power Save Disabled
10
0
1.8
5.4
2.2
2.6
VOUT = 3.3 V
2.575
3 3.4 3.8 4.2 4.6
VI - Input Voltage - V
5
5.4
VOUT = 3.3 V
Figure 15. Efficiency versus Input Voltage, TPS63031,
Power-Save Enabled
Figure 16. Efficiency versus Input Voltage, TPS63031,
Power-Save Disabled
4.635
VO = 2.5 V
VO = 4.5 V
2.55
4.59
VO - Output Voltage - V
VO - Output Voltage - V
IO = 100 mA
80
IO = 500 mA
70
Efficiency - %
VO = 4.5 V
90
2.525
VI = 3.6 V
2.5
2.475
2.45
TPS63031
Power Save Disabled
VI = 3.6 V
4.5
4.455
4.41
TPS63031
Power Save Disabled
2.425
1
4.545
10
100
IO - Output Current - mA
1000
4.365
1
VIN = 3.6 V / VOUT = 2.5 V
Figure 17. Output Voltage versus Output Current,
TPS63030,
Power-Save Disabled
10
100
IO - Output Current - mA
1000
VIN = 3.6 V / VOUT = 4.5 V
Figure 18. Output Voltage versus Output Current,
TPS63030,
Power Save Disabled
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3.399
VI = 2.4 V, IL = 175 mA to 265 mA
VO = 3.3 V
Output Voltage
50 mV/div, AC
VO - Output Voltage - V
3.366
VI = 3.6 V
3.333
3.3
3.267
Output Current
50 mA/div
3.234
TPS63031
Power Save Disabled
3.201
1
TPS63031, VO = 3.3 V
10
100
IO - Output Current - mA
1000
VIN = 3.6 V / VOUT = 3.3 V
Time - 1 ms/div
Figure 20. Load Transient Response, TPS63031
Figure 19. Output Voltage versus Output Current,
TPS63031,
Power Save Disabled
VI = 4.2 V, IL = 340 mA to 500 mA
VI = 3 V to 3.6 V, IL = 300 mA
Output Voltage
50 mV/div, AC
Input Voltage
500 mV/div, AC
Output Current
100 mA/div
Output Voltage
20 mV/div, AC
TPS63031, VO = 3.3 V
TPS63031, VO = 3.3 V
Time 1 ms/div
Time 2 ms/Div
VIN = 4.2 V / VOUT = 3.3 V
Figure 21. Load Transient Response, TPS63031
Enable
5 V/div, DC
VIN = 3.0 V / VOUT = 3.3 V
Figure 22. Line Transient Response, TPS63031
Enable
5 V/div, DC
Output Voltage
1 V/div, DC
Output Voltage
1 V/div, DC
Inductor Current
200 mA/div, DC
Inductor Current
Voltage at L1 200 mA/div, DC
5 V/div, DC
Voltage at L2
5 V/div, DC
TPS63031, VO = 3.3 V
VI = 2.4 V, RL = 11 W
TPS63031, VO = 3.3 V
VIN = 4.2 V / VOUT = 3.3 V
VIN = 2.4 V / VOUT = 3.3 V
Figure 23. Start-up After Enable, TPS63031
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VI = 4.2 V, RL = 11 W
Time 100 ms/div
Time 200ms/div
Figure 24. Start-up After Enable, TPS63031
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SLVS696D – OCTOBER 2008 – REVISED APRIL 2020
10 Power Supply Recommendations
The TPS6303x devices have no special requirements for its input power supply. The output current of the input
power supply needs to be rated according to the supply voltage, output voltage, and output current of the
TPS6303x.
11 Layout
11.1 Layout Guidelines
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator can show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor must be placed as close as possible to the IC. Use
a common ground node for power ground and a different one for control ground to minimize the effects of ground
noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider must be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, TI recommends to use short traces as well, separated from the power ground traces. This avoids
ground shift problems, which can occur due to superimposition of power ground current and control ground
current.
11.2 Layout Example
L1
C2
L2
VOUT
VOUT
L1
PGND
VIN
C1
VIN
GND
FB
GND
VINA
EN
PS/SYNC
GND
C3
R2
R1
Figure 25. Layout Recommendation
11.3 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component.
The follow are three basic approaches for enhancing thermal performance:
• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB by soldering the exposed thermal pad
• Introducing airflow in the system
For more details on how to use the thermal parameters in the dissipation ratings table, check the Thermal
Characteristics Application Note and the Semiconductor and IC Package Thermal Metrics Application Note.
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Product Folder Links: TPS63030 TPS63031
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation see the following:
Texas Instruments, Thermal Characteristics Application Note
12.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 5. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS63030
Click here
Click here
Click here
Click here
Click here
TPS63031
Click here
Click here
Click here
Click here
Click here
12.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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30-Mar-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS63030DSKR
ACTIVE
SON
DSK
10
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CEE
TPS63030DSKT
ACTIVE
SON
DSK
10
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CEE
TPS63031DSKR
ACTIVE
SON
DSK
10
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CEF
TPS63031DSKT
ACTIVE
SON
DSK
10
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CEF
TPS63031DSKTG4
ACTIVE
SON
DSK
10
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CEF
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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