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TPS63060, TPS63061
SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
TPS6306x High Input Voltage, Buck-Boost Converter With 2-A Switch Current
1 Features
3 Description
•
•
•
The TPS6306x devices provide a power supply
solution for products powered by either three-cell up
to six-cell alkaline, NiCd or NiMH battery, or a onecell or dual-cell Li-Ion or Li-polymer battery. Output
currents can go as high as 2-A while using a dual-cell
Li-Ion or Li-polymer battery, and discharge it down to
5 V or lower. The buck-boost converter is based on a
fixed frequency, pulse-width-modulation (PWM)
controller using synchronous rectification to obtain
maximum efficiency. At low load currents, the
converter enters power-save mode to maintain high
efficiency over a wide load current range. The powersave mode can be disabled, forcing the converter to
operate at a fixed switching frequency. The maximum
average current in the switches is limited to a typical
value of 2.25 A. The output voltage is programmable
using an external resistor divider, or is fixed internally
on the chip. The converter can be disabled to
minimize battery drain. During shutdown, the load is
disconnected from the battery.
1
•
•
•
•
•
•
•
•
•
•
•
Input Voltage Range: 2.5 V to 12 V
Efficiency: Up to 93%
Output Current at 5 V (VIN4 V): 1.3 A in Boost
Mode
Automatic Transition Between Step Down and
Boost Mode
Typical Device Quiescent Current: < 30 μA
Fixed and Adjustable Output Voltage Options from
2.5 V to 8 V
Power-Save Mode for Improved Efficiency at Low
Output Power
Forced Fixed-Frequency Operation at 2.4 MHz
and Synchronization Possible
Power Good Output
Buck-Boost Overlap Control™
Load Disconnect During Shutdown
Overtemperature Protection
Overvoltage Protection
The devices are available in a 3 mm × 3 mm, 10-pin,
WSON (DSC), PowerPAD™ package.
Device Information(1)
PART NUMBER
2 Applications
•
•
•
•
•
•
•
TPS63060
Dual Li-Ion Application
DSCs and Camcorders
Notebook Computer
Industrial Metering Equipment
Ultra Mobile PCs and Mobile Internet Devices
Personal Medical Products
High-Power LEDs
TPS63061
BODY SIZE (NOM)
WSON (10)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
.
.
Simplified Schematic
Efficiency vs Output Current
100
VIN
2.5 V to 12 V
90
TPS63060
TPS63061
L1
VIN
80
Efficiency (%)
PACKAGE
70
EN
60
VAUX
L2
VOUT
5 V, 800 mA
VOUT
FB
50
40
PS/SYNC
30
20
10
PG
VOUT = 5 V
TPS63061
Power Save Enabled
0
0.0001
0.001
0.01
VIN = 4.8 V
VIN = 7.2 V
0.1
1
GND
PG
PGND
10
Output Current (A)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS63060, TPS63061
SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 6
8.1 Overview ................................................................... 6
8.2 Functional Block Diagrams ....................................... 7
8.3 Feature Description................................................... 8
8.4 Device Functional Modes.......................................... 8
9
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application ................................................. 12
10 Power Supply Recommendations ..................... 20
11 Layout................................................................... 21
11.1 Layout Guidelines ................................................. 21
11.2 Layout Example .................................................... 21
12 Device and Documentation Support ................. 22
12.1
12.2
12.3
12.4
12.5
12.6
Device Support ....................................................
Documentation Support .......................................
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
22
22
22
22
22
22
13 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (February 2012) to Revision B
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes section, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1
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Product Folder Links: TPS63060 TPS63061
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SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
5 Device Comparison Table
PACKAGE MARKING
OUTPUT VOLTAGE
DC/DC
TPS63060DSC
QUJ
Adjustable
TPS63061DSC
QUK
5V
ORDER NUMBER
(1)
(1) (2)
For detailed ordering information please check the Package Option Addendum section at the end of
this data sheet.
Contact the factory to confirm availability of other fixed-output voltage versions.
(2)
6 Pin Configuration and Functions
DSC PACKAGE
10 PINS
(TOP VIEW)
10 L2
L1 1
9 VOUT
VIN 2
TPS63060
TPS63061
EN 3
PS/SYNC 4
8 FB
7 GND
PGND
PG 5
6 VAUX
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
EN
3
I
Enable input. (1 enabled, 0 disabled)
FB
8
I
Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage versions
GND
7
Control and logic ground
L1
1
I
Connection for Inductor
L2
10
I
Connection for Inductor
PG
5
O
Output power good (1 good, 0 failure; open drain)
PS/SYNC
4
I
Enable / disable power save mode (1 disabled, 0 enabled, clock signal for synchronization)
VAUX
6
VIN
2
I
Supply voltage for power stage
VOUT
9
O
Buck-boost converter output
PowerPAD™
Connection for Capacitor
Power ground. Must be soldered to achieve appropriate power dissipation. Must be connected to PGND.
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SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
EN, FB, PS/SYNC, VIN, VOUT, FB, PG, L2
–0.3
17
V
L1
–0.3
VIN + 0.3
V
VAUX
–0.3
7.5
V
Operating virtual junction temperature range, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
Voltage range
(1)
UNIT
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
7.2 ESD Ratings
VALUE
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±3000
Machine model (MM)
±200
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1500
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Supply voltage at VIN
MIN
MAX
2.5
12
V
1
A
Output current IOUT (1)
UNIT
Operating free air temperature range, TA
–40
85
°C
Operating virtual junction temperature range, TJ
–40
125
°C
(1)
10 ≤ VIN ≤ 12 V
7.4 Thermal Information
TPS63060
TPS63061
THERMAL METRIC (1)
DSC
UNIT
10 PINS
RθJA
Junction-to-ambient thermal resistance
48.7
RθJC(top)
Junction-to-case (top) thermal resistance
54.8
RθJB
Junction-to-board thermal resistance
19.8
ψJT
Junction-to-top characterization parameter
1.1
ψJB
Junction-to-board characterization parameter
19.6
RθJC(bot)
Junction-to-case (bottom) thermal resistance
4.2
(1)
4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
7.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted) TA = 25°C)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC/DC STAGE
VIN
Input voltage range
VIIN
Minimum input voltage for startup
VOUT
Output voltage
DMIN
Minimum duty-cycle in step down
conversion
VFB
Feedback voltage
fOSC
Oscillator frequency
2.5
VPS/SYNC = GND Referenced to 5 V
V
V
V
TPS63060
2.5
8
TPS63061
0.6%
5%
VPS/SYNC = VIN
VPS/SYNC = GND Referenced to
500 mV
12
2.5
495
TPS63060
Frequency range for synchronization
10%
20%
500
505
0.6%
mV
5%
2200
2400
2600
kHz
2200
2400
2600
kHz
2000
2250
2500
ISW
Average inductance current limit
VIN = 5 V
RDS(on)H
High-side MOSFET on-resistance
VIN = 5 V
90
mΩ
RDS(on)L
Low-side switch MOSFET onresistance
VIN = 5 V
95
mΩ
Line regulation
Power save mode disabled
0.5%
Load regulation
Power save modee disabled
0.5%
IQ
Input voltage quiescent current
IQ
Output voltage quiescent current
IOUT = 0 mA, VEN = VIN = 5 V,
VOUT = 5 V
RFB
FB input impedance
VEN = HIGH
IS
Shutdown current
VEN = 0 V, VIN = 5 V
TPS63061
30
60
7
15
1.5
0.3
mA
μA
μA
MΩ
2
μA
V
CONTROL STAGE
VAUX
Maximum bias voltage
IAUX
Load current at VAUX
UVLO
Under voltage lockout threshold
VIN > VOUT
VIN
7
VIN < VOUT
VOUT
7
V
1
mA
Input voltage falling
1.8
UVLO hysteresis
VIL
EN, PS/SYNC input low voltage
VIH
EN, PS/SYNC input high voltage
1.9
2.2
300
V
mV
0.4
V
μA
1.2
V
EN, PS/SYNC input current
Clamped on GND or VIN
0.01
0.1
PG output low voltage
VOUT = 5 V, IPGL = 10 μA
0.04
0.4
V
0.01
0.1
μA
16
V
PG output leakage current
Output overvoltage protection
12
Overtemperature protection
140
°C
Overtemperature hysteresis
20
°C
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7.6 Typical Characteristics
1
55
0.8
Quiescent Current (µA)
Shutdown Current (µA)
0.9
0.7
0.6
0.5
0.4
50
45
40
0.3
0.2
35
2
3
4
5
6
7
8
9
10
11
12
2
3
4
Input Voltage (V)
5
6
7
8
9
10
11
12
Input Voltage (V)
Figure 1. Shutdown Current vs Input Voltage
Figure 2. Quiescent Current vs Input Voltage
8 Detailed Description
8.1 Overview
The controller circuit of the device is based on an average current mode topology. The controller also uses input
and output voltage feedforward. Changes of input and output voltage are monitored and immediately can change
the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier gets its
feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must be connected to
that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense the voltage. Fixed
output voltage versions use a trimmed internal resistive divider. The device compares the feedback voltage with
the internal reference voltage to generate a stable and accurate output voltage.
The device uses four internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to maintain high efficiency over a wide input voltage and output
power range. The device has two separate ground pins (GND and PGND) to avoid ground shift problems due to
the high currents in the switches. The reference for all control functions is the GND pin. The power switches are
connected to PGND. Both grounds must be connected on the PCB at only one point, ideally, close to the GND
pin. Due to the 4-switch topology, the load is always disconnected from the input during shutdown of the
converter. An internal temperature sensor protects the device from overheating.
6
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SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
8.2 Functional Block Diagrams
L1
L2
VIN
VOUT
VIN
VOUT
Current
Sensor
Bias
Regulator
VIN
VAUX
VOUT
VAUX
PGND
PGND
Gate
Control
_
VAUX
Modulator
PG
+
_
+
Oscillator
EN
VREF
+
-
Device
Control
PS/SYNC
FB
Temperature
Control
PGND
GND
PGND
Figure 3. TPS63061 Fixed Output
L1
L2
VIN
VOUT
VIN
VOUT
Current
Sensor
Bias
Regulator
VIN
VAUX
VOUT
VAUX
PGND
FB
_
VAUX
Modulator
PG
PS/SYNC
PGND
Gate
Control
+
Oscillator
Device
Control
+
_
+
-
VREF
EN
Temperature
Control
GND
PGND
PGND
Figure 4. TPS63060 Adjustable
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8.3 Feature Description
8.3.1 Power Good
The device has a built in power good function to indicate whether the output voltage is regulated properly. As
soon as the average inductor current gets limited to a value below the current the voltage regulator demands for
maintaining the output voltage the power good output gets low impedance. The output is open drain, so its logic
function can be adjusted to any voltage level the connected logic is using, by connecting a pull up resistor to the
supply voltage of the logic. By monitoring the status of the current control loop, the power good output provides
the earliest indication possible for an output voltage break down and leaves the connected application a
maximum time to safely react.
8.3.2 Soft-Start Function and Short-Circuit Protection
After being enabled, the device starts operating. The average current limit ramps up from an initial 400 mA
following the output voltage increasing. At an output voltage of about 1.2 V, the current limit is at its nominal
value. If the output voltage does not increase, the current limit does not increase. The device implements no
timer. Thus, the output voltage overshoot at startup, as well as the inrush current, remains at a minimum. The
device ramps up the output voltage in a controlled manner even if a large capacitor is connected at the output.
When the output voltage does not increase above 1.2 V, the device assumes a short circuit at the output, and
keeps the current limit low to protect itself and the application. During a short-circuit situation on the output, the
device maintains the current limit below 2 A typically (minimum average inductance current).
8.3.3 Overvoltage Protection
If, for any reason, the output voltage is not fed back properly to the input of the voltage amplifier, control of the
output voltage no longer works. Therefore, overvoltage protection is implemented to avoid the output voltage
exceeding critical values for the device and possibly for the system it supplies. The implemented overvoltage
protection circuit monitors the output voltage internally as well. If it reaches the overvoltage threshold, the voltage
amplifier regulates the output voltage to this value.
8.3.4 Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VIN is lower than
approximately its threshold (see the Electrical Characteristics table). When in operation, the device automatically
enters the shutdown mode if the voltage on VIN drops below the undervoltage lockout threshold. The device
automatically restarts if the input voltage recovers to the minimum operating input voltage.
8.3.5 Overtemperature Protection
The device has a built-in temperature sensor which monitors the internal device temperature. If the temperature
exceeds the programmed threshold (see theElectrical Characteristics table) the device stops operating. As soon
as the device temperature has decreased below the programmed threshold, it starts operating again. There is a
built-in hysteresis to avoid unstable operation at device temperatures at the overtemperature threshold.
8.4 Device Functional Modes
8.4.1 Buck-Boost Operation
To regulate the output voltage at all possible input voltage conditions, the device automatically switches from
buck operation to boost operation and back as required. It always uses one active switch, one rectifying switch,
one switch permanently on, and one switch permanently off. Therefore, it operates as a step down converter
(buck) when the input voltage is higher than the output voltage, and as a boost converter when the input voltage
is lower than the output voltage. There is no mode of operation in which all 4 switches are permanently
switching. Controlling the switches this way allows the converter to maintain high efficiency at the most important
point of operation, when the input voltage is close to the output voltage. The RMS current through the switches
and the inductor is kept at a minimum, to minimize switching and conduction losses.
8.4.2
Control Loop Description
The controller circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. Figure 5 shows the
control loop.
8
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Device Functional Modes (continued)
TM
Figure 5. Average Current Mode Control
The non inverting input of the transconductance amplifier, gMV, is assumed to be constant. The output of gMV
defines the average inductor current. The inductor current is reconstructed by measuring the current through the
high side buck MOSFET. This current corresponds exactly to the inductor current in boost mode. In buck mode
the current is measured during the on time of the same MOSFET. During the off time, the current is
reconstructed internally starting from the peak value at the end of the on-time cycle. The average current is
compared to the desired value and the difference, or current error, is amplified and compared to the buck or the
boost sawtooth ramp. Depending on which of the two ramps the gMC amplified output crosses, the device
acitvates either the buck MOSFETs or the boost MOSFETs. When the input voltage is close to the output
voltage, one boost cycle always follows a buck cycle. In this condition, no more than three cycles in a row of the
same mode are allowed. This control method in the buck-boost region ensures a robust control and the highest
efficiency.
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Device Functional Modes (continued)
8.4.3 Power-Save Mode and Synchronization
The PS/SYNC pin can be used to select different operation modes. Power save mode improves efficiency at light
load. To enable power save mode, PS/SYNC must be set low. The device enters power save mode when the
average inductor current falls to a level lower than approximately 100 mA. In that situation, the converter
operates with reduced switching frequency and with a minimum quiescent current to maintain high efficiency.
During the power save mode operation, the output voltage is monitored with a comparator by the threshold comp
low and comp high. When the device enters power save mode, the converter stops operating and the output
voltage drops. The slope of the output voltage depends on the load and the value of output capacitance. As the
output voltage falls below the comp low threshold set to 2.5% typical above the output voltage, the device ramps
up the output voltage again, by starting operation using a programmed average inductor current higher than
required by the current load condition. Operation can last for one or several pulses. The converter continues
these pulses until the comp high threshold, set to typically 3.5% above the nominal output voltage, is reached
and the average inductor current gets lower than about 100 mA. When the load increases above the minimum
forced inductor current of about 100 mA, the device automatically switches to PWM mode.
The power save mode can be disabled by programming the PS/SYNC high. Connecting a clock signal at
PS/SYNC forces the device to synchronize to the connected clock frequency.
Synchronization is done by a PLL to lower and higher frequencies compared to the internal clock. The PLL can
also tolerate missing clock pulses without the converter malfunctioning. The PS/SYNC input supports standard
logic thresholds.
Heavy Load Transient Step
Comp High
3.5 %
3%
2.5 %
Comp Low
VOUT
Absolute voltage drop
with positioning
PFM Mode
at Light Load Current.
PWM Mode .
Figure 6. Power-Save Mode Thresholds and Dynamic Voltage Positioning
8.4.4 Dynamic Voltage Positioning
As shown in Figure 6, the output voltage is typically 3% above the nominal output voltage at light-load currents,
as the device is operating in power save mode. This operation mode allows additional headroom for the voltage
drop during a load transient from light load to full load. This additional headroom allows the converter to operate
with a small output capacitor and maintain a low absolute voltage drop during heavy load transient changes. See
Figure 6 for detailed operation of the power save mode operation.
8.4.5 Dynamic Current Limit
The dynamic current limit function maintains the output voltage regulation when the power source becomes
weaker. The maximum current allowed through the switch depends on the voltage applied at the input terminal of
the TPS6306x devices. Figure 7 shows this dependency, and the ISW vs VIN. The dynamic current limit has its
lowest value when reaching the minimum recommended supply voltage at VIN.
Given the ISW value from Figure 7, is then possible to calculate the output current reached in boost mode using
Equation 1 and Equation 2 and in buck mode using Equation 3 and Equation 4.
Duty Cycle Boost
D=
V
-V
IN
OUT
V
OUT
Maximum Output Current Boost
10
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(1)
I
=hxI
x (1 - D)
OUT
SW
(2)
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Device Functional Modes (continued)
Duty Cycle Buck
D=
V
OUT
V
IN
Maximum Output Current Buck
(3)
I
=I
OUT
SW
where
•
•
•
η is the estimated converter efficiency (use the number from the efficiency curves or 0.80 as an assumption)
f is the converter switching frequency (typical 2.4 MHz)
L is the selected inductor value
(4)
Average Inductance Current (A)
If the die temperature increases above the recommended maximum temperature, the dynamic current limit
becomes active. The current limit is reduced with temperature increasing.
3.2
3
2.8
2.5
2.2
2
1.8
1.5
2
3
4
5
6
7
8
Input Voltage (V)
9
10
11
12
Figure 7. Average Inductance Current vs Input Voltage
8.4.6 Device Enable
The device operates when EN is set high. The device enters a shutdown sequence when EN is set to GND.
During the shutdown sequence, the regulator stops switching, all internal control circuitry is switched off, and the
load is disconnected from the input. It is possible for the output voltage to drop below the input voltage during
shutdown. During the start-up sequence, the device limits the duty cycle and the peak current in order to avoid
high peak currents flowing from the input.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TPS6306x devices provide a power supply solution for products powered by either three-cell up to six-cell
alkaline, NiCd or NiMH battery, or a one-cell or dual-cell Li-Ion or Li-polymer battery. Output currents can go as
high as 2-A while using a dual-cell Li-Ion or Li-polymer battery, and discharge it down to 5 V or lower.
9.2 Typical Application
L1
1 µH
TPS63060
VIN
2.5 V to 12 V
L1
VIN
VOUT
R1
1 0
EN
VAUX
C2
2 × 10 µF
VOUT
5 V, 800 mA
L2
FB
R2
111 N
C3
0.1 µF
PS/SYNC
R3
1 0
C4
10 pF
PG
PG
GND
C2
3 × 22 µF
PGND
Figure 8. 5-V Adjustable Buck-Boost Converter Application
9.2.1 Design Requirements
The design guideline provides a component selection to operate the device within the recommended operating
conditions. Table 1 lists the components used in this application.
Table 1. Components for Application Characteristic Curves
REFERENCE
DESCRIPTION
MANUFACTURER
TPS63060 and TPS63061
Texas Instruments
L1
1 μH, 3 mm x 3 mm x 1.5 mm
Coilcraft , XFL4020-102
C1
2 × 10 μF 16V, 0805, X5R ceramic
Taiyo Yuden, EMK212BJ
C2
3 × 22 μF 16V, 0805, X5R ceramic
Taiyo Yuden, LMK212BJ
C3
0.1 μF, X5R ceramic
C4
10 pF, ceramic
R1, R2
Depending on the output voltage at TPS63060 and TPS63061: R1=0, C4 and R2 n.a.
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9.2.2 Detailed Design Procedure
The first step is the selection of the output filter components. To simplify this process, use Table 2 to compare
inductor and capacitor value combinations.
9.2.2.1 Step One: Output Filter Design
Table 2. Output Capacitor and Inductor Combinations
OUTPUT CAPACITOR VALUE [µF] (2)
INDUCTOR VALUE [µH] (1)
(1)
(2)
(3)
44
66
100
1.0
√
√ (3)
√
1.5
√
√
√
Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by 20% and
–30%.
Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by
20% and –50%.
Typical application. Other check mark indicates recommended filter combinations
9.2.2.2 Step Two: Inductor Selection
The inductor selection is affected by several parameters including inductor ripple current, output voltage ripple,
transition point into power-save mode, and efficiency. See Table 3 for typical inductors.
Table 3. List of Recommended Inductors
INDUCTOR VALUE
(µH)
COMPONENT SUPLIER
SIZE (L×W×H) (mm)
CURRENT
SATURATION (ISAT)
(A)
DCR (mΩ)
10.8
1
Coilcraft XFL4020-102
4 × 4 × 2.1
5.1
1
TOKO DEM2815 1226AS-H-1R0N
3 × 3.2 × 1.5
2.7
27
1.5
Coilcraft XFL4020-152
4 × 4 × 2.1
4.4
14.4
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high-switching frequencies the core material has a higher impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, with the chosen
inductance value, the peak current for the inductor in steady state operation can be calculated. Equation 1 and
Equation 5 show how to calculate the peak current IPEAK. Only the equation which defines the switch current in
boost mode is reported because this is providing the highest value of current and represents the critical current
value for selecting the right inductor.
IOUT
VIN ´ D
IPEAK =
+
h ´ (1 - D ) 2 ´ fSW ´ L
where
•
•
•
•
•
D is the duty cycle during boost mode operation
fSW is the converter switching frequency (typical 2.4 MHz)
L is the selected inductor value
η is the estimated converter efficiency (use the number from the efficiency curves or 0.80 as an assumption)
The calculation must be done for the minimum input voltage which is possible to have in boost mode
(5)
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It's recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 5. Possible inductors are listed in Table 3.
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9.2.2.3 Step Three: Capacitor Selection
9.2.2.3.1 Input Capacitors
To improve transient behavior of the regulator and EMI behavior of the total power supply circuit, this design
suggests a minimum input capacitance of 20 μF. Place a ceramic capacitor placed as close as possible to the
VIN and PGND pins of the device.
9.2.2.3.2 Output Capacitor
For the output capacitor, use of a small ceramic capacitor placed as close as possible to the VOUT and PGND
pins of the device is recommended. If, for any reason, the application requires the use of large capacitors which
can not be placed close to the device, use a smaller ceramic capacitor in parallel to the large capacitor. The
small capacitor should be placed as close as possible to the VOUT and PGND pins of the device. The
recommended typical output capacitor value is 66 µF with a variance as outlined in Table 1.
There is also no upper limit for the output capacitance value. Larger capacitors cause lower output voltage ripple
as well as lower output voltage drop during load transients.
When choosing input and output capacitors, it needs to be kept in mind, that the value of capacitance
experiences significant losses from their rated value depending on the operating temperature and the operating
DC voltage. It is not uncommon for a small surface mount ceramic capacitor to lose 50% and more of its rated
capacitance. For this reason, it is important to use a larger value of capacitance or a capacitor with higher
voltage rating in order to ensure the required capacitance at the full operating voltage.
9.2.2.3.3
Bypass Capacitor
To make sure that the internal control circuits are supplied with a stable low noise supply voltage, a capacitor is
connected between VAUX and GND. Using a ceramic capacitor with a value of 0.1 μF is recommended. The
capacitor needs to be placed close to the VAUX pin. The value of this capacitor should not be higher than
0.22 μF.
9.2.2.4 Step Four: Setting the Output Voltage
When the adjustable output voltage version TPS63060 is used, the output voltage is set by the external resistor
divider. The resistor divider must be connected between VOUT, FB and GND. When the output voltage is
regulated properly, the typical value of the voltage at the FB pin is 500mV. The maximum recommended value
for the output voltage is 8V. The current through the resistive divider should be about 100 times greater than the
current into the FB pin. The typical current into the FB pin is 0.01μA, and the voltage across the resistor between
FB and GND, R2, is typically 500 mV. Based on these two values, the recommended value for R2 should be
lower than 500 kΩ, in order to set the divider current at 3 μA or higher. It is recommended to keep the value for
this resistor in the range of 200 kΩ. From that, the value of the resistor connected between the VOUT pin and
the FB pin, (R1) depending on the needed output voltage can be calculated using Equation 6.
æV
ö
R1 = R2 × ç OUT - 1÷
è VFB
ø
(6)
Place a small capacitor (C4, 10 pF) in parallel with R2 when using the power save mode and the adjustable
version, to provide filtering and improve the efficiency at light load.
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SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
9.2.3 Application Curves
3.2
3.5
2.7
Maximum Output Current (A)
Maximum Output Current (A)
VOUT = 2.5 V
2.2
1.9
1.2
VOUT = 8.0 V
0.7
0.2
2.5
4.5
6.5
8.5
10.5
3
2.5
2
1.5
1
0.5
2.5
12.5
4.5
Input Voltage (V)
TPS63060
TPS63061
Figure 9. Output Current vs Input Voltage
100
90
90
80
80
VIN = 7.2 V
VOUT = 2.5 V
VIN = 4.8 V
VOUT = 8 V
50
40
30
VIN = 7.2 V
VOUT = 8 V
VIN = 7.2 V
VOUT = 2.5 V
60
50
20
10
0.01
VIN = 7.2 V
VOUT = 8 V
VIN = 7.2 V
VOUT = 2.5 V
0.1
1
0
0.0001
10
0.001
Output Current (A)
TPS63060
Power Save Enabled
TPS63060
10
Power Save Disabled
90
80
80
70
70
60
50
40
60
50
40
30
30
20
20
10
10
0
0.0001
0
0.0001
0.01
0.1
1
10
VIN = 4.8 V
VIN = 7.2 V
0.001
Output Current (A)
TPS63061
1
100
VIN = 4.8 V
VIN = 7.2 V
0.001
0.1
Figure 12. Efficiency vs. Output Current
Efficiency (%)
Efficiency (%)
90
0.01
Output Current (A)
Figure 11. Efficiency vs. Output Current
100
VIN = 4.8 V
VOUT = 8 V
VIN = 4.8 V
VOUT = 2.5 V
30
10
0.001
12.5
VOUT = 5 V
40
20
0
0.0001
10.5
70
Efficiency (%)
Efficiency (%)
70
8.5
Figure 10. Output Current vs Input Voltage
100
60
6.5
Input Voltage (V)
0.01
0.1
1
10
Output Current (A)
Power Save Disabled
Figure 13. Efficiency vs. Output Current
TPS63061
Power Save Enabled
Figure 14. Efficiency vs. Output Current
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100
100
90
90
80
80
70
70
Efficiency (%)
Efficiency (%)
SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
60
50
40
IOUT (A)
30
10
0
2.5
4.5
6.5
8.5
10.5
0.01
0.50
1
1.3
50
40
30
0.01
0.50
1
1.3
20
IOUT (A)
60
20
10
0
2.5
12.5
4.5
Input Voltage (V)
TPS63060
VOUT = 2.5 V
TPS63060
VOUT = 2.5 V
90
80
80
70
70
Efficiency (%)
Efficiency (%)
100
90
60
50
40
IOUT (A)
30
10
8.5
10.5
Power Save Disabled
50
40
20
IOUT (A)
10
0.01
0.50
1
1.3
0
2.5
12.5
4.5
Input Voltage (V)
TPS63060
VOUT = 8 V
Power Save Enabled
TPS63060
VOUT = 8 V
95
95
90
90
85
85
Efficiency (%)
Efficiency (%)
100
80
75
70
IOUT (A)
65
60
55
8.5
10.5
75
70
IOUT (A)
60
55
12.5
0.01
0.50
1
1.3
50
2.5
4.5
Power Save Enabled
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6.5
8.5
10.5
12.5
Input Voltage (V)
Figure 19. Efficiency vs. Input Voltage
16
12.5
Power Save Disabled
Input Voltage (V)
TPS63061
VOUT = 5 V
10.5
80
65
0.01
0.50
1
1.3
6.5
8.5
Figure 18. Efficiency vs. Input Voltage
100
4.5
6.5
Input Voltage (V)
Figure 17. Efficiency vs. Input Voltage
50
2.5
12.5
60
30
0.01
0.50
1
1.3
20
6.5
10.5
Figure 16. Efficiency vs. Input Voltage
100
4.5
8.5
Input Voltage (V)
Power Save Enabled
Figure 15. Efficiency vs. Input Voltage
0
2.5
6.5
TPS63061
VOUT = 5 V
Power Save Disabled
Figure 20. Efficiency vs. Input Voltage
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SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
2.8
5.3
PWM
PFM
2.75
2.7
5.2
Output Voltage (V)
Output Voltage (V)
PWM
PFM
5.25
2.65
2.6
2.55
5.15
5.1
5.05
2.5
5
2.45
4.95
2.4
0.0001
0.001
0.01
0.1
1
10
4.9
0.0001
0.001
Output Current (A)
TPS63060
VOUT = 2.5 V
0.01
0.1
1
10
Output Current (A)
Power Save Disabled
VIN = 7.2 V
TPS63061
VIN = 7.2 V
Figure 21. Output Voltage vs Output Current
Figure 22. Output Voltage vs Output Current
8.4
Vin=4.5V, Iload=600mA to 1A
PWM
PFM
8.35
Vout 200mV/div
Offset=5V
Output Voltage (V)
8.3
8.25
Iout 200mA/div
Offset=600mA
8.2
8.15
8.1
8.05
8
7.95
IL 1A/div
7.9
0.0001
0.001
0.01
0.1
1
TPS63060
VOUT = 8 V
10
TPS63061, Vo=5V
Output Current (A)
100us/div
VIN = 7.2 V
Figure 23. Output Voltage vs Output Current
Vin=8V, Iload=600mA to 1A
Figure 24. Load Transient Response
Vin=4.5V to 5.5V, Iout=500mA
Vout 200mV/div
Offset=5V
Input Voltage
500mV/div, Offset=4.5V
Iout 200mA/div
Offset=600mA
Output Voltage
50mV/div, Offset=5V
IL 1A/div
TPS63061, Vo=5V
TPS63061, Vo=5V
200us/div
Figure 25. Load Transient Response
200us/div
Figure 26. Line Transient Response
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Enable 5V/div
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Enable 5V/div
PG 5V/div
PG 5V/div
Output Voltage 2V/div
Output Voltage 2V/div
Inductor Current 1A/div
Inductor Current 1A/div
TPS63061, Vo=5V
100us/div
Vin=4.5V, Io=1A
TPS63061, Vo=5V
Figure 27. Startup After Enable
Vin=5V,
Vin=8V, Io=2A
Figure 28. Startup After Enable
Vin=12V,
Iload=600mA to 1A
100us/div
Iload=600mA to 1A
Vout 200mV/div
Offset=8V
Vout 200mV/div
Offset=8V
Vout 200mA/div
Offset=600mA
Iout 200mA/div
Offset=600mA
IL 1A/div
TPS63060, Vo=8V
200us/div
IL 1A/div
TPS63060, Vo=8V
Figure 29. Load Transient
Vin=8V to 8.6V, Iout=500mA
200us/div
Figure 30. Load Transient
Enable
5V/div
PG 5V/div
Input Voltage
200mV/div, offset=8V
Output Voltage 5V/div
Output
Voltage
50mV/div, offset=8V
TPS63060 Vo=8V
Inductor Current 1A/div
TPS63060, Vo=8V
200us/div
Figure 31. Line Transient
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100us/div
Vin=5V, Io=1A
Figure 32. Startup After Enable
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Enable 5V/div
PG 5V/div
Output Voltage 5V/div
Inductor Current 1A/div
TPS63060, Vo=8V
100us/div
Vin=12V, Io=1A
Figure 33. Startup After Enable
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10 Power Supply Recommendations
The TPS6306x device family has no special requirements for its input power supply. The input supply output
current must be rated according to the supply voltage, output voltage and output current of the TPS6306x.
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SLVSA92B – DECEMBER 2011 – REVISED DECEMBER 2014
11 Layout
11.1 Layout Guidelines
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the
device. Use a common ground node for power ground and a different one for control ground to minimize the
effects of ground noise. Connect these ground nodes at any place close to one of the ground pins of the device.
The feedback divider should be placed as close as possible to the control ground pin of the device. To lay out
the control ground, short traces are recommended as well, separation from the power ground traces. This avoids
ground shift problems, which can occur due to superimposition of power ground current and control ground
current.
11.2 Layout Example
L
COUT
COUT
CIN
CIN
COUT
GND
GND
VIN
GND
R2
C1
C2
PS
/S E
YN N
PGC
C3
R1
Figure 34. TPS6306x Layout
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.1.2 Development Support
• TPS63060EVM-619 2.25-A, Buck-Boost Converter Evaluation Module (click here)
• TPS63060EVM-619 Gerber Files (SLVC409)
• TPS63060 PSpice Transient Model (SLVM477)
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation see the following:
• Design Calculations for Buck-Boost Converters (SLVA535)
• Extending the Soft-Start Time in the TPS63010 Buck-Boost Converter (SLVA553)
• Different Methods to Drive LEDs Using TPS63xxx Buck-Boost Converters (SLVA419)
12.3 Related Links
Table 4 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to sample or buy.
Table 4. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS63060
Click here
Click here
Click here
Click here
Click here
TPS63061
Click here
Click here
Click here
Click here
Click here
12.4 Trademarks
Buck-Boost Overlap Control, PowerPAD are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
6-Feb-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS63060DSCR
ACTIVE
WSON
DSC
10
3000
Green (RoHS
& no Sb/Br)
NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
QUJ
TPS63060DSCT
ACTIVE
WSON
DSC
10
250
Green (RoHS
& no Sb/Br)
NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
QUJ
TPS63061DSCR
ACTIVE
WSON
DSC
10
3000
Green (RoHS
& no Sb/Br)
NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
QUK
TPS63061DSCT
ACTIVE
WSON
DSC
10
250
Green (RoHS
& no Sb/Br)
NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
QUK
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of