TPS65132SEVM-866

User's Guide SLVUAY0 – November 2016 TPS65132S Evaluation Module This user's guide describes the characteristics, operation, and use of the TPS65132S evaluation module (EVM) and its software. It includes the EVM specifications, the recommended setup (hardware and software), the schematic diagram, the board layouts, and the bill of materials. All the measurements in the Application and Implementation section for the High-Current Applications of the TPS65132 datasheet (SLVSBM1) were done with this EVM. 1 2 3 4 5 6 7 8 Contents Introduction ................................................................................................................... 2 Electrical Specifications ..................................................................................................... 3 Schematic ..................................................................................................................... 4 Connectors, Jumpers and Test Points .................................................................................... 5 Setup .......................................................................................................................... 6 Software Operation .......................................................................................................... 9 PCB Layout ................................................................................................................. 14 List of Materials ............................................................................................................. 17 List of Figures 1 Schematic ..................................................................................................................... 4 2 Hardware Setup – Full Functionality ...................................................................................... 6 3 Hardware Setup – Simplified ............................................................................................... 6 4 Two-Terminal Power Supply Connection ................................................................................. 7 5 Four-Terminal Power Supply Connection ................................................................................ 7 6 Single-Ended Load Connections 7 Differential Load Connection ............................................................................................... 8 8 Ribbon Cable Connected to the Ten Middle Pins of the USB2ANY Interface Adapter 9 Device Selection Window ................................................................................................... 9 10 Settings Window ............................................................................................................. 9 11 I2C Bus Internal Pullup Connection ...................................................................................... 10 12 I2C Bus External Pullup Connection ..................................................................................... 10 13 DAC Registers Window 14 Demo Mode Prompt with No EVM Connected ......................................................................... 13 15 Component Placement (Top View) ...................................................................................... 14 16 PCB Top Layer (Top View) ............................................................................................... 14 17 PCB Inner Layer 1 (Top View) 18 19 .......................................................................................... ............................ ................................................................................................... ........................................................................................... PCB Inner Layer 2 (Top View) ........................................................................................... PCB Bottom Layer (Bottom View) ....................................................................................... 7 8 12 15 15 16 List of Tables 1 Electrical Specifications ..................................................................................................... 3 2 Connector Overview ......................................................................................................... 5 3 Jumper Overview ............................................................................................................ 5 4 Test Point Overview ......................................................................................................... 5 5 Bill of Materials ............................................................................................................. SLVUAY0 – November 2016 Submit Documentation Feedback TPS65132S Evaluation Module Copyright © 2016, Texas Instruments Incorporated 17 1 Introduction www.ti.com Trademarks Microsoft, Windows are registered trademarks of Microsoft Corporation. All other trademarks are the property of their respective owners. 1 Introduction This EVM uses a TPS65132S to generate the positive and negative supply voltages needed by LCD panels in smartphones and tablet PCs. It can also be used as a general-purpose power supply in applications that need positive and negative supply rails (for example, op-amp or data acquisition circuits). For easy performance evaluation of the TPS65132S, this EVM has: • Software with a Graphical User Interface (GUI) for reading, writing, exporting, and importing the device configuration • A USB2ANY interface adapter to control the I2C bus • Test points for measuring the most important voltages • Jumpers for enabling and disabling the outputs • Input and output voltage sense terminals for making accurate four-terminal voltage measurements 1.1 Recommended Equipment In addition to the contents of the EVM box, some or all of the equipment described in the following subsections is required. 1.1.1 Power Supply To evaluate the full performance of the TPS65132S, a dc power supply capable of delivering 1.2 A from 2.5 V to 5.5 V is required. 1.1.2 Host Computer To change the output voltages or configuration of the TPS65132S, a personal computer (PC) with the following minimum specifications is needed: • Microsoft® Windows® 7 operating system • One free USB port • A minimum of 280MB of free hard disk space (610MB recommended) • A minimum of 512MB of RAM 1.1.3 Software You can download the latest version of the EVM software from the TI website at http://www.ti.com/product/tps65132/toolssoftware (see also Section 5.2). 1.2 Applications The TPS65132S device is suitable for use in any applications that need positive and negative output voltages in the range ±4 V to ±6 V and output currents less than ±150 mA. Typical applications include: • Smartphone displays • Tablet displays • Split-rail power supply applications 2 TPS65132S Evaluation Module SLVUAY0 – November 2016 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Introduction www.ti.com 1.3 Features • • • • • • • • • • • 2 Efficiency greater than 85% at IO > 10 mA Input voltage range of 2.5 V to 5.5 V Positive output voltage range of 4.0 V to 6.0 V (0.1-V steps) Negative output voltage range of –4.0 V to –6.0 V (0.1-V steps) Output voltage accuracy of better than 1% Programmable active discharge during shutdown Programmable power-up and power-down sequencing Excellent line regulation Advanced power-save mode for light-load efficiency Thermal shutdown Four-layer PCB with all components on top side Electrical Specifications Table 1 gives an overview of the electrical specifications of the TPS65132S EVM. Table 1. Electrical Specifications Parameter Notes and Conditions MIN TYP MAX Unit Input Characteristics VIN Input voltage 2.5 Input current 5.5 VIN = 3.7 V, IPOS = INEG = 150 mA 275 VIN = 3.7 V, IPOS = INEG = 0 mA 0.1 2 5.4 5.45 V mA mA Output Characteristics VPOS Default positive output voltage VIN = 3.7 V, IPOS = 150 mA ΔVPOS(ΔVIN) Line regulation (VPOS) V 5 mV –16 mV 5 mV ΔVPOS(ΔIO) Load regulation (VPOS) IPOS = 10 mA to 150 mA, VI = 3.7 V VPOS(PP) Output voltage ripple (VPOS) VIN = 3.7 V, IO = 150 mA (1) VNEG Default negative output voltage VIN = 3.7 V, INEG = 150 mA ΔVNEG(ΔVIN) Line regulation (VNEG) 5.35 VIN = 2.5 V to 5.5 V, IPOS = 150 mA VIN = 2.5 V to 5.5 V, IO = 150 mA (1) ΔVNEG(ΔIO) Load regulation (VNEG) INEG = 10 mA to 150 mA, VIN = 3.7 V VNEG(PP) Output voltage ripple NEG VIN = 3.7 V, IO = 150 mA (1) –5.45 –5.4 –5.35 V 9 mV –88 mV 50 mV 1.6 MHz System Characteristics Switching frequency Peak efficiency (1) VIN = 3.7 V 89% IO means that the load is connected from VPOS to VNEG. SLVUAY0 – November 2016 Submit Documentation Feedback TPS65132S Evaluation Module Copyright © 2016, Texas Instruments Incorporated 3 Schematic 3 www.ti.com Schematic Figure 1 is for reference only; see the bill of materials in Section 8 for specific values. L1 2.2µH TP2 TP1 U1 J1 VIN 1 2 3 4 5 6 VIN 2.5V to 5.5V S+ GND VIN SW C1 B1 EN OUTP E3 OUTP 4.7µF A1 SYNC OUTN A2 OUTN C2 B2 SDA SCL REG REG D3 E2 REG AGND PGND PGND D2 B3 E1 CFLY1 JP2 1 VIN 2 3 C4 D1 GND ON EN OFF SW C1 C2 4.7µF CFLY2 C3 A3 CFLY1 CFLY2 J2 1 2 3 4 5 6 4.7µF J3 1 2 3 4 5 6 C5 10µF TPS65132SYFF GND GND GND TP3 C3 10µF VPOS 4 V to 6 V S+ GND VNEG -6 V to -4 V SGND GND GND JP1 ON SYNC OFF TP4 1 VIN 2 3 J5 1 2 3 4 REG GND GND GND J6 1 2 3 4 5 6 J4 1 3 5 7 9 2 4 6 8 10 GND GND GND Copyright © 2016, Texas Instruments Incorporated Figure 1. Schematic 4 TPS65132S Evaluation Module SLVUAY0 – November 2016 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Connectors, Jumpers and Test Points www.ti.com 4 Connectors, Jumpers and Test Points Table 2, Table 3, and Table 4 give an overview of the connector, jumper, and test point connections of the EVM. Table 2. Connector Overview Connector J1 J2 J3 J4 Signal Pin Description Remarks VIN 1, 2 Input Supply S+ 3 Input Supply Sense GND 4, 5, 6 Ground Connect a 2.5 V to 5.5 V dc power supply to J1. You can use two-terminal (Figure 4) or four-terminal (Figure 5) connections. To minimize parasitic inductance, use a short (