TPS65154RSLR

Sample & Buy Product Folder Tools & Software Technical Documents Support & Community TPS65154 SLVSBG2A – SEPTEMBER 2013 – REVISED JUNE 2016 TPS65154 LCD Bias IC with Integrated WLED Driver 1 Device Overview 1.1 Features 1 • • • • • 2.0 V to 5.5 V Input Voltage Range Synchronous Boost Converter (AVDD) Non-Synchronous Boost Converter (VGH) Low Dropout Linear Regulator (VCC) Programmable VCOM Calibrator with Integrated Buffer Amplifier • 6-Channel WLED Driver with Direct Dimming and Phase-Shift Dimming Modes • Gate Voltage Shaping 1.2 • Panel Reset Signal (XAO) T-CON Reset Signal (RST) On-Chip EEPROM with Write Protect I2C Interface Thermal Shutdown 48-Pin, 6 mm × 6 mm, 0.4 mm Pitch VQFN Applications Notebook PCs 1.3 • • • • • • • Tablet PCs Description The TPS65154 is a compact LCD bias solution primarily intended for use in Notebook and Tablet PCs. The device comprises two boost converters to supply the LCD panel's source driver and gate driver; a linear regulator to supply the system's logic voltage; a programmable VCOM with high-speed amplifier; and a gate voltage shaping function; and a 6-channel WLED driver. spacing Device Information (1) PART NUMBER TPS65154 (1) 1.4 PACKAGE BODY SIZE (NOM) VQFN (48) 6.00 mm × 6.00 mm For all available packages, see the orderable addendum at the end of the data manual. Simplified System Diagram VIN (2.0V to 5.5V) Boost Converter 1 AVDD (6.5V to 9.6V) AVDD Boost Converter 2 VGH (18V to 25.5V) VGH Gate Voltage Shaping VIN Linear Regulator VCC (1.0V to 2.5V) Negative Charge Pump VGL (–5V to –8V) AVDD Programmable VCOM Buffer 2 IC VLED (4.5V to 24V) VGHM VCOM RST Miscellaneous Boost Converter 3 XAO ILIM Switch turned off Switch automatically re-enabled at start of next switching cycle All LED strings open-circuit IIFB = 0 mA and VOUT = VOVP Disable all output channels and boost converter Output channels re-enabled following power cycle Individual LED string(s) opencircuit IIFB = 0 mA and VOUT = VOVP Individual LED string(s) shortedcircuited to ground IIFB = 0 mA for longer than 4 ms Disable affected output channel(s) Functional output channels continue operating. Affected output channel(s) reenabled following power cycle 5.3.9.4 Enable and Start-Up The WLED driver is enabled and disabled by EN, however, this signal has no effect until the LCD bias functions have completed their start-up sequence. Following a POR, EN has no effect until tDLY4 is complete; after that the WLED driver can be enabled and disabled at any time using EN (providing nothing happens to cause the LCD bias functions to re-start) and applying a PWM signal. In applications that do not generate an EN signal, the EN pin can be tied to VIN, in which case the WLED driver will start automatically at the end of tDLY4. Note, that a permanently low PWM signal (0% duty cycle) will prevent boost converter 3 from starting-up. When the WLED driver is enabled it first checks the status of IFB1 to IFB6 and shuts down any channels that it detects are disabled/unused. These channels will be subsequently ignored until a POR occurs or EN is toggled. 5.3.10 Undervoltage Lockout An undervoltage lockout function disables the IC when the supply voltage is too low for proper operation. 5.4 5.4.1 Device Functional Modes Dimming Modes The TPS65154 support direct dimming and phase-shift dimming modes. The active dimming mode can be selected using the DMODE bit in the CONFIG register. 22 Detailed Description Copyright © 2013–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TPS65154 TPS65154 www.ti.com 5.4.1.1 SLVSBG2A – SEPTEMBER 2013 – REVISED JUNE 2016 Direct Dimming When direct dimming is selected, the output current sinks are controlled directly by the PWM signal. In this mode, they are turned on and off together, at the same frequency and duty cycle as the PWM signal (see Figure 5-10). PWM IFB1 IFB2 IFB3 IFB4 IFB5 IFB6 Figure 5-10. Direct Dimming 5.4.1.2 Phase-Shift Dimming When phase-shift dimming mode is selected, the output dimming frequency does not depend on the frequency of the PWM signal but can be independently programmed from 15 kHz to 22 kHz using the FDIM register. In this mode, the duty cycle information contained in the PWM signal is extracted and reused to generate up to six outputs, at the output frequency set by the FDIM register, and phase-shifted with respect to each other by 360°/N, where N is the number of outputs in use (see Figure 5-11). Using phase-shifted outputs, the maximum load current step is reduced by the same factor N, resulting in reduced voltage ripple on the boost converter's output and consequently lower audible noise. PWM IFB1 IFB2 IFB3 IFB4 IFB5 IFB6 Figure 5-11. Phase-Shift Dimming Detailed Description Copyright © 2013–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TPS65154 23 TPS65154 SLVSBG2A – SEPTEMBER 2013 – REVISED JUNE 2016 5.4.2 www.ti.com Power Sequencing Figure 5-12 shows the typical power-up/down characteristic of the TPS65154. 5.4.2.1 Power-Up VCC starts ramping tDLY1 seconds after VIN > VUVLO. RST is initially held low. tRST seconds after VCC has finished ramping RST goes high. AVDD starts ramping tDLY2 seconds after RST has gone high. VGL starts ramping tDLY3 seconds after AVDD starts ramping. VGH starts ramping as soon as VGL has finished ramping. VGHM is initially held low (connected to RE). tDLY4 seconds after VGH has finished ramping, gate voltage shaping is enabled and VGHM follows the state of FLK. XAO is initially held low. tDLY6 seconds after VIN>VDET XAO goes high. The WLED driver is enabled by the logical AND of AVDD (that is, AVDD has finished ramping) and EN. 5.4.2.2 Power-Down VCC, AVDD, VGH and VGL are disabled when VINVDET VIN>VUVLO1 VIN>VDET VIN>VUVLO1 tDLY1 VCC tRST RST RMODE=0 RST RMODE=1 tDLY2 tSS2 AVDD tSS3 tDLY3 VGL tSS4 VGH tDLY4 AVDD VGHM AVDD>VUVLO2 VCOM XAO AVDD