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TPS709-Q1
SLVSCE6C – DECEMBER 2013 – REVISED JUNE 2018
TPS709-Q1 150-mA, 30-V, 1-µA IQ Voltage Regulators With Enable
1 Features
3 Description
•
•
The TPS709-Q1 series of linear regulators are
ultralow, quiescent current devices designed for
power-sensitive applications. A precision band-gap
and error amplifier provides 2% accuracy over
temperature. Quiescent current of only 1 µA makes
these devices ideal solutions for battery-powered,
always-on systems that require very little idle-state
power dissipation. These devices have thermalshutdown,
current-limit,
and
reverse-current
protections for added safety.
1
•
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 1: –40°C to 125°C
Ambient Operating Temperature
– Device HBM ESD Classification Level 2
– Device CDM ESD Classification Level C4B
Input Voltage Range: 2.7 V to 30 V
Ultralow IQ: 1 μA
Reverse Current Protection
Low ISHUTDOWN: 150 nA
Supports 200-mA Peak Output
2% Accuracy Over Temperature
Available in Fixed-Output Voltages:
1.2 V to 6.5 V
Thermal Shutdown and Overcurrent Protection
Packages: SOT-23-5, WSON-6
These regulators can be put into shutdown mode by
pulling the EN pin low. The shutdown current in this
mode goes down to 150 nA, typical.
The TPS709-Q1 series is available in WSON-6 and
SOT-23-5 packages.
Device Information(1)
PART NUMBER
TPS709-Q1
2 Applications
•
•
•
•
•
PACKAGE
BODY SIZE (NOM)
SOT-23 (5)
2.90 mm × 1.60 mm
WSON (6)
2.00 mm × 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Automotive
Infotainment
Body Control Modules
Navigation Systems
Standby Power for Microcontrollers
space
space
space
space
space
space
Typical Application Circuit
IN
1 µF
3.5
VO
OUT
2.2 µF
GND
EN
TPS709-Q1
NC
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
3
Ground Pin Current (PA)
VI
GND Current vs VIN and Temperature
2.5
2
1.5
1
0.5
0
5
10
15
20
Input Voltage (V)
25
30
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS709-Q1
SLVSCE6C – DECEMBER 2013 – REVISED JUNE 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
5
6.1
6.2
6.3
6.4
6.5
6.6
6.7
5
5
5
5
6
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Typical Characteristics ..............................................
Detailed Description ............................................ 14
7.1 Overview ................................................................. 14
7.2 Functional Block Diagram ....................................... 14
7.3 Feature Description................................................. 14
7.4 Device Functional Modes........................................ 16
8
Application and Implementation ........................ 17
8.1 Application Information............................................ 17
8.2 Typical Application .................................................. 18
9 Power Supply Recommendations...................... 18
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Examples................................................... 21
11 Device and Documentation Support ................. 22
11.1
11.2
11.3
11.4
11.5
11.6
11.7
Device Support......................................................
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
22
22
22
22
22
23
23
12 Mechanical, Packaging, and Orderable
Information ........................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (March 2015) to Revision C
Page
•
Changed from: Dropout Voltage (V) to: Dropout Voltage (mV) in Figure 8, Figure 9, and Figure 10 ................................... 7
•
Deleted last sentence from Shutdown section .................................................................................................................... 14
•
Changed text From: "input supply range of 2.7 V to 6.5 V:" To: " input supply range of 2.7 V to 30 V." in the Power
Supply Recommendations section ....................................................................................................................................... 18
Changes from Revision A (December 2013) to Revision B
Page
•
Added DRV package to document, ESD Ratings, Recommended Operating Conditions, and Timing Requirements
tables, and Overview, Device Functional Modes, Typical Application, Device and Documentation Support,
and Mechanical, Packaging, and Orderable Information sections ......................................................................................... 1
•
Changed Application Information, Feature Description, Power Supply Recommendations, and Layout sections ................ 1
•
Deleted Low Dropout Features bullet ..................................................................................................................................... 1
•
Changed Applications section ................................................................................................................................................ 1
•
Changed last sentence of Description section ...................................................................................................................... 1
•
Added Device Information table ............................................................................................................................................. 1
•
Added front-page curve .......................................................................................................................................................... 1
•
Added DRV package drawing to Pin Configuration and Functions section ........................................................................... 4
•
Changed Pin Functions table: added DRV and I/O columns, added Thermal pad row, and changed EN pin description.... 4
•
Changed Recommended Operating Conditions table ............................................................................................................ 5
•
Added DRV column to Thermal Information table.................................................................................................................. 5
•
Changed Electrical Characteristics conditions ...................................................................................................................... 6
•
Changed VOUT, ICL, ISHDN, and IREV symbols in Electrical Characteristics table ..................................................................... 6
•
Changed VEN(HI) parameter into VEN(HI) and VEN(LO) parameters in Electrical Characteristics table ....................................... 6
•
Changed TA parameter to TJ in Electrical Characteristics table ............................................................................................. 6
•
Changed Typical Characteristics section ............................................................................................................................... 7
•
Changed junction temperature values in first paragraph of Thermal Protection section ..................................................... 15
2
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•
SLVSCE6C – DECEMBER 2013 – REVISED JUNE 2018
Changed 6.3-V to 10-V in second sentence of Detailed Design Procedure section............................................................ 18
Changes from Original (December 2013) to Revision A
•
Page
Released to production........................................................................................................................................................... 1
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TPS709-Q1
SLVSCE6C – DECEMBER 2013 – REVISED JUNE 2018
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5 Pin Configuration and Functions
DBV Package
SOT-23-5
(Top View)
1
GND
2
5
3
EN
4
OUT
NC
OUT
1
NC
2
GND
3
GND
IN
DRV Package
WSON-6
(Top View)
6
IN
5
NC
4
EN
Pin Functions
PIN
NO.
I/O
DESCRIPTION
3
I
Enable pin. Driving this pin high enables the device. Driving this pin low puts the
device into low current shutdown. This pin can be left floating to enable the device.
The maximum voltage must remain below 6.5 V.
3
2
—
6
1
I
NC
2, 5
4
—
No internal connection
OUT
1
5
O
Regulated output voltage. Connect a small 2.2-µF or greater ceramic capacitor
from this pin to ground to assure stability.
—
—
The thermal pad is electrically connected to the GND node.
Connect to the GND plane for improved thermal performance.
NAME
DRV
DBV
EN
4
GND
IN
Thermal pad
4
Ground
Unregulated input to the device
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SLVSCE6C – DECEMBER 2013 – REVISED JUNE 2018
6 Specifications
6.1 Absolute Maximum Ratings
specified at TJ = –40°C to 125°C, unless otherwise noted; all voltages are with respect to GND (1)
Voltage
Maximum output current
MIN
MAX
UNIT
VIN
–0.3
32
V
VEN
–0.3
7
V
VOUT
–0.3
7
V
IOUT
Internally limited
PDISS
See Thermal Information
Output short-circuit duration
Indefinite
Continuous total power dissipation
Junction temperature, TJ
–55
150
°C
Ambient temperature, TA
–40
125
°C
Storage temperature, Tstg
–55
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101 (2)
±750
UNIT
V
JEDEC document JEP155 states that 2-kV HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 500-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage
2.7
30
VOUT
Output voltage
1.2
6.5
V
IOUT
Output current
0
150
mA
VEN
Enable voltage
0
6.5
V
CIN
Input capacitor
COUT
Output capacitor
TJ
Operating junction temperature
1
2
V
µF
2.2
–40
47
µF
125
°C
6.4 Thermal Information
TPS709-Q1
THERMAL METRIC
(1)
DBV (SOT-23)
DRV (WSON)
5 PINS
6 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
210.9
73.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
127.4
97.0
°C/W
RθJB
Junction-to-board thermal resistance
39.4
42.6
°C/W
ψJT
Junction-to-top characterization parameter
16.8
2.9
°C/W
ψJB
Junction-to-board characterization parameter
38.4
42.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
12.8
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
At –40°C ≤ TJ, TA ≤ 125°C, VIN = VOUT(nom) + 1 V or 2.7 V (whichever is greater), IOUT = 1 mA, VEN = 2 V, and CIN = COUT = 2.2μF ceramic, unless otherwise noted. Typical values are at TJ = 25°C.
PARAMETER
TEST CONDITIONS
VIN
Input voltage range
VOUT
Output voltage range
VOUT
ΔVOUT
DC output accuracy
ICL
IGND
Ground pin current
ISHDN
Shutdown current
VOUT ≥ 3.3 V
–1%
10
mV
20
50
mV
TPS70933-Q1, IOUT = 50 mA
295
650
TPS70933-Q1, IOUT = 150 mA
975
1540
TPS70950-Q1, IOUT = 50 mA
245
500
TPS70950-Q1, IOUT = 150 mA
690
1200
VOUT = 0.9 × VOUT(nom)
320
500
IOUT = 0 mA, VOUT ≤ 3.3 V
200
1.3
2.55
IOUT = 0 mA, VOUT > 3.3 V
1.4
2.7
IOUT = 100 μA, VIN = 30 V
6.7
10
IOUT = 150 mA
350
VEN ≤ 0.4 V, VIN = 2.7 V
150
BW = 10 Hz to 100 kHz, IOUT = 10 mA,
VIN = 2.7 V, VOUT = 1.2 V
VEN(HI)
Enable pin high (enabled)
0.9
VEN(LO)
Enable pin high (disabled)
0
IEN
Enable pin current
EN = 1.0 V, VIN = 5.5 V
Reverse current
(flowing out of IN pin)
Reverse current
(flowing into OUT pin)
Operating junction
temperature
(1)
(2)
(3)
µA
dB
52
Output noise voltage
TJ
mA
nA
62
Vn
Thermal shutdown
temperature
mV
80
Power-supply rejection ratio f = 100 Hz
TSD
1%
3
f = 1 kHz
IREV
V
6.5
2%
f = 10 Hz
PSRR
V
1.2
VIN = VOUT(nom) + 1.5 V or 3 V (whichever is
greater), 100 µA ≤ IOUT ≤ 150 mA
UNIT
30
–2%
Load regulation
Output current limit
MAX
VOUT < 3.3 V
(VOUT(nom) + 1 V, 2.7 V) ≤ VIN ≤ 30 V
(3)
TYP
2.7
Line regulation
Dropout voltage (1) (2)
VDO
MIN
190
μVRMS
V
0.4
V
300
nA
VOUT = 3 V, VIN = VEN = 0 V
10
nA
VOUT = 3 V, VIN = VEN = 0 V
100
nA
Shutdown, temperature increasing
158
Reset, temperature decreasing
140
–40
°C
125
°C
VDO is measured with VIN = 0.98 × VOUT(nom).
Dropout is only valid when VOUT ≥ 2.8 V because of the minimum input voltage limits.
Measured with VIN = VOUT + 3 V for VOUT ≤ 2.5 V. Measured with VIN = VOUT + 2.5 V for VOUT > 2.5 V.
6.6 Timing Requirements
At TJ = –40°C to 125°C, VIN = VOUT(nom) + 1 V or 2.7 V (whichever is greater), RL = 47 Ω, VEN = 2 V, and CIN = COUT = 2.2-μF
ceramic, unless otherwise noted. Typical values are at TJ = 25°C.
MIN
tSTR
(1)
6
Start-up time (1)
NOM
MAX
UNIT
VOUT(nom) ≤ 3.3 V
200
600
µs
VOUT(nom) > 3.3 V
500
1500
µs
Startup time = time from EN assertion to 0.95 × VOUT(nom) and load = 47 Ω.
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6.7 Typical Characteristics
Over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(nom) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ = 25°C.
1.203
3.305
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
3.3025
Output Voltage (V)
Output Voltage (V)
1.202
1.201
1.2
1.199
3.2975
3.2925
0
6
12
18
Input Voltage (V)
24
30
5
Figure 1. 1.2-V Line Regulation vs VIN and Temperature
10
15
20
Input Voltage (V)
25
30
Figure 2. 3.3-V Line Regulation vs VIN and Temperature
1.204
6.507
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
6.501
6.498
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
1.2
Output Voltage (V)
6.504
Output Voltage (V)
3.3
3.295
1.198
1.196
1.192
1.188
6.495
1.184
6.492
5
10
15
20
Input Voltage (V)
25
0
30
Figure 3. 6.5-V Line Regulation vs VIN and Temperature
30
60
90
Output Current (mA)
120
150
Figure 4. 1.2-V Load Regulation vs IOUT and Temperature
6.5
3.306
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
3.294
3.288
3.282
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
6.495
Output Voltage (V)
3.3
Output Voltage (V)
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
6.49
6.485
6.48
6.475
3.276
6.47
0
30
60
90
Output Current (mA)
120
150
Figure 5. 3.3-V Load Regulation vs IOUT and Temperature
0
30
60
90
Output Current (mA)
120
150
Figure 6. 6.5-V Load Regulation vs IOUT and Temperature
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Typical Characteristics (continued)
Over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(nom) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ = 25°C.
2400
1.204
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
IOUT = 10 mA
IOUT = 150 mA
2000
Dropout Voltage (mV)
Output Voltage (V)
1.2
1.196
1.192
1.184
-50
0
50
Input Voltage (V)
100
400
2.4
150
4
4.8
Input Voltage (V)
5.6
6.4
1000
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
800
Dropout Voltage (mV)
1200
Dropout Voltage (mV)
3.2
Figure 8. 6.5-V Dropout Voltage vs VIN and Temperature
Figure 7. 1.2-V Output Voltage vs Temperature
1500
900
600
300
600
400
200
0
0
0
30
60
90
Output Current (mA)
120
150
0
Figure 9. 3.3-V Dropout Voltage vs IOUT and Temperature
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
440
420
360
300
240
3.5
60
90
Output Current (mA)
120
150
480
Current Limit (mA)
480
30
Figure 10. Dropout Voltage vs IOUT and Temperature
540
Current Limit (mA)
1200
800
1.188
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
400
360
320
4
4.5
5
5.5
Input Voltage (V)
6
6.5
Figure 11. 1.2-V Current Limit vs VIN and Temperature
8
1600
280
4.8
5.4
6
6.6
7.2
Input Voltage (V)
7.8
8.4
Figure 12. 3.3-V Current Limit vs VIN and Temperature
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Typical Characteristics (continued)
Over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(nom) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ = 25°C.
3.5
520
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
3
Ground Pin Current (PA)
Current Limit (mA)
480
440
400
360
2.5
2
1.5
1
320
280
8.5
0.5
9
9.5
10
10.5
Input Voltage (V)
11
0
11.5
Figure 13. 6.5-V Current Limit vs VIN and Temperature
15
20
Input Voltage (V)
25
30
3.5
2.5
2
1.5
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
3
Ground Pin Current (PA)
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
3
Ground Pin Current (PA)
10
Figure 14. 1.2-V Ground Pin Current vs VIN and
Temperature
3.5
1
2.5
2
1.5
1
0.5
0.5
0
5
10
15
20
Input Voltage (V)
25
30
5
Figure 15. 3.3-V Ground Pin Current vs VIN and
Temperature
10
15
20
Input Voltage (V)
25
30
Figure 16. 6.5-V Ground Pin Current vs VIN and
Temperature
750
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
3.5
3
2.5
2
1.5
Ground Pin Current (PA)
4
Ground Pin Current (PA)
5
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
600
450
300
150
0
1
0
5
10
15
20
Input Voltage (V)
25
Figure 17. 3.3-V Ground Current vs VIN and
Temperature with EN Floating
30
0
30
60
90
Output Current
120
150
Figure 18. 1.2-V Ground Pin Current vs IOUT and
Temperature
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Typical Characteristics (continued)
Over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(nom) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ = 25°C.
750
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
600
Ground Pin Current (PA)
Ground Pin Current (PA)
750
450
300
150
0
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
600
450
300
150
0
0
30
60
90
Output Current
120
150
0
Figure 19. 3.3-V Ground Pin Current vs IOUT and
Temperature
150
0.6
0.45
0.3
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
0.75
Ground Pin Current (PA)
Ground Pin Current (PA)
120
0.9
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
0.75
0.15
0.6
0.45
0.3
0.15
0
0
0
5
10
15
20
Input Voltage (V)
25
30
0
Figure 21. 1.2-V Shutdown Current vs VIN and Temperature
5
10
15
20
Input Voltage (V)
25
30
Figure 22. 3.3-V Shutdown Current vs VIN and Temperature
600
0.9
TJ = 125qC
TJ = 85qC
TJ = 25qC
TJ = -40qC
0.6
0.45
0.3
1.2V Output
3.3V Output
6.5V Output
500
Start-up Time (Ps)
0.75
Ground Pin Current (PA)
60
90
Output Current
Figure 20. 6.5-V Ground Pin Current vs IOUT and
Temperature
0.9
400
300
200
100
0.15
0
5
10
15
20
Input Voltage (V)
25
30
Figure 23. 6.5-V Shutdown Current vs VIN and Temperature
10
30
0
-50
0
50
Temperature (qC)
100
150
Figure 24. Start-Up Time vs Temperature
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Typical Characteristics (continued)
Over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(nom) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ = 25°C.
90
80
70
Noise (PV/—Hz)
PSRR (dB)
60
50
40
30
20
10
0
1E+1
1E+2
1E+3
1E+4
1E+5
Frequency (Hz)
1E+6
1E+7
7
6.5
6
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
1E+1
Figure 25. Power-Supply Rejection Ratio vs Frequency
1E+2
1E+3
Frequency (Hz)
1E+4
1E+5
Figure 26. Noise
Channel 2
(200 mV / div)
Channel 2
(200 mV / div)
Channel 4
(50 mA / div)
Channel 4
(100 mA / div)
Time (100 ms / div)
Time (500 ms / div)
Channel 2 = VOUT, channel 4 = IOUT, VIN = 2.7 V
Figure 27. TPS70912-Q1 Load Transient (0 mA to 50 mA)
Channel 2 = VOUT, channel 4 = IOUT, VIN = 2.7 V
Figure 28. TPS70912-Q1 Load Transient (1 mA to 150 mA)
Channel 2
(200 mV / div)
Channel 2
(200 mV / div)
Channel 4
(50 mA / div)
Channel 4
(100 mA / div)
Time (100 ms / div)
Time (10 ms / div)
Channel 2 = VOUT, channel 4 = IOUT, VIN = 2.7 V
Figure 29. TPS70912-Q1 Load Transient (50 mA to 0 mA)
Channel 2 = VOUT, channel 4 = IOUT, VIN = 2.7 V
Figure 30. TPS70912-Q1 Load Transient (50 mA to 150 mA)
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Typical Characteristics (continued)
Over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(nom) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ = 25°C.
Channel 2
(200 mV / div)
Channel 2
(200 mV / div)
Channel 4
(50 mA / div)
Channel 4
(100 mA / div)
Time (500 ms / div)
Time (100 ms / div)
Channel 2 = VOUT, channel 4 = IOUT, VIN = 4.3 V
Figure 31. TPS70933-Q1 Load Transient (0 mA to 50 mA)
Channel 2 = VOUT, channel 4 = IOUT, VIN = 4.3 V
Figure 32. TPS70933-Q1 Load Transient (1 mA to 150 mA)
Channel 2
(200 mV / div)
Channel 2
(200 mV / div)
Channel 4
(50 mA / div)
Channel 4
(50 mA / div)
Time (500 ms / div)
Time (10 ms / div)
Channel 2 = VOUT, channel 4 = IOUT, VIN = 4.3 V
Figure 33. TPS70933-Q1 Load Transient (50 mA to 0 mA)
Channel 2 = VOUT, channel 4 = IOUT, VIN = 4.3 V
Figure 34. TPS70933-Q1 Load Transient (50 mA to 150 mA)
Channel 2
(50 mV / div)
Channel 2
(50 mV / div)
Channel 4
(2 V / div)
Channel 4
(2 V / div)
Time (50 ms / div)
Time (50 ms / div)
Channel 2 = VOUT, channel 4 = VIN, IOUT = 10 mA
Figure 35. TPS70912-Q1 Line Transient (2.7 V to 3.7 V)
12
Channel 2 = VOUT, channel 4 = VIN, IOUT = 50 mA
Figure 36. TPS70912-Q1 Line Transient (2.7 V to 3.7 V)
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Typical Characteristics (continued)
Over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(nom) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ = 25°C.
Channel 2
(50 mV / div)
Channel 2
(50 mV / div)
Channel 4
(2 V / div)
Channel 4
(2 V / div)
Time (50 ms / div)
Time (50 ms / div)
Channel 2 = VOUT, channel 4 = VIN, IOUT = 10 mA
Channel 2 = VOUT, channel 4 = VIN, IOUT = 50 mA
Figure 37. TPS70933-Q1 Line Transient (4.3 V to 5.3 V)
Figure 38. TPS70933-Q1 Line Transient (4.3 V to 5.3 V)
Channel 2
(1 V / div)
Channel 2
(1 V / div)
Channel 1
(500 mV / div)
Channel 1
(1 V / div)
Time (50 ms / div)
Time (500 ms / div)
Channel 1 = EN, channel 2 = VOUT, VIN = 4.3 V, COUT = 2.2 µF,
TPS70633
Figure 39. Power-Up with Enable
Channel 1 = VIN, channel 2 = VOUT, IOUT = 3 mA, TPS70633
Figure 40. Power-Up and Power-Down Response
Channel 2
(1 V / div)
Channel 1
(1 V / div)
Time (500 ms / div)
Channel 1 = VIN, channel 2 = VOUT, IOUT = 150 mA, TPS70633
Figure 41. Power-Up and Power-Down Response
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7 Detailed Description
7.1 Overview
The TPS709-Q1 series are ultralow quiescent current, low-dropout (LDO) linear regulators. The TPS709-Q1
offers reverse current protection to block any discharge current from the output into the input. The TPS709-Q1
also features current limit and thermal shutdown for reliable operation.
7.2 Functional Block Diagram
OUT
IN
Current
Limit
Thermal
Shutdown
EN
Bandgap
Logic
Device
GND
7.3 Feature Description
7.3.1 Undervoltage Lockout (UVLO)
The TPS709-Q1 uses an undervoltage lockout (UVLO) circuit to keep the output shut off until the internal circuitry
operates properly.
7.3.2 Shutdown
The enable pin (EN) is active high. Enable the device by forcing the EN pin to exceed VEN(HI) (0.9 V, minimum).
Turn off the device by forcing the EN pin to drop below 0.4 V.
7.3.3 Reverse Current Protection
The TPS709-Q1 has integrated reverse current protection. Reverse current protection prevents the flow of
current from the OUT pin to the IN pin when output voltage is higher than input voltage. The reverse current
protection circuitry places the power path in high impedance when the output voltage is higher than the input
voltage. This setting reduces leakage current from the output to the input to 10 nA, typical. The reverse current
protection is always active regardless of the enable pin logic state or if the OUT pin voltage is greater than 1.8 V.
Reverse current can flow if the output voltage is less than 1.8 V and if input voltage is less than the output
voltage.
If voltage is applied to the input pin, then the maximum voltage that can be applied to the OUT pin is the lower of
three times the nominal output voltage or 6.5 V. For example, if the 1.2-V output voltage version is used, then the
maximum reverse bias voltage that can be applied to the OUT pin is 3.6 V. If the 3.3-V output voltage version is
used, then the maximum reverse bias voltage that can be applied to the OUT pin is 6.5 V.
14
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Feature Description (continued)
7.3.4 Internal Current Limit
The TPS709-Q1 internal current limit helps protect the regulator during fault conditions. During current limit, the
output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output
voltage is not regulated, and can be measured as (VOUT = ILIMIT × RLOAD). The PMOS pass transistor dissipates
[(VIN – VOUT) × ILIMIT] until a thermal shutdown is triggered and the device turns off. When cool, the device is
turned on by the internal thermal shutdown circuit. If the fault condition continues, the device cycles between
current limit and thermal shutdown; see the Thermal Information section for more details.
The TPS709-Q1 is characterized over the recommended operating output current range up to 150 mA. The
internal current limit begins to limit the output current at a minimum of 200 mA of output current.
7.3.5 Thermal Protection
Thermal protection disables the output when the junction temperature rises to approximately 158°C, allowing the
device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is again
enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection
circuit can cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a
result of overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, limit junction temperature to 125°C, maximum. To estimate the margin of safety
in a complete design (including heatsink), increase the ambient temperature until the thermal protection is
triggered; use worst-case loads and signal conditions. For good reliability, thermal protection must trigger at least
35°C above the maximum expected ambient condition of the particular application. This configuration produces a
worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load.
The TPS709-Q1 internal protection circuitry is designed to protect against overload conditions. This circuitry is
not intended to replace proper heatsinking. Continuously running the TPS709-Q1 into thermal shutdown
degrades device reliability.
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7.4 Device Functional Modes
7.4.1 Normal Operation
The device regulates to the nominal output voltage under the following conditions:
• The input voltage is at least as high as VIN(min).
• The input voltage is greater than the nominal output voltage added to the dropout voltage.
• The enable voltage has previously exceeded the enable rising threshold voltage and has not decreased
below the enable falling threshold.
• The output current is less than the current limit.
• The device junction temperature is less than the maximum specified junction temperature.
7.4.2 Dropout Operation
If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other
conditions are met for normal operation, the device operates in dropout mode. In this mode of operation, the
output voltage is the same as the input voltage minus the dropout voltage. The transient performance of the
device is significantly degraded because the pass device is in the linear region and no longer controls the current
through the LDO. Line or load transients in dropout can result in large output voltage deviations.
7.4.3 Disabled
The device is disabled under the following conditions:
• The enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising
threshold.
• The device junction temperature is greater than the thermal shutdown temperature.
Table 1 shows the conditions that lead to the different modes of operation.
Table 1. Device Functional Mode Comparison
PARAMETER
OPERATING MODE
VIN
VEN
IOUT
TJ
Normal mode
VIN > VOUT(nom) + VDO and
VIN > VIN(min)
VEN > VEN(HI)
IOUT < ILIM
TJ < 125°C
Dropout mode
VIN(min) < VIN < VOUT(nom) + VDO
VEN > VEN(HI)
—
TJ < 125°C
—
VEN < VEN(low)
—
TJ > 158°C
Disabled mode
(any true condition disables the
device)
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS709-Q1 consumes low quiescent current and delivers excellent line and load transient performance.
This performance, combined with low noise and good PSRR with little (VIN – VOUT) headroom, makes these
devices ideal for RF portable applications, current limit, and thermal protection. The TPS709-Q1 devices are
specified from –40°C to 125°C.
8.1.1 Input and Output Capacitor Considerations
The TPS709-Q1 devices are stable with output capacitors with an effective capacitance of 2.0 μF or greater for
output voltages below 1.5 V. For output voltages equal or greater than 1.5 V, the minimum effective capacitance
for stability is 1.5 µF. The maximum capacitance for stability is 47 µF. The equivalent series resistance (ESR) of
the output capacitor must be between 0 Ω and 0.2 Ω for stability.
The effective capacitance is the minimum capacitance value of a capacitor after taking into account variations
resulting from tolerances, temperature, and dc bias effects. X5R- and X7R-type ceramic capacitors are
recommended because these capacitors have minimal variation in value and ESR over temperature.
Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-µF to
2.2-µF capacitor from IN to GND. This capacitor counteracts reactive input sources and improves transient
response, input ripple rejection, and PSRR.
8.1.2 Dropout Voltage
The TPS709-Q1 uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the
dropout voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output
resistance is the RDS(ON) of the PMOS pass element. VDO approximately scales with the output current because
the PMOS device functions like a resistor in dropout.
The ground pin current of many linear voltage regulators increases substantially when the device is operated in
dropout. This increase in ground pin current while operating in dropout can be several orders of magnitude larger
than when the device is not in dropout. The TPS709-Q1 employs a special control loop that limits the increase in
ground pin current while operating in dropout. This functionality allows for the most efficient operation while in
dropout conditions that can greatly increase battery run times.
8.1.3 Transient Response
As with any regulator, increasing the output capacitor size reduces over- and undershoot magnitude, but
increases transient response duration.
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8.2 Typical Application
VI
IN
VO
OUT
1 µF
2.2 µF
GND
TPS70933-Q1
EN
NC
Figure 42. 3.3-V, Low-IQ Rail
8.2.1 Design Requirements
Table 2 summarizes the design requirements for Figure 42.
Table 2. Design Requirements for a 3.3-V, Low-IQ Rail Application
PARAMETER
DESIGN SPECIFICATION
VIN
4.3 V
VOUT
3.3 V
I(IN) (no load)
< 5 µA
IOUT (max)
150 mA
8.2.2 Detailed Design Procedure
Select a 2.2-µF, 10-V X7R output capacitor to satisfy the minimum output capacitance requirement with a 3.3-V
dc bias.
Select a 1.0-µF, 10-V X7R input capacitor to provide input noise filtering and eliminate high-frequency voltage
transients.
8.2.3 Application Curves
Channel 2
(200 mV / div)
Channel 2
(1 V / div)
Channel 1
(500 mV / div)
Channel 4
(50 mA / div)
Time (500 ms / div)
Time (50 ms / div)
Channel 2 = VOUT, channel 4 = IOUT, VIN = 4.3 V
Channel 1 = EN, channel 2 = VOUT, VIN = 4.3 V, COUT = 2.2 µF,
TPS70933-Q1
Figure 43. TPS70933-Q1 Load Transient (50 mA to 150 mA)
Figure 44. Power-Up with Enable
9 Power Supply Recommendations
This device is designed to operate with an input supply range of 2.7 V to 30 V. The input voltage range must
provide adequate headroom in order for the device to have a regulated output. This input supply must be wellregulated and stable. If the input supply is noisy, additional input capacitors with low ESR can help improve the
output noise performance.
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10 Layout
10.1 Layout Guidelines
10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
Input and output capacitors must be placed as close to the device pins as possible. To improve ac performance
(such as PSRR, output noise, and transient response), TI recommends that the board be designed with separate
ground planes for VIN and VOUT, with the ground plane connected only at the device GND pin. In addition, the
output capacitor ground connection must be connected directly to the device GND pin. High ESR capacitors may
degrade PSRR performance.
10.1.2 Power Dissipation
The ability to remove heat from the die is different for each package type, presenting different considerations in
the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves
the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the
Thermal Information. Using heavier copper increases the effectiveness in removing heat from the device. The
addition of plated through-holes to heat-dissipating layers also improves the heatsink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation (PD) can be approximated by
the product of the output current times the voltage drop across the output pass element (VIN to VOUT), as shown
in Equation 1.
PD = (VIN – VOUT) × IOUT
(1)
Figure 45 shows the maximum ambient temperature versus the power dissipation of the TPS709-Q1. This figure
assumes the device is soldered on a JEDEC standard, high-K layout with no airflow over the board. Actual board
thermal impedances vary widely. If the application requires high power dissipation, having a thorough
understanding of the board temperature and thermal impedances is helpful to ensure the TPS709-Q1 does not
operate above a junction temperature of 125°C.
Maximum Ambient Temperature (qC)
125
DBV Package
DRV Package
100
75
50
25
0
0.25
0.5
0.75
Power Dissipation (W)
1
1.2
Figure 45. Maximum Ambient Temperature vs Device Power Dissipation
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Layout Guidelines (continued)
Estimating the junction temperature can be done by using the thermal metrics ΨJT and ΨJB, shown in the Thermal
Information. These metrics are a more accurate representation of the heat transfer characteristics of the die and
the package than RθJA. The junction temperature can be estimated with Equation 2.
YJT: TJ = TT + YJT · PD
YJB: TJ = TB + YJB · PD
where:
•
•
•
PD is the power dissipation shown by Equation 1,
TT is the temperature at the center-top of the IC package,
TB is the PCB temperature measured 1 mm away from the IC package on the PCB surface.
(2)
NOTE
Both TT and TB can be measured on actual application boards using a thermo-gun (an
infrared thermometer).
For more information about measuring TT and TB, see the application note Using New Thermal Metrics
(SBVA025), available for download at www.ti.com.
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10.2 Layout Examples
Input
Trace
Input Capacitor
Enable
Trace
Input Ground
Plane
NC
IN
Grounded
Thermal Plane
EN
Thermal Pad
OUT
NC
GND
Output Trace
Grounded
Thermal Plane
Output Ground
Plane
Output Capacitor
Designates thermal vias.
Figure 46. WSON Layout Example
VOUT
VIN
IN
CIN
OUT
COUT
GND
EN
NC
GND PLANE
Represents via used for application-specific connections.
Figure 47. SOT23-5 Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Evaluation Modules
An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TPS709Q1. The TPS70933EVM-110 evaluation module (and related user guide) can be requested at the Texas
Instruments website through the product folders or purchased directly from the TI eStore.
11.1.1.2 Spice Models
Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of
analog circuits and systems. A SPICE model for the TPS709 is available through the product folders under
Simulation Models.
11.1.2 Device Nomenclature
Table 3. Device Nomenclature (1)
PRODUCT
TPS709xx(x)yyyz-Q1
(1)
VOUT
XX(X) is the nominal output voltage. For output voltages with a resolution of 100 mV, two
digits are used in the ordering number; otherwise, three digits are used (for example, 28 =
2.8 V; 125 = 1.25 V).
YYY is the package designator.
Z is the tape and reel quantity (R = 3000, T = 250).
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:
TPS70933EVM-110 Evaluation Module User Guide
11.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
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11.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS70912QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SLR
TPS70912QDRVRQ1
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SJD
TPS70915QDRVRQ1
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SJE
TPS70918QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SLS
TPS70918QDRVRQ1
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SJF
TPS70925QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SLT
TPS70925QDRVRQ1
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SJG
TPS70927QDRVRQ1
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SJH
TPS70928QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SLU
TPS70928QDRVRQ1
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SJI
TPS70930QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SLV
TPS70930QDRVRQ1
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SJJ
TPS70933QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SLJ
TPS70933QDRVRQ1
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SJK
TPS70936QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SLW
TPS70950QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SLX
TPS70950QDRVRQ1
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SJL
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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