TPS709
ZHCS814H – MARCH 2012 – REVISED JULY 2021
具有使能功能的 TPS709 150mA、30V、1µA IQ 稳压器
1 特性
3 说明
超低 IQ:1μA
反向电流保护
低 I 关断:150nA
输入电压范围:2.7 V 至 30 V
支持 200mA 峰值输出
在工作温度范围内的精度为 2%
可提供固定输出电压:
1.2 V 至 6.5 V
• 热关断保护和过流保护
• 封装:SOT-23-5、WSON-6
TPS709 系列线性稳压器是设计用于功耗敏感类应用的
超低静态电流器件。一个精密带隙和误差放大器在温度
范围内的精度为 2%。只有 1µA 的静态电流使得此器
件成为由电池供电、要求非常小闲置状态功率耗散的常
开系统的理想解决方案。为了增加安全性,这些器件还
具有热关断、电流限制和反向电流保护功能。
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2 应用
烟雾和热量探测器
恒温器
运动检测器(PIR、uWave 等)
无线电动工具
电器电池组
电表
水表
TPS709 系列采用 WSON-6 和
SOT-23-5 封装。
器件信息(1)
器件型号
封装
TPS709
(1)
封装尺寸(标称值)
SOT-23 (5)
2.90mm × 1.60mm
WSON (6)
2.00mm × 2.00mm
如需了解所有可用封装,请参阅产品说明书末尾的封装选项附
录。
2
典型应用电路
Ground Pin Current (µA)
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关断模式通过将 EN 引脚拉为低电平进行使能。该模式
的关断电流低至 150nA(典型值)。
1.8
1.5
1.2
1
TA = −40°C
TA = +25°C
TA = +85°C
0.8
TPS70912
0.5
0
5
10
15
20
Input Voltage (V)
25
30
35
G014
接地电流与 VIN 和温度间的关系
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SBVS186
TPS709
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ZHCS814H – MARCH 2012 – REVISED JULY 2021
Table of Contents
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Typical Characteristics................................................ 6
7 Detailed Description......................................................12
7.1 Overview................................................................... 12
7.2 Functional Block Diagram......................................... 12
7.3 Feature Description...................................................12
7.4 Device Functional Modes..........................................13
8 Application and Implementation.................................. 14
8.1 Application Information............................................. 14
8.2 Typical Application.................................................... 14
9 Power Supply Recommendations................................15
9.1 Power Dissipation..................................................... 15
10 Layout...........................................................................16
10.1 Layout Guidelines................................................... 16
10.2 Layout Example...................................................... 16
11 Device and Documentation Support..........................17
11.1 Device Support........................................................17
11.2 Documentation Support.......................................... 17
11.3 支持资源..................................................................17
11.4 Trademarks............................................................. 17
11.5 Electrostatic Discharge Caution.............................. 17
11.6 术语表..................................................................... 17
12 Mechanical, Packaging, and Orderable
Information.................................................................... 18
4 Revision History
注:以前版本的页码可能与当前版本的页码不同
Changes from Revision G (November 2015) to Revision H (July 2021)
Page
• 更新了整个文档中的表格、图和交叉参考的编号格式......................................................................................... 1
• 更改了应用 部分..................................................................................................................................................1
• Changed VEN(HI) row (changed parameter description and added test condition) in Electrical Characteristics
table.................................................................................................................................................................... 5
• Added VEN(LOW) row to Electrical Characteristics table...................................................................................... 5
• Added M3 suffix information to Device Nomenclature table............................................................................. 17
Changes from Revision F (December 2014) to Revision G (November 2015)
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Added DBV package for TPS709A to Pin Configurations and Functions section.............................................. 3
Added DBV package for TPS709B to Pin Configurations and Functions section.............................................. 3
Added TPS709A and TPS709B to Pin Functions table...................................................................................... 3
Moved operating junction temperature from Electrical Characteristics to Recommended Operating Conditions
............................................................................................................................................................................4
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5 Pin Configuration and Functions
1
GND
2
EN
3
5
OUT
4
NC
图 5-1. TPS709: DBV Package, 5-Pin SOT-23, Top
View
GND
1
IN
2
OUT
3
5
4
1
GND
2
IN
3
5
EN
4
NC
图 5-2. TPS709A: DBV Package, 5-Pin SOT-23, Top
View
EN
NC
图 5-3. TPS709B: DBV Package, 5-Pin SOT-23, Top
View
OUT
OUT
1
NC
2
GND
3
GND
IN
6
IN
5
NC
4
EN
图 5-4. DRV Package, 6-Pin WSON, Top View
表 5-1. Pin Functions
PIN
DRV
NAME
TPS709
DBV
TPS709
I/O
DESCRIPTION
Enable pin. Drive this pin high to enable the device. Drive this pin low
to put the device into low current shutdown. This pin can be left
floating to enable the device. The maximum voltage must remain
below 6.5 V.
TPS709A TPS709B
EN
4
3
5
5
I
GND
3
2
2
1
—
IN
6
1
3
2
I
NC
2, 5
4
4
4
—
No internal connection
1
5
1
3
O
Regulated output voltage. Connect a small 2.2-µF or greater ceramic
capacitor from this pin to ground to assure stability.
—
—
—
—
The thermal pad is electrically connected to the GND node. Connect
this pad to the GND plane for improved thermal performance.
OUT
Thermal pad
Ground
Unregulated input to the device
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6 Specifications
6.1 Absolute Maximum Ratings
specified at TJ = –40°C to 125°C (unless otherwise noted); all voltages are with respect to GND(1)
MIN
Voltage
Maximum output current
MAX
UNIT
VIN
–0.3
32
VEN
–0.3
7
VOUT
–0.3
7
IOUT
Internally limited
PDISS
See Thermal Information
Output short-circuit duration
V
Indefinite
Continuous total power dissipation
Operating junction temperature, TJ
–55
150
°C
Storage temperature, Tstg
–55
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC
JS-001(1)
UNIT
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101(2)
V
±500
JEDEC document JEP155 states that 2-kV HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 500-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage
2.7
30
V
VOUT
Output voltage
1.2
6.5
V
VEN
Enable voltage
0
6.5
V
TJ
Operating junction temperature
–40
125
°C
6.4 Thermal Information
TPS709
THERMAL
DBV
DRV
5 PINS
6 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
212.1
73.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
78.5
97.0
°C/W
RθJB
Junction-to-board thermal resistance
39.5
42.6
°C/W
ψJT
Junction-to-top characterization parameter
2.86
2.9
°C/W
ψJB
Junction-to-board characterization parameter
38.7
42.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
12.8
°C/W
(1)
4
METRIC(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at ambient temperature (TA) = –40°C to +85°C, VIN = VOUT(typ) + 1 V or 2.7 V (whichever is greater), IOUT = 1 mA, VEN = 2 V,
and CIN = COUT = 2.2-μF ceramic (unless otherwise noted); typical values are at TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIN
Input voltage range
2.7
30
V
VOUT
Output voltage range
1.2
6.5
V
VOUT
DC output accuracy
VOUT < 3.3 V
–2%
2%
VOUT ≥ 3.3 V
–1%
1%
ΔVOUT
Line regulation
(VOUT(nom) + 1 V, 2.7 V) ≤ VIN ≤ 30 V
Load regulation
VIN = VOUT(typ) + 1.5 V or 3 V (whichever is
greater), 100 µA ≤ IOUT ≤ 150 mA
Dropout voltage(1) (3)
VDO
Output current limit(4)
I(CL)
Ground pin current
ISHUTDOWN
Shutdown current
PSRR
Power-supply rejection
ratio
10
20
50
TPS70933, IOUT = 50 mA
295
650
TPS70933, IOUT = 150 mA
960
1400
TPS70950, IOUT = 50 mA
245
500
TPS70950, IOUT = 150 mA
690
1200
TPS70965, IOUT = 50 mA
180
500
TPS70965, IOUT = 150 mA
460
1000
VOUT = 0.9 × VOUT(nom)
200
320
500
1.3
2.05
IOUT = 0 mA, VOUT > 3.3 V
1.4
2.25
IOUT = 150 mA
350
VEN ≤ 0.4 V, VIN = 2.7 V
150
IOUT = 0 mA, VOUT ≤ 3.3 V
IGND
3
f = 10 Hz
80
f = 100 Hz
62
f = 1 kHz
52
VOUT(nom) ≤ 3.3 V
200
600
VOUT(nom) > 3.3 V
500
1500
tSTR
Start-up time(2)
VEN(HI)
Enable pin high-level
input voltage
Device enabled
0.9
VEN(LOW)
Enable pin low-level input
Device disabled
voltage
0
IEN
EN pin current
EN = 1.0 V, VIN = 5.5 V
Reverse current
(flowing out of IN pin)
VOUT = 3 V, VIN = VEN = 0 V
10
Reverse current
(flowing into OUT pin)
VOUT = 3 V, VIN = VEN = 0 V
100
Shutdown, temperature increasing
158
Reset, temperature decreasing
140
I(REV)
tSD
(1)
(2)
(3)
(4)
Thermal shutdown
temperature
mA
µA
dB
190
Output noise voltage
mV
nA
BW = 10 Hz to 100 kHz, IOUT = 10 mA,
VIN = 2.7 V, VOUT = 1.2 V
Vn
mV
μVRMS
µs
V
0.4
300
V
nA
nA
°C
VDO is measured with VIN = 0.98 × VOUT(nom).
Start-up time = time from EN assertion to 0.95 × VOUT(nom) and load = 47 Ω.
Dropout is only valid when VOUT ≥ 2.8 V because of the minimum input voltage limits.
Measured with VIN = VOUT + 3 V for VOUT ≤ 2.5 V. Measured with VIN = VOUT + 2.5 V for VOUT > 2.5 V.
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6.6 Typical Characteristics
over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted; typical values are at TJ = 25°C
3.31
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
Output Voltage (V)
Output Voltage (V)
1.205
1.2
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
3.305
3.3
3.295
TPS70912
1.195
0
TPS70933
5
10
15
20
Input Voltage (V)
25
3.29
30
图 6-1. 1.2-V Line Regulation vs VIN and Temperature
15
20
Input Voltage (V)
25
30
G002
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
Output Voltage (V)
1.2
6.5
6.495
1.195
1.19
1.185
TPS70965
5
TPS70912
10
15
20
Input Voltage (V)
25
1.18
30
0
20
40
G003
图 6-3. 6.5-V Line Regulation vs VIN and Temperature
60
80
100
Output Current (mA)
120
140
160
G004
图 6-4. 1.2-V Load Regulation vs IOUT and Temperature
3.305
6.505
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
6.5
6.495
Output Voltage (V)
3.3
Output Voltage (V)
10
1.205
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
6.505
6.49
5
图 6-2. 3.3-V Line Regulation vs VIN and Temperature
6.51
Output Voltage (V)
0
G001
3.295
3.29
3.285
6.49
6.485
6.48
6.475
6.47
3.28
6.465
TPS70933
3.275
0
20
40
60
80
100
Output Current (mA)
120
140
160
TPS70965
0
G005
图 6-5. 3.3-V Load Regulation vs IOUT and Temperature
6
6.46
20
40
60
80
100
Output Current (mA)
120
140
160
G006
图 6-6. 6.5-V Load Regulation vs IOUT and Temperature
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6.6 Typical Characteristics (continued)
over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted; typical values are at TJ = 25°C
1.205
6.505
IOUT = 10 mA
IOUT = 150 mA
Output Voltage (V)
1.2
Output Voltage (V)
IOUT = 10 mA
IOUT = 150 mA
6.5
1.195
1.19
1.185
6.495
6.49
6.485
6.48
6.475
6.47
TPS70912
1.18
−50 −35 −20 −5
TPS70965
6.465
−50 −35 −20 −5
10 25 40 55 70 85 100 115 130
Junction Temperature (°C)
G007
图 6-7. VOUT vs Temperature
图 6-8. VOUT vs Temperature
1600
1600
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
1200
1000
800
600
400
TPS70965
IOUT = 150 mA
200
0
2.5
3.5
4.5
Input Voltage (V)
5.5
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
1400
Dropout Voltage (mV)
Dropout Voltage (mV)
1400
1200
1000
800
600
400
200
TPS70965
0
6.5
0
20
40
60
80
100
Output Current (mA)
G009
图 6-9. Dropout Voltage vs VIN and Temperature
120
140
160
G010
图 6-10. Dropout Voltage vs IOUT and Temperature
500
500
Current Limit (mA)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
450
Current Limit (mA)
10 25 40 55 70 85 100 115 130
Junction Temperature (°C)
G008
400
350
300
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
450
400
350
250
TPS70912
200
3
3.5
4
4.5
5
5.5
Input Voltage (V)
6
6.5
TPS70933
7
300
5
G011
图 6-11. 1.2-V Current Limit vs VIN and Temperature
5.5
6
6.5
7
Input Voltage (V)
7.5
8
8.5
G012
图 6-12. 3.3-V Current Limit vs VIN and Temperature
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6.6 Typical Characteristics (continued)
over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted; typical values are at TJ = 25°C
2
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
450
TPS70965
Ground Pin Current (µA)
Current Limit (mA)
500
400
350
1.8
1.5
1.2
1
TA = −40°C
TA = +25°C
TA = +85°C
0.8
TPS70912
300
8
8.5
9
9.5
10
10.5
Input Voltage (V)
11
11.5
0.5
12
图 6-13. 6.5-V Current Limit vs VIN and Temperature
Ground Pin Current (µA)
Ground Pin Current (µA)
2
1.75
1.5
1.25
1
TA = −40°C
TA = +25°C
TA = +85°C
TPS70933
EN = open
0.75
25
30
35
G014
0
5
10
15
20
Input Voltage (V)
25
30
TA = −40°C
TA = +25°C
TA = +85°C
500
400
300
200
TPS70912
0
35
0
20
40
G035
60
80
100
Output Current (mA)
120
140
160
G015
图 6-16. GND Current vs IOUT and Temperature
0.4
100
TA = −40°C
TA = +25°C
TA = +85°C
0.3
80
PSRR (dB)
Ground Pin Current (µA)
15
20
Input Voltage (V)
100
图 6-15. GND Current vs VIN and Temperature
0.2
0.1
60
40
VOUT = 2.8 V
VIN = 3.8 V
COUT = 2.2 µF
20
Shutdown Current
TPS70912
0
5
10
15
20
Input Voltage (V)
25
30
35
0
10
G016
图 6-17. Shutdown Current vs VIN and Temperature
8
10
600
2.25
0
5
图 6-14. GND Current vs VIN and Temperature
2.5
0.5
0
G013
100
1k
10k
100k
Frequency (Hz)
1M
10M
G017
图 6-18. Power-Supply Rejection Ratio vs Frequency
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6.6 Typical Characteristics (continued)
over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted; typical values are at TJ = 25°C
7
140
VOUT = 2.8 V
130
5
Time (µs)
Voltage ( µV / Hz )
6
4
3
2
120
110
1
0
10
100
1k
Frequency (Hz)
10k
100k
TPS70912
100
−50 −35 −20 −5
G018
图 6-19. Noise
10 25 40 55 70
Temperature (°C)
85 100 115 130
G019
图 6-20. Start-Up Time vs Temperature
Channel 2
(200 mV / div)
Channel 2
(200 mV / div)
Channel 2 = VOUT
Channel 4 = IOUT
VIN = 2.7 V
Channel 2 = VOUT
Channel 4 = IOUT
VIN = 2.7 V
Channel 4
(50 mA / div)
Channel 4
(100 mA / div)
Time (100 ms / div)
Time (500 ms / div)
G020
G021
图 6-21. TPS70912 Load Transient
(0 mA to 50 mA)
图 6-22. TPS70912 Load Transient
(1 mA to 150 mA)
Channel 2
(200 mV / div)
Channel 2
(200 mV / div)
Channel 2 = VOUT
Channel 4 = IOUT
VIN = 2.7 V
Channel 2 = VOUT
Channel 4 = IOUT
VIN = 2.7 V
Channel 4
(100 mA / div)
Channel 4
(50 mA / div)
Time (100 ms / div)
Time (10 ms / div)
G023
G022
图 6-24. TPS70912 Load Transient
(50 mA to 150 mA)
图 6-23. TPS70912 Load Transient
(50 mA to 0 mA)
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6.6 Typical Characteristics (continued)
over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted; typical values are at TJ = 25°C
Channel 2
(200 mV / div)
Channel 2
(200 mV / div)
Channel 2 = VOUT
Channel 4 = IOUT
VIN = 4.3 V
Channel 2 = VOUT
Channel 4 = IOUT
VIN = 4.3 V
Channel 4
(100 mA / div)
Channel 4
(50 mA / div)
Time (500 ms / div)
Time (100 ms / div)
G025
G024
图 6-26. TPS70933 Load Transient
(1 mA to 150 mA)
图 6-25. TPS70933 Load Transient
(0 mA to 50 mA)
Channel 2
(200 mV / div)
Channel 2
(200 mV / div)
Channel 2 = VOUT
Channel 4 = IOUT
VIN = 4.3 V
Channel 2 = VOUT
Channel 4 = IOUT
VIN = 4.3 V
Channel 4
(50 mA / div)
Channel 4
(50 mA / div)
Time (10 ms / div)
Time (500 ms / div)
G026
G027
图 6-27. TPS70933 Load Transient
(50 mA to 0 mA)
图 6-28. TPS70933 Load Transient
(50 mA to 150 mA)
Channel 2 = VOUT
Channel 4 = VIN
IOUT = 10 mA
Channel 2 = VOUT
Channel 4 = VIN
IOUT = 50 mA
Channel 2
(50 mV / div)
Channel 2
(50 mV / div)
Channel 4
(2 V / div)
Channel 4
(2 V / div)
Time (50 ms / div)
Time (50 ms / div)
G028
图 6-29. TPS70912 Line Transient
(2.7 V to 3.7 V)
10
G029
图 6-30. TPS70912 Line Transient
(2.7 V to 3.7 V)
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6.6 Typical Characteristics (continued)
over operating temperature range (TJ = –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V
or 2.7 V (whichever is greater), unless otherwise noted; typical values are at TJ = 25°C
Channel 2 = VOUT
Channel 4 = VIN
IOUT = 10 mA
Channel 2 = VOUT
Channel 4 = VIN
IOUT = 50 mA
Channel 2
(50 mV / div)
Channel 2
(50 mV / div)
Channel 4
(2 V / div)
Channel 4
(2 V / div)
Time (50 ms / div)
Time (50 ms / div)
G030
G031
图 6-31. TPS70933 Line Transient
(4.3 V to 5.3 V)
图 6-32. TPS70933 Line Transient
(4.3 V to 5.3 V)
Channel 1 = EN
Channel 2 = VOUT
VIN = 4.3 V
COUT = 2.2 mF
TPS70933
Channel 2
(1 V / div)
Channel 2
(1 V / div)
Channel 1
(500 mV / div)
Channel 1
(1 V / div)
Time (50 ms / div)
Channel 1 = VIN
Channel 2 = VOUT
IOUT = 3 mA
TPS70933
Time (500 ms / div)
G032
G033
图 6-33. Power-Up With Enable
图 6-34. Power-Up and Power-Down Response
Channel 2
(1 V / div)
Channel 1
(1 V / div)
Channel 1 = VIN
Channel 2 = VOUT
IOUT = 150 mA
TPS70933
Time (500 ms / div)
G034
图 6-35. Power-Up and Power-Down Response
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7 Detailed Description
7.1 Overview
The TPS709 series of devices are ultra-low quiescent current, low-dropout (LDO) linear regulators. The TPS709
offers reverse current protection to block any discharge current from the output into the input. The TPS709 also
features current limit and thermal shutdown for reliable operation.
7.2 Functional Block Diagram
OUT
IN
Current
Limit
Thermal
Shutdown
EN
Bandgap
Logic
Device
GND
7.3 Feature Description
7.3.1 Internal Current Limit
The TPS709 internal current limit helps protect the regulator during fault conditions. During current limit, the
output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output
voltage is not regulated, and can be measured as (VOUT = ILIMIT × RLOAD). The PMOS pass transistor dissipates
[(VIN – VOUT) × ILIMIT] until a thermal shutdown is triggered and the device turns off. When cool, the device is
turned on by the internal thermal shutdown circuit. If the fault condition continues, the device cycles between
current limit and thermal shutdown; see the Thermal Protection section for more details.
The TPS709 is characterized over the recommended operating output current range up to 150 mA. The internal
current limit begins to limit the output current at a minimum of 200 mA of output current. The TPS709 continues
to operate for output currents between 150 mA and 200 mA but some data sheet parameters may not be met.
7.3.2 Dropout Voltage
The TPS709 use a PMOS pass transistor to achieve low dropout voltage. When (VIN – VOUT) is less than the
dropout voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output
resistance is the RDS(ON) of the PMOS pass element. VDO approximately scales with the output current because
the PMOS device functions like a resistor in dropout.
The ground pin current of many linear voltage regulators increases substantially when the device is operated in
dropout. This increase in ground pin current while operating in dropout can be several orders of magnitude
larger than when the device is not in dropout. The TPS709 employs a special control loop that limits the increase
in ground pin current while operating in dropout. This functionality allows for the most efficient operation while in
dropout conditions that can greatly increase battery run times.
12
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7.3.3 Undervoltage Lockout (UVLO)
The TPS709 uses an undervoltage lockout (UVLO) circuit to keep the output shut off until the internal circuitry
operates properly.
7.3.4 Reverse-Current Protection
The TPS709 has integrated reverse-current protection. Reverse-current protection prevents the flow of current
from the OUT pin to the IN pin when output voltage is higher than input voltage. The reverse-current protection
circuitry places the power path in high impedance when the output voltage is higher than the input voltage. This
setting reduces leakage current from the output to the input to 10 nA, typical. The reverse current protection is
always active regardless of the enable pin logic state or if the OUT pin voltage is greater than 1.8 V. Reverse
current can flow if the output voltage is less than 1.8 V and if input voltage is less than the output voltage.
If voltage is applied to the input pin, then the maximum voltage that can be applied to the OUT pin is the lower of
three times the nominal output voltage or 6.5 V. For example, if the 1.2-V output voltage version is used, then the
maximum reverse bias voltage that can be applied to the OUT pin is 3.6 V. If the 5.0-V output voltage version is
used, then the maximum reverse bias voltage that can be applied to the OUT pin is 6.5 V.
7.4 Device Functional Modes
The TPS709 has the following functional modes:
1. Enabled: When the enable pin (EN) goes above 0.9 V, the device is enabled. EN is pulled high by a 300-nA
current source; therefore, EN can be left floating to enable the device. Do not connect EN to VIN. The EN pin
is clamped by a 6.5-V Zener diode. Do not exceed the 7-V absolute maximum rating on the enable pin or
excessive current flowing into the Zener clamp will destroy the device.
2. Disabled: When EN goes below 0.4 V, the device is disabled. During this time, OUT is high impedance and
the current into IN (I(SHUTDOWN)) is typically 150 nA.
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8 Application and Implementation
Note
以下应用部分中的信息不属于 TI 器件规格的范围,TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计,以确保系统功能。
8.1 Application Information
The TPS709 is a series of devices that consume low quiescent current and deliver excellent line and load
transient performance. This performance, combined with low noise and very good PSRR with little (VIN – VOUT)
headroom, makes this device ideal for RF portable applications, current limit, and thermal protection. The
TPS709 is specified from –40°C to +125°C.
8.1.1 Input and Output Capacitor
The TPS709 devices are stable with output capacitors with an effective capacitance of 2.0 μF or greater for
output voltages below 1.5 V. For output voltages equal or greater than 1.5 V, the minimum effective capacitance
for stability is 1.5 µF. The maximum capacitance for stability is 47 µF. The equivalent series resistance (ESR) of
the output capacitor must be between 0 Ω and 0.2 Ω for stability.
The effective capacitance is the minimum capacitance value of a capacitor after taking into account variations
resulting from tolerances, temperature, and dc bias effects. X5R- and X7R-type ceramic capacitors are
recommended because these capacitors have minimal variation in value and ESR over temperature.
Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-µF to
2.2-µF capacitor from IN to GND. This capacitor counteracts reactive input sources and improves transient
response, input ripple, and PSRR. An input capacitor is necessary if line transients greater than 10 V in
magnitude are anticipated.
8.1.2 Transient Response
As with any regulator, increasing the output capacitor size reduces over- and undershoot magnitude, but
increases transient response duration.
8.2 Typical Application
VIN
IN
VOUT
OUT
1 mF
2.2 mF
GND
TPS70933
EN
NC
图 8-1. Wide Input, 3.3-V, Low-IQ Rail
8.2.1 Design Requirements
表 8-1 summarizes the design requirements for 图 8-1.
表 8-1. Design Requirements for a Wide Input, 3.3-V, Low-IQ Rail Application
14
PARAMETER
DESIGN SPECIFICATION
VIN
5 V to 20 V
VOUT
3.3 V
I(IN) (no load)
< 5 μA
IOUT (max)
150 mA
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8.2.2 Detailed Design Procedure
Select a 2.2-µF, 10-V X7R output capacitor to satisfy the minimum output capacitance requirement with a 3.3-V
dc bias.
Select a 1.0-µF, 25-V X7R input capacitor to provide input noise filtering and eliminate high-frequency voltage
transients.
8.2.3 Application Curves
Channel 2
(200 mV / div)
Channel 1 = EN
Channel 2 = VOUT
VIN = 4.3 V
COUT = 2.2 mF
TPS70933
Channel 2
(1 V / div)
Channel 2 = VOUT
Channel 4 = IOUT
VIN = 4.3 V
Channel 1
(500 mV / div)
Channel 4
(50 mA / div)
Time (500 ms / div)
Time (50 ms / div)
G027
图 8-2. TPS70933 Load Transient
(50 mA to 150 mA)
G032
图 8-3. Power-Up With Enable
9 Power Supply Recommendations
This device is designed to operate with an input supply range of 2.7 V to 30 V. If the input supply is noisy,
additional input capacitors with low ESR can help improve output noise performance.
9.1 Power Dissipation
The ability to remove heat from the die is different for each package type, presenting different considerations in
the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves
the heat from the device to ambient air. Performance data for JEDEC low and high-K boards are given in the
Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the device.
The addition of plated through-holes to heat-dissipating layers also improves the heat sink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation (PDISS) is equal to the
product of the output current and the voltage drop across the output pass element, as shown in 方程式 1:
PDISS = (VIN – VOUT) × IOUT
(1)
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10 Layout
10.1 Layout Guidelines
Place input and output capacitors as close to the device pins as possible. To improve ac performance (such as
PSRR, output noise, and transient response), TI recommends that the board be designed with separate ground
planes for VIN and VOUT, with the ground plane connected only at the GND pin of the device. In addition, the
ground connection for the output capacitor must be connected directly to the device GND pin.
10.1.1 Thermal Protection
Thermal protection disables the output when the junction temperature rises to approximately 165°C, allowing the
device to cool. When the junction temperature cools to approximately 145°C, the output circuitry is again
enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection
circuit can cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a
result of overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heat sink. For reliable operation, limit junction temperature to 125°C, maximum. To estimate the margin of safety
in a complete design (including heat sink), increase the ambient temperature until the thermal protection is
triggered; use worst-case loads and signal conditions. For good reliability, thermal protection must trigger at least
35°C above the maximum expected ambient condition of the particular application. This configuration produces
a worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load.
The TPS709 internal protection circuitry is designed to protect against overload conditions. This circuitry is not
intended to replace proper heat sinking. Continuously running the TPS709 into thermal shutdown degrades
device reliability.
10.2 Layout Example
VOUT
VIN
1
CIN
5
COUT
2
3
4
GND PLANE
Represents via used for
application specific connections
图 10-1. Layout Example for DBV Package
16
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Evaluation Modules
An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the
TPS709xx. The TPS70933EVM-110 evaluation module (and related user guide) can be requested at the Texas
Instruments website through the product folders or purchased directly from the TI eStore.
11.1.1.2 Spice Models
Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of
analog circuits and systems. A SPICE model for the TPS709 is available through the product folders under
Simulation Models.
11.1.2 Device Nomenclature
表 11-1. Device Nomenclature(1)
(1)
PRODUCT
VOUT
TPS709xx(x) yyy z
or
TPS709xx(x) yyy zM3
XX(X) is the nominal output voltage. For output voltages with a resolution of 100 mV, two
digits are used in the ordering number; otherwise, three digits are used (for example, 28 = 2.8
V; 125 = 1.25 V).
YYY is the package designator.
Z is the tape and reel quantity (R = 3000, T = 250).
M3 suffix device has same electrical specs as other devices and shares same design.
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:
Texas Instruments, TPS70933EVM-110 Evaluation Module user guide
11.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料,可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范,并且不一定反映 TI 的观点;请参阅
TI 的《使用条款》。
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
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12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
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重要声明和免责声明
TI 提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,不保证没
有瑕疵且不做出任何明示或暗示的担保,包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验
证并测试您的应用,(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。这些资源如有变更,恕不另行通知。TI 授权您仅可
将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知
识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成本、损失和债务,TI 对此概不负责。
TI 提供的产品受 TI 的销售条款 (https:www.ti.com/legal/termsofsale.html) 或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI
提供这些资源并不会扩展或以其他方式更改 TI 针对 TI 产品发布的适用的担保或担保免责声明。重要声明
邮寄地址:Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021,德州仪器 (TI) 公司
PACKAGE OPTION ADDENDUM
www.ti.com
25-May-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS70912DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SCX
TPS70912DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SCX
TPS70912DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SCX
TPS70912DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SCX
TPS709135DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SCY
TPS709135DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SCY
TPS70915DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SIM
TPS70915DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SIM
TPS70915DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SIM
TPS70915DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SIM
TPS70916DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SCZ
TPS70916DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SCZ
TPS70918DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDA
TPS70918DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDA
TPS70918DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDA
TPS70918DRVRM3
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDA
TPS70918DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDA
TPS70919DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDB
TPS70919DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDB
TPS70925DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDC
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
25-May-2021
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS70925DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDC
TPS70925DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDC
TPS70925DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDC
TPS70927DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDD
TPS70927DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDD
TPS70928DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDE
TPS70928DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDE
TPS70930DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDF
TPS70930DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDF
TPS70930DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDF
TPS70930DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDF
TPS70933DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDG
TPS70933DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDG
TPS70933DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDG
TPS70933DRVRM3
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDG
TPS70933DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDG
TPS70936DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SEJ
TPS70936DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SEJ
TPS70936DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1FV
TPS70938DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SIC
TPS70938DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SIC
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
25-May-2021
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS70939DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SID
TPS70939DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SID
TPS70950DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDH
TPS70950DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDH
TPS70950DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDH
TPS70950DRVRM3
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDH
TPS70950DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SDH
TPS70960DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SIT
TPS70960DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SIT
TPS709A30DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
11RF
TPS709A30DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
11RF
TPS709A33DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
11SF
TPS709A33DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
11SF
TPS709B33DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
13C7
TPS709B33DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
13C7
TPS709B345DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1XSW
TPS709B50DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
13D7
TPS709B50DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
13D7
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-May-2021
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of