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TPS715A
SBVS047H – MAY 2004 – REVISED MARCH 2016
TPS715A
24-V High Input Voltage, Micropower, 80-mA LDO Voltage Regulator
1 Features
3 Description
•
•
•
•
•
The TPS715A low-dropout (LDO) voltage regulators
offer the benefits of high input voltage, low-dropout
voltage, low-power operation, and miniaturized
packaging. The devices operate over an input range
of 2.5 V to 24 V and are stable with any capacitor (≥
0.47 μF). The high maximum input voltage combined
with excellent power dissipation capability makes this
device particularly well-suited to industrial and
automotive applications.
1
•
•
•
•
24-V Maximum Input Voltage
Low 3.2-μA Quiescent Current at 80 mA
Stable With Any Capacitor (≥ 0.47 μF)
80-mA Specified Current
Available in Fixed and Adjustable (1.2 V to 15 V)
Versions
Specified Current Limit
3-mm × 3-mm and 2-mm × 2-mm SON Packages
–40°C to 125°C Specified Junction
Temperature Range
For MSP430-Specific Output Voltages See
TPS715xx
2 Applications
•
•
•
•
•
A PMOS pass element functions as a low-value
resistor. The low dropout voltage, typically 670 mV at
80 mA of load current, is directly proportional to the
load current. The low quiescent current (3.2 μA
typically) is nearly constant over the entire range of
output load current (0 mA to 80 mA).
The TPS715A is available in a 3-mm × 3-mm
package ideal for high power dissipation and a small
2-mm × 2-mm package ideal for handheld and ultraportable applications. The 3-mm × 3-mm package is
also available as a non-magnetic package for medical
imaging applications.
Ultralow Power Microcontrollers
Industrial and Automotive Applications
Video Surveillance and Security Systems
Portable, Battery-Powered Equipment
Medical Imaging
Device Information(1)
PART NUMBER
TPS715A
PACKAGE
BODY SIZE (NOM)
SON (8), DRB
3.00 mm × 3.00 mm
SON (6), DRV
2.00 mm × 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Schematic
IN
TPS715A33
OUT
GND
MSP430
Li+
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS715A
SBVS047H – MAY 2004 – REVISED MARCH 2016
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
3
3
3
4
4
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 8
7.1
7.2
7.3
7.4
Overview ...................................................................
Functional Block Diagrams .......................................
Feature Description...................................................
Device Functional Modes..........................................
8
8
9
9
8
Application and Implementation ........................ 10
8.1 Application Information............................................ 10
8.2 Typical Applications ................................................ 10
8.3 Do's and Don'ts ....................................................... 12
9 Power Supply Recommendations...................... 12
10 Layout................................................................... 13
10.1 Layout Guidelines ................................................. 13
10.2 Layout Example .................................................... 13
10.3 Power Dissipation ................................................. 13
11 Device and Documentation Support ................. 14
11.1
11.2
11.3
11.4
11.5
11.6
Device Support......................................................
Documentation Support .......................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
14
14
14
14
15
15
12 Mechanical, Packaging, and Orderable
Information ........................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (May 2015) to Revision H
Page
•
Changed third Applications bullet .......................................................................................................................................... 1
•
Added package designators to Device Information table for clarity ...................................................................................... 1
•
Corrected pin numbers in Pin Functions table to align with pin out configurations................................................................ 3
•
Added parameter name to VIN row of Absolute Maximum Ratings table ............................................................................... 3
•
Deleted Dissipation Ratings table .......................................................................................................................................... 4
•
Added last three items to Related Documentation .............................................................................................................. 14
Changes from Revision F (October 2012) to Revision G
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
Changes from Revision E (June 2011) to Revision F
•
Page
Page
Updated Figure 15.................................................................................................................................................................. 9
Changes from Revision D (May, 2007) to Revision E
Page
•
Added last Applications bullet................................................................................................................................................. 1
•
Added last sentence to Description section ........................................................................................................................... 1
2
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5 Pin Configuration and Functions
IN 1
NC 2
GND
DRV Package
6-Pin SON
Top View
GND 3
DRB Package
8-Pin SON
Top View
6
OUT
OUT
NC
IN 1
NC 2
8
5
7
NC
4
FB/NC
NC 3
6
NC
GND 4
5
FB/NC
Pin Functions
PIN
NAME
FB
GND
8-PIN SON
6-PIN SON
I/O
FIXED
ADJ.
FIXED
ADJ.
—
5
—
4
I
DESCRIPTION
Adjustable version. This pin is used to set the output voltage.
4, Pad
4, Pad
3, Pad
3, Pad
—
IN
1
1
1
1
I
NC
2, 3, 5,
6, 7
2, 3, 6, 7
2, 4, 5
2, 5
—
No connection. Can be left open or tied to ground for improved
thermal performance.
8
8
6
6
O
Regulated output voltage, any output capacitor ≥ 0.47 μF can be
used for stability.
OUT
Ground
Unregulated input voltage
6 Specifications
6.1 Absolute Maximum Ratings
over operating temperature range (unless otherwise noted) (1)
Input supply voltage, VIN
MIN
MAX
UNIT
–0.3
24
V
Peak output current
Internally limited
Continuous total power dissipation
See Thermal Information
Junction temperature, TJ
–40
125
°C
Storage temperature, Tstg
–65
150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VIN
Input supply voltage
IOUT
NOM
MAX
UNIT
2.5
24
V
Output current
0
80
mA
CIN
Input capacitor
0
0.047
µF
COUT
Output capacitor
0.47
1
µF
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6.4 Thermal Information
TPS715A
THERMAL METRIC (1)
DRV (SON)
DRB (SON)
6 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
79.5
69
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
110.5
76.8
°C/W
RθJB
Junction-to-board thermal resistance
48.9
44.6
°C/W
ψJT
Junction-to-top characterization parameter
5.2
8.1
°C/W
ψJB
Junction-to-board characterization parameter
49.3
44.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
18.3
27.5
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
Over operating junction temperature range (TJ = –40°C to 125°C), VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, COUT = 1 μF, unless
otherwise noted. The TPS715A01 device is tested with VOUT = 2.8 V. Typical values are at TJ = 25°C.
PARAMETER
TEST CONDITIONS
Input voltage (1)
VIN
Voltage range
(TPS715A01)
VOUT
MIN
TYP
MAX
IOUT = 10 mA
2.5
24
IOUT = 80 mA
3
24
1.2
15
TPS715A01
VOUT + 1 V ≤ VIN ≤ 24 V,
1.2 V ≤ VOUT ≤ 15V, 0 ≤ IOUT ≤ 80 mA
TPS715A33
4.3 V < VIN < 24 V, 0 ≤ IOUT ≤ 80 mA
Output voltage
line regulation (1)
ΔVOUT/ΔVIN
Load regulation
Dropout voltage
VIN = VOUT(NOM) – 0.1 V
0.96 ×
VOUT(nom)
VOUT(nom)
1.04 ×
VOUT(nom)
3.135
3.3
3.465
VOUT + 1 V < VIN ≤ 24 V
20
60
ΔVOUT/ΔIOUT
IOUT = 100 μA to 80 mA
35
VDO
IOUT = 80 mA
Output current limit
ICL
VOUT = 0 V
Ground pin current
IGND
Output voltage accuracy (1)
670
160
4.8
VIN
BW = 200 Hz to 100 kHz,
COUT = 10 μF, IOUT = 50 mA
(1)
4
mA
4.2
Output noise voltage
mV
1100
3.2
f = 100 kHz, COUT = 10 μF
V
mV
3.2
PSRR
V
1120
0 mA ≤ IOUT ≤ 80 mA
Power-supply ripple
rejection
V
mV
TJ = –40°C to 85°C, 0 mA ≤ IOUT ≤ 80 mA
VIN = 24 V, 0 mA ≤ IOUT ≤ 80 mA
UNIT
μA
5.8
60
dB
575
μVrms
Minimum VIN = VOUT + VDO, or the value shown for input voltage, whichever is greater.
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6.6 Typical Characteristics
3.465
3.465
3.432
VDO – Dropout Voltage – mV
VOUT – Output Voltage – V
VIN = 4.3 V
VIN = 4.3 V
3.432
3.399
3.366
3.333
3.300
3.267
3.234
3.201
3.399
3.366
3.333
IOUT = 10 mA
3.300
3.267
3.234
IOUT = 80 mA
3.201
3.168
3.168
3.135
3.135
0
10
20
30
40
50
60
70
-40 -25 -10 5 20 35 50 65 80 95 110 125
80
TJ – Junction Temperature – ° C
I OUT – Output Current – mA
Figure 2. TPS715A33 Dropout Voltage vs
Junction Temperature
Figure 1. TPS715A33 Output Voltage vs Output Current
8
VIN = 4.3 V
VOUT = 3.3 V
IOUT = 1 mF
4.0
IGND − Ground Current − mA
Output Spectral Noise Density − mV/√Hz
4.5
3.5
3.0
2.5
7
6
5
IOUT = 50 mA
4
3
2
1
0
2.0
−40 −25 −10 5
20 35 50 65 80 95 110 125
100
1k
10 k
f − Frequency − Hz
TJ − Junction Temperature − °C
Figure 3. Ground Current vs Junction Temperature
1000
VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 mF
TJ = 25°C
14
VIN = 4.3 V
900
VDO - Dropout Voltage - mV
16
12
10
8
6
IOUT = 1 mA
4
TJ = +125ºC
800
700
600
TJ = +25ºC
500
400
300
200
TJ =-40 ºC
2
100
0
IOUT = 50 mA
10
100
1k
100 k
Figure 4. Output Spectral Noise Density vs Frequency
18
Zo − Output Impedance − W
VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 mF
IOUT = 1 mA
0
10k
100k
1M
0
10 M
10
20
30
40
50
60
70
80
I OUT - Output Current - mA
f − Frequency − Hz
Figure 5. Output Impedance vs Frequency
Figure 6. TPS715A33 Dropout Voltage vs Output Current
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Typical Characteristics (continued)
1400
1000
VDO – Dropout Voltage – mV
VDO - Dropout Voltage - mV
VIN = 4.3 V
900
1200
1000
TJ = +125ºC
800
600
TJ = +25ºC
400
TJ = –40ºC
800
IOUT = 80 mA
700
600
500
400
300
200
200
IOUT = 10 mA
100
0
0
3
4
5
6
7
8
-40 -25 -10 5 20 35 50 65 80 95 110 125
9 10 11 12 13 14 15
TJ – Junction Temperature – ° C
VIN - Input Voltage - V
Figure 8. TPS715A33 Dropout Voltage vs
Junction Temperature
3.5
VIN = 4.3 V
VOUT = 3.3 V
VOUT - Output Voltage - V
3.0
2.5
2.0
1.5
1.0
0.5
0
0
100
200
300
400
500
PSRR − Power Supply Ripple Rejection − dB
Figure 7. TPS715A01 Dropout Voltage vs Input Voltage
100
VIN = 4.3 V
VOUT = 3.3 V
COUT = 10 mF
TJ = 25°C
90
80
70
60
IOUT = 1 mA
50
40
30
20
IOUT = 50 mA
10
0
10
IOUT - Current Limit - mA
VOUT = 3.3 V
RL = 66 W
COUT = 10 mF
VIN − Input Voltage − V
VOUT − Output Voltage − V
5
100k
1M
10 M
VOUT = 3.3 V
IOUT = 50 mA
COUT = 10 mF
100
50
0
−50
4
3
VIN
2
VOUT
1
0
0
2
4
6
8 10 12 14
t − Time − ms
16 18
20
Figure 11. Power-Up and Power-Down
6
10k
Figure 10. Power-Supply Ripple Rejection vs Frequency
VIN − Input Voltage − V
VOUT − Output Voltage − mV
8
6
1k
f − Frequency − Hz
Figure 9. Output Voltage vs Current Limit
7
100
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5.3
4.3
0
50 100 150 200 250 300 350 400 450 500
t − Time − ms
Figure 12. Line Transient Response
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VOUT - Output Voltage - mV
IOUT - Output Current - mA
Typical Characteristics (continued)
V IN = 4.3 V
200
V OUT = 3.3 V
COUT = 10mF
0
-200
100
50
0
-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
t - Time - ms
Figure 13. Load Transient Response
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7 Detailed Description
7.1 Overview
The TPS715A family of low dropout regulators consumes only 3.2 µA of current and offers a wide input voltage
range and low-dropout voltage in a small package. The devices operate over an input range of 2.5 V to 24 V and
are stable with any capacitor greater than or equal to 0.47 μF. The low quiescent current makes the TPS715A
ideal for powering battery management devices. Specifically, because the TPS715A is enabled as soon as the
applied voltage reaches the minimum input voltage, the output is quickly available to power continuouslyoperating, battery-charging devices.
7.2 Functional Block Diagrams
V(OUT)
V(IN)
Current
Sense
Leakage Null
Control Circuit
ILIM
_
GND
R1
+
FB
Bandgap
Reference
R2
Vref = 1.205 V
Figure 14. Functional Block Diagram—Adjustable Version
V(OUT)
V(IN)
Current
Sense
Leakage Null
Control Circuit
ILIM
_
GND
Bandgap
Reference
R1
+
Vref = 1.205 V
R2
Figure 15. Functional Block Diagram—Fixed Version
8
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7.3 Feature Description
7.3.1 Wide Supply Range
This device has an operational input supply range of 2.5 V to 24 V, allowing for a wide range of applications. This
wide supply range is ideal for applications that have either large transients or high dc voltage supplies.
7.3.2 Low Supply Current
This device only requires 3.2 µA (typical) of supply current and has a maximum current consumption of 5.8 µA at
–40°C to 125°C.
7.3.3 Stable With Any Capacitor ≥ 0.47 µF
Any capacitor, including both ceramic and tantalum, greater than or equal to 0.47 μF properly stabilizes this loop.
7.3.4 Internal Current Limit
The internal current limit circuit is used to protect the LDO against high-load current faults or shorting events. The
LDO is not designed to operate in a steady-state current limit. During a current limit event, the LDO sources
constant current. Therefore, the output voltage falls when load impedance decreases.
NOTE
If a current limit occurs and the resulting output voltage is low, excessive power is
dissipated across the LDO, resulting in possible damage to the device.
7.3.5 Reverse Current
The TPS715A device PMOS-pass transistor has a built-in back diode that conducts current when the input
voltage drops below the output voltage (for example, during power down). Current is conducted from the output
to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting may
be required.
7.4 Device Functional Modes
Table 1 provides a quick comparison between the normal, dropout, and disabled modes of operation.
Table 1. Device Functional Mode Comparison
OPERATING MODE
PARAMETER
VIN
IOUT
Normal
VIN > VOUT(nom) + VDO
IOUT < ICL
Dropout
VIN < VOUT(nom) + VDO
IOUT < ICL
Disabled
—
—
7.4.1 Normal Operation
The device regulates to the nominal output voltage under the following conditions:
• The input voltage is greater than the nominal output voltage plus the dropout voltage (VOUT(nom) + VDO).
• The output current is less than the current limit (IOUT < ICL).
• The device junction temperature is less than 125°C.
7.4.2 Dropout Operation
If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other
conditions are met for normal operation, the device operates in dropout mode. In this mode, the output voltage
tracks the input voltage. During this mode, the transient performance of the device becomes significantly
degraded because the pass device is in the linear region and no longer controls the current through the LDO.
Line or load transients in dropout can result in large output-voltage deviations.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS715A family of LDO regulators is optimized for ultralow-power applications such as the MSP430
microcontroller. The ultralow-supply current of the TPS715A device maximizes efficiency at light loads, and its
high input voltage range makes the device suitable for supplies such as unconditioned solar panels.
8.2 Typical Applications
8.2.1 Typical Application (Fixed-Voltage Version)
VIN
IN
C1
0.1 mF
TPS715A33
OUT
GND
VOUT
0.47 mF
Figure 16. Typical Application Circuit (Fixed-Voltage Version)
8.2.1.1 Design Requirements
8.2.1.1.1 Power the MSP430 Microcontroller
Several versions of the TPS715A are ideal for powering the MSP430 microcontroller. Table 2 shows potential
applications of some voltage versions.
Table 2. Typical MSP430 Applications
DEVICE
VOUT (TYP)
TPS715A19
1.9 V
VOUT(min) > 1.8 V required by many MSP430s. Allows lowest power consumption operation.
APPLICATION
TPS715A23
2.3 V
VOUT(min) > 2.2 V required by some MSP430s flash operation.
TPS715A30
3V
VOUT(min) > 2.7 V required by some MSP430s flash operation.
TPS715A345
3.45 V
VOUT(max) < 3.6 V required by some MSP430s. Allows highest speed operation.
The TPS715A family of devices offers many output voltage versions to allow the supply voltage to be optimized
for the MSP430, thereby minimizing the supply current consumed by the MSP430.
8.2.1.2 Detailed Design Procedure
8.2.1.2.1 External Capacitor Requirements
Although not required, a 0.047-μF or larger input bypass capacitor, connected between IN and GND and located
close to the device, is recommended to improve transient response and noise rejection of the power supply as a
whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and
the device is located several inches from the power source.
The TPS715A device requires an output capacitor connected between OUT and GND to stabilize the internal
control loop. Any capacitor (including ceramic and tantalum) greater than or equal to 0.47 μF properly stabilizes
this loop. The X7R- or X5R-type capacitors are recommended because these capacitors have a wider
temperature specification and lower temperature coefficient, but other types of capacitors can be used.
10
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8.2.1.2.2 Dropout Voltage (VDO)
Generally speaking, the dropout voltage often refers to the voltage difference between the input and output
voltage (VDO = VIN – VOUT). However, in the Electrical Characteristics table, VDO is defined as the VIN – VOUT
voltage at the rated current, where the pass-FET is fully enhanced in the ohmic region of operation and is
characterized by the classic RDS(on) of the FET. VDO indirectly specifies a minimum input voltage above the
nominal programmed output voltage at which the output voltage is expected to remain within its accuracy
boundary. If the input falls below this VDO limit (VIN < VOUT + VDO), then the output voltage decreases to follow the
input voltage.
Dropout voltage is always determined by the RDS(on) of the main pass-FET. Therefore, if the LDO operates below
the rated current, then the VDO for that current scales accordingly. RDS(on) can be calculated using Equation 1.
VDO
RDS(ON) =
IRATED
(1)
8.2.1.3 Application Curves
VOUT = 3.3 V
RL = 66 W
COUT = 10 mF
7
5
4
VIN − Input Voltage − V
VIN − Input Voltage − V
6
VOUT − Output Voltage − V
∆VOUT − Change in
Output Voltage − mV
8
3
VIN
2
VOUT
1
0
0
2
4
6
8 10 12 14
t − Time − ms
16 18
20
VOUT - Output Voltage - mV
IOUT - Output Current - mA
Figure 17. Power-Up and Power-Down
VOUT = 3.3 V
IOUT = 50 mA
COUT = 10 mF
100
50
0
−50
5.3
4.3
0
50 100 150 200 250 300 350 400 450 500
t − Time − ms
Figure 18. Line Transient Response
V IN = 4.3 V
200
V OUT = 3.3 V
COUT = 10mF
0
-200
100
50
0
-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
t - Time - ms
Figure 19. Load Transient Response
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8.2.2 TPS715A01 Adjustable LDO Regulator Programming
TPS715A01
VIN
OUTPUT VOLTAGE
PROGRAMMING GUIDE
IN
0.1 mF
OUTPUT
VOLTAGE
OUT
VOUT
R1
0.47 mF
FB
R1
R2
1.8 V
392 kW
806 kW
2.8 V
1.07 MW
806 kW
5.0 V
2.55 MW
806 kW
GND
R2
Figure 20. TPS715A01 Adjustable LDO Regulator Programming
8.2.2.1 Detailed Design Procedure
8.2.2.1.1 Setting VOUT for the TPS715A01 Adjustable LDO
The TPS715A family of devices contains an adjustable-version, the TPS715A01 device, that sets the output
voltage using an external resistor divider as shown in Figure 20. The output voltage operating range is 1.2 V to
15 V, and is calculated using Equation 2.
R1 ö
æ
VOUT = VREF ´ ç 1 +
÷
è R2 ø
where
•
VREF = 1.205 V (typical)
(2)
Choose resistors R1 and R2 to allow approximately 1.5-μA of current through the resistor divider. Lower value
resistors can be used for improved noise performance, but consume more power. Avoid higher resistor values
because leakage current into or out of FB across R1, R2 creates an offset voltage that is proportional to VOUT
divided by VREF. The recommended design procedure is to choose R2 = 1 MΩ to set the divider current at
1.5 μA, and then calculate R1 using Equation 3.
æV
ö
R1 = ç OUT - 1÷ ´ 2
è VREF
ø
(3)
Figure 20 shows this configuration.
8.3 Do's and Don'ts
Place at least one 0.47-µF capacitor as close as possible to the OUT and GND pins of the regulator.
Do not connect the output capacitor to the regulator using a long, thin trace.
Connect an input capacitor of 0.047 µF as close as possible to the IN and GND pins of the regulator for best
performance.
Do not exceed the absolute maximum ratings.
9 Power Supply Recommendations
The TPS715A is designed to operate with an input voltage supply range from 2.5 V to 24 V. The input voltage
range provides adequate headroom in order for the device to have a regulated output. This input supply must be
well regulated. If the input supply is noisy, additional input capacitors with low ESR can help improve the output
noise performance.
12
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10 Layout
10.1 Layout Guidelines
For best overall performance, place all circuit components on the same side of the printed-circuit-board and as
near as practical to the respective LDO pin connections. Place ground return connections for the input and output
capacitors as close to the GND pin as possible, using wide, component-side, copper planes. TI strongly
discourages using vias and long traces to create LDO circuit connections to the input capacitor, output capacitor,
or the resistor divider because doing so negatively affects system performance. This grounding and layout
scheme minimizes inductive parasitics, and thereby reduces load-current transients, minimizes noise, and
increases circuit stability. A ground reference plane is recommended to be embedded either in the PCB itself or
located on the bottom side of the PCB opposite the components. This reference plane assures accuracy of the
output voltage and shields the LDO from noise.
10.2 Layout Example
GND PLANE
CIN
COUT
TPS715A01
VIN
IN
1
6
OUT
NC
2
5
NC
GND
3
4
VOUT
FB/NC
R1
GND PLANE
R2
Figure 21. Example Layout for the TPS715A01DRV
10.3 Power Dissipation
To ensure reliable operation, worst-case junction temperature must not exceed 125°C. This restriction limits the
power dissipation the regulator can handle in any given application. To ensure the junction temperature is within
acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which
must be less than or equal to PD(max).
The maximum-power-dissipation limit is determined using Equation 4.
T max - TA
PD(max) = J
RqJA
where
•
•
•
TJmax is the maximum allowable junction temperature
RθJA is the thermal resistance junction-to-ambient for the package (see the Thermal Information table)
TA is the ambient temperature
The regulator power dissipation is calculated using Equation 5.
PD = (VIN - VOUT ) ´ IOUT
(4)
(5)
For a higher power package version of the TPS715A, see the TPS715A.
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Evaluation Module
An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TPS715A.
The TPS715AXXEVM-065 evaluation module (and related user's guide) can be requested at the TI website
through the product folders or purchased directly from the TI eStore.
11.1.1.2 Spice Models
Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of
analog circuits and systems. A SPICE model for the TPS715A is available through the product folders under
Tools & Software.
11.1.2 Device Nomenclature
Table 3. Device Nomenclature (1)
PRODUCT
TPS715Axxyyyz
(1)
VOUT
xx is nominal output voltage (for example 33 = 3.3V, 01 = adjustable)
yyy is package designator
z is package quantity
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:
• TPS715AxxEVM User Guide, SLVU122
• LDO Noise Demystified, SLAA412
• LDO PSRR Measurement Simplified, SLAA414
• A Topical Index of TI LDO Application Notes, SBVA026
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
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11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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15
PACKAGE OPTION ADDENDUM
www.ti.com
13-Aug-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS715A01DRBR
ACTIVE
SON
DRB
8
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ANO
TPS715A01DRBRG4
ACTIVE
SON
DRB
8
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ANO
TPS715A01DRBT
ACTIVE
SON
DRB
8
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ANO
TPS715A01DRBTG4
ACTIVE
SON
DRB
8
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ANO
TPS715A01DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
SBE
TPS715A01DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
SBE
TPS715A30DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
SAV
TPS715A30DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
SAV
TPS715A33DRBR
ACTIVE
SON
DRB
8
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ANN
TPS715A33DRBT
ACTIVE
SON
DRB
8
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ANN
TPS715A33DRVR
ACTIVE
WSON
DRV
6
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ANN
TPS715A33DRVT
ACTIVE
WSON
DRV
6
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ANN
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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