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TPS72501DCQG4

TPS72501DCQG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOT223-6

  • 描述:

    IC REG LIN POS ADJ 1A SOT223-6

  • 数据手册
  • 价格&库存
TPS72501DCQG4 数据手册
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 LOW INPUT VOLTAGE, 1-A LOW-DROPOUT LINEAR REGULATORS WITH SUPERVISOR Check for Samples: TPS72501, TPS72515, TPS72516, TPS72518, TPS72525 FEATURES DESCRIPTION • • The TPS725xx family of 1-A low-dropout (LDO) linear regulators has fixed voltage options available that are commonly used to power the latest DSPs, FPGAs, and microcontrollers. An adjustable option ranging from 1.22 V to 5.5 V is also available. The integrated supervisory circuitry provides an active low RESET signal when the output falls out of regulation. The no capacitor/any capacitor feature allows the customer to tailor output transient performance as needed. Therefore, compared to other regulators capable of providing the same output current, this family of regulators can provide a stand-alone power supply solution or a post regulator for a switch mode power supply. 1 • • • • • • • • • • 1-A Output Current Available in 1.5-V, 1.6-V, 1.8-V, 2.5-V Fixed-Output and Adjustable Versions (1.2-V to 5.5-V) Input Voltage Down to 1.8 V Low 170-mV Dropout Voltage at 1 A (TPS72525) Stable With Any Type/Value Output Capacitor Integrated Supervisor (SVS) With 50-ms RESET Delay Time Low 210-µA Ground Current at Full Load (TPS72525) Less than 1-µA Standby Current ±2% Output Voltage Tolerance Over Line, Load, and Temperature (-40°C to 125°C) Integrated UVLO Thermal and Overcurrent Protection 5-Lead SOT223-5 or DDPAK and 8-Pin SOP (TPS72501 only) Surface Mount Package APPLICATIONS • • • • • PCI Cards Modem Banks Telecom Boards DSP, FPGA, and Microprocessor Power Supplies Portable, Battery-Powered Applications DCQ PACKAGE SOT223-5 (TOP VIEW) ENABLE 1 IN GND OUT RESET/FB 2 Ground current is typically 210 µA at full load and drops to less than 80 µA at no load. Standby current is less than 1 µA. Each regulator option is available in either a SOT223-5, D (TPS72501 only), or DDPAK package. With a low input voltage and properly heatsinked package, the regulator dissipates more power and achieves higher efficiencies than similar regulators requiring 2.5 V or more minimum input voltage and higher quiescent currents. These features make it a viable power supply solution for portable, battery-powered equipment. KTT PACKAGE DDPAK (TOP VIEW) 3 4 These regulators are ideal for higher current applications. The family operates over a wide range of input voltages (1.8 V to 6 V) and has very low dropout (170 mV at 1-A). 1 2 3 4 5 ENABLE IN GND OUT RESET/FB 5 D PACKAGE (TOP VIEW) OUT FB GND NC 1 8 2 7 3 6 4 5 IN GND GND ENABLE NC − No internal connection NOTE: TPS72501 replaces RESET with FB. Tab is GND for the DCK and KTT packages. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2010, Texas Instruments Incorporated TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DESCRIPTION (CONTINUED) Although an output capacitor is not required for stability, transient response and output noise are improved with a 10-µF output capacitor. Unlike some regulators that have a minimum current requirement, the TPS725 family is stable with no output load current. The low noise capability of this family, coupled with its high current operation and ease of power dissipation, make it ideal for telecom boards, modem banks, and other noise-sensitive applications. ORDERING INFORMATION VOLTAGE (1) SOT223-5 (2) SYMBOL DDPAK (3) D (4) SYMBOL Adjustable (1.2 V to 5 V) TPS72501DCQ PS72501 TPS72501KTT TPS72501D TPS72501 1.5 V TPS72515DCQ PS72515 TPS72515KTT — TPS72515 1.6 V TPS72516DCQ PS72516 TPS72516KTT — TPS72516 1.8 V TPS72518DCQ PS72518 TPS72518KTT — TPS72518 2.5 V TPS72525DCQ PS72525 TPS72525KTT — TPS72525 TJ -40°C to 125°C (1) (2) (3) (4) Other voltage options are available upon request from the manufacturer. To order a taped and reeled part, add the suffix R to the part number (e.g., TPS72501DCQR). To order a 50-piece reel, add the suffix T (e.g., TPS72501KTTT); to order a 500-piece reel, add the suffix R (e.g., TPS72501KTTR). To order a taped and reeled part, add the suffix R or T (2500 or 500) to the part number (e.g. TPS72501DR) ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) UNIT Input voltage, VI (2) -0.3 to 7 V Voltage range at EN, FB -0.3 to VI + 0.3 V Voltage on OUT, RESET 6 V ESD rating, HBM 2 kV Continuous total power dissipation See Dissipation Ratings Table Operating junction temperature range, TJ -50 to 150 °C Maximum junction temperature range, TJ 150 °C -65 to 150 °C Storage temperature, Tstg (1) (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Input voltage, VI (1) Continuous output current, IO Operating junction temperature, TJ (1) 2 1.8 6 0 1 V A -40 125 °C Minimum VI = VO (nom) + VDO. Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 PACKAGE DISSIPATION RATINGS PACKAGE BOARD RqJC RqJA DDPAK High K (1) 2 °C/W 23 °C/W SOT223 Low K (2) 15 °C/W 53 °C/W 39.4 °C/W 55 °C/W D-8 (1) (2) High K (1) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), two-layer board with 2 ounce copper traces on top of the board. ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range VI = VO(typ) + 1 V, IO= 1 mA, EN = IN, Co = 1 µF, Ci = 1 µF (unless otherwise noted) PARAMETER TEST CONDITIONS Bandgap voltage reference TPS72501 Adjustable 0 µA < IO < 1 A (1) 1.8 V ≤ VI ≤ 5.5 V V 0.965 VO 1.47 2.6 V ≤ VI ≤ 5.5 V 2.8 V ≤ VI ≤ 5.5 V 1.764 TJ = 25°C 3.5 V ≤ VI ≤ 5.5 V 0 µA < IO < 1 A 1.836 2.45 2.55 IO = 0 µA 75 120 IO = 1 A 210 300 EN < 0.4 V TJ = 25°C 0.2 EN < 0.4 V 1 Output noise voltage BW = 200 Hz to 100 kHz, TJ = 25°C Co = 10 µF, IO = 1 mA PSRR Ripple rejection f = 1 kHz, Co = 10 µF TJ = 25°C (2) Output voltage line regulation (ΔVO/VO) (3) Output voltage load regulation V 2.5 Vn µA µA 150 µV 60 dB 1.1 1.6 2.3 A VO + 1 V < VI≤ 5.5 V -0.15 0.02 0.15 %/V 0 µA < IO < 1 A -0.25 0.05 0.25 %/A VIH EN high level input (2) 1.3 VIL EN low level input (2) -0.2 II EN input current EN = 0 V or VI I(FB) Feedback current TPS72501 UVLO threshold VCC rising UVLO hysteresis TJ = 25°C, VCC rising UVLO deglitch UVLO delay (1) (2) (3) 1.632 1.8 0 µA < IO < 1 A Standby current 1.53 1.568 TJ = 25°C Ground current 1.035 VO 1.6 0 µA < IO < 1 A TPS72525 Current limit UNIT TJ = 25°C TPS72518 I MAX 1.263 1.5 0 µA< IO < 1 A TPS72516 Output voltage TYP 1.220 TJ = 25°C TPS72515 VO 1.22 V ≤ VO ≤ 5.5 V MIN 1.177 V(FB) = 1.22 0.4 0.01 100 nA 100 nA 1.57 1.70 -100 1.45 V V 50 mV TJ = 25°C, VCC rising 10 µs TJ = 25°C, VCC rising 100 µs Minimum IN operating voltage used for testing is VO(typ) + 1 V. Test condition includes output voltage VO = VO - 15% and pulse duration = 10 ms. VImin = (VO + 1) or 1.8 V whichever is greater. Line regulation (mV) + ǒ%ńVǓ V ǒ5.5 V * V IminǓ O Copyright © 2002–2010, Texas Instruments Incorporated 100 1000 Submit Documentation Feedback Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 3 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over recommended operating free-air temperature range VI = VO(typ) + 1 V, IO= 1 mA, EN = IN, Co = 1 µF, Ci = 1 µF (unless otherwise noted) PARAMETER TEST CONDITIONS TPS72525 VDO (4) TJ = 25°C 170 (5) IO = 1 A TJ = 25°C 210 IO = 1 A Minimum input voltage for valid RESET 1.3 Trip threshold voltage 90 25 Output low voltage (at 700 µA) 4 93 96 50 -0.3 %VO mV 75 10 Leakage current (5) mV V 10 t(RESET) delay time UNIT 320 Rising edge deglitch (4) MAX 280 Hysteresis voltage RESET TYP IO = 1 A Dropout voltage TPS72518 IO = 1 A MIN ms µs 0.4 V 100 nA Dropout voltage is defined as the differential voltage between VO and VI when VO drops 100 mV below the value measured with VI = VO + 1 V. Dropout voltage is defined as the differential voltage between VO and VI when VO drops 100 mV below the value measured with VI = VO + 1 V. Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION TPS72501 IN OUT EN Current Limit/Thermal Protection 1.220 Vref FB GND FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION TPS72515/16/18/25 IN OUT EN Current Limit/Thermal Protection 1.220 Vref GND Deglitch and Delay RESET 0.93 × Vref TERMINAL FUNCTIONS TERMINAL NAME NO. D NO.D CQ & KTT I/O ENABLE 5 1 I FB 2 GND 3, 6, 7 3 IN 8 2 I RESET/FB — 5 O/I NC 4 — OUT 1 4 DESCRIPTION Enable input Feedback Ground Input supply voltage This terminal is the feedback point for the adjustable option TPS72501. For all other options, this terminal is the RESET output terminal. When used with a pullup resistor, this open-drain output provides the active low RESET signal when the regulator output voltage drops more than 5% below its nominal output voltage. The RESET delay time is typically 50 ms. No connection O Regulated output voltage Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 5 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com RESET TIMING DIAGRAM IN VRES (see Note A) VRES t OUT VIT+(see Note B) VIT+(see Note B) Threshold Voltage VIT– (see Note B) ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ t RESET Output Output Undefined VIT– (see Note B) 50 ms Delay 50 ms Delay Output Undefined t NOTES:A. VRES is the minimum input voltage for a valid RESET. The symbol VRES is not currently listed within EIA or JEDEC standards for semiconductor symbology. B. VIT –Trip voltage is typically 7% lower than the output voltage (93%VO) VIT– to VIT+ is the hysteresis voltage. TYPICAL CHARACTERISTICS TPS72518 OUTPUT VOLTAGE vs OUTPUT CURRENT TPS72518 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE 250 1.805 1.8015 V O − Output Voltage − V 1.8005 1.8 1.7995 Ground Current − µ A VI = 2.8 V Co = 1 µF VI = 2.8 V Co = 1 µF TJ = 25° C 1.801 V O − Output Voltage − V TPS72518 GROUND CURRENT vs JUNCTION TEMPERATURE 1.800 IO = 0 mA 1.795 IO = 1 A 1.790 IO = 1 A 150 IO = 0 mA 100 50 1.799 1.7985 0 0.2 0.4 0.6 0.8 IO − Output Current − A Figure 1. 6 200 VI = 2.8 V Co = 1 µF TJ = 25° C Submit Documentation Feedback 1 1.785 −40−25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C Figure 2. Figure 3. Copyright © 2002–2010, Texas Instruments Incorporated Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 TYPICAL CHARACTERISTICS (continued) TPS72518 GROUND CURRENT vs OUTPUT CURRENT TPS72525 DC DROPOUT VOLTAGE vs OUTPUT CURRENT 300 200 150 125 100 75 50 25 VO = 1.7 V Co = 1 µF TJ = 125°C 200 TJ = 25°C 150 100 TJ = −40°C 50 250 150 100 50 0 0.1 1 10 100 0 1000 IO − Output Current − mA 0.2 0.4 0.6 0.8 IO − Output Current − A IO = 1 A 200 IO = 10 mA 0 −40 −25 −10 5 1 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C Figure 4. Figure 5. Figure 6. MINIMUM REQUIRED INPUT VOLTAGE vs OUTPUT VOLTAGE TPS72518 LINE TRANSIENT RESPONSE TPS72518 LOAD TRANSIENT RESPONSE 4 VI − Input Voltage − V 4.5 TJ = 125°C 3.5 TJ = 25°C IO = 1 A Co = 10 µF 3.8 2.8 ∆VO − Change in Output Voltage − mV 0 0.01 V DO − Dropout Voltage − mV 250 V DO − Dropout Voltage − mV VO = 2.8 V Co = 10 µF Ci = 1 µF 100 0 −100 2.5 TJ = −40°C 2 1.5 1.5 2 2.5 3 3.5 VO − Output Voltage − V 4 4.5 VO − Output Voltage − mV 3 Figure 7. Copyright © 2002–2010, Texas Instruments Incorporated 100 0 −100 0 50 100 150 200 250 300 350 400 450 500 t − Time − µs I O − Output Current − A Ground Current − µ A 300 VO = 2.5 V (nom) 175 V I − Minimum Required Input Voltage − V TPS72518 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE 1 0.5 0 0 5 Figure 8. 10 15 20 25 30 35 40 45 50 t − Time − µs Figure 9. Submit Documentation Feedback Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 7 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) TPS72518 OUTPUT VOLTAGE, ENABLE VOLTAGE vs TIME (START-UP) 1 0.5 0 0 5 10 15 20 25 30 35 40 t − Time − µs 45 50 1 0 2 1.5 1 0.5 0 0 20 40 60 80 100 120 140 160 180 200 t − Time − µs 4 3 VI 2 1 0 VO 0 100 200 300 400 500 600 700 800 900 1000 t − Time − µs Figure 12. TPS72518 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY TPS72518 RIPPLE REJECTION vs FREQUENCY CURRENT LIMIT vs INPUT VOLTAGE 100 2000 VI= 2.8 V, VO = 1.8 V, CO = 10 µF 90 2 IO = 1 A 1.5 1 80 60 10 µF / 1mA 50 IO = 1 mA 40 30 10 µF / 1 A 100 1k 10 k f − Frequency − Hz 1500 TJ = 25°C 1400 TJ = −40°C 1300 1100 10 Figure 13. 100 1k 10 k 100 k 1M 2 2.5 3 3.5 4 4.5 f − Frequency − Hz VI − Input voltage − V Figure 14. Figure 15. TPS72515 GROUND CURRENT vs INPUT VOLTAGE 5 5.5 DROPOUT VOLTAGE vs INPUT VOLTAGE 600 300 500 250 V DO − Dropout Voltage − mV Ground Current − µ A 1600 1000 1.5 0 100 k 1700 1200 10 0 TJ = 125°C 1800 70 20 0.5 1900 Current Limit − A VI = 2.8 V Co = 10 µF 10 400 300 I=1A 200 I=0A 100 0 TJ = 125°C TJ = 25°C 200 150 100 TJ = −40°C 50 0 0 1 2 3 4 VI − Input Voltage − V Figure 16. 8 RL = 1.8 Ω Co = 1 µF Ci = 1 µF 5 Figure 11. Ripple Rejection − dB µ V/ 2.5 VI = 2.8 V IO = 1 A Co = 10 µF 2 Figure 10. 3.5 3 3 VI − Input Voltage − V VI = 2.8 V Co = 1 µF CI = 1 µF TPS72518 POWER UP/POWER DOWN VO − Output Voltage − V −100 Output Spectral Noise Density − Hz Enable Voltage − V 0 V − Output Voltage − V O 100 IO − Output Current − A ∆VO − Change in Output Voltage − mV TPS72518 LOAD TRASIENT RESPONSE Submit Documentation Feedback 5 6 1.5 2 2.5 3 3.5 4 4.5 VI − Input Voltage − V 5 5.5 Figure 17. Copyright © 2002–2010, Texas Instruments Incorporated Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 APPLICATION INFORMATION The TPS725xx family of low-dropout (LDO) regulators has numerous features that make it applicable to a wide range of applications. The family operates with very low input voltage (≥1.8 V) and low dropout voltage (typically 200 mV at full load), making it an efficient stand-alone power supply or post regulator for battery or switch mode power supplies. Both the active low RESET and 1-A output current make the TPS725xx family ideal for powering processor and FPGA supplies. The TPS725xx family also has low output noise (typically 150 µVRMS with 10-µF output capacitor), making it ideal for use in telecom equipment. External Capacitor Requirements A 1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS725xx, is required for stability. To improve transient response, noise rejection, and ripple rejection, an additional 10-µF or larger, low ESR capacitor is recommended. A higher-value, low ESR input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source, especially if the minimum input voltage of 1.8 V is used. Although an output capacitor is not required for stability, transient response and output noise are improved with a 10-µF output capacitor. Programming the TPS72501 Adjustable LDO Regulator The output voltage of the TPS72501 adjustable regulator is programmed using an external resistor divider as shown in Figure 18. The output voltage is calculated using: V O +V ref Ǔ ǒ1 ) R1 R2 (1) Where: • VFB = VREF = 1.22 V typical (see the electrical characteristics for VREF range) Resistors R1 and R2 should be chosen for approximately 10-µA divider current. Lower value resistors offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 120 kΩ to set the divider current at 10 µA and then calculate R1 using: R1 + ǒ V V Ǔ O *1 ref R2 (2) TPS72501 VI IN OUT EN FB VO 1 mF R1 GND VO = 1.22 V ´ 1 + CO R2 R1 R2 Figure 18. TPS72501 Adjustable Typical Application Diagram Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 9 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com TPS725xx VI IN VO OUT 1 mF 10 kW EN CO RESET GND Figure 19. TPS72501 Fixed Output Typical Application Diagram Table 1. Output Voltage Programming Guide (Standard 1% Resistor Values) PROGRAM VOLTAGE R1 (kΩ) R2 (kΩ) ACTUAL VOLTAGE 1.8 V 56.2 118 1.801 2.5 V 127 121 2.5 3.3 V 196 115 3.299 3.6 V 205 105 3.602 Regulator Protection The TPS725xx pass element has a built-in back diode that safely conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might be appropriate. The TPS725xx also features internal current limiting and thermal protection. During normal operation, the TPS725xx limits output current to approximately 1.6 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below 145°C, regulator operation resumes. 10 Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 THERMAL INFORMATION The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it dissipates during operation. All integrated circuits have a maximum allowable junction temperature (TJmax) above which normal operation is not assured. A system designer must design the operating environment so that the operating junction temperature (TJ) does not exceed the maximum junction temperature (TJmax). The two main environmental variables that a designer can use to improve thermal performance are air flow and external heatsinks. The purpose of this information is to aid the designer in determining the proper operating environment for a linear regulator that is operating at a specific power level. In general, the maximum expected power (PD(max)) consumed by a linear regulator is computed as: ǒ P max + V *V D I(avg) O(avg) Ǔ I ) V O(avg) I(avg) xI (Q) (3) Where: • VI(avg) is the average input voltage. • VO(avg) is the average output voltage. • IO(avg) is the average output current. • I(Q) is the quiescent current. For most TI LDO regulators, the quiescent current is insignificant compared to the average output current; therefore, the term VI(avg) x I(Q) can be neglected. The operating junction temperature is computed by adding the ambient temperature (TA) and the increase in temperature due to the regulator's power dissipation. The temperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermal resistances between the junction and the case (RqJC), the case to heatsink (RqCS), and the heatsink to ambient (RqSA). Thermal resistances are measures of how effectively an object dissipates heat. Typically, the larger the device, the more surface area available for power dissipation and the lower the object's thermal resistance. Figure 20 illustrates these thermal resistances for (a) a SOT223 package mounted in a JEDEC low-K board, and (b) a DDPAK package mounted on a JEDEC high-K board. A TJ RθJC CIRCUIT BOARD COPPER AREA C B B A B TC RθCS A C RθSA SOT223 Package (a) TA DDPAK Package (b) C Figure 20. Thermal Resistances Equation 4 summarizes the computation: T J ǒ + T ) PDmax x R ) R ) R A θJC θCS θSA Ǔ (4) The RqJC is specific to each regulator as determined by its package, lead frame, and die size provided in the regulator's data sheet. The RqSA is a function of the type and size of heatsink. For example, black body radiator type heatsinks can have RqCS values ranging from 5°C/W for very large heatsinks to 50°C/W for very small heatsinks. The RqCS is a function of how the package is attached to the heatsink. For example, if a thermal compound is used to attach a heatsink to a SOT223 package, RqCSof 1°C/W is reasonable. Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 11 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com Even if no external black body radiator type heatsink is attached to the package, the board on which the regulator is mounted provides some heatsinking through the pin solder connections. Some packages, like the DDPAK and SOT223 packages, use a copper plane underneath the package or the circuit board's ground plane for additional heatsinking to improve their thermal performance. Computer-aided thermal modeling can be used to compute very accurate approximations of an integrated circuit's thermal performance in different operating environments (e.g., different types of circuit boards, different types and sizes of heatsinks, different air flows, etc.). Using these models, the three thermal resistances can be combined into one thermal resistance between junction and ambient (RqJA). This RqJAis valid only for the specific operating environment used in the computer model. Equation 4 simplifies into Equation 5: T + T ) PDmax x R J A θJA (5) Rearranging Equation 5 gives Equation 6: T –T R + J A θJA P max D (6) Using Equation 5 and the computer model generated curves shown in Figure 21 and Figure 24, a designer can quickly compute the required heatsink thermal resistance/board area for a given ambient temperature, power dissipation, and operating environment. DDPAK Power Dissipation The DDPAK package provides an effective means of managing power dissipation in surface mount applications. The DDPAK package dimensions are provided in the Mechanical Data section at the end of the data sheet. The addition of a copper plane directly underneath the DDPAK package enhances the thermal performance of the package. To illustrate, the TPS72525 in a DDPAK package was chosen. For this example, the average input voltage is 5 V, the output voltage is 2.5 V, the average output current is 1 A, the ambient temperature 55°C, the air flow is 150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current, the maximum average power is: P Dmax + (5 * 2.5) V x 1 A + 2.5 W (7) Substituting TJmax for TJ into Equation 6 gives Equation 8: R max + (125 * 55)°Cń2.5 W + 28°CńW θJA (8) From Figure 21, DDPAK Thermal Resistance vs Copper Heatsink Area, the ground plane needs to be 1 cm2 for the part to dissipate 2.5 W. The operating environment used in the computer model to construct Figure 21 consisted of a standard JEDEC High-K board (2S2P) with a 1 oz. internal copper plane and ground plane. The package is soldered to a 2 oz. copper pad. The pad is tied through thermal vias to the 1 oz. ground plane. Figure 22 shows the side view of the operating environment used in the computer model. 12 Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 40 Rθ JA − Thermal Resistance − ° C/W No Air Flow 35 150 LFM 30 250 LFM 25 20 15 0.1 1 10 Copper Heatsink Area − cm2 100 Figure 21. DDPAK Thermal Resistance vs Copper Heatsink Area 2 oz. Copper Solder Pad with 25 Thermal Vias 1 oz. Copper Power Plane 1 oz. Copper Ground Plane Thermal Vias, 0.3 mm Diameter, 1,5 mm Pitch Figure 22. DDPAK Thermal Resistance From the data in Figure 23 and rearranging Equation 6, the maximum power dissipation for a different ground plane area and a specific ambient temperature can be computed. Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 13 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com TJM − Maximum Junction Temperature − 125 °C 5 PD − Maximum Power Dissipation − W TA = 55°C 4 250 LFM 150 LFM 3 No Air Flow 2 1 0.1 1 10 Copper Heatsink Area − cm2 100 Figure 23. Maximum Power Dissipation vs Copper Heatsink Area SOT223 Power Dissipation The SOT223 package provides an effective means of managing power dissipation in surface mount applications. The SOT223 package dimensions are provided in the Mechanical Data section at the end of the data sheet. The addition of a copper plane directly underneath the SOT223 package enhances the thermal performance of the package. To illustrate, the TPS72525 in a SOT223 package was chosen. For this example, the average input voltage is 3.3 V, the output voltage is 2.5 V, the average output current is 1 A, the ambient temperature 55°C, no air flow is present, and the operating environment is the same as documented below. Neglecting the quiescent current, the maximum average power is: P Dmax + (3.3 * 2.5) V x 1 A + 800 mW (9) Substituting TJmax for TJ into Equation 6 gives Equation 10: R max + (125 * 55)°Cń800 mW + 87.5°CńW θJA (10) 2 From Figure 24, RΘJA vs PCB Copper Area, the ground plane needs to be 0.55 in for the part to dissipate 800 mW. The operating environment used to construct Figure 24 consisted of a board with 1 oz. copper planes. The package is soldered to a 1 oz. copper pad on the top of the board. The pad is tied through thermal vias to the 1 oz. ground plane. 14 Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 Rθ JA − Thermal Resistance − ° C/W 180 No Air Flow 160 140 120 100 80 60 40 20 0 0.1 1 PCB Copper Area − in2 10 Figure 24. SOT223 Thermal Resistance vs PCB AREA From the data in Figure 24 and rearranging Equation 6, the maximum power dissipation for a different ground plane area and a specific ambient temperature can be computed (as shown in Figure 25). 6 PD − Maximum Power Dissipation − W TA = 25°C 5 4 4 in2 PCB Area 3 0.5 in2 PCB Area 2 1 0 0 25 50 75 100 125 150 TA − Ambient Temperature − °C Figure 25. SOT223 Power Dissipation Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 15 TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (March 2004) to Revision E Page • Deleted Figure 14, Output Impedance vs Frequency ........................................................................................................... 8 • Updated Figure 18 ................................................................................................................................................................ 9 • Added Figure 19 ................................................................................................................................................................. 10 • Added Table 1, Output Voltage Programming Guide ......................................................................................................... 10 16 Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated Product Folder Link(s): TPS72501 TPS72515 TPS72516 TPS72518 TPS72525 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS72501DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72501 Samples TPS72501DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72501 Samples TPS72501DCQRG4 ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72501 Samples TPS72501KTTR ACTIVE DDPAK/ TO-263 KTT 5 500 RoHS & Green Call TI | SN Level-2-260C-1 YEAR -40 to 125 TPS 72501 Samples TPS72501KTTRG3 ACTIVE DDPAK/ TO-263 KTT 5 500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 TPS 72501 Samples TPS72515DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72515 Samples TPS72515DCQG4 ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72515 Samples TPS72515DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72515 Samples TPS72515KTTR ACTIVE DDPAK/ TO-263 KTT 5 500 RoHS & Green Call TI | SN Level-2-260C-1 YEAR -40 to 125 TPS 72515 Samples TPS72516DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72516 Samples TPS72516DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72516 Samples TPS72516KTTT ACTIVE DDPAK/ TO-263 KTT 5 50 RoHS & Green Call TI | SN Level-2-260C-1 YEAR -40 to 125 TPS 72516 Samples TPS72518DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72518 Samples TPS72518DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72518 Samples TPS72518KTTR ACTIVE DDPAK/ TO-263 KTT 5 500 RoHS & Green Call TI | SN Level-2-260C-1 YEAR -40 to 125 TPS 72518 Samples TPS72525DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72525 Samples TPS72525DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72525 Samples TPS72525DCQRG4 ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72525 Samples TPS72525KTTR ACTIVE DDPAK/ TO-263 KTT 5 500 RoHS & Green Call TI | SN Level-2-260C-1 YEAR -40 to 125 TPS 72525 Samples Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 14-Oct-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material RoHS & Green SN MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS72525KTTRG3 ACTIVE DDPAK/ TO-263 KTT 5 500 Level-2-260C-1 YEAR -40 to 125 TPS 72525 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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