TPS76328DBVR

Product Folder Order Now Technical Documents Support & Community Tools & Software Reference Design TPS763 SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 TPS763 Low-Power, 150-mA, Low-Dropout Linear Regulator 1 Features 3 Description • • The TPS763xx family of low-dropout (LDO) voltage regulators offers the benefits of low-dropout voltage, low-power operation, and miniaturized packaging. These regulators feature low dropout voltages and quiescent currents compared to conventional LDO regulators. Offered in a 5-pin, small outline integrated-circuit SOT-23 package, the TPS763xx series devices are ideal for cost-sensitive designs and for applications where board space is at a premium. 1 • • • • • • 150-mA, low-dropout regulator Output voltage: 5 V, 3.8 V, 3.3 V, 3 V, 2.8 V, 2.7 V, 2.5 V, 1.8 V, 1.6 V, and variable Dropout voltage, typically 300 mV at 150 mA Thermal protection Overcurrent limitation Less than 2-µA quiescent current in shutdown mode –40°C to 125°C operating junction temperature range 5-pin SOT-23 (DBV) package 2 Applications • • • • • Electricity meters Solar inverters HVAC systems Servo drives and motion control Sensor transmitters I O − Output Current − mA TPS76350 Load Transient Response 200 CO = 4.7 µF ESR = 0.25 Ω TJ = 25°C 100 0 ∆ VO − Change in Output Voltage − mV 150 A combination of new circuit design and process innovation has enabled the usual pnp pass transistor to be replaced by a PMOS pass element. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is low—typically 300 mV at 150 mA of load current (TPS76333)—and is directly proportional to the load current. Because the PMOS pass element is a voltage-driven device, the quiescent current is low (140 µA maximum) and is stable over the entire range of output load current (0 mA to 150 mA). Intended for use in portable systems such as laptops and cellular phones, the low-dropout voltage feature and low-power operation result in a significant increase in system battery operating life. The TPS763xx also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current to 1 µA maximum at TJ = 25°C.The TPS763xx is offered in 1.6-V ,1.8-V, 2.5-V, 2.7-V, 2.8-V, 3-V, 3.3-V, 3.8-V, and 5-V fixed-voltage versions and in a variable version (programmable over the range of 1.5 V to 6.5 V). Device Information(1) 100 PART NUMBER 0 TPS763xx PACKAGE SOT-23 (5) BODY SIZE (NOM) 2.90 mm × 1.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. −100 −200 0 20 40 60 80 100 120 140 160 180 200 t − Time − µs 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS763 SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 9 10 11 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... Absolute Maximum Ratings.................................. ESD Ratings ........................................................... Recommended Operating Conditions ................. Thermal Information.............................................. Electrical Characteristics ..................................... 1 1 1 2 3 3 3 3 3 4 4 11.1 Typical Characteristics ............................................ 7 12 Detailed Description ........................................... 11 12.1 Overview ............................................................... 11 12.2 Functional Block Diagram ..................................... 11 12.3 Feature Description............................................... 11 12.4 Device Functional Modes...................................... 12 13 Application and Implementation........................ 13 13.1 Application Information.......................................... 13 13.2 Typical Application ................................................ 13 14 Power Supply Recommendations ..................... 16 14.1 Power Dissipation and Junction Temperature ...... 16 15 Layout................................................................... 16 15.1 Layout Guidelines ................................................. 16 15.2 Layout Example .................................................... 16 16 Device and Documentation Support ................. 17 16.1 16.2 16.3 16.4 16.5 Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 17 17 17 17 17 17 Mechanical, Packaging, and Orderable Information ........................................................... 17 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision I (December 2016) to Revision J • Page Changed minimum specification from 4.75 V to 4.85 V in VO parameter for TPS76350, IO = 1 mA to 150 mA row in Electrical Characteristics table ............................................................................................................................................... 5 Changes from Revision H (January 2004) to Revision I Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 • Deleted Legacy Applications and Non-Ceramic Capacitor Stability from Applications ......................................................... 1 • Added Electricity Meters, Solar Inverters, HVAC Systems, Servo Drives and Motion Control, and Sensor Transmitters to Applications ................................................................................................................................................... 1 • Deleted Dissipation Ratings table........................................................................................................................................... 3 • Added Thermal Information table ........................................................................................................................................... 4 2 Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 TPS763 www.ti.com SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 5 Pin Configuration and Functions DBV Package 5-Pin SOT-23 Top View IN 1 GND 2 EN 3 5 OUT 4 NC/FB Pin Functions PIN NO. NAME I/O 1 IN I 2 GND — 3 EN I 4 NC/FB —/I 5 OUT O DESCRIPTION Input supply voltage Ground Enable input No connection (fixed-voltage option only) or feedback voltage (TPS76301 only) Regulated output voltage 6 Specifications 7 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Input voltage –0.3 10 V Voltage at EN –0.3 VI + 0.3 V 7 V Voltage on OUT, FB Peak output current Internally limited Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 8 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±250 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 9 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN VI Input voltage (1) IO Continuous output current TJ Operating junction temperature (1) MAX UNIT 2.7 10 V 0 150 mA –40 125 °C To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load) Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 3 TPS763 SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 www.ti.com 10 Thermal Information TPS763xx THERMAL METRIC (1) DBV (SOT-23) UNIT 5 PINS RθJA Junction-to-ambient thermal resistance 205.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 125.1 °C/W RθJB Junction-to-board thermal resistance 34.6 °C/W ψJT Junction-to-top characterization parameter 15.2 °C/W ψJB Junction-to-board characterization parameter 33.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 11 Electrical Characteristics over recommended operating free-air temperature range, VI = VO(typ) + 1 V, IO = 1 mA, EN = IN, and CO = 4.7 µF (unless otherwise noted) PARAMETER TEST CONDITIONS TPS76301 MIN TYP MAX 3.25 V > VI ≥ 2.7 V, 2.5 V ≥ VO ≥ 1.5 V, IO = 1 mA to 75 mA, TJ = 25°C 0.98 × VO VO 1.02 × VO 3.25 V > VI ≥ 2.7 V, 2.5 V ≥ VO ≥ 1.5 V, IO = 1 mA to 75 mA 0.97 × VO VO 1.03 × VO VI ≥ 3.25 V, 5 V ≥ VO ≥ 1.5 V, IO = 1 mA to 100 mA, TJ = 25°C 0.98 × VO VO 1.02 × VO VI ≥ 3.25 V, 5 V ≥ VO ≥ 1.5 V, IO = 1 mA to 100 mA 0.97 × VO VO 1.03 × VO 0.975 × VO VO 1.025 × VO 0.9625 × VO VO 1.0375 × VO VI = 2.7 V, 1 mA < IO < 75 mA, TJ = 25°C 1.568 1.6 1.632 VI = 2.7 V, 1 mA < IO < 75 mA 1.552 1.6 1.648 VI = 3.25 V, 1 mA < IO < 100 mA, TJ = 25°C 1.568 1.6 1.632 VI = 3.25 V, 1 mA < IO < 100 mA 1.552 1.6 1.648 VI = 3.25 V, 1 mA < IO < 150 mA, TJ = 25°C 1.56 1.6 1.64 VI = 3.25 V, 1 mA < IO < 150 mA 1.536 1.6 1.664 VI = 2.7 V, 1 mA < IO < 75 mA, TJ = 25°C 1.764 1.8 1.836 VI = 2.7 V, 1 mA < IO < 75 mA 1.746 1.8 1.854 VI = 3.25 V, 1 mA < IO < 100 mA, TJ = 25°C 1.764 1.8 1.836 VI = 3.25 V, 1 mA < IO < 100 mA 1.746 1.8 1.854 VI = 3.25 V, 1 mA < IO < 150 mA, TJ = 25°C 1.755 1.8 1.845 VI = 3.25 V, 1 mA < IO < 150 mA 1.733 1.8 1.867 VI ≥ 3.25 V, 5 V ≥ VO ≥ 1.5 V, IO = 1 mA to 150 mA, TJ = 25°C VI ≥ 3.25 V, 5 V ≥ VO ≥ 1.5 V, IO = 1 mA to 150 mA VO Output voltage TPS76316 TPS76318 4 Submit Documentation Feedback UNIT V Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 TPS763 www.ti.com SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 Electrical Characteristics (continued) over recommended operating free-air temperature range, VI = VO(typ) + 1 V, IO = 1 mA, EN = IN, and CO = 4.7 µF (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 2.45 2.5 2.55 IO = 1 mA to 100 mA 2.425 2.5 2.575 IO = 1 mA to 150 mA, TJ = 25°C 2.438 2.5 2.562 IO = 1 mA to 150 mA 2.407 2.5 2.593 IO = 1 mA to 100 mA, TJ = 25°C 2.646 2.7 2.754 IO = 1 mA to 100 mA 2.619 2.7 2.781 IO = 1 mA to 150 mA, TJ = 25°C 2.632 2.7 2.767 IO = 1 mA to 150 mA 2.599 2.7 2.801 IO = 1 mA to 100 mA, TJ = 25°C 2.744 2.8 2.856 IO = 1 mA to 100 mA 2.716 2.8 2.884 2.73 2.8 2.87 IO = 1 mA to 100 mA, TJ = 25°C TPS76325 TPS76327 TPS76328 IO = 1 mA to 150 mA, TJ = 25°C IO = 1 mA to 150 mA Output voltage (continued) VO TPS76330 TPS76333 TPS76338 TPS76350 2.695 2.8 2.905 IO = 1 mA to 100 mA, TJ = 25°C 2.94 3 3.06 IO = 1 mA to 100 mA 2.91 3 3.09 IO = 1 mA to 150 mA, TJ = 25°C 2.925 3 3.075 IO = 1 mA to 150 mA 2.888 3 3.112 IO = 1 mA to 100 mA, TJ = 25°C 3.234 3.3 3.366 IO = 1 mA to 100 mA 3.201 3.3 3.399 IO = 1 mA to 150 mA, TJ = 25°C 3.218 3.3 3.382 IO = 1 mA to 150 mA 3.177 3.3 3.423 IO = 1 mA to 100 mA, TJ = 25°C 3.724 3.8 3.876 IO = 1 mA to 100 mA 3.705 3.8 3.895 IO = 1 mA to 150 mA, TJ = 25°C 3.686 3.8 3.914 IO = 1 mA to 150 mA 3.667 3.8 3.933 IO = 1 mA to 100 mA, TJ = 25°C 4.875 5 5.125 IO = 1 mA to 100 mA 4.825 5 5.175 4.85 5 5.15 4.8 5 5.2 85 100 IO = 1 mA to 150 mA, TJ = 25°C IO = 1 mA to 150 mA Quiescent current (GND pin current) I(Q) Standby current IO = 1 mA to 150 mA, TJ = 25°C (1) IO = 1 mA to 150 mA (2) EN < 0.5 V, TJ = 25°C BW = 300 Hz to 50 kHz, TJ = 25°C, CO = 10 µF (2) PSRR Ripple rejection f = 1 kHz, CO = 10 µF, TJ = 25°C (2) TJ = 25°C Output voltage line regulation (ΔVO/VO) (3) VO + 1 V < VI ≤ 10 V, VI ≥ 3.5 V, TJ = 25°C EN low level input (2) (1) (2) (3) (3) Current limit VIL 1 2 Output noise voltage EN high level input (2) 0.5 EN < 0.5 V Vn VIH 140 0.5 V µA µA 140 µV 60 dB 0.8 1.5 0.04% 0.07% VO + 1 V < VI ≤ 10 V, VI ≥ 3.5 V 0.1% 1.4 0.5 UNIT 2 1.2 A V V V Minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Test conditions includes output voltage VO = 0 V (for variable device FB is shorted to VO), and pulse duration = 10 mS. VO (VIm ax - 3.5 V) ´ 1000 100 If VO < 2.5 V and VImax = 10 V, VImin = 3.5 V: - (VO + 1)) V (V ´ 1000 Line Re g. (mV) = (% / V) ´ O Im ax 100 If VO > 2.5 V and VImax = 10 V, VImin = VO + 1 V: Line Re g. (mV) = (% / V) ´ Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 5 TPS763 SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 www.ti.com Electrical Characteristics (continued) over recommended operating free-air temperature range, VI = VO(typ) + 1 V, IO = 1 mA, EN = IN, and CO = 4.7 µF (unless otherwise noted) PARAMETER II EN input current TYP MAX EN = 0 V TEST CONDITIONS MIN –0.01 –0.5 EN = IN –0.01 –0.5 IO = 0 mA, TJ = 25°C 0.2 IO = 1 mA, TJ = 25°C 3 IO = 50 mA, TJ = 25°C 120 IO = 50 mA TPS76325 IO = 75 mA, TJ = 25°C 240 0.2 IO = 1 mA, TJ = 25°C 3 100 IO = 50 mA VDO Dropout voltage TPS76333 200 0.2 IO = 1 mA, TJ = 25°C 2 IO = 50 mA, TJ = 25°C 60 IO = 50 mA 90 IO = 150 mA 6 Submit Documentation Feedback 375 75 113 150 120 IO = 100 mA IO = 150 mA, TJ = 25°C 250 100 IO = 75 mA IO = 100 mA, TJ = 25°C mV 500 IO = 0 mA, TJ = 25°C IO = 75 mA, TJ = 25°C 188 333 300 IO = 150 mA TPS76350 125 250 IO = 100 mA IO = 150 mA, TJ = 25°C 450 166 150 IO = 75 mA IO = 100 mA, TJ = 25°C 300 600 IO = 0 mA, TJ = 25°C IO = 75 mA, TJ = 25°C 225 400 360 IO = 150 mA IO = 50 mA, TJ = 25°C 150 300 IO = 100 mA IO = 150 mA, TJ = 25°C µA 200 180 IO = 75 mA IO = 100 mA, TJ = 25°C UNIT 150 200 180 225 300 Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 TPS763 www.ti.com SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 11.1 Typical Characteristics 2.505 1.805 VI = 3.5 V CI = CO = 4.7 µF TJ = 25°C 1.800 VO − Output Voltage − V VO − Output Voltage − V 2.5 2.495 2.49 2.485 2.48 1.795 1.790 1.785 1.780 1.775 1.770 2.475 30 0 90 60 120 150 180 0 60 30 120 90 150 IO − Output Current − mA IO − Output Current − mA Figure 1. TPS76325 Output Voltage vs Output Current Figure 2. TPS76318 Output Voltage vs Output Current 180 2.53 5.01 VI = 3.5 V CI = CO = 4.7 µF VI = 6 V CI = CO = 4.7 µF TJ = 25°C 2.52 VO − Output Voltage − V 5 VO − Output Voltage − V VI = 3.5 V CI = CO = 4.7 µF TJ = 25°C 4.99 4.98 4.97 4.96 2.51 IO = 1 mA 2.5 2.49 IO = 150 mA 2.48 2.47 −55 −35 4.95 0 60 30 120 90 150 180 −15 5 25 45 65 85 105 125 TJ − Junction Temperature − °C IO − Output Current − mA Figure 3. TPS76350 Output Voltage vs Output Current Figure 4. TPS76325 Output Voltage vs Output Current 1.82 5.1 VI = 6 V CI = CO = 4.7 µF 5.08 1.81 IO = 1 mA 5.06 VO − Output Voltage − V VO − Output Voltage − V 1.8 1.79 IO = 150 mA 1.78 1.77 1.76 5.04 5.02 IO = 1 mA 5 4.98 4.96 IO = 150 mA 4.94 VI = 3.5 V CI = CO = 4.7 µF 1.75 1.74 −55 −35 −15 5 25 45 65 85 105 4.92 125 4.9 −55 −35 TJ − Junction Temperature − °C −15 5 25 45 65 85 105 125 TJ − Junction Temperature − °C Figure 5. TPS76318 Output Voltage vs Free-Air Temperature Figure 6. TPS76350 Output Voltage vs Free-Air Temperature Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 7 TPS763 SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 www.ti.com Typical Characteristics (continued) 3µVÖHz 1000 TJ = 25°C Ground Current − µ A VI = 6 V CI = CO = 4.7 µF IO = 0 mA and 150 mA 2.5µVÖHz CO = 10 µF IO = 150 mA 2µVÖHz CO = 4.7 µF IO = 150 mA 1.5µVÖHz 100 1µVÖHz CO = 4.7 µF IO = 1 mA 0.5µVÖHz CO = 10 µF IO = 1 mA 10 −55 −35 −15 5 25 45 65 85 105 125 0µVÖHz 250 1k 10k 100k f − Frequency − Hz TJ − Junction Temperature − °C Figure 8. Output Noise vs Frequency Figure 7. TPS76350 Ground Current vs Free-Air Temperature 10 600 VI = EN = 2.7 V CI = CO = 4.7 µF VDO − Dropout Voltage − mV Zo − Output Impedance − Ω 500 IO = 1 mA 1 IO = 150 mA 0.1 300 200 1 10 0 −55 −35 1000 100 Figure 9. Output Impedance vs Frequency IO = 1 mA IO = 150 mA 10 CO = 4.7 µF ESR = 1 Ω TJ = 25°C 100 1k 10 k 100 k 65 85 105 125 3 2 CO = 4.7 µF ESR = 0.25 Ω TJ = 25°C 1M 10 M 20 0 Figure 11. TPS76325 Ripple Rejection vs Frequency dv 1V = 10 µs dt −20 −30 0 f − Frequency − Hz 8 45 4 1 20 −10 10 25 5 30 ∆ VO − Change in Output Voltage − mV Ripple Rejection − dB 50 40 5 Figure 10. TPS76325 Dropout Voltage vs Free-Air Temperature VI − Input Voltage − V 70 60 −15 TJ − Junction Temperature − °C f − Frequency − kHz 0 1 mA 0 mA 100 CI = CO = 4.7 µF ESR = 1 Ω TJ = 25°C 0.1 0.01 150 mA 400 20 40 60 80 100 120 140 160 180 200 t − Time − µs Figure 12. TPS76318 Line Transient Response Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 TPS763 www.ti.com SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 200 100 0 CO = 4.7 µF ESR = 0.25 Ω TJ = 25°C 50 8 6 5 −50 −100 0 0 −50 20 40 60 −100 80 100 120 140 160 180 200 t − Time − µs 0 50 100 150 200 250 300 350 400 450 500 t − Time − µs Figure 14. TPS76350 Line Transient Response 100 CSR − Compensation Series Resistance − Ω I O − Output Current − mA Figure 13. TPS76318 Load Transient Response 200 CO = 4.7 µF ESR = 0.25 Ω TJ = 25°C 100 0 150 ∆ VO − Change in Output Voltage − mV CO = 4.7 µF ESR = 0.25 Ω TJ = 25°C 50 0 −150 100 0 −100 Region of Instability 10 0 20 40 60 0.1 Region of Instability 0 50 80 100 120 140 160 180 200 t − Time − µs Figure 15. TPS76350 Load Transient Response 100 150 200 250 IO − Output Current − mA Figure 16. Compensation Series Resistance (CSR) vs Output Current 100 CSR − Compensation Series Resistance − Ω 100 Region of Instability 10 I = 150 mA CO = 4.7 µF TJ = 25°C 1 0.1 Region of Instability 0.01 CO = 4.7 µF TJ = 25°C 1 0.01 −200 CSR − Compensation Series Resistance − Ω dv 1V = 10 µs dt 7 ∆ VO − Change in Output Voltage − mV ∆ VO − Change in Output Voltage − mV VI − Input Voltage − V I O − Output Current − mA Typical Characteristics (continued) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Region of Instability 10 CO = 10 µF 1 0.1 Region of Instability 0.01 0 50 100 150 200 250 Added Ceramic Capacitance − µF IO − Output Current − mA Figure 17. Compensation Series Resistance (CSR) vs Added Ceramic Capacitance Figure 18. Compensation Series Resistance (CSR) vs Output Current Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 9 TPS763 SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 www.ti.com Typical Characteristics (continued) CSR − Compensation Series Resistance − Ω 100 Region of Instability 10 CO = 10 µF 1 0.1 Region of Instability 0.01 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Added Ceramic Capacitance − µF Figure 19. Compensation Series Resistance (CSR) vs Added Ceramic Capacitance 10 Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 TPS763 www.ti.com SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 12 Detailed Description 12.1 Overview The TPS763xx devices uses a PMOS pass element to dramatically reduce both dropout voltage and supply current over more conventional PNP pass element LDO designs. The PMOS pass element is a voltagecontrolled device that, unlike a PNP transistor, does not require increased drive current as output current increases. Supply current in the TPS763xx is essentially constant from no-load to maximum load. Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation. The device switches into a constant-current mode at approximately 1 A; further load reduces the output voltage instead of increasing the output current. The thermal protection shuts the regulator off if the junction temperature rises above 165°C. Recovery is automatic when the junction temperature drops approximately 25°C below the high temperature trip point. The PMOS pass element includes a back diode that safely conducts reverse current when the input voltage level drops below the output voltage level. A logic low on the enable input, EN shuts off the output and reduces the supply current to less than 2 µA. EN must be tied high in applications where the shutdown feature is not used. 12.2 Functional Block Diagram TPS76301 IN OUT EN Current Limit/ Thermal Protection VREF GND FB TPS76316/ 18/ 25/ 27/ 28/ 30/ 33/ 38/ 50 IN OUT EN Current Limit/ Thermal Protection VREF GND 12.3 Feature Description 12.3.1 Regulator Protection The TPS763xx features internal current limiting and thermal protection. During normal operation, the TPS763xx limits output current to approximately 800 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, take care not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below 140°C, regulator operation resumes. Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 11 TPS763 SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 www.ti.com Feature Description (continued) 12.3.2 Enable The enable signal (VEN) is an active-high digital control that enables the LDO when the enable voltage is past the rising threshold (VEN ≥ VIH(EN)) and disables the LDO when the enable voltage is below the falling threshold (VEN ≤ VIL(EN)). The exact enable threshold is between VIH(EN) and VIL(EN) because EN is a digital control. In applications that do not use the enable control, connect EN to VIN. 12.4 Device Functional Modes Table 1 provides a quick comparison between the regulation and disabled operation. Table 1. Device Functional Modes Comparison OPERATING MODE (1) (2) PARAMETER VIN EN IOUT TJ Regulation (1) VIN > VOUT(nom) + VDO VEN > VIH(EN) IOUT < ICL TJ < Tsd Disabled (2) — VEN < VIL(EN) — TJ > Tsd All table conditions must be met. The device is disabled when any condition is met. 12.4.1 Regulation The device regulates the output to the targeted output voltage when all the conditions in Table 1 are met. 12.4.2 Disabled When disabled, the pass device is turned off, the internal circuits are shutdown. 12 Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 TPS763 www.ti.com SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 13 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 13.1 Application Information The TPS763xx low-dropout (LDO) regulators are part of a family of regulators which have been optimized for use in battery-operated equipment and feature extremely low dropout voltages, low quiescent current (140 µA), and an enable input to reduce supply currents to less than 2 µA when the regulator is turned off. 13.2 Typical Application TPS76301 1 VI IN 1 µF OUT •2 V 3 ”0.5 V 5 Vo R1 EN FB + 4 GND 4.7 µF CSR=1 Ÿ R2 2 Figure 20. Typical Application Circuit 13.2.1 Design Requirements Although not required, TI recommends a 0.047-µF or larger ceramic bypass input capacitor, connected between IN and GND and placed close to the TPS763xx, to improve transient response and noise rejection. A highervalue electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is placed several inches from the power source. Follow the programming guidelines from Table 2. Table 2. Output Voltage Programming Guide OUTPUT VOLTAGE (V) (1) DIVIDER RESISTANCE (kΩ) (1) R1 R2 2.5 187 169 3.3 301 169 3.6 348 169 4 402 169 5 549 169 6.45 750 169 1% values shown Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 13 TPS763 SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 www.ti.com 13.2.2 Detailed Design Procedure 13.2.2.1 Capacitor Selection Like all low dropout regulators, the TPS763xx requires an output capacitor connected between OUT and GND to stabilize the internal loop control. The minimum recommended capacitance value is 4.7 µF and the ESR (equivalent series resistance) must be between 0.3 Ω and 10 Ω. Capacitor values 4.7 µF or larger are acceptable, provided the ESR is less than 10 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 4.7 µF surface-mount solid tantalum capacitors, including devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above (see Table 3). Table 3. Capacitor Selection MFR VALUE MAX ESR SIZE (H × L × W) T494B475K016AS PART NO. Kemet 4.7 µF 1.5 Ω 1.9 × 3.5 × 2.8 195D106x0016x2T Sprague 10 µF 1.5 Ω 1.3 × 7 × 2.7 695D106x003562T Sprague 10 µF 1.3 Ω 2.5 × 7.6 × 2.5 AVX 4.7 µF 0.6 Ω 2.6 × 6 × 3.2 TPSC475K035R0600 13.2.2.2 Output Voltage Programming The output voltage of the TPS76301 adjustable regulator is programmed using an external resistor divider as shown in Figure 21. The output voltage is calculated using Equation 1. R1 ö æ VO = 0.995 ´ Vref ´ ç 1 + ÷ R2 è ø where • • Vref = 1.192 V typical (the internal reference voltage) 0.995 is a constant used to center the load regulator (1%) (1) Resistors R1 and R2 must be chosen for approximately 7-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values must be avoided as leakage currents at FB increase the output voltage error. TI recommends choosing a design procedure of R2 = 169 kΩ to set the divider current at 7 µA and then calculate R1 using Equation 2. æ ö VO R1 = ç - 1÷ ´ R2 è 0.995 ´ Vref ø (2) TPS76301 1 VI IN 1 µF OUT •2 V ”0.5 V 3 5 Vo R1 EN FB 4 GND + 4.7 µF R2 CSR=1 Ÿ 2 Figure 21. TPS76301 Adjustable LDO Regulator Programming 14 Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 TPS763 www.ti.com SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 13.2.2.3 Reverse Current The TPS763xx pass element has a built-in back diode that safely conducts reverse currents when the input voltage drops below the output voltage (for example, during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might be appropriate. 13.2.3 Application Curves 100 CSR − Compensation Series Resistance − Ω CSR − Compensation Series Resistance − Ω 100 Region of Instability 10 CO = 4.7 µF TJ = 25°C 1 0.1 Region of Instability 0.01 Region of Instability 10 0.1 Region of Instability 0.01 0 50 100 150 200 CO = 10 µF 1 250 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 IO − Output Current − mA Added Ceramic Capacitance − µF Figure 22. Compensation Series Resistance (CSR) vs Output Current Figure 23. Compensation Series Resistance (CSR) vs Added Ceramic Capacitance Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 15 TPS763 SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 www.ti.com 14 Power Supply Recommendations A 1-µF or larger input capacitor must be used. 14.1 Power Dissipation and Junction Temperature Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature allowable to avoid damaging the device is 150°C. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using Equation 3. T max - TA PD(max) = J RqJA where • • • TJmax is the maximum allowable junction temperature RθJA is the thermal resistance junction-to-ambient for the package, see Thermal Information TA is the ambient temperature The regulator dissipation is calculating using Equation 4. PD = (VI - VO ) ´ IO (3) (4) Power dissipation resulting from quiescent current is negligible. 15 Layout 15.1 Layout Guidelines • • • Place input and output capacitors as close to the device as possible. Use copper planes for device connections to optimize thermal performance. Place thermal vias around the device to distribute the heat. 15.2 Layout Example VOUT VIN 1 CIN 5 COUT 2 3 4 EN GND PLANE Represents via used for application specific connections Figure 24. Layout Example for DBV Package 16 Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 TPS763 www.ti.com SLVS181J – DECEMBER 1998 – REVISED SEPTEMBER 2019 16 Device and Documentation Support 16.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 16.2 Community Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 16.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 16.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 16.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 17 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 1998–2019, Texas Instruments Incorporated Product Folder Links: TPS763 17 PACKAGE OPTION ADDENDUM www.ti.com 13-Aug-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS76301DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PAZI TPS76301DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PAZI TPS76301DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PAZI TPS76316DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBHI TPS76316DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBHI TPS76316DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBHI TPS76318DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBAI TPS76318DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBAI TPS76318DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBAI TPS76318DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBAI TPS76325DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBBI TPS76325DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBBI TPS76325DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBBI TPS76327DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBCI TPS76327DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBCI TPS76327DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBCI TPS76328DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBDI TPS76328DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBDI TPS76330DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBII TPS76330DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBII Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 13-Aug-2021 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS76333DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBEI TPS76333DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBEI TPS76333DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBEI TPS76333DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBEI TPS76338DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBFI TPS76338DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBFI TPS76350DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBGI TPS76350DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBGI TPS76350DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBGI TPS76350DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PBGI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of