TPS76825QPWPRQ1

TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 FAST TRANSIENT RESPONSE, 1-A LOW-DROPOUT VOLTAGE REGULATORS FEATURES • • • • • • • • • DESCRIPTION Input Voltage Range: 2.7 V to 10 V Low-Dropout Voltage: 230 mV typical at 1 A (TPS76850) 2% Tolerance Over Specified Conditions for Fixed-Output Versions Open Drain Power Good (See TPS767xx for Power-On Reset With 200-ms Delay Option) Ultralow 85 µA Typical Quiescent Current Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, 5.0-V Fixed Output and Adjustable (1.2 V to 5.5 V) Versions Fast Transient Response Thermal Shutdown Protection SOIC-8 (D) and TSSOP-20 (PWP) Package D PACKAGE (Top View) GND 1 8 PG EN 2 7 FB/NC IN 3 6 OUT IN 4 5 OUT This device is designed to have a fast transient response and be stable with 10 µF capacitors. This combination provides high performance at a reasonable cost. Since the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV at an output current of 1 A for the TPS76850) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over the full range of output current, 0 mA to 1 A). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a shutdown mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = 25°C. Power good (PG) is an active high output, which can be used to implement a power-on reset or a low-battery indicator. TPS768xx VI 6 IN PG 16 PG 7 IN OUT 0.1 µF PWP PACKAGE (Top View) 5 EN OUT 14 VO 13 + GND/HSINK 1 20 GND/HSINK GND/HSINK 2 19 GND/HSINK GND 3 18 NC NC 4 17 NC EN 5 16 PG IN 6 15 FB/NC IN 7 14 OUT NC 8 13 OUT GND/HSINK 9 12 GND/HSINK GND/HSINK 10 11 GND/HSINK GND Co 10 µF 3 Figure 1. Typical Application Configuration (For Fixed Output Options) NC = No Internal Connection Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2006, Texas Instruments Incorporated TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) VOUT (2) PRODUCT TPS768xxQyyyz (1) (2) XX is nominal output voltage (for example, 28 = 2.8 V, 285 = 2.85 V, 01 = Adjustable). YYY is package designator. Z is package quantity. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Custom output voltages are available; minimum order quantities may apply. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE Input voltage range, VI (2) –0.3 V to 13.5 V Voltage range at EN –0.3 V to VI + 0.3 V Maximum PG voltage 16.5 V Peak output current Internally limited Continuous total power dissipation See Dissipation Rating Table Output voltage, VO (OUT, FB) 7V Operating junction temperature range, TJ –40°C to +125°C Storage temperature range, Tstg –65°C to +150°C ESD rating, HBM (1) (2) 2 kV Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network terminal ground. DISSIPATION RATING TABLE—FREE-AIR TEMPERATURES PACKAGE D PWP (1) (1) AIR FLOW (CFM) TA < +25°C POWER RATING DERATING FACTOR ABOVE TA = +25°C TA = +70°C POWER RATING TA = +85°C POWER RATING 0 568.18 mW 5.6818 mW/°C 312.5 mW 227.27 mW 250 904.15 mW 9.0415 mW/°C 497.28 mW 361.66 mW 0 3.1 W 30.7 mW/°C 1.7 W 1.2 W 250 4.1 W 41.2 mW/°C 2.3 W 1.6 W This parameter is measured with the recommended copper heat sink pattern on a 4-layer, 5-in × 5-in PCB, 1 oz. copper, 4-in × 4-in coverage (4 in2). RECOMMENDED OPERATING CONDITIONS MIN MAX Input voltage, VI (1) 2.7 10 V Output voltage range, VO 1.2 5.5 V 0 1.0 A –40 +125 °C Output current, IO (2) Operating junction temperature, TJ (2) (1) (2) 2 UNIT Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater. Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. Submit Documentation Feedback TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range, VI = VO(typ)+ 1 V, IO = 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted). PARAMETER TEST CONDITIONS VOUT Accuracy –40°C ≤ TJ ≤ +125°C, VO + 1 V ≤ VIN ≤ 10V (1), 10 µA ≤ IO ≤ 1A Quiescent current (GND current) EN = 0V Output voltage line regulation (∆VO/VO) (1) (1) (2) MIN TYP MAX (0.98)VO VO (1.02)VO 10 µA < IO < 1 A, TJ = +25°C 85 IO = 1 A, TJ = –40°C to +125°C 125 VO + 1 V < VI ≤ 10 V, TJ = +25°C Load regulation Output noise voltage (TPS76818) BW = 200 Hz to 100 kHz, CO = 10 µF, IC = 1 A, TJ = +25°C Output current limit VO = 0 V 1.2 Thermal shutdown junction temperature VEN = VI, TJ = +25°C, 2.7 V < VI < 10 V Standby current TPS76801 %/V mV 55 µVrms 1.7 Power Good (PG) 1 µA 2 f = 1 kHz, CO = 10 µF, TJ = +25°C IO(PG) = 300 µA Trip threshold voltage VO decreasing Hysteresis voltage Measured at VO Output low voltage VI = 2.7 V, IO(PG) = 1 mA Leakage current V(PG) = 5 V Enable pin current (IEN) V TPS76828 TPS76830 (3) TPS76833 TPS76850 (1) (2) (3) 60 0.5 1 VEN = VI 1 IO = 1 A, TJ = +25°C 0 %VO V 1 µA 1 µA 500 825 450 IO = 1 A, TJ = –40°C to +125°C IO = 1 A, TJ = +25°C %VO 0.4 1 IO = 1 A, TJ = –40°C to +125°C IO = 1 A, TJ = +25°C V 98 0.15 V dB 1.1 92 VEN = 0 V µA nA 0.9 (1) A °C 1.7 Minimum input voltage for valid PG Dropout voltage 2 150 Low-level enable input voltage Power-supply ripple rejection µA 3 10 VFB = 1.5 V High-level enable input voltage V 0.01 VEN = VI, TJ = –40°C to +125°C, 2.7 V < VI < 10 V FB pin current, IFB UNIT 675 350 IO = 1 A, TJ = –40°C to +125°C mV 575 IO = 1 A, TJ = +25°C 230 IO = 1 A, TJ = –40°C to +125°C 380 Minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Maximum IN voltage 10 V. V Imax2.7V Line Reg. (mV)  (%  V)
V O
1000 100 If VO≤ 1.8 V then VImax = 10 V, VImin = 2.7 V: V ImaxVO1V Line Reg. (mV)  (%  V)
V O
1000 100 If VO≥ 2.5 V then VImax = 10 V, VImin = VO + 1 V: IN voltage equals VO(typ) – 100 mV; TPS76801 output voltage set to 3.3 V nominal with external resistor divider. TPS76815, TPS76818, TPS76825, and TPS76827 dropout voltage limited by input voltage range limitations (that is, TPS76830 input voltage must drop to 2.9 V for the purpose of this test). Submit Documentation Feedback 3 TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 FUNCTIONAL BLOCK DIAGRAM—Adjustable Version IN EN PG _ + OUT + _ R1 Vref = 1.1834 V FB/NC R2 GND External to the device FUNCTIONAL BLOCK DIAGRAM—Fixed-Voltage Version IN EN PG _ + OUT + _ R1 Vref = 1.1834 V R2 GND Terminal Functions NAME 4 SOIC-8 (D) PIN NO. TSSOP-20 (PWP) PIN NO. DESCRIPTION GND 1 3 GND/HSINK — 1, 2, 9-12, 19, 20 Regulator ground NC — 4, 8, 17, 18 No connect Regulator ground and heatsink EN 2 5 Enable input IN 3, 4 6, 7 Input voltage OUT 5, 6 13, 14 FB/NC 7 15 Feedback input voltage for adjustable device (no connect for fixed options) PG 8 16 PG output Regulated output voltage Submit Documentation Feedback TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 TYPICAL CHARACTERISTICS TPS76833 OUTPUT VOLTAGE vs OUTPUT CURRENT TPS76815 OUTPUT VOLTAGE vs OUTPUT CURRENT 3.2835 1.4985 VI = 4.3 V TA = 25°C 1.4980 3.2825 VO − Output Voltage − V VO − Output Voltage − V 3.2830 3.2820 3.2815 3.2810 3.2805 1.4975 1.4970 1.4965 1.4960 1.4955 3.2800 1.4950 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 IO − Output Current − A 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 IO − Output Current − A Figure 2. Figure 3. TPS76825 OUTPUT VOLTAGE vs OUTPUT CURRENT TPS76833 OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 2.4960 3.32 VI = 3.5 V TA = 25°C 2.4955 VI = 4.3 V 3.31 VO − Output Voltage − V 2.4950 VO − Output Voltage − V VI = 2.7 V TA = 25°C 2.4945 2.4940 2.4935 2.4930 3.30 3.29 IO = 1 A IO = 1 mA 3.28 3.27 3.26 2.4925 2.4920 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 3.25 −60 −40 −20 0 20 40 60 80 100 120 140 TA − Free-Air Temperature − °C IO − Output Current − A Figure 4. Figure 5. Submit Documentation Feedback 5 TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 TYPICAL CHARACTERISTICS (continued) TPS76815 OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE TPS76825 OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 1.515 2.515 VI = 3.5 V VI = 2.7 V 2.510 VO − Output Voltage − V VO − Output Voltage − V 1.510 1.505 1.500 IO = 1 A IO = 1 mA 1.495 1.490 2.505 2.500 IO = 1 A 2.495 IO = 1 mA 2.490 2.485 1.485 −60 −40 −20 0 20 40 60 80 2.480 −60 −40 100 120 140 TA − Free-Air Temperature − °C −20 0 20 40 60 80 100 120 TA − Free-Air Temperature − °C Figure 6. Figure 7. TPS76833 GROUND CURRENT vs FREE-AIR TEMPERATURE TPS76815 GROUND CURRENT vs FREE-AIR TEMPERATURE 92 100 VI = 2.7 V 90 VI = 4.3 V 95 86 84 82 IO = 1 mA 80 IO = 1 A 78 IO = 500 mA 76 Ground Current − µ A Ground Current − µ A 88 90 IO = 1 A IO = 1 mA 85 IO = 500 mA 80 74 72 −60 −40 −20 0 20 40 60 80 100 120 140 75 −60 −40 −20 TA − Free-Air Temperature − °C Figure 8. 6 0 20 40 Figure 9. Submit Documentation Feedback 60 80 100 120 140 TA − Free-Air Temperature − °C TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 TYPICAL CHARACTERISTICS (continued) TPS76833 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY TPS76833 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 10−5 VI = 4.3 V Co = 10 µF IO = 1 A TA = 25°C 80 70 Output Spectral Noise Density − µV Hz PSRR − Power Supply Ripple Rejection − dB 90 60 50 40 30 20 10 0 −10 10 100 1k 10k 100k VI = 4.3 V Co = 10 µF TA = 25°C IO = 7 mA 10−6 IO = 1 A 10−7 10−8 102 1M 103 f − Frequency − Hz Figure 10. Figure 11. INPUT VOLTAGE (MIN) vs OUTPUT VOLTAGE TPS76833 OUTPUT IMPEDANCE vs FREQUENCY 0 VI = 4.3 V Co = 10 µF TA = 25°C IO = 1 A Zo − Output Impedance − Ω TA = 25°C VI − Input Voltage (Min) − V 105 f − Frequency − Hz 4 TA = 125°C 3 TA = −40°C 2.7 2 1.5 104 1.75 2 2.25 2.5 2.75 3 3.25 3.5 IO = 1 mA 10−1 IO = 1 A 10−2 101 VO − Output Voltage − V Figure 12. 102 103 104 f − Frequency − kHz 105 106 Figure 13. Submit Documentation Feedback 7 TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 TYPICAL CHARACTERISTICS (continued) TPS76833 DROPOUT VOLTAGE vs FREE-AIR TEMPERATURE TPS76815 LINE TRANSIENT RESPONSE VI − Input Voltage − V 103 IO = 1 A 101 2.7 IO = 10 mA 100 ∆ VO − Change in Output Voltage − mV VDO − Dropout Voltage − mV 102 3.7 10−1 IO = 0 Co = 10 µF 10−2 −60 −40 −20 0 20 40 60 80 100 120 140 10 0 Co = 10 µF TA = 25°C −10 0 20 40 60 TA − Free-Air Temperature − °C Figure 15. TPS76815 LOAD TRANSIENT RESPONSE TPS76833 LINE TRANSIENT RESPONSE ∆ VO − Change in Output Voltage − mV Co = 10 µF TA = 25°C 50 0 −50 VI − Input Voltage − V Figure 14. 100 ∆ VO − Change in Output Voltage − mV I O − Output Current − A Co = 10 µF TA = 25°C 5.3 4.3 −100 1 0.5 0 0 100 200 300 400 500 600 700 800 900 1000 t − Time − µs 10 0 −10 0 Figure 16. 8 80 100 120 140 160 180 200 t − Time − µs 20 40 60 80 100 120 140 160 180 200 t − Time − µs Figure 17. Submit Documentation Feedback TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 TYPICAL CHARACTERISTICS (continued) TPS76833 OUTPUT VOLTAGE vs TIME (AT START-UP) TPS76833 LOAD TRANSIENT RESPONSE VO− Output Voltage − V 4 Co = 10 µF TA = 25°C 50 0 −50 −100 Co = 10 µF IO = 1 A TA = 25°C 3 2 1 0 1 Enable Pulse − V I O − Output Current − A ∆ VO − Change in Output Voltage − mV 100 0.5 0 0 100 200 300 400 500 600 700 800 900 1000 t − Time − µs 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 t − Time − ms 0.9 1 Figure 18. Figure 19. TPS76801 DROPOUT VOLTAGE vs INPUT VOLTAGE TEST CIRCUIT FOR TYPICAL REGIONS OF STABILITY (Figure 22 through Figure 25) (Fixed Output Options) 900 IO = 1 A VDO − Dropout Voltage − mV 800 700 To Load VI 600 IN OUT + 500 TA = 25°C 400 EN TA = 125°C Co GND RL ESR 300 200 TA = −40°C 100 0 2.5 3 3.5 4 VI − Input Voltage − V 4.5 5 Figure 20. Figure 21. Submit Documentation Feedback 9 TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 TYPICAL CHARACTERISTICS (continued) Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO. TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE vs OUTPUT CURRENT TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE vs OUTPUT CURRENT 10 ESR − Equivalent Series Resistance − Ω ESR − Equivalent Series Resistance − Ω 10 Region of Instability 1 VO = 3.3 V Co = 4.7 µF VI = 4.3 V TA = 25°C Region of Stability 0.1 VO = 3.3 V Co = 4.7 µF VI = 4.3 V TJ = 125°C Region of Stability 0.1 Region of Instability 0.01 0 200 400 600 800 0 1000 200 400 600 800 IO − Output Current − mA IO − Output Current − mA Figure 22. Figure 23. TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE vs OUTPUT CURRENT TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE vs OUTPUT CURRENT 1000 10 ESR − Equivalent Series Resistance − Ω 10 ESR − Equivalent Series Resistance − Ω 1 Region of Instability 0.01 Region of Instability 1 VO = 3.3 V Co = 22 µF VI = 4.3 V TA = 25°C Region of Stability 0.1 Region of Instability Region of Instability 1 VO = 3.3 V Co = 22 µF VI = 4.3 V TJ = 125°C Region of Stability 0.1 Region of Instability 0.01 0.01 0 10 Region of Instability 200 400 600 800 1000 0 200 400 600 IO − Output Current − mA IO − Output Current − mA Figure 24. Figure 25. Submit Documentation Feedback 800 1000 TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 APPLICATION INFORMATION The TPS768xxQ family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V, 3.3 V, and 5.0 V), and offers an adjustable device, the TPS76801 (adjustable from 1.2 V to 5.5 V). DEVICE OPERATION The TPS768xxQ features very low quiescent current, which remains virtually constant even with varying loads. Conventional LDO regulators use a PNP pass element, the base current of which is directly proportional to the load current through the regulator (IB = IC/β). The TPS768xxQ uses a PMOS transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range. Another pitfall associated with the PNP-pass element is its tendency to saturate when the device goes into dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation. The TPS768xxQ quiescent current remains low even when the regulator drops out, eliminating both problems. The TPS768xxQ family also features a shutdown mode that places the output in the high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown feature is not used, EN should be tied to ground. MINIMUM LOAD REQUIREMENTS The TPS768xxQ family is stable even at zero load; no minimum load is required for operation. FB - PIN CONNECTION (ADJUSTABLE VERSION ONLY) The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The output voltage is sensed through a resistor divider network to close the loop as shown in Figure 27. Normally, this connection should be as short as possible; however, the connection can be made near a critical circuit to improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is essential. EXTERNAL CAPACITOR REQUIREMENTS An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves load transient response and noise rejection if the TPS768xxQ is located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated. Like all low dropout regulators, the TPS768xxQ requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR (equivalent series resistance) must be between 60 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are acceptable, provided the ESR is less than 1.5Ω . Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Submit Documentation Feedback 11 TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 APPLICATION INFORMATION (continued) TPS768xx 6 VI IN 7 C1 0.1 µF PG 16 PG 250 kΩ IN OUT 5 EN OUT 14 VO 13 + Co 10 µF GND 3 Figure 26. Typical Application Circuit (Fixed Versions) The output voltage of the TPS76801 adjustable regulator is programmed using an external resistor divider as shown in Figure 27. The output voltage is calculated using: V O V ref  
1  R1 R2 where: Vref = 1.1834 V typ (the internal reference voltage) (1) Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 kΩto set the divider current at 50 µA and then calculate R1 using: R1    V V O 1 ref
R2 (2) OUTPUT VOLTAGE PROGRAMMING GUIDE TPS76801 VI 0.1 µF IN PG PG 250 kΩ ≥ 1.7 V ≤ 0.9 V OUTPUT VOLTAGE EN OUT VO R1 FB / NC GND R1 R2 UNIT 2.5 V 33.2 30.1 kΩ 3.3 V 53.6 30.1 kΩ 3.6 V 61.9 30.1 kΩ 4.75 V 90.8 30.1 kΩ R2 Figure 27. TPS76801 Adjustable LDO Regulator Programming POWER-GOOD INDICATOR The TPS768xxQ features a power-good (PG) output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a low-battery indicator. PG does not assert itself when the regulated output voltage falls out of the specified 2% tolerance, but instead reports an output voltage low, relative to its nominal regulated value. 12 Submit Documentation Feedback TPS768xxQ www.ti.com SLVS211L – JUNE 1999 – REVISED JANUARY 2006 APPLICATION INFORMATION (continued) REGULATOR PROTECTION The TPS768xxQ PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (for example, during power-down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate. The TPS768xxQ also features internal current limiting and thermal protection. During normal operation, the TPS768xxQ limits output current to approximately 1.7 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds +150°C (typ), thermal-protection circuitry shuts it down. Once the device has cooled below +130°C (typ), regulator operation resumes. POWER DISSIPATION AND JUNCTION TEMPERATURE Specified regulator operation is assured to a junction temperature of +125°C; the maximum junction temperature should be restricted to +125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PDmax, and the actual dissipation, PD, which must be less than or equal to PDmax. The maximum-power-dissipation limit is determined using the following equation: T max
T A P max  J D R
JA (3) Where: • TJmax is the maximum allowable junction temperature. • RθJA is the thermal resistance junction-to-ambient for the package; that is, 172°C/W for the 8-pin SOIC (D) and 32.6°C/W for the 20-pin TSSOP (PWP) with no airflow. • TA is the ambient temperature. The regulator dissipation is calculated using: P D    V V
I I O O (4) Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit. Submit Documentation Feedback 13 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS76801QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76801 Samples TPS76801QDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76801 Samples TPS76801QDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76801 Samples TPS76801QPWP ACTIVE HTSSOP PWP 20 70 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76801 Samples TPS76801QPWPG4 ACTIVE HTSSOP PWP 20 70 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76801 Samples TPS76801QPWPR ACTIVE HTSSOP PWP 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76801 Samples TPS76801QPWPRG4 ACTIVE HTSSOP PWP 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76801 Samples TPS76815QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76815 Samples TPS76815QDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76815 Samples TPS76815QPWP ACTIVE HTSSOP PWP 20 70 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76815 Samples TPS76815QPWPR ACTIVE HTSSOP PWP 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76815 Samples TPS76818QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76818 Samples TPS76818QDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76818 Samples TPS76818QPWP ACTIVE HTSSOP PWP 20 70 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76818 Samples TPS76818QPWPR ACTIVE HTSSOP PWP 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76818 Samples TPS76825QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76825 Samples TPS76825QDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76825 Samples TPS76825QPWP ACTIVE HTSSOP PWP 20 70 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76825 Samples TPS76825QPWPR ACTIVE HTSSOP PWP 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76825 Samples TPS76827QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76827 Samples Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS76828QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76828 Samples TPS76830QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76830 Samples TPS76830QPWP ACTIVE HTSSOP PWP 20 70 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76830 Samples TPS76833QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76833 Samples TPS76833QDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76833 Samples TPS76833QPWP ACTIVE HTSSOP PWP 20 70 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76833 Samples TPS76833QPWPG4 ACTIVE HTSSOP PWP 20 70 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76833 Samples TPS76833QPWPR ACTIVE HTSSOP PWP 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76833 Samples TPS76833QPWPRG4 ACTIVE HTSSOP PWP 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76833 Samples TPS76850QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76850 Samples TPS76850QDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76850 Samples TPS76850QDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 76850 Samples TPS76850QPWP ACTIVE HTSSOP PWP 20 70 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76850 Samples TPS76850QPWPR ACTIVE HTSSOP PWP 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76850 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of