TPS76901SDBVTEP

TPS76901-EP www.ti.com SLVSA53A – NOVEMBER 2009 – REVISED DECEMBER 2009 ULTRALOW-POWER 100-mA LOW DROPOUT LINEAR REGULATORS Check for Samples: TPS76901-EP FEATURES 1 • • • • • • 100-mA Low-Dropout Regulator Available in Adjustable Versions Only 335-μA Quiescent Current With 100 mA at 150°C 1-μA Quiescent Current in Standby Mode Dropout Voltage Typically 71 mV at 100 mA Over Current Limitation APPLICATIONS • • Down-Hole Drilling High Temperature Environments SUPPORTS EXTREME TEMPERATURE APPLICATIONS • • • • • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Extreme (–55°C/150°C) Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability Texas Instruments' high temperature products utilize highly optimized silicon (die) solutions with design and process enhancements to maximize performance over extended temperatures. DBV PACKAGE (TOP VIEW) (1) IN 1 GND 2 EN 3 5 OUT 4 NC/FB Custom temperature ranges available DESCRIPTION The TPS76901 low-dropout (LDO) voltage regulator offers the benefits of low dropout voltage, ultralow-power operation, and miniaturized packaging. This regulator features low dropout voltages and ultralow quiescent current compared to conventional LDO regulators. The TPS76901 is ideal for micropower operations and where board space is at a premium. A combination of new circuit design and process innovation has enabled the usual PNP pass transistor to be replaced by a PMOS pass element. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is very low, and is directly proportional to the load current. Since the PMOS pass element is a voltage-driven device, the quiescent current is ultralow (28 μA maximum) and is stable over the entire range of output load current (0 mA to 100 mA). Intended for use in portable systems such as laptops and cellular phones, the ultralow-dropout voltage feature and ultralow-power operation result in a significant increase in system battery operating life. The TPS76901 also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current to 1 μA, typical at TJ = 25°C. The TPS76901 is a variable version programmable over the range of 1.2 V to 4.5 V. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated TPS76901-EP SLVSA53A – NOVEMBER 2009 – REVISED DECEMBER 2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) TA PACKAGE –55°C to 150°C (1) (2) (2) DBV ORDERABLE PART NUMBER TOP-SIDE MARKING TPS76901SDBVTEP PCFS For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTIONAL BLOCK DIAGRAM OUT IN EN Current Limit VREF FB GND ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VREF VALUE UNIT Input voltage range (2) –0.3 to 13.5 V Voltage range at EN –0.3 to VI + 0.3 V Voltage on OUT, FB 7 V Peak output current Internally limited ESD rating, HBM 2 Continuous total power dissipation TJ (1) (2) 2 kV See Dissipation Ratings Table Operating virtual junction temperature range –55 to 150 °C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS76901-EP TPS76901-EP www.ti.com SLVSA53A – NOVEMBER 2009 – REVISED DECEMBER 2009 THERMAL CHARACTERISTICS BOARD PACKAGE RθJC RθJA DERATING FACTOR ABOVE TA = 25°C Low K (1) DBV 65.8 °C/W 259 °C/W 3.9 mW/°C (2) DBV 65.8 °C/W 180 °C/W 5.6 mW/°C High K (1) (2) The JEDEC Low K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2-ounce copper traces on top of the board. The JEDEC High K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN (1) VI Input votlage VO Ouput voltage range IO Continuous output current (2) TJ Operating junction temperature (1) (2) NOM MAX UNIT 5 10 1.2 4.5 V V 0 100 mA –55 150 °C To calculate the minimum input voltage for your maximum output current, use the following formula: XXXX VI(min) = VO(max) + VDO(max load). Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER VO Output voltage (10 μA to 100 mA load) (1) IQ Quiescent Current (GND current) (1) (2) TEST CONDITIONS 12. V ≤ VO ≤ 4.5 V MIN TJ = 25°C TJ = –55°C to 150°C EN = 0 V, 0 mA < IO < 100 mA TJ = 25°C EN = 4 V, IO = 100 mA TJ = –55°C to 150°C 0.97VO μA TJ = 25°C 12 5 V ≤ VI ≤ 10 V (1) Output noise voltage BW = 300 Hz to 50 kHz, CO = 10 μF Output current limit VO = 0 V (1) ISTDBY Standby current EN = VI, 5 V ≤ VI ≤ 10 V IFB FB input current FB = 1.18 V TJ = –55°C to 150°C –1 VIH High level enable input voltage 5 V ≤ VI ≤ 10 V TJ = 25°C 1.7 VIL Low level enable input voltage 5 V ≤ VI ≤ 10 V PSRR Power supply ripple rejection f = 1 kHz, CO = 10 μF (1) IIN Input current (1) (2) V 1.03VO 28 Output voltage line regulation (ΔVO/VO) (2) EN = VI UNIT 17 EN = 0 V, IO = 0 to 100 mA EN = 0 V MAX VO Load regulation VN TYP TJ = 150°C 13.5 TJ = 25°C 0.04 TJ = –55°C to 150°C % 0.1 TJ = 25°C 190 TJ = 25°C 350 TJ = –55°C to 150°C μVms 750 TJ = 25°C 1 TJ = –55°C to 150°C 2.4 1 mA μA μA V TJ = 25°C 0.9 TJ = 150°C V 0.75 TJ = 25°C TJ = –55°C to 150°C mV 60 –1 –1 0 dB 1 1 μA Minimum IN operating voltage is 5V. Maximum IN voltage 10 V, minimum output current 10 μA, maximum output current 100 mA. Line Regulation (%) = (Δ VOUT) / (Δ VIN) x 100 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS76901-EP 3 TPS76901-EP SLVSA53A – NOVEMBER 2009 – REVISED DECEMBER 2009 www.ti.com DEVICE INFORMATION TERMINAL FUNCTIONS TERMINAL NAME NO. I/O DESCRIPTION IN 1 I Input GND 2 - Ground EN 3 I Enable FB 4 I Feedback OUT 5 O Output TYPICAL CHARACTERISTICS (VIN VOUT vs TEMPERATURE = 5 V , Load = 100 mA) 3.8 3.7 VOUT - V 3.6 3.5 3.4 3.3 25 125 150 Temperature - °C Figure 1. 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS76901-EP TPS76901-EP www.ti.com SLVSA53A – NOVEMBER 2009 – REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) OUTPUT IMPEDANCE vs FREQUENCY 2 VI = 4.3 V CO = 4.7 µF ESR = 0.3 Ω TA = 25°C 1.8 ZO - Output Impedance - Ω 1.6 1.4 1.2 1 0.8 IO = 1 mA 0.6 0.4 IO = 100 mA 0.2 0 10 100 1k 10 k 100 k 1M f - Frequency - Hz Figure 2. LDO STARTUP TIME EN VO 0 20 40 60 80 100 120 140 160 180 200 t - Time - µs Figure 3. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS76901-EP 5 TPS76901-EP SLVSA53A – NOVEMBER 2009 – REVISED DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) 1000 Wirebond Voiding Fail Mode Estimated life - Years 100 10 Electromigration Fail Mode 1 0.1 100 110 120 130 140 150 160 170 Continuous TJ - °C Figure 4. TPS76901SDBVTEP Operating Life Derating Chart Note: 6 1. See datasheet for absolute maximum and minimum recommended operating conditions. 2. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS76901-EP TPS76901-EP www.ti.com SLVSA53A – NOVEMBER 2009 – REVISED DECEMBER 2009 APPLICATION INFORMATION (1) The TPS76901 low-dropout (LDO) regulator has been optimized for use in battery-operated equipment. It features extremely low dropout voltages, low quiescent current (17 μA nominally), and enables inputs to reduce supply currents to 1 μA when the regulators are turned off. DEVICE OPERATION The TPS76901 uses a PMOS pass element to dramatically reduce both dropout voltage and supply current over more conventional PNP-pass-element LDO designs. The PMOS pass element is a voltage-controlled device and, unlike a PNP transistor, it does not require increased drive current as output current increases. Supply current in the TPS76901 is essentially constant from no load to maximum load. Current limiting prevents damage by excessive output current. The device switches into a constant-current mode at approximately 350 mA; further load reduces the output voltage instead of increasing the output current. The PMOS pass element includes a back gate diode that conducts reverse current when the input voltage level drops below the output voltage level. A voltage of 1.7 V or greater on the EN input will disable the TPS76901 internal circuitry, reducing the supply current to 1 μA. A voltage of less than 0.9 V on the EN input will enable the TPS76901 and will enable normal operation to resume. The EN input does not include any deliberate hysteresis, and it exhibits an actual switching threshold of approximately 1.5 V. A typical application circuit is shown in Figure 5. TPS76901 VI C1 1 µF 1 IN FB 4 OUT 5 VO 3 EN + 4.7 µF GND 2 ESR = 0.2 Ω Figure 5. Typical Application Circuit EXTERNAL CAPACITOR REQUIREMENTS Although not required, a 0.047-μF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS76901, is recommended to improve transient response and noise rejection. A higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. Like all low dropout regulators, the TPS76901 requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 4.7 μF. The ESR (equivalent series resistance) of the capacitor should be between 0.2 Ω and 10 Ω. to ensure stability. Capacitor values larger than 4.7 μF are acceptable, and allow the use of smaller ESR values. Capacitances less than 4.7 μF are not recommended because they require careful selection of ESR to ensure stability. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 4.7-μF surface-mount solid tantalum capacitors, including devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above. Multilayer ceramic capacitors may have very small equivalent series resistances and may thus require the addition of a low value series resistor to ensure stability. (1) Application information is provided for commercial temperature as a reference and not for high temperature. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS76901-EP 7 TPS76901-EP SLVSA53A – NOVEMBER 2009 – REVISED DECEMBER 2009 www.ti.com Table 1. CAPACITOR SELECTION PART NO. (1) MANUFACTURER VALUE MAX ESR (1) SIZE (H x L x W) (1) T494B475K016AS KEMET 4.7 μF 1.5 Ω 1.9 x 3.5 x 2.8 195D106x0016x2T SPRAGUE 10 μF 1.5 Ω 1.3 x 7.0 x 2.7 695D106x003562T SPRAGUE 10 μF 1.3 Ω 2.5 x 7.6 x 2.5 TPSC475K035R0600 AVX 4.7 μF 0.6 Ω 2.6 x 6.0 x 3.2 Size is in mm. ESR is maximum resistance in Ohms at 100 kHz and TA = 25°C. Contact manufacturer for minimum ESR values. OUTPUT VOLTAGE PROGRAMMING The output voltage of the TPS76901 adjustable regulator is programmed using an external resistor divider as shown in Figure 6. The output voltage is calculated using: ( R1 VO = VREF • 1 + − R2 ) (1) Where: VREF = 1.127 V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately 7-μA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 169 kΩ to set the divider current at 7 μA and then calculate R1 using: ( VO -1 R1 = − VREF ) R2 • (2) TPS76901 1 VI 1 µF IN OUT ≥ 1.7 V 3 5 VO R1 EN ≤ 0.9 V FB GND 2 4 4.7 µF R2 ESR = 0.2 Ω Note: 1. The above calculations hold good for room temperature values only. Figure 6. Adjustable LDO Reulator Programming REGULATOR PROTECTION The TPS76901 PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS76901 features internal current limiting protection. During normal operation, the TPS76901 limits output current to approximately 350 mA. When current limiting engages, the output voltage scales back linearly until the over current condition ends. 8 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS76901-EP PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS76901SDBVTEP ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 150 PCFS V62/10607-01XE ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 150 PCFS (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of