TPS775xx, TPS776xx
www.ti.com.............................................................................................................................................. SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009
TPS775xx with RESET Output, TPS776xx with PG Output
FAST-TRANSIENT-RESPONSE 500mA LOW-DROPOUT VOLTAGE REGULATORS
FEATURES
DESCRIPTION
1
• Open Drain Power-On Reset with 200ms Delay
(TPS775xx)
• Open Drain Power Good (TPS776xx)
• 500mA Low-Dropout Voltage Regulator
• Available in Fixed Output and Adjustable
Versions
• Dropout Voltage to 169mV (Typ) at 500mA
(TPS77x33)
• Ultralow 85µA Typical Quiescent Current
• Fast Transient Response
• 2% Tolerance Over Specified Conditions for
Fixed-Output Versions
• 8-Pin SOIC and 20-Pin TSSOP PowerPAD™
(PWP) Packages
• Thermal Shutdown Protection
23
APPLICATIONS
•
•
Typical Application Circuit
(Fixed Voltage Options)
6
7
RESET/
PG
IN
5
RESET/PG
Power good (PG) of the TPS776xx is an active high
output, which can be used to implement a power-on
reset or a low-battery indicator.
IN
OUT
0.1mF
16
Because the PMOS device behaves as a low-value
resistor, the dropout voltage is very low (typically
169mV at an output current of 500mA for the
TPS77x33) and is directly proportional to the output
current. Additionally, since the PMOS pass element is
a voltage-driven device, the quiescent current is very
low and independent of output loading (typically 85µA
over the full range of output current, 0mA to 500mA).
These two key specifications yield a significant
improvement in operating life for battery-powered
systems. This LDO family also features a sleep
mode; applying a TTL high signal to EN (enable)
shuts down the regulator, reducing the quiescent
current to 1µA at TJ = +25°C.
The RESET output of the TPS775xx initiates a reset
in microcomputer and microprocessor systems in the
event of an undervoltage condition. An internal
comparator in the TPS775xx monitors the output
voltage of the regulator to detect an undervoltage
condition on the regulated output voltage.
FPGA Power
DSP Core and I/O Voltages
VIN
The TPS775xx and TPS776xx devices are designed
to have a fast transient response and be stable with a
10µF low ESR capacitor. This combination provides
high performance at a reasonable cost.
OUT
EN
14
VOUT
13
(1)
+
COUT
10mF
GND
3
The TPS775xx and TPS776xx are offered in 1.5V,
1.6V (TPS77516 only), 1.8V, 2.5V, 2.8V (TPS77628
only), and 3.3V fixed-voltage versions and in an
adjustable version (programmable over the range of
1.5V to 5.5V for the TPS77501 and 1.2V to 5.5V for
the TPS77601). Output voltage tolerance is specified
as a maximum of 2% over line, load, and temperature
ranges. The TPS775xx and TPS776xx families are
available in 8-pin SOIC and 20-pin TSSOP packages.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2009, Texas Instruments Incorporated
TPS775xx, TPS776xx
SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009.............................................................................................................................................. www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
VOUT (2)
PRODUCT
TPS775xxyyyz, TPS776xxyyyz
(1)
(2)
XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).
YYY is package designator.
Z is package quantity.
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
Custom fixed output voltages are available; minimum order quantities may apply. Contact factory for details and availability.
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range (unless otherwise noted) (1)
PARAMETER
TPS775xx, TPS776xx
UNIT
Input voltage range, VIN (2)
–0.3 to +13.5
V
Voltage range at EN
–0.3 to +16.5
V
Maximum RESET voltage (TPS775xx)
16.5
V
Maximum PG voltage (TPS776xx)
16.5
V
Peak output current
Internally limited
Voltage range at OUT, FB
7
Continuous total power dissipation
See Dissipation Ratings Table
V
Operating junction temperature range, TJ
–40 to +125
Storage junction temperature range , TSTG
–65 to +150
°C
2
kV
ESD rating, HBM
(1)
(2)
°C
Stresses above these ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended
periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those specified is not implied.
All voltages are with respect to network terminal ground.
DISSIPATION RATINGS
BOARD
—
(1)
(2)
2
PACKAGE
D
Low-K (1)
PWP
High-K (2)
PWP
AIRFLOW
(CFM)
TA < +25°C (mW)
DERATING FACTOR
ABOVE TA = +25°C
TA = +70°C (mW)
TA = +85°C (mW)
0
568
5.68mW/°C
312
227
250
904
9.04mW/°C
497
362
0
2350
23.5mW/°C
1300
940
300
3460
34.6mW/°C
1900
1400
0
2380
23.8mW/°C
1300
952
300
5790
57.9mW/°C
3200
2300
This parameter is measured with the recommended copper heat sink pattern on a 1-layer, 5in × 5in printed circuit board (PCB), 1-ounce
copper, 2in × 2in coverage (4in2).
This parameter is measured with the recommended copper heat sink pattern on a 8-layer, 1.5in × 2in PCB, 1-ounce copper with layers
1, 2, 4, 5, 7, and 8 at 5% coverage (0.9in2) and layers 3 and 6 at 100% coverage (6in2). For more information, refer to TI technical brief
SLMA002.
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Copyright © 1999–2009, Texas Instruments Incorporated
TPS775xx, TPS776xx
www.ti.com.............................................................................................................................................. SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009
ELECTRICAL CHARACTERISTICS
Over recommended operating temperature range (TJ = –40°C to +125°C), VIN = VOUT(TYP) + 1V; IOUT = 1mA, VEN = 0V, COUT =
10µF, unless otherwise noted. Typical values are at TJ = +25°C.
PARAMETER
VIN
VOUT
TEST CONDITIONS
Input voltage range
Output voltage range
VOUT
Accuracy
IGND
Ground pin current
V
1.5
5.5
V
TPS77601
1.2
5.5
V
–2.0
+2.0
%
VOUT + 1V ≤ VIN ≤ 10V
10µA < IOUT < 500mA
ICL
Output current limit
TSD
Shutdown temperature
TJ
ISTBY
(1)
IOUT = 10mA
85
IOUT = 500mA
Load regulation
Dropout voltage (2)
125
VOUT + 1V ≤ VIN ≤ 10V (1)
%/V
3
mV
µVRMS
TPS77x18
IC = 500mA, COUT = 10µF
TPS77628
IOUT = 500mA
285
410
mV
TPS77533
IOUT = 500mA
169
287
mV
TPS77633
IOUT = 500mA
169
287
mV
1.6
1.9
VOUT = 0V
53
1.2
150
Operating junction temperature range
–40
EN = VIN, at TJ = +25°C,
2.7V < VIN < 10V
Standby current
FB input current
TPS77x01
High-level enable input voltage
VEN(LO)
Low-level enable input voltage
PSRR
Power-supply ripple rejection
f = 100Hz, COUT = 10µF
Minimum input voltage for valid RESET
IOUT(RESET) = 300µA
Trip threshold voltage
VOUT decreasing
Hysteresis voltage
Measured at VOUT
Output low voltage
VIN = 2.7V, IOUT(RESET) = 1mA
Leakage current
V(RESET) = 5V
+125
2
(1)
(2)
V
1.1
92
V
98
0.5
0.15
VOUT decreasing
Hysteresis voltage
Measured at VOUT
Output low voltage
VIN = 2.7V, IOUT(PG) = 1mA
%VOUT
V
1
µA
Leakage current
V(PG) = 5V
ms
V
98
0.5
0.15
EN = 0V
–1
EN = VIN
–1
0
%VOUT
0.4
1.1
92
V
dB
200
Trip threshold voltage
Input current (EN)
nA
60
RESET time-out delay
PG
(TPS776xx)
µA
0.9
IOUT(PG) = 300µA
°C
10
1.7
Minimum input voltage for valid PG
A
°C
1
FB = 1.5V
VEN(HI)
RESET
(TPS775xx)
µA
0.01
EN = VIN, 2.7V < VIN < 10V
IFB
UNIT
TPS77501
ΔVOUT%/ ΔIOUT
VDO
MAX
10
Output voltage line regulation
VN
TYP
2.7
ΔVOUT%/ ΔVIN
Output noise voltage
BW = 200Hz to 100kHz
MIN
%VOUT
%VOUT
0.4
V
1
µA
1
1
µA
Minimum VIN = VOUT + VDO or 2.7V, whichever is greater.
VDO is not measured for fixed output versions with VOUT(NOM) < 2.8 V because mimimum VIN = 2.7V.
Copyright © 1999–2009, Texas Instruments Incorporated
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TPS775xx, TPS776xx
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FUNCTIONAL BLOCK DIAGRAMS
Adjustable Voltage Versions
IN
EN
PG or RESET
_
+
OUT
+
_
200ms Delay
(for RESET Option)
R1
Vref = 1.183V
FB/NC
R2
GND
External to the device
Fixed Voltage Versions
IN
EN
PG or RESET
_
+
OUT
+
_
200ms Delay
(for RESET Option)
R1
Vref = 1.183V
R2
GND
4
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Copyright © 1999–2009, Texas Instruments Incorporated
TPS775xx, TPS776xx
www.ti.com.............................................................................................................................................. SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009
PIN CONFIGURATIONS
TSSOP-20
PWP
(TOP VIEW)
SOIC-8
D
(TOP VIEW)
GND/HSINK
1
20
GND/HSINK
GND
1
8
RESET/PG
GND/HSINK
2
19
GND/HSINK
EN
2
7
FB/NC
GND
3
18
NC
IN
3
6
OUT
NC
4
17
NC
IN
4
5
OUT
EN
5
16
RESET/PG
IN
6
15
FB/NC
IN
7
14
OUT
NC
8
13
OUT
GND/HSINK
9
12
GND/HSINK
GND/HSINK
10
11
GND/HSINK
Table 1. PIN DESCRIPTIONS
TPS775xx, TPS776xx
NAME
SOIC-8 (D)
PIN NO.
TSSOP-20
(PWP)
PIN NO.
EN
2
5
Negative polarity enable (EN) input
FB
7
15
Adjustable voltage version only; feedback voltage for setting output voltage of the device.
Not internally connected on adjustable versions.
GND
1
IN
3, 4
6, 7
DESCRIPTION
1, 2, 3, 9, 10,
11, 12, 19, Ground
20
Input voltage
OUT
5, 6
13, 14
RESET
8
16
Regulated output voltage
TPS775xx devices only; open-drain RESET output.
PG
8
16
TPS776xx devices only; open-drain power-good (PG) output.
NC
—
4, 8, 17, 18
PAD/TAB
—
—
No internal connection
Should be soldered to ground plane and used for heat sinking.
Copyright © 1999–2009, Texas Instruments Incorporated
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TPS775xx, TPS776xx
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TPS775xx RESET Timing Diagram
VIN
Vres
(1)
Vres
(1)
t
VOUT
(2)
VIT+
(2)
VIT+
Threshold
Voltage
(2)
VIT-
Less than 5% of the
output voltage
(2)
VIT-
t
RESET
Output
200ms Delay
200ms Delay
Output
Undefined
Output
Undefined
t
(1)
Vres is the minimum input voltage for a valid RESET. The symbol Vres is not currently listed within EIA or JEDEC
standards for semiconductor symbology.
(2)
VIT: Trip voltage is typically 5% lower than the output voltage (95% VOUT). VIT– to VIT+ is the hysteresis voltage.
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE NO.
VOUT
6
Output Voltage
vs Output Current
Figure 3, Figure 4, Figure 5
vs Free-Air Temperature
Figure 6, Figure 7, Figure 8
vs Time
Figure 20
IGND
Ground Current
vs Free-Air Temperature
Figure 9
PSRR
Power-Supply Ripple Rejection
vs Frequency
Figure 10
Output Spectral Noise Density
vs Frequency
Figure 11
ZOUT
Output Impedance
vs Frequency
Figure 12
VDO
Dropout Voltage
VIN
Input Voltage (Min)
LINE
Line Transient Response
LOAD
Load Transient Response
ESR
Equivalent Series Resistance
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vs Input Voltage
Figure 13
vs Free-Air Temperature
Figure 14
vs Output Voltage
Figure 15
Figure 16, Figure 18
Figure 17, Figure 19
vs Output Current
Figure 22, Figure 23
Copyright © 1999–2009, Texas Instruments Incorporated
TPS775xx, TPS776xx
www.ti.com.............................................................................................................................................. SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009
TYPICAL CHARACTERISTICS
Over operating temperature range (TJ= –40°C to +125°C) unless otherwise noted. Typical values are at TJ = +25°C.
TPS77x33
OUTPUT VOLTAGE
vs OUTPUT CURRENT
3.2835
TPS77x15
OUTPUT VOLTAGE
vs OUTPUT CURRENT
1.4985
VIN = 4.3V
TA = +25°C
1.4980
VOUT - Output Voltage - V
VOUT - Output Voltage - V
3.2830
VIN = 2.7V
TA = +25°C
3.2825
3.2820
3.2815
3.2810
3.2805
1.4975
1.4970
1.4965
1.4960
1.4955
3.2800
1.4950
0.0
0.1
0.2
0.3
0.4
0.5
0.0
0.1
IOUT - Output Current - A
2.4960
2.4955
0.3
0.2
0.5
0.4
IOUT - Output Current - A
Figure 3.
Figure 4.
TPS77x25
OUTPUT VOLTAGE
vs OUTPUT CURRENT
TPS77x33
OUTPUT VOLTAGE
vs FREE-AIR TEMPERATURE
3.32
VIN = 3.5V
TA = +25°C
VIN = 4.3V
3.31
VOUT - Output Voltage - V
VOUT - Output Voltage - V
2.4950
2.4945
2.4940
2.4935
2.4930
3.30
IOUT = 500mA
3.29
IOUT = 1mA
3.28
3.27
3.26
2.4925
2.4920
0.0
0.1
0.2
0.3
IOUT - Output Current - A
Figure 5.
Copyright © 1999–2009, Texas Instruments Incorporated
0.4
0.5
3.25
-60 -40
-20
0
20
40
60
80
100
120
140
TA - Free-Air Temperature - °C
Figure 6.
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TPS775xx, TPS776xx
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TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ= –40°C to +125°C) unless otherwise noted. Typical values are at TJ = +25°C.
TPS77x15
OUTPUT VOLTAGE
vs FREE-AIR TEMPERATURE
TPS77x25
OUTPUT VOLTAGE
vs FREE-AIR TEMPERATURE
1.515
2.515
VIN = 3.5V
VIN = 2.7V
2.510
VOUT - Output Voltage - V
VOUT - Output Voltage - V
1.510
1.505
1.500
IOUT = 500mA
1.495
IOUT = 1mA
1.490
2.505
2.500
IOUT = 500mA
2.495
IOUT = 1mA
2.490
2.485
1.485
2.480
-60 -40
-20
0
20
60
40
80
100
120
140
-60 -40
-20
20
40
60
80
100
Figure 7.
Figure 8.
TPS77xxx
GROUND CURRENT
vs FREE-AIR TEMPERATURE
TPS77x33
POWER-SUPPLY RIPPLE REJECTION
vs FREQUENCY
120
140
90
100
PSRR - Power Supply Ripple Rejection - dB
VIN = 2.7V
95
Ground Current - mA
0
TA - Free-Air Temperature - °C
TA - Free-Air Temperature - °C
90
IOUT = 1mA
85
IOUT = 500mA
80
VIN = 4.3V
COUT = 10mF
TA = +25°C
80
70
60
50
40
30
20
10
0
75
-60 -40
-20
0
20
40
60
80
TA - Free-Air Temperature - °C
Figure 9.
8
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100
120
140
-10
1
10
10
2
10
3
10
4
10
5
10
6
f - Frequency - Hz
Figure 10.
Copyright © 1999–2009, Texas Instruments Incorporated
TPS775xx, TPS776xx
www.ti.com.............................................................................................................................................. SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ= –40°C to +125°C) unless otherwise noted. Typical values are at TJ = +25°C.
TPS77x33
OUTPUT SPECTRAL NOISE DENSITY
vs FREQUENCY
10
-5
10
VIN = 4.3V
COUT = 10mF
TA = +25°C
IOUT = 7mA
-6
IOUT = 500mA
10
0
VIN = 4.3V
COUT = 10mF
TA = +25°C
ZOUT - Output Impedance - W
Output Spectral Noise Density - mV/ÖHz
10
TPS77x33
OUTPUT IMPEDANCE
vs FREQUENCY
-7
IOUT = 1mA
10
-1
IOUT = 500mA
10
-8
10
2
10
3
10
4
10
10
5
-2
10
1
10
2
10
3
10
4
10
f - Frequency - Hz
f - Frequency - Hz
Figure 11.
Figure 12.
TPS77x01
DROPOUT VOLTAGE
vs INPUT VOLTAGE
TPS77x33
DROPOUT VOLTAGE
vs FREE-AIR TEMPERATURE
350
10
IOUT = 500mA
5
10
6
3
COUT = 10mF
300
250
VDO - Dropout Voltage - mV
VDO - Dropout Voltage - mV
10
TA = +125°C
200
TA = +25°C
150
TA = -40°C
100
10
10
10
50
2
IOUT = 500mA
1
IOUT = 10mA
0
-1
IOUT = 0mA
0
2.5
3.0
3.5
4.0
VIN - Input Voltage - V
Figure 13.
Copyright © 1999–2009, Texas Instruments Incorporated
4.5
5.0
10
-2
-60 -40
-20
0
20
40
60
80
100
120
140
TA - Free-Air Temperature - °C
Figure 14.
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TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ= –40°C to +125°C) unless otherwise noted. Typical values are at TJ = +25°C.
INPUT VOLTAGE (MIN)
vs OUTPUT VOLTAGE
TPS77x15
LINE TRANSIENT RESPONSE
VIN - Input Voltage - V
4
TA = +25°C
TA = +125°C
3.7
2.7
3
D VOUT - Change in
Output Voltage - mV
VIN - Input Voltage - V
IOUT = 0.5A
TA = -40°C
2.7
2
1.50
1.75
2.0
2.25
2.50
2.75
3.0
3.25
10
0
COUT = 10m F
TA = +25°C
-10
3.5
0
20
40
60
100 120
160
180
200
160
180
200
140
Figure 15.
Figure 16.
TPS77x15
LOAD TRANSIENT RESPONSE
TPS77x33
LINE TRANSIENT RESPONSE
COUT = 2x47m F
ESR = 1/2x100mW
VOUT = 1.5V
VIN = 2.7V
50
80
t - Time - m s
VIN - Input Voltage - V
D VOUT - Change in
Output Voltage - mV
VOUT - Output Voltage - V
0
-50
COUT = 10m F
TA = +25°C
5.3
D VOUT - Change in
Output Voltage - mV
IOUT - Output Current - mA
4.3
500
0
0
20
40
60
80
100 120
t - Time - m s
Figure 17.
10
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140
160
180
200
10
0
-10
0
20
40
60
80
100 120
140
t - Time - m s
Figure 18.
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TPS775xx, TPS776xx
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TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ= –40°C to +125°C) unless otherwise noted. Typical values are at TJ = +25°C.
TPS77x33OUTPUT VOLTAGE
vs TIME (AT STARTUP)
50
VOUT - Output Voltage - V
COUT = 2x47m F
ESR = 1/2x100mW
VOUT = 3.3V
VIN = 4.3V
0
-50
4
COUT = 10m F
IOUT = 500mA
TA = +25°C
3
2
1
0
Enable Pulse - V
IOUT - Output Current - mA
D VOUT - Change in
Output Voltage - mV
TPS77x33
LOAD TRANSIENT RESPONSE
500
0
0
20
40
60
80
100 120
140
160
180
200
0
0.1
0.2
0.3
0.4
0.5
0.6
t - Time - m s
t - Time - ms
Figure 19.
Figure 20.
Copyright © 1999–2009, Texas Instruments Incorporated
0.7
0.8
0.9
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1.0
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TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ= –40°C to +125°C) unless otherwise noted. Typical values are at TJ = +25°C.
Test Circuit for Typical Regions of Stability (Figure 22 and Figure 23) (Fixed Output Options)
VIN
To Load
IN
OUT
+
RL
COUT
EN
R
GND
ESR
Figure 21.
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE(1)
vs OUTPUT CURRENT
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE(1)
vs OUTPUT CURRENT
10
10
Region of Instability
ESR - Equivalent Series Resistance - W
ESR - Equivalent Series Resistance - W
Region of Instability
1
VOUT = 3.3V
COUT = 22m F
VIN = 4.3V
TA = +25°C
0.1
Region of Stability
1
VOUT = 3.3V
COUT = 22m F
VIN = 4.3V
TJ = +125°C
0.1
Region of Instability
Region of Instability
0.01
0.01
0
100
200
300
400
0
500
12
Equivalent series resistance (ESR) refers to
the total series resistance, including the ESR
of the capacitor, any series resistance added
externally, and PWB trace resistance to COUT.
Figure 22.
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100
200
300
400
500
IOUT - Output Current - mA
IOUT - Output Current - mA
(1)
Region of Stability
(1)
Equivalent series resistance (ESR) refers to
the total series resistance, including the ESR
of the capacitor, any series resistance added
externally, and PWB trace resistance to COUT.
Figure 23.
Copyright © 1999–2009, Texas Instruments Incorporated
TPS775xx, TPS776xx
www.ti.com.............................................................................................................................................. SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009
APPLICATION INFORMATION
The TPS775xx and TPS776xx feature very low quiescent current, which remains virtually constant even with
varying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directly
proportional to the load current through the regulator (IB = IC/β). The TPS775xx and TPS776xx use a PMOS
transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and
invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this IB increase
translates to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered
systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation.
The TPS775xx and TPS776xx quiescent currents remain low even when the regulator drops out, eliminating both
problems.
The TPS775xx and TPS776xx families also feature a shutdown mode that places the output in the
high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to
2µA. If the shutdown feature is not used, EN should be tied to ground.
Minimum Load Requirements
The TPS775xx and TPS776xx families are stable at zero load; no minimum load is required for operation.
FB—Pin Connection (Adjustable Version Only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The output
voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 25. Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is
essential.
External Capacitor Requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047µF or larger) improves
load transient response and noise rejection if the TPS775xx or TPS776xx are located more than a few inches
from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of
milliamps) load transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS775xx and TPS776xx require an output capacitor connected between
OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10µF and
the ESR (equivalent series resistance) must be between 50mΩ and 1.5Ω. Capacitor values 10µF or larger are
acceptable, provided the ESR is less than 1.5Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer
ceramic capacitors are all suitable, provided they meet the requirements described previously.
VIN
6
7
RESET/
PG
IN
5
RESET/PG
250kW
IN
OUT
C1
0.1mF
16
OUT
EN
14
VOUT
13
COUT
+
10mF
GND
3
Figure 24. Typical Application Circuit (Fixed Versions)
Copyright © 1999–2009, Texas Instruments Incorporated
Submit Documentation Feedback
13
TPS775xx, TPS776xx
SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009.............................................................................................................................................. www.ti.com
Programming the TPS77x01 Adjustable LDO Regulator
The output voltage of the TPS77x01 adjustable regulator is programmed using an external resistor divider as
shown in Figure 25. The output voltage is calculated using Equation 1:
VOUT = Vref x (1 +
R1
)
R2
(1)
Where:
•
Vref = 1.1834V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 10µA divider current. Lower value resistors can be
used, but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 110kΩ
to set the divider current at approximately 10µA and then calculate R1 using Equation 2:
R1 = (
VOUT
- 1) x R2
Vref
(2)
OUTPUT VOLTAGE
PROGRAMMING GUIDE
TPS77x01
VIN
IN
0.1mF
RESET/
PG
RESET or PG Output
250kW
VOUT
OUT
> 1.7V
R1
EN
< 0.9V
FB/NC
GND
OUTPUT
VOLTAGE
R1
R2
UNIT
2.5V
121
110
kW
3.3V
196
110
kW
3.6V
226
110
kW
4.75V
332
110
kW
COUT
R2
Figure 25. TPS77x01 Adjustable LDO Regulator Programming
Reset Indicator
The TPS775xx features a RESET output that can be used to monitor the status of the regulator. The internal
comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires a
pullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as a
low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the specified
2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer to Timing
Diagram for start-up sequence).
Power-Good Indicator
The TPS776xx features a power-good (PG) output that can be used to monitor the status of the regulator. The
internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup
resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a
low-battery indicator.
14
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Copyright © 1999–2009, Texas Instruments Incorporated
TPS775xx, TPS776xx
www.ti.com.............................................................................................................................................. SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009
Regulator Protection
The TPS775xx and TPS776xx PMOS-pass transistors have a built-in back diode that conducts reverse currents
when the input voltage drops below the output voltage (for example, during power down). Current is conducted
from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external
limiting may be appropriate.
The TPS775xx and TPS776xx also feature internal current limiting and thermal protection. During normal
operation, the TPS775xx and TPS776xx limit output current to approximately 1.7A. When current limiting
engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is
designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the
package. If the temperature of the device exceeds +150°C(typ), thermal-protection circuitry shuts it down. Once
the device has cooled below +130°C(typ), regulator operation resumes.
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of +125°C; the maximum junction temperature
should be restricted to +125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or
equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
PD(max) =
TJ(max) - TA
RqJA
where:
•
•
•
TJ(max) is the maximum allowable junction temperature
RθJA is the thermal resistance junction-to-ambient for the package, and is calculated as
1
derating factor from the dissipation rating tables
TA is the ambient temperature
The regulator dissipation is calculated using:
PD = (VIN - VOUT) x IOUT
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
Copyright © 1999–2009, Texas Instruments Incorporated
Submit Documentation Feedback
15
PACKAGE OPTION ADDENDUM
www.ti.com
13-May-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS77501D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77501
Samples
TPS77501DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77501
Samples
TPS77501PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77501
Samples
TPS77501PWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77501
Samples
TPS77515D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77515
Samples
TPS77515DG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77515
Samples
TPS77515DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77515
Samples
TPS77515PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77515
Samples
TPS77515PWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77515
Samples
TPS77516D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
77516
Samples
TPS77516DG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
77516
Samples
TPS77516DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
77516
Samples
TPS77516PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
PT77516
Samples
TPS77516PWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
PT77516
Samples
TPS77516PWPRG4
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
PT77516
Samples
TPS77518D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77518
Samples
TPS77518DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77518
Samples
TPS77518PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77518
Samples
TPS77518PWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77518
Samples
TPS77518PWPRG4
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77518
Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
13-May-2022
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS77525D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77525
Samples
TPS77525DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77525
Samples
TPS77525PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77525
Samples
TPS77533D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77533
Samples
TPS77533DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77533
Samples
TPS77533PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77533
Samples
TPS77533PWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77533
Samples
TPS77601D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77601
Samples
TPS77601DG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77601
Samples
TPS77601DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77601
Samples
TPS77601DRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77601
Samples
TPS77601PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77601
Samples
TPS77601PWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77601
Samples
TPS77615D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77615
Samples
TPS77615DG4
ACTIVE
SOIC
D
8
75
TBD
Call TI
Call TI
-40 to 125
TPS77615DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
TPS77615DRG4
ACTIVE
SOIC
D
8
2500
TBD
Call TI
Call TI
-40 to 125
TPS77615PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77615
Samples
TPS77618D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77618
Samples
TPS77618DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77618
Samples
TPS77618DRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77618
Samples
Addendum-Page 2
Samples
77615
Samples
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
13-May-2022
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS77618PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77618
Samples
TPS77618PWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77618
Samples
TPS77618PWPRG4
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77618
Samples
TPS77625D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77625
Samples
TPS77625DG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77625
Samples
TPS77625DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77625
Samples
TPS77625DRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77625
Samples
TPS77625PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77625
Samples
TPS77625PWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77625
Samples
TPS77625PWPRG4
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77625
Samples
TPS77628D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77628
Samples
TPS77633D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77633
Samples
TPS77633DG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77633
Samples
TPS77633DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77633
Samples
TPS77633DRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
77633
Samples
TPS77633PWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77633
Samples
TPS77633PWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT77633
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
13-May-2022
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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