Actual Size
(3,00 mm x 3,00 mm)
www.ti.com
Actual Size
(3,00 mm x 3,00 mm)
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
ULTRALOW-NOISE, HIGH PSRR, FAST RF 100-mA
LOW-DROPOUT LINEAR REGULATORS
FEATURES
D 100-mA Low-Dropout Regulator With EN
D Available in 2.5-V, 2.8-V, 3-V, and Adj.
D High PSRR (75 dB at 10 kHz)
D Ultralow Noise (27 µV)
D Fast Start-Up Time (50 µs)
D Stable With Any 1-µF Ceramic Capacitor
D Excellent Load/Line Transient
D Very Low Dropout Voltage
DESCRIPTION
The TPS792xx family of low-dropout (LDO)
low-power linear voltage regulators features high
power supply rejection ratio (PSRR), ultralow
noise, fast start-up, and excellent line and load
transient responses in a small outline, SOT23,
package. Each device in the family is stable, with
a small 1-µF ceramic capacitor on the output. The
family uses an advanced, proprietary BiCMOS
fabrication process to yield extremely low dropout
voltages (e.g., 55 mV at 100 mA, TPS79230).
Each device achieves fast start-up times
(approximately 50 µs with a 0.001 µF bypass
capacitor) while consuming very low quiescent
current (170 µA typical). Moreover, when the
device is placed in standby mode, the supply
current is reduced to less than 1 µA. The
TPS79228 exhibits approximately 27 µVRMS of
output voltage noise with a 0.1 µF bypass
capacitor. Applications with analog components
that are noise sensitive, such as portable RF
electronics, benefit from the high PSRR and low
noise features as well as the fast response time.
(55 mV at Full Load, TPS79230)
5-Pin SOT23 (DBV) Package
D
D TPS791xx Provides EN Options
APPLICATIONS
D Cellular and Cordless Telephones
D VCOs
D RF
D Bluetooth, Wireless LAN
D Handheld Organizers, PDA
DBV PACKAGE
(TOP VIEW)
1
GND
2
OUT
90
IO = 100 mA
4
BYPASS
Fixed Option
DBV PACKAGE
(TOP VIEW)
70
Output Spectral Noise Density –
3
µ V/
80
Ripple Rejection – dB
EN
5
TPS79228
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
Hz
IN
TPS79228
RIPPLE REJECTION
vs
FREQUENCY
60
50
40
IN
1
6
OUT
GND
2
5
FB
20
EN
3
4
BYPASS
10
0
IO = 10 mA
30
VI = 3.8 V
Co = 10 µF
C(byp) = 0.01 µF
10
Adjustable Option
100
1k
10 k
100 k
f – Frequency – Hz
1M
10 M
0.3
0.25
VI = 3.8 V
Co = 1 µF
C(byp) = 0.1 µF
0.2
0.15
IO = 1 mA
0.1
IO = 100 mA
0.05
0
100
1k
10k
f – Frequency – Hz
100k
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
Bluetooth is a trademark owned by the Bluetooth SIG, Inc.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2002, Texas Instruments Incorporated
TPS79201, TPS79225
TPS79228, TPS79230
www.ti.com
SLVS337B – MARCH 2001 – REVISED MAY 2002
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TJ
VOLTAGE
PACKAGE
1.2 to 5.5 V
2.5 V
–40°C
40°C to 125°C
SOT23
(DBV)
2.8 V
3V
(1) The DBVT indicates tape and reel of 250 parts.
(2) The DBVR indicates tape and reel of 3000 parts.
PART NUMBER
TPS79201DBVT(1)
TPS79201DBVR(2)
SYMBOL
PEVI
TPS79225DBVT(1)
TPS79228DBVT(1)
TPS79225DBVR(2)
TPS79228DBVR(2)
PEWI
TPS79230DBVT(1)
TPS79230DBVR(2)
PEYI
PEXI
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
TPS79201, TPS79225
TPS79228, TPS79230
Input voltage range
– 0.3 V to 6 V
Voltage range at EN
–0.3 V to VI + 0.3 V
Voltage on OUT
– 0.3 V to 6 V
Peak output current
Internally limited
ESD rating, HBM
2 kV
ESD rating, CDM
500 V
Continuous total power dissipation
See Dissipation Rating Table
Operating virtual junction temperature range, TJ
– 40°C to 150°C
Operating ambient temperature range, TA
– 40°C to 85°C
Storage temperature range, Tstg
– 65°C to 150°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is
not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
PACKAGE DISSIPATION RATING
BOARD
PACKAGE
RθJC
Low K(1)
High K(2)
DBV
63.75°C/W
DBV
63.75°C/W
TA ≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
256°C/W
DERATING FACTOR
ABOVE TA = 25°C
3.906 mW/°C
391 mW
215 mW
156 mW
178.3°C/W
5.609 mW/°C
561 mW
308 mW
RθJA
224 mW
(1) The JEDEC low K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top of the board.
(2) The JEDEC high K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and ground
planes and 2 ounce copper traces on top and bottom of the board.
RECOMMENDED OPERATING CONDITIONS
MIN
Input voltage, VI (1)
Continuous output current, IO (2)
NOM
MAX
UNIT
2.7
5.5
V
0
100
mA
Operating junction temperature, TJ
–40
125
°C
(1) To calculate the minimum input voltage for your maximum output current, use the following formula:
VI(min) = VO(max) + VDO (max load)
(2) Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
2
TPS79201, TPS79225
TPS79228, TPS79230
www.ti.com
SLVS337B – MARCH 2001 – REVISED MAY 2002
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range, (TJ = –40 to 125°C), VI = VO(typ) + 1 V, IO = 1 mA, EN = VI, Co = 10 µF,
C(byp) = 0.01 µF (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TPS79201
TPS79225
TJ = 25°C
0 µA < IO < 100 mA,
TPS79228
TJ = 25°C
0 µA < IO < 100 mA,
TPS79230
TJ = 25°C
0 µA < IO < 100 mA,
4 V < VI < 5.5 V
0 µA < IO < 100 mA,
TJ = 25°C
Output voltage
Quiescent current (GND current)
1.22 V ≤ VO ≤ 5.2 V (1)
TYP
0 µA < IO < 100 mA,
Output voltage line regulation (∆VO/VO)(2)
VO + 1 V < VI ≤ 5.5 V,
VO + 1 V < VI ≤ 5.5 V,
RL = 28 Ω,
Ω
TJ = 25°C
Time, start
start-up
u (TPS79228)
Co = 1 µF,
F
3.5 V < VI < 5.5 V
0.98 VO
1.02 VO
2.45
2.55
2.8
3.8 V < VI < 5.5 V
2.744
UVLO threshold
UVLO hysteresis
2.856
2.94
3.06
170
250
TJ = 25°C
TJ = 25°C
5
0.12
C(byp) = 0.001 µF
C(byp) = 0.0047 µF
50
C(byp) = 0.01 µF
C(byp) = 0.1 µF
31
C(byp) = 0.001 µF
C(byp) = 0.0047 µF
50
C(byp) = 0.01 µF
90
33
High level enable input voltage
2.7 V < VI < 5.5 V
Low level enable input voltage
2.7 V < VI < 5.5 V
Input current (EN)
EN = 0 V
µs
600
VCC rising
2.7 V < VI < 5.5 V
2.65
100
0.7
mA
V
mV
1
2
µA
V
0.7
–1
1
TJ = 25°C,
TJ = 25°C,
IO = 10 mA
IO = 100 mA
70
f = 100 Hz,
f = 10 kHz,
TJ = 25°C,
f = 100 kHz, TJ = 25°C,
IO = 100 mA
IO = 100 mA
75
TPS79228
IO = 100 mA,
IO = 100 mA
TJ = 25°C
60
TJ = 25°C
55
TPS79230
IO = 100 mA,
IO = 100 mA
D
Dropout
t voltag
lt (3)
µVRMS
70
f = 100 Hz,
TPS79228
%/V
27
2.25
Standby current
µA
mV
0.05
285
TJ = 25°C
EN = 0 V,
V
3
VO = 0 V (1)
VCC rising
Output current limit
UNIT
2.5
BW = 100 Hz to 100 kHz,
IO = 100 mA,, TJ = 25°C
Output noise voltage (TPS79228)
MAX
VO
0 µA < IO < 100 mA
Load regulation
Power supply ripple rejection
MIN
1.22 V ≤ VO ≤ 5.2
TJ = 25°C,
0 µA < IO < 100 mA,
72
V
µA
dB
47
110
mV
V
100
(1) The minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. The maximum IN voltage is 5.5 V. The maximum output current
is 100 mA.
(2) If VO ≤ 2.5 V then VImin = 2.7 V, VImax = 5.5 V:
Line regulation (mV) + ǒ%ńVǓ
V
O
ǒV Imax * 2.7 VǓ
100
1000
If VO ≥ 2.5 V then VImin = VO + 1 V, VImax = 5.5 V:
(3) IN voltage equals VO(typ) – 100 mV; The TPS79225 dropout voltage is limited by the input voltage range limitations.
3
TPS79201, TPS79225
TPS79228, TPS79230
www.ti.com
SLVS337B – MARCH 2001 – REVISED MAY 2002
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
VOUT
VIN
UVLO
Current
Sense
SHUTDOWN
ILIM
R1
_
GND
+
FB
EN
R2
UVLO
Thermal
Shutdown
External to
the Device
Bandgap
Reference
VIN
250 kΩ
Vref
Bypass
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
VOUT
VIN
UVLO
Current
Sense
GND
SHUTDOWN
ILIM
_
R1
+
EN
UVLO
R2
Thermal
Shutdown
VIN
Bandgap
Reference
250 kΩ
Vref
Bypass
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
ADJ
FIXED
BYPASS
4
4
EN
3
3
I
The EN terminal is an input which enables or shuts down the device. When EN goes to a logic high, the device
will be enabled. When the device goes to a logic low, the device will be in shutdown mode.
FB
5
N/A
I
This terminal is the feedback input voltage for the adjustable device.
GND
2
2
IN
1
1
I
The IN terminal is the input to the device.
OUT
6
5
O
The OUT terminal is the regulated output of the device.
4
An external bypass capacitor, connected to this terminal, in conjunction with an internal resistor, creates a
low-pass filter to further reduce regulator noise.
Regulator ground
TPS79201, TPS79225
TPS79228, TPS79230
www.ti.com
SLVS337B – MARCH 2001 – REVISED MAY 2002
TYPICAL CHARACTERISTICS
TPS79228
TPS79228
TPS79228
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
GROUND CURRENT
vs
JUNCTION TEMPERATURE
2.803
2.801
2.8
2.799
VI = 3.8 V
Co = 10 µF
2.81
240
Ground Current – µ A
V O – Output Voltage – V
2.802
V O – Output Voltage – V
260
2.82
VI = 3.8 V
Co = 10 µF
TJ = 25° C
IO = 1 mA
2.8
2.79
IO = 100 mA
2.78
VI = 3.8 V
Co = 10 µF
220
200
IO = 1 mA
180
IO = 100 mA
160
140
2.797
2.77
2.796
2.76
–40 –25 –10 5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
120
0
20
40
60
80
100
IO – Output Current – mA
20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
Figure 2
Figure 3
TPS79228
TPS79228
TPS79228
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
0.25
0.2
0.15
IO = 1 mA
0.1
IO = 100 mA
0.05
0
100
1k
10k
Hz
0.3
VI = 3.8 V
Co = 10 µF
C(byp) = 0.1 µF
0.25
0.2
IO = 1 mA
0.15
0.1
IO = 100 mA
0.05
0
100
100k
1k
10k
f – Frequency – Hz
f – Frequency – Hz
1.8
VI = 3.8 V
IO = 100 mA
Co= 10 µF
1.6
µ V/
VI = 3.8 V
Co = 1 µF
C(byp) = 0.1 µF
Output Spectral Noise Density –
Hz
0.3
Output Spectral Noise Density – µ V/
Output Spectral Noise Density –
µ V/
Hz
Figure 1
100
–40 –25 –10 5
1.4
C(byp) = 0.001 µF
1.2
C(byp) = 0.0047 µF
1
C(byp) = 0.01 µF
0.8
0.6
C(byp) = 0.1 µF
0.4
0.2
0
100
100k
Figure 5
Figure 4
1k
10k
Figure 6
TPS79228
TPS79228
OUTPUT IMPEDANCE
vs
FREQUENCY
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
0.09
2.5
50
40
30
20
10
BW = 100 Hz to 100
kHz
0
0.001
0.01
C(byp) – Bypass Capacitance – µF
Figure 7
2
VI = 3.8 V
Co = 10 µF
TJ = 25° C
0.08
V DO – Dropout Voltage – V
VI = 3.8 V
VO = 2.8 V
Io = 100 mA
Co = 10 µF
Z o – Output Impedance – Ω
RMS – Root Mean Squared Output Noise – µ V (RMS)
TPS79228
ROOT MEAN SQUARED OUTPUT NOISE
vs
BYPASS CAPACITANCE
60
1.5
IO = 1 mA
1
IO = 100 mA
0.5
VI = 2.7 V
Co = 10 µF
0.07
0.06
IO = 100 mA
0.05
0.04
0.03
0.02
IO = 10 mA
0.01
0.1
0
10
100k
f – Frequency – Hz
100
1k
10 k 100 k
f – Frequency – Hz
Figure 8
1M
10 M
0
–40 –25 –10 5
20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
Figure 9
5
TPS79201, TPS79225
TPS79228, TPS79230
www.ti.com
SLVS337B – MARCH 2001 – REVISED MAY 2002
TYPICAL CHARACTERISTICS
TPS79228
TPS79201
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
120
V DO – Dropout Voltage – mV
100
TJ = 125°C
80
60
TJ = 25°C
40
20
0.04
0.06
0.08
TJ = 125°C
80
60
TJ = 25°C
40
TJ = –40°C
0
2.5
0
0.02
100
20
TJ = –40°C
0
0.1
3
3.5
4
4.5
Figure 10
TJ = 25°C
2.7
2.2
1.5
2
2.5
3
3.5
4
4.5
Figure 12
TPS79228
TPS79228
RIPPLE REJECTION
vs
FREQUENCY
RIPPLE REJECTION
vs
FREQUENCY
100
Ripple Rejection – dB
60
50
IO = 10 mA
60
VI = 3.8 V
Co = 10 µF
C(byp) = 0.01 µF
1k
IO = 100 mA
70
IO = 10 mA
50
80
100 k
1M
10 M
IO = 100 mA
70
60
IO = 10 mA
50
40
40
30
30
20
20
10 k
VI = 3.8 V
Co = 1 µF
C(byp) = 0.1 µF
90
80
30
100
VI = 3.8 V
Co = 1 µF
C(byp) = 0.01 µF
90
70
5
VO – Output Voltage – V
TPS79228
80
10
TJ =– 40°C
3.2
5
100
10
0
3.7
RIPPLE REJECTION
vs
FREQUENCY
IO = 100 mA
20
TJ = 125°C
4.2
Figure 11
90
40
VI = 3.2 V
Co = 10 µF
4.7
VI – Input Voltage – V
IO – Output Current – A
Ripple Rejection – dB
5.2
IO = 100 mA
Ripple Rejection – dB
V DO – Dropout Voltage – mV
IO = 100 mA
Minimum Required Input Voltage – V
120
MINIMUM REQUIRED INPUT VOLTAGE
vs
OUTPUT VOLTAGE
10
100
f – Frequency – Hz
Figure 13
1k
10 k
100 k
1M
10
10 M
100
1k
10 k
100 k
f – Frequency – Hz
f – Frequency – Hz
Figure 14
Figure 15
1M
10 M
0
0
–20
1
C(byp) = 0.0047 µF
0
C(byp) = 0.01 µF
0
20 40
60 80 100 120 140 160 180 200
Figure 16
I
2
– Input Voltage – V
V
3
t – Time – µs
6
IO = 100 mA
Co = 1 µF
C(byp) = 0.01 µF
20
O
C(byp) = 0.001 µF
TPS79228
LOAD TRANSIENT RESPONSE
dv
0.4 V
+
µs
dt
4.8
3.8
0
5
10
15 20
25 30
t – Time – µs
Figure 17
35 40
45 50
∆ V O – Change In
Output Voltage – mV
VI = 3.8 V
VO = 2.8 V
IO = 100 mA
Co = 1 µF
TJ = 25°C
TPS79228
LINE TRANSIENT RESPONSE
I O – Output Current – mA
2
V
Enable Voltage – V
V – Output Voltage – V
O
4
– Output Voltage – mV
TPS79228
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
TIME (START-UP)
VI = 3.8 V
Co = 10 µF
20
0
–20
–40
di
0.04 A
+
µs
dt
100
0
0
50 100 150 200 250 300 350 400 450 500
t – Time – µs
Figure 18
TPS79201, TPS79225
TPS79228, TPS79230
www.ti.com
SLVS337B – MARCH 2001 – REVISED MAY 2002
TYPICAL CHARACTERISTICS
TPS79228
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
100
ESR – Equivalent Series Resistance –
Ω
Co = 0.47 µF
VI = 5.5 V
TJ = –40 °C to 125°C
10
Region of Instability
1
0.1
Region of
Instability
0.01
0.02
0.04
0.06
0.08
0.1
100
Co = 1 µF
VI = 5.5 V
TJ = –40 °C to 125°C
10
Region of Instability
1
0.1
Region of Stability
0.01
0
IO – Output Current – A
0.02
0.04
0.06
0.08
0.1
IO – Output Current – A
Figure 19
Figure 20
TPS79228
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
Ω
0
ESR – Equivalent Series Resistance –
ESR – Equivalent Series Resistance –
Ω
TPS79228
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
100
Co = 10 µF
VI = 5.5 V
TJ = –40 °C to 125°C
10
Region of Instability
1
0.1
Region of Stability
0.01
0
0.02
0.04
0.06
0.08
0.1
IO – Output Current – A
Figure 21
7
TPS79201, TPS79225
TPS79228, TPS79230
www.ti.com
SLVS337B – MARCH 2001 – REVISED MAY 2002
APPLICATION INFORMATION
The TPS792xx family of low-dropout (LDO) regulators have been optimized for use in noise-sensitive battery-operated
equipment. The device features extremely low dropout voltages, high PSRR, ultralow output noise, low quiescent current
(170 µA typically), and enable-input to reduce supply currents to less than 1 µA when the regulator is turned off.
A typical application circuit is shown in Figure 22.
TPS792xx
VI
1
IN
BYPASS
OUT
0.1 µF
4
5
VO
3
0.01 µF
EN
+
GND
1 µF
2
Figure 22. Typical Application Circuit
EXTERNAL CAPACITOR REQUIREMENTS
A 0.1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS792xx,
required for stability and to improve transient response, noise rejection, and ripple rejection. A higher-value electrolytic input
capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches
from the power source.
Like all low dropout regulators, the TPS792xx requires an output capacitor connected between OUT and GND to stabilize
the internal control loop. The minimum recommended capacitance is 1 µF. Any 1 µF or larger ceramic capacitor is suitable.
The device is also stable with a 0.47 µF ceramic capacitor with at least 75 mΩ of ESR.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS792xx has a BYPASS pin which is
connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor, in conjunction with an
external bypass capacitor connected to the BYPASS pin, creates a low pass filter to reduce the voltage reference noise
and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the
BYPASS pin must be at a minimum because any leakage current creates an IR drop across the internal resistor thus
creating an output error. Therefore, the bypass capacitor must have minimal leakage current.
For example, the TPS79228 exhibits only 31 µVRMS of output voltage noise using a 0.1-µF ceramic bypass capacitor and
a 1-µF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance increases due to the RC
time constant at the bypass pin that is created by the internal 250-kΩ resistor and external capacitor.
BOARD LAYOUT RECOMMENDATION TO IMPROVE PSRR AND NOISE PERFORMANCE
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board be
designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the ground pin of the
device. In addition, the ground connection for the bypass capacitor should connect directly to the ground pin of the device.
8
TPS79201, TPS79225
TPS79228, TPS79230
www.ti.com
SLVS337B – MARCH 2001 – REVISED MAY 2002
POWER DISSIPATION AND JUNCTION TEMPERATURE
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be
restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle
in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable
dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
P
T max * T
A
+ J
D(max)
R
θJA
(1)
Where:
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package, see the dissipation rating table.
TA is the ambient temperature.
The regulator dissipation is calculated using:
P
D
ǒ
+ V *V
I
O
Ǔ
I
O
(2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protection
circuit.
PROGRAMMING THE TPS79201 ADJUSTABLE LDO REGULATOR
The output voltage of the TPS79201 adjustable regulator is programmed using an external resistor divider as shown in
Figure 23. The output voltage is calculated using:
V
O
+V
ǒ1 ) R1
Ǔ
R2
ref
(3)
Where:
Vref = 1.2246 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be used for
improved noise performance, but the solution consumes more power. Higher resistor values should be avoided as leakage
current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and
thus erroneously decreases/increases VO. The recommended design procedure is to choose R2 = 30.1 kΩ to set the
divider current at 50 µA, C1 = 15 pF for stability, and then calculate R1 using:
R1 +
ǒ
V
V
Ǔ
O *1
ref
R2
(4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed
between OUT and FB. For voltages 1.8 V, the
approximate value of this capacitor can be calculated as:
C1 +
(3 x 10 –7) x (R1 ) R2)
(R1 x R2)
(5)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is not used
(such as in a unity-gain configuration) or if an output voltage < 1.8 V is chosen, then the minimum recommended output
capacitor is 2.2 µF instead of 1 µF.
9
TPS79201, TPS79225
TPS79228, TPS79230
www.ti.com
SLVS337B – MARCH 2001 – REVISED MAY 2002
TPS79201
VI
OUTPUT VOLTAGE
PROGRAMMING GUIDE
IN
1 µF
≥2V
EN
OUT
VO
C1
R1
≤ 0.7 V
0.01 µF
BYPASS FB
GND
1 µF
OUTPUT
VOLTAGE
R1
R2
C1
2.5 V
33.4 kΩ 30.1 kΩ
22 pF
3.3 V
53.6 kΩ 30.1 kΩ
15 pF
3.6 V
59 kΩ 30.1 kΩ
15 pF
R2
Figure 23. TPS79201 Adjustable LDO Regulator Programming
REGULATOR PROTECTION
The TPS792xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops
below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally
limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate.
The TPS792xx features internal current limiting and thermal protection. During normal operation, the TPS792xx limits
output current to approximately 400 mA. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to
exceed the power dissipation ratings of the package or the absolute maximum voltage ratings of the device. If the
temperature of the device exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has
cooled down to below approximately 140°C, regulator operation resumes.
10
PACKAGE OPTION ADDENDUM
www.ti.com
6-Feb-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS79201DBVR
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEVI
TPS79201DBVT
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEVI
TPS79201DBVTG4
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEVI
TPS79225DBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEXI
TPS79225DBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEXI
TPS79228DBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEWI
TPS79228DBVRG4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEWI
TPS79228DBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEWI
TPS79228DBVTG4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEWI
TPS79230DBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEYI
TPS79230DBVRG4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEYI
TPS79230DBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PEYI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
6-Feb-2020
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
