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TPS799
SBVS056K – JANUARY 2005 – REVISED JANUARY 2015
TPS799 200-mA, Low-Quiescent Current, Ultralow Noise, High-PSRR Low-Dropout Linear
Regulator
1 Features
3 Description
•
•
The TPS799 family of low-dropout (LDO), low-power
linear regulators offers excellent ac performance with
very low ground current. High power-supply rejection
ratio (PSRR), low noise, fast start-up, and excellent
line and load transient response are provided while
consuming a very low 40-μA (typical) ground current.
1
•
•
•
•
•
•
•
•
200-mA Low-Dropout Regulator With EN
Multiple Output Voltage Versions Available:
– Fixed Outputs of 1.2 V to 4.5 V Using
Innovative Factory EEPROM Programming
– Adjustable Outputs from 1.20 V to 6.5 V
Inrush Current Protection with EN Toggle
Low IQ: 40 μA
High PSRR: 66 dB at 1 kHz
Stable with a Low-ESR, 2-μF Typical Output
Capacitance
Excellent Load and Line Transient Response
2% Overall Accuracy (Load, Line, and
Temperature)
Very Low Dropout: 100 mV
Package: 5-Bump, Thin, 1-mm × 1.37-mm
DSBGA
The TPS799 is stable with ceramic capacitors and
uses an advanced BiCMOS fabrication process to
yield a dropout voltage of typically 100 mV at a
200-mA output. The TPS799 uses a precision voltage
reference and feedback loop to achieve an overall
accuracy of 2% over all load, line, process, and
temperature variations. The TPS799 features inrush
current protection when the EN toggle is used to start
the device, immediately clamping the current.
All devices are fully specified over the temperature
range of TJ = –40°C to 125°C, and offered in a lowprofile, die-sized ball grid array (DSBGA) package,
ideal for wireless handsets and WLAN cards.
Device Information(1)
2 Applications
•
•
•
•
PART NUMBER
Cellular Phones
Wireless LAN, Bluetooth®
VCOs, RF
Handheld Organizers, PDAs
TPS799
PACKAGE
BODY SIZE (NOM)
SOT (5)
2.90 mm x 1.60 mm
SON (6)
2.00 x 2.00 mm
DSBGA (5)
1.57 mm x 1.20 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Circuit
Fixed Voltage Versions
Typical Application Circuit
Adjustable Voltage Version
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
VIN
IN
VOUT
OUT
VIN
IN
TPS799xx
EN
GND
NR
2.2mF
Ceramic
EN
VOUT =
OUT
TPS79901
GND
(R1 + R2)
R2
´ 1.193
VOUT
R1
FB
CFB
2.2mF
Ceramic
R2
VEN
Optional bypass capacitor
to reduce output noise
and increase PSRR.
VEN
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS799
SBVS056K – JANUARY 2005 – REVISED JANUARY 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
7.4 Device Functional Modes........................................ 13
8
Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Applications ................................................ 14
8.3 Do's and Don'ts ...................................................... 16
5.1 Fixed Voltage Versions ............................................. 3
5.2 Adjustable Voltage Versions ..................................... 3
9 Power Supply Recommendations...................... 16
10 Layout................................................................... 16
Specifications......................................................... 5
10.1 Layout Guidelines ................................................. 16
10.2 Layout Example .................................................... 17
10.3 Thermal Information .............................................. 17
6.1
6.2
6.3
6.4
6.5
6.6
7
1
1
1
2
3
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
5
5
5
5
6
7
Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram ....................................... 12
7.3 Feature Description................................................. 13
11 Device and Documentation Support ................. 18
11.1
11.2
11.3
11.4
11.5
Device Support......................................................
Documentation Support ........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
18
18
12 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision J (August 2010) to Revision K
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
•
Changed Features list ........................................................................................................................................................... 1
•
Changed Description section.................................................................................................................................................. 1
•
Changed figure on front page; replaced device pinouts with application circuits................................................................... 1
•
Changed Pin Configuration and Functions section; updated table format, renamed pin packages to meet new
standards ............................................................................................................................................................................... 3
•
Changed "free-air" to "junction" temperature in condition statement for Absolute Maximum Ratings .................................. 5
•
Changed free-air to junction in Recommended Operating Conditions table conditions......................................................... 5
•
Added thermal information for additional device packages ................................................................................................... 5
Changes from Revision I (November 2007) to Revision J
•
2
Page
Replaced the Dissipation Ratings table with the Thermal Information table .......................................................................... 5
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SBVS056K – JANUARY 2005 – REVISED JANUARY 2015
5 Pin Configuration and Functions
5.1 Fixed Voltage Versions
DDC Package
5-Pin SOT
Top View
IN
1
5
YZU Package
5-Pin DSBGA
Top View
C3
OUT
C1
IN
GND
2
EN
3
OUT
B2
GND
4
NR
A3
A1
NR
EN
DRV Package
6-Pin SON With Exposed Thermal Pad
Top View
OUT
1
NR
2
6
GND
GND 3
IN
5
N/C
4
EN
5.2 Adjustable Voltage Versions
DDC Package
5-Pin SOT
Top View
IN
1
5
YZU Package
5-Pin DSBGA
Top View
C3
OUT
C1
IN
GND
2
EN
3
OUT
B2
GND
4
FB
A3
FB
A1
EN
DRV Package
6-Pin SON With Exposed Thermal Pad
Top View
OUT
1
FB
2
GND 3
6
GND
IN
5
N/C
4
EN
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SBVS056K – JANUARY 2005 – REVISED JANUARY 2015
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Pin Functions
PIN
4
NAME
DDC
YZY
DRV
I/O
DESCRIPTION
IN
1
C3
6
I
GND
2
B2
3, Pad
—
Input supply.
EN
3
A1
4
I
NR
4
A3
2
—
FB
4
A3
2
I
Adjustable voltage version only. Feedback; this pin is the input to the control loop error
amplifier, and sets the output voltage of the device.
OUT
5
C1
1
O
Output of the regulator. To assure stability, a small ceramic capacitor (total typical
capacitance ≥ 2 μF) is required from this pin to ground.
N/C
—
—
5
—
Not internally connected. This pin must either be left open, or tied to GND.
Ground. The pad must be tied to GND.
Driving this pin high turns on the regulator. Driving this pin low puts the regulator into
shutdown mode. EN can be connected to IN if not used.
Fixed voltage versions only. Noise reduction; connecting this pin to an external capacitor
bypasses noise generated by the internal band gap. This capacitor allows output noise to
be reduced to very low levels.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating junction temperature range (unless otherwise noted)
Voltage
(2)
Current
Temperature
(1)
(2)
(1)
MIN
MAX
UNIT
IN
–0.3
7.0
V
EN
–0.3
VIN + 0.3
V
OUT
–0.3
VIN + 0.3
OUT
Internally limited
mA
Operating virtual junction, TJ
–55
150
°C
Storage temperature range, Tstg
–55
150
°C
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to network ground terminal.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage
2.7
6.5
V
IOUT
Output current
0.5
200
mA
TJ
Operating junction temperature
–40
125
°C
6.4 Thermal Information
TPS799
THERMAL METRIC (1)
DDC (SOT)
DRV (SON)
YZU (DSBGA)
5 PINS
6 PINS
5 PINS
143.3
RθJA
Junction-to-ambient thermal resistance
225.3
74.2
RθJC(top)
Junction-to-case (top) thermal resistance
39.3
58.8
1.1
RθJB
Junction-to-board thermal resistance
47.3
145.9
84.7
ψJT
Junction-to-top characterization parameter
0.5
0.2
3.8
ψJB
Junction-to-board characterization parameter
46.7
54.4
84.4
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
7.2
N/A
(1)
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics
Over operating temperature range (TJ = –40°C to 125°C), VIN = VOUT(nom) + 0.3 V or 2.7 V, whichever is greater; IOUT = 1 mA,
VEN = VIN, COUT = 2.2 μF, CNR = 0.01 μF, unless otherwise noted. For TPS79901, VOUT = 3.0 V. Typical values are at TJ =
25°C.
PARAMETER
VIN
Input voltage range (1)
VFB
Internal reference (TPS79901)
VOUT
Output voltage range (TPS79901)
TEST CONDITIONS
MIN
TYP
2.7
1.169
1.193
MAX
V
1.217
V
V
VFB
6.5 – VDO
Output accuracy, nominal
TJ = 25°C
–1%
1%
VOUT
Output accuracy (1)
Over VIN, IOUT, temperature
VOUT + 0.3 V ≤ VIN ≤ 6.5 V
500 μA ≤ IOUT ≤ 200 mA
–2%
ΔVO(ΔVI)
Line regulation (1)
VOUT(NOM) + 0.3 V ≤ VIN ≤ 6.5 V
ΔVO(ΔIO)
Load regulation
500 μA ≤ IOUT ≤ 200 mA
VDO
Dropout voltage (2)
(VIN = VOUT(nom) – 0.1 V)
IOUT = 200 mA
ICL
Output current limit
VOUT = 0.9 × VOUT(nom)
IGND
Ground pin current
500 μA ≤ IOUT ≤ 200 mA
ISHDN
Shutdown current (IGND)
VEN ≤ 0.4 V, 2.7 V ≤ VIN ≤ 6.5 V
IFB
Feedback pin current (TPS79901)
PSRR
Vn
Power-supply rejection ratio
Output noise voltage
Start-up time
VEN(HI)
Enable high (enabled)
VEN(LO)
Enable low (shutdown)
IEN(HI)
Enable pin current, enabled
Tsd
Thermal shutdown temperature
TJ
Operating junction temperature
UVLO
(1)
(2)
6
VOUT(nom) ≤ 3.3 V
VOUT(nom) ≥ 3.3 V
220
±1%
BW = 10 Hz to 100 kHz,
VOUT = 2.85 V
VOUT = 2.85 V,
RL = 14 Ω,
COUT = 2.2 μF
2%
0.02
%/V
0.002
%/mA
100
175
mV
90
160
mV
400
600
mA
40
60
μA
1
μA
0.5
µA
0.15
–0.5
VIN = 3.85 V,
VOUT = 2.85 V,
CNR = 0.01 μF,
IOUT = 100 mA
UNIT
6.5
f = 100 Hz
70
dB
f = 1 kHz
66
dB
f = 10 kHz
51
dB
f = 100 kHz
38
CNR = 0.01 μF
dB
10.5 × VOUT
μVRMS
94 × VOUT
μVRMS
CNR = none
CNR = 0.001 μF
45
μs
CNR = 0.047 μF
45
μs
CNR = 0.01 μF
50
μs
CNR = none
50
μs
1.2
VIN
V
0
0.4
V
1
μA
VEN = VIN = 6.5 V
0.03
Shutdown, temperature increasing
165
°C
Reset, temperature decreasing
145
°C
–40
Undervoltage lockout
VIN rising
Hysteresis
VIN falling
1.90
125
2.20
70
2.65
°C
V
mV
Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater.
VDO is not measured for devices with VOUT(nom) < 2.8 V because minimum VIN = 2.7 V.
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6.6 Typical Characteristics
Over operating temperature range (TJ= –40°C to 125°C), VIN = VOUT(nom) + 0.3 V or 2.7 V, whichever is greater; IOUT = 1 mA,
VEN = VIN, COUT = 2.2 μF, and CNR = 0.01 μF, unless otherwise noted. For TPS79901, VOUT = 3.0 V. Typical values are at TJ
= 25°C.
28.50
1.0
21.38
0.8
IOUT = 100mA
Change in VOUT (%)
Change in VOUT (mV)
0.6
14.25
TJ = +25°C
7.13
TJ = −40°C
0
−7.13
−14.25
TJ = +125°C
−21.38
TJ = −40°C
0.4
TJ = +25°C
0.2
0
−0.2
TJ = +125°C
−0.4
TJ = +85°C
−0.6
TJ = +85°C
−0.8
−1.0
−28.50
0
50
100
150
2.5
200
3.5
4.5
5.5
6.5
7.5
VIN (V)
IOUT (mA)
Figure 2. Line Regulation
Figure 1. Load Regulation
200
2.0
180
1.5
TJ = +125_ C
1.0
IOUT = 100mA
0
−0.5
IOUT = 200mA
−1.0
120
100
80
TJ = +25_C
60
40
−1.5
TJ = −40_ C
20
−2.0
−40 −25 −15
TJ = +85_ C
140
IOUT = 1mA
0.5
VDO (mV)
Change in VOUT (%)
160
0
5
20
35
50
65
80
95
0
110 125
50
100
200
Figure 4. TPS799285 Dropout Voltage vs Output Current
Figure 3. Output Voltage vs Junction Temperature
200
110
180
100
I OUT = 200mA
90
160
I OUT = 200mA
120
100
IOUT = 100mA
80
60
80
VDO (mV)
140
VDO (mV)
150
I OUT (mA)
TJ (°C)
70
60
50
40
30
40
20
20
IOUT = 1mA
10
0
0
−40 −25 −15
5
20
35
50
65
80
95
110 125
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
VIN (V)
TJ (°C)
Figure 5. TPS799285 Dropout Voltage vs Junction
Temperature
Figure 6. TPS79901 Dropout vs Input Voltage
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Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to 125°C), VIN = VOUT(nom) + 0.3 V or 2.7 V, whichever is greater; IOUT = 1 mA,
VEN = VIN, COUT = 2.2 μF, and CNR = 0.01 μF, unless otherwise noted. For TPS79901, VOUT = 3.0 V. Typical values are at TJ
= 25°C.
60
60
50
50
VIN = 3.2V
VIN = 5.0V
IOUT = 200mA
40
IOUT = 500mA
IGND (µA)
IGND (mA)
40
30
20
30
VIN = 2.7V
(dropout)
20
10
10
VOUT = 2.85V
IOUT = 200mA
VOUT = 2.85V
0
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
−40 −25 −15
7.0
5
20
VIN (V)
VEN = 0.4V
95
110 125
I OUT = 100mA
80
I OUT = 1mA
70
PSRR (dB)
400
IGND (nA)
80
Figure 8. TPS799285 Ground Pin Current vs Junction
Temperature
500
300
60
IOUT = 200mA
50
40
30
200
VIN = 6.5V
20
100
10
VIN = 3.2V
CNR = 0.01µF
COUT = 2.2µF
0
0
−40 −25 −15
5
20
35
50
65
80
95
10
110 125
100
1k
10k
100k
1M
10M
Frequency (Hz)
TJ (°C)
Figure 10. TPS799285 Power-Supply Ripple Rejection vs
Frequency (VIN – VOUT = 1.0 V)
Figure 9. Ground Pin Current (Disabled) vs Junction
Temperature
90
90
IOUT = 100mA
80
IOUT = 1mA
80
70
70
60
60
PSRR (dB)
PSRR (dB)
65
90
600
50
40
30
IOUT = 1mA
50
40
IOUT = 200mA
30
20
20
IOUT = 200mA
CNR = 0.01µF
COUT = 2.2µF
10
0
CNR = 0.01µF
COUT = 2.2µF
IOUT = 100mA
0
10
8
50
TJ (°C)
Figure 7. Ground Pin Current vs Input Voltage
10
35
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
Figure 11. TPS799285 Power-Supply Ripple Rejection vs
Frequency (VIN – VOUT = 0.5 V)
Figure 12. TPS799285 Power-Supply Ripple Rejection vs
Frequency (VIN – VOUT = 0.25 V)
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Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to 125°C), VIN = VOUT(nom) + 0.3 V or 2.7 V, whichever is greater; IOUT = 1 mA,
VEN = VIN, COUT = 2.2 μF, and CNR = 0.01 μF, unless otherwise noted. For TPS79901, VOUT = 3.0 V. Typical values are at TJ
= 25°C.
90
90
80
80
IOUT = 1mA
60
IOUT = 200mA
50
40
30
40
IOUT = 200mA
10
CNR = 0.01µF
COUT = 10.0µF
0
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
Figure 13. TPS799285 Power-Supply Ripple Rejection vs
Frequency (VIN – VOUT = 1.0 V)
Figure 14. TPS799285 Power-Supply Ripple Rejection vs
Frequency (VIN – VOUT = 0.25 V)
90
90
80
80
70
0.1kHz
1kHz
60
60
50
40
30
50
40
100kHz
10kHz
30
20
20
10
1MHz
70
IOUT = 1mA
PSRR (dB)
PSRR (dB)
50
20
CNR = 0.01µF
COUT = 10.0µF
0
IOUT = 200mA
CNR = None
COUT = 10.0µF
10
100
1k
CNR = 0.01µF
COUT = 2.2µF
10
0
0.0
0
10k
100k
1M
10M
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Frequency (Hz)
VIN − VOUT (V)
Figure 15. TPS799285 Power-Supply Ripple Rejection vs
Frequency (VIN – VOUT = 1.0 V)
Figure 16. Power-Supply Ripple Rejection vs VIN – VOUT, IOUT
= 1 mA
90
90
0.1kHz
80
80
1kHz
70
1kHz
60
PSRR (dB)
10kHz
50
40
30
100kHz
1MHz
20
0.5
1.0
1.5
2.0
2.5
3.0
3.5
10kHz
50
40
30
4.0
CNR = 0.01µF
COUT = 2.2µF
10
0
0.0
100kHz
1MHz
20
CNR = 0.01µF
COUT = 2.2µF
10
0
0.0
0.1kHz
70
60
PSRR (dB)
60
30
20
10
IOUT = 1mA
70
PSRR (dB)
PSRR (dB)
70
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VIN − VOUT (V)
VIN − VOUT (V)
Figure 17. Power-Supply Ripple Rejection vs VIN – VOUT, IOUT
= 100 mA
Figure 18. Power-Supply Ripple Rejection vs VIN – VOUT, IOUT
= 200 mA
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Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to 125°C), VIN = VOUT(nom) + 0.3 V or 2.7 V, whichever is greater; IOUT = 1 mA,
VEN = VIN, COUT = 2.2 μF, and CNR = 0.01 μF, unless otherwise noted. For TPS79901, VOUT = 3.0 V. Typical values are at TJ
= 25°C.
200
35
IOUT = 1mA
COUT = 2.2µF
180
30
Total Noise (µVrms)
Total Noise (µVrms)
160
140
120
100
80
60
25
20
15
10
40
5
20
0
0.01
IOUT = 1mA
CNR = 0.01µF
0
0.1
1
10
0
5
10
15
20
CNR (nF)
COUT (µF)
Figure 19. TPS799285 Total Noise vs CNR
Figure 20. TPS799285 Total Noise vs COUT
VIN = 3.35V
IOUT = 150mA
25
COUT = 2.2mF
100mV/div
VOUT
COUT = 10µF
20mV/div
VOUT
COUT = 10mF
100mV/div
20mV/div
C OUT = 2.2µF
VOUT
dVIN
4.15V
= 1V/µs
1mA
IOUT
3.15V
1V/div
150mA
100mA/div
dt
VOUT
VIN
20µs/div
20ms/div
Figure 21. TPS799285 Line Transient Response
RLOAD = 19W
COUT = 2.2mF
Figure 22. TPS799285 Load Transient Response
VIN = 3.85V
RLOAD = 19W
COUT = 2.2mF
VOUT
VOUT
RLOAD = 19W
COUT = 10mF
RLOAD = 19W
COUT = 10mF
1V/div
1V/div
3.85V
VIN
0V
4V/div
VEN
5V/div
10ms/div
10ms/div
Figure 23. TPS799285 Turn-On Response (VEN = VIN)
10
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Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to 125°C), VIN = VOUT(nom) + 0.3 V or 2.7 V, whichever is greater; IOUT = 1 mA,
VEN = VIN, COUT = 2.2 μF, and CNR = 0.01 μF, unless otherwise noted. For TPS79901, VOUT = 3.0 V. Typical values are at TJ
= 25°C.
7
RL = 19Ω
6
VIN
5
Volts
4
3
VOUT
2
1
0
−1
50ms/div
Figure 25. TPS799285 Power-Up/Power-Down
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7 Detailed Description
7.1 Overview
The TPS799 family of low-dropout (LDO) regulators combines the high performance required of many RF and
precision analog applications with ultralow current consumption. High PSRR is provided by a high-gain, highbandwidth error loop with good supply rejection at very low headroom (VIN – VOUT). A noise-reduction pin is
provided to bypass noise generated by the band-gap reference and to improve PSRR, while a quick-start circuit
quickly charges this capacitor at start-up. The combination of high performance and low ground current also
make these devices an excellent choice for portable applications. All versions have thermal and overcurrent
protection, and are fully specified from –40°C to 125°C.
The TPS799 family also features inrush current protection with an EN toggle start-up, and overshoot detection at
the output. When the EN toggle is used to start the device, current limit protection is immediately activated,
restricting the inrush current to the device. If voltage at the output overshoots 5% from the nominal value, a
pulldown resistor reduces the voltage to normal operating conditions, as shown in the Functional Block Diagram.
7.2 Functional Block Diagram
IN
OUT
400Ω
2µA
Current
Limit
Overshoot
Detect
Thermal
Shutdown
EN
UVLO
Quickstart
1.193V
Bandgap
NR
500k
GND
Figure 26. Fixed-Voltage Versions
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Functional Block Diagram (continued)
IN
OUT
400Ω
3.3MΩ
Current
Limit
Thermal
Shutdown
EN
Overshoot
Detect
UVLO
1.193V
Bandgap
FB
500k
GND
Figure 27. Adjustable-Voltage Versions
7.3 Feature Description
7.3.1 Internal Current Limit
The TPS799 internal current limit helps protect the regulator during fault conditions. In current limit mode, the
output sources a fixed amount of current that is largely independent of the output voltage. For reliable operation,
do not operate the device in a current-limit state for extended periods of time.
The PMOS pass element in the TPS799 has a built-in body diode that conducts current when the voltage at OUT
exceeds the voltage at IN. This current is not limited; therefore, if extended reverse voltage operation is
anticipated, external limiting may be required.
7.3.2 Shutdown
The enable pin (EN) is active high and is compatible with standard and low-voltage TTL-CMOS levels. When
shutdown capability is not required, EN can be connected to IN.
7.3.3 Start Up
The TPS799 uses a start-up circuit to quickly charge the noise reduction capacitor, CNR, if present (see the
Functional Block Diagram). This circuit allows for the combination of very low output noise and fast start-up
times. The NR pin is high impedance so a low leakage CNR capacitor must be used; most ceramic capacitors are
appropriate for this configuration.
Note that for fastest start-up, apply VIN first, and then drive the enable pin (EN) high. If EN is tied to IN, start-up is
somewhat slower. The start-up switch is closed for approximately 135 μs. To ensure that CNR is fully charged
during start-up, use a 0.01-μF or smaller capacitor.
7.3.4 Undervoltage Lockout (UVLO)
The TPS799 uses an undervoltage lockout circuit to keep the output shut off until internal circuitry is operating
properly. The UVLO circuit has a deglitch feature so that undershoot transients are typically ignored on the input
if these transients are less than 50 μs in duration.
7.4 Device Functional Modes
Driving EN over 1.2 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode,
thus reducing the operating current to 150 nA, nominal.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS799 family of LDO regulators provides high PSRR while maintaining ultralow current consumption. The
family also features inrush current protection and overshoot detection at the output.
8.2 Typical Applications
Figure 28 and Figure 29 show the basic circuit connections.
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
VIN
IN
VOUT
OUT
TPS799xx
EN
GND
VEN
2.2mF
Ceramic
NR
Optional bypass capacitor
to reduce output noise
and increase PSRR.
Figure 28. Typical Application Circuit for Fixed Voltage Versions
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
VIN
IN
EN
VOUT =
OUT
TPS79901
GND
(R1 + R2)
R2
´ 1.193
VOUT
R1
FB
CFB
2.2mF
Ceramic
R2
VEN
Figure 29. Typical Application Circuit for Adjustable Voltage Version
8.2.1 Design Requirements
Select the desired device based on the output voltage.
Provide an input supply with adequate headroom to account for dropout and output current to account for the
GND terminal current, and power the load.
8.2.2 Detailed Design Procedure
8.2.2.1 Input and Output Capacitor Requirements
Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-μF to
1-μF low ESR capacitor across the input supply near the regulator. This capacitor counteracts reactive input
sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be
necessary if large, fast rise-time load transients are anticipated, or if the device is located several inches from the
power source. If source impedance is not sufficiently low, a 0.1-μF input capacitor may be necessary to ensure
stability.
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Typical Applications (continued)
The TPS799 is designed to be stable with standard ceramic capacitors with values of 2.2 μF or greater. X5Rand X7R-type capacitors are best because they have minimal variation in value and ESR over temperature.
Maximum ESR must be less than 1.0 Ω.
8.2.2.2 Output Noise
In most LDOs, the band gap is the dominant noise source. If a noise-reduction capacitor (CNR) is used with the
TPS799, the band gap does not contribute significantly to noise. Instead, noise is dominated by the output
resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01-μF noise
reduction capacitor. To further optimize noise, equivalent series resistance of the output capacitor can be set to
approximately 0.2 Ω. This configuration maximizes phase margin in the control loop, reducing total output noise
by up to 10%.
Noise can be referred to the feedback point; with CNR = 0.01 μF total noise is approximately given by Equation 1:
10.5mVRMS
VN =
x VOUT
V
(1)
8.2.2.3 Dropout Voltage
The TPS799 uses a PMOS pass transistor to achieve a low dropout voltage. When (VIN – VOUT) is less than the
dropout voltage (VDO), the PMOS pass device is in its linear region of operation and rDS(on) of the PMOS pass
element is the input-to-output resistance. Because the PMOS device behaves like a resistor in dropout, VDO
approximately scales with the output current.
As with any linear regulator, PSRR degrades as (VIN – VOUT) approaches dropout. This effect is illustrated in
Figure 10 through Figure 18 in the Typical Characteristics section.
8.2.2.4 Transient Response
As with any regulator, increasing the size of the output capacitor reduces over- and undershoot magnitude, but
increases the duration of the transient response. The transient response of the TPS799 is enhanced by an active
pulldown device that engages when the output overshoots by approximately 5% or more when the device is
enabled. When enabled, the pulldown device behaves like a 350-Ω resistor to ground.
8.2.2.5 Minimum Load
The TPS799 is stable with no output load. To meet the specified accuracy, a minimum load of 500 μA is
required. With loads less than 500 μA at junction temperatures near 125°C, the output can drift up enough to
cause the output pulldown device to turn on. The output pulldown device limits voltage drift to 5% typically;
however, ground current can increase by approximately 50 μA. In typical applications, the junction cannot reach
high temperatures at light loads because there is no noticeable dissipated power. The specified ground current is
then valid at no load in most applications.
8.2.2.6 Feedback Capacitor Requirements (TPS79901 Only)
The feedback capacitor, CFB, shown in Figure 29 is required for stability. For a parallel combination of R1 and R2
equal to 250 kΩ, any value from 3 pF to 1 nF can be used. Fixed voltage versions have an internal 30-pF
feedback capacitor which is quick-charged at start-up. The adjustable version does not have this quick-charge
circuit, so values below 5 pF should be used to ensure fast startup; values above 47 pF can be used to
implement an output voltage soft-start. Larger value capacitors also improve noise slightly. The TPS79901 is
stable in unity-gain configuration (OUT tied to FB) without CFB.
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Typical Applications (continued)
8.2.3 Application Curve
100
IOUT = 1 mA
IOUT = 100 mA
IOUT = 250 mA
90
80
PSRR (dB)
70
60
50
40
30
20
COUT = 2.2 µF
CNR = 0.01 µF
10
0
10
100
1k
10k
100k
Frequency (Hz)
1M
10M
G001
Figure 30. Power-Supply Rejection Ratio vs Frequency
8.3 Do's and Don'ts
Do place at least one 2.2-µF ceramic capacitor as close as possible to the OUT pin of the regulator.
Do not place the output capacitor more than 10 mm away from the regulator.
Do connect a 0.1-μF to 1-μF low equivalent series resistance (ESR) capacitor across the IN pin and GND input
of the regulator.
Do not exceed the absolute maximum ratings.
9 Power Supply Recommendations
These devices are designed to operate from an input voltage supply range between 2.7 V and 6.5 V. The input
voltage range provides adequate headroom in order for the device to have a regulated output. This input supply
is well-regulated and stable. If the input supply is noisy, additional input capacitors with low ESR can help
improve the output noise performance.
10 Layout
10.1 Layout Guidelines
10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
To improve ac performance (such as PSRR, output noise, and transient response), design the board with
separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device.
In addition, connect the bypass capacitor directly to the GND pin of the device.
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10.2 Layout Example
VI
VO
TPS799
CIN
COUT
EN
GND
CNR
Represents via used for
application specific connections.
Figure 31. Layout Example
10.3 Thermal Information
10.3.1 Thermal Protection
Thermal protection disables the output when the junction temperature rises to approximately 165°C, allowing the
device to cool. When the junction temperature cools to approximately 145°C the output circuitry is again enabled.
Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may
cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage resulting from
overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, limit junction temperature to 125°C maximum. To estimate the margin of safety
in a complete design (including heatsink), increase the ambient temperature until the thermal protection is
triggered; use worst-case loads and signal conditions. For good reliability, thermal protection triggers at least
35°C above the maximum expected ambient condition of a particular application. This configuration produces a
worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load.
The internal protection circuitry of the TPS799 is designed to protect against overload conditions. This circuitry is
not intended to replace proper heatsinking. Continuously running the device into thermal shutdown degrades
device reliability.
10.3.2 Power Dissipation
The ability to remove heat from the die is different for each package type, presenting different considerations in
the PCB layout. The PCB area around the device that is free of other components moves the head from the
device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Thermal
Information table near the front of this data sheet. Using heavier copper increases the effectiveness in removing
heat from the device. The addition of plated through-holes to heat-dissipating layers also improves heatsink
effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the
output current times the voltage drop across the output pass element, as shown in Equation 2:
P D + ǒVIN*V OUTǓ @ I OUT
(2)
10.3.3 Package Mounting
Solder pad footprint recommendations for the TPS799 are available from the TI's website at www.ti.com.
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Evaluation Modules
An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TPS799.
This EVM, the TPS799 evaluation module, can be requested at the Texas Instruments web site through the
product folders or purchased directly from the TI eStore.
11.1.1.2 Spice Models
Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of
analog circuits and systems. A SPICE model for the TPS799 is available through the product folders under
simulation models.
11.1.2 Device Nomenclature
Table 1. Device Nomenclature (1)
PRODUCT
TPS799xx(x) yyy z
(1)
VOUT
xx(x) is nominal output voltage (for example, 28 = 2.8 V, 285 = 2.85 V, 01 = Adjustable).
yyy is package designator.
z is package quantity.
For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation, see the following:
• Application report: Using New Thermal Metrics, SBVA025.
• Application report: IC Package Thermal Metrics, SPRA953
• TPS799xxEVM-105 User's Guide, SLVU130
11.3 Trademarks
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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6-Feb-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS79901DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWT
TPS79901DDCRG4
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWT
TPS79901DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWT
TPS79901DDCTG4
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWT
TPS79901DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWT
TPS79901DRVRG4
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWT
TPS79901DRVT
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWT
TPS79901YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
E9
TPS79901YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
E9
TPS799125YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
YZ
TPS799125YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
YZ
TPS79912DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CCF
TPS79912DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CCF
TPS79912DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CCF
TPS79912DRVT
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CCF
TPS79912DRVTG4
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CCF
TPS79912YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
F8
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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Orderable Device
6-Feb-2020
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS79912YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
F8
TPS79913DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BUJ
TPS79913DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BUJ
TPS79913DDCTG4
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BUJ
TPS79913YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
F9
TPS79915DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWU
TPS79915DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWU
TPS79915DDCTG4
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWU
TPS79915YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EA
TPS79915YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EA
TPS799185DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CGP
TPS799185DDCRG4
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CGP
TPS799185DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CGP
TPS799185YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
ZA
TPS799185YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
ZA
TPS79918DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWV
TPS79918DDCRG4
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWV
TPS79918DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWV
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
6-Feb-2020
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS79918DDCTG4
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWV
TPS79918DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWV
TPS79918DRVRG4
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWV
TPS79918DRVT
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWV
TPS79918YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EB
TPS79918YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EB
TPS799195DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BTP
TPS799195DRVRG4
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BTP
TPS799195DRVT
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BTP
TPS799195YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
AO
TPS799195YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
AO
TPS79919YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
F6
TPS79920YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
GA
TPS79921YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
G7
TPS79925DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWW
TPS79925DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWW
TPS79925YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EC
TPS79925YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EC
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
6-Feb-2020
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS79926YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
F3
TPS79926YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
F3
TPS79927DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BWE
TPS79927DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BWE
TPS79927DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BPM
TPS79927DRVT
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BPM
TPS79927YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
F5
TPS799285DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXY
TPS799285DDCRG4
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXY
TPS799285DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXY
TPS799285DDCTG4
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXY
TPS799285DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BST
TPS799285DRVT
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
BST
TPS799285YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EE
TPS79928DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWX
TPS79928DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWX
TPS79928DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWX
TPS79928DRVT
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AWX
Addendum-Page 4
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
6-Feb-2020
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS79928YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
ED
TPS79928YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
ED
TPS79930DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXZ
TPS79930DDCRG4
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXZ
TPS79930DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXZ
TPS79930DDCTG4
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXZ
TPS79930YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EF
TPS79930YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EF
TPS799315DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CGQ
TPS799315DDCRG4
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CGQ
TPS799315DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CGQ
TPS799315YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
GP
TPS799315YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
GP
TPS79932YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
(F4, FY)
TPS79933DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXX
TPS79933DDCRG4
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXX
TPS79933DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXX
TPS79933DDCTG4
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXX
Addendum-Page 5
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
6-Feb-2020
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS79933DRVR
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXX
TPS79933DRVRG4
ACTIVE
WSON
DRV
6
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXX
TPS79933DRVT
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXX
TPS79933DRVTG4
ACTIVE
WSON
DRV
6
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AXX
TPS79933YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EG
TPS79933YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
EG
TPS79942DDCR
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CJQ
TPS79942DDCRG4
ACTIVE
SOT-23-THIN
DDC
5
3000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CJQ
TPS79942DDCT
ACTIVE
SOT-23-THIN
DDC
5
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CJQ
TPS79945YZUR
ACTIVE
DSBGA
YZU
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
FK
TPS79945YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
FK
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of