User's Guide
SLVU943A – August 2013 – Revised September 2013
TPS7H1201HTEVM User’s Guide
1
2
3
4
5
6
7
8
9
Contents
INTRODUCTION ............................................................................................................ 3
1.1
Related Documentation ........................................................................................... 3
BACKGROUND ............................................................................................................. 3
SAFETY ...................................................................................................................... 3
3.1
Eye Protection ...................................................................................................... 3
3.2
General Risks ...................................................................................................... 3
3.3
Electrostatic Discharge ............................................................................................ 3
3.4
Thermal/Shock Hazards .......................................................................................... 3
APPAREL .................................................................................................................... 3
EQUIPMENT ................................................................................................................ 4
5.1
Power Supplies ..................................................................................................... 4
5.2
Load #1 .............................................................................................................. 4
5.3
Meters ............................................................................................................... 4
5.4
Oscilloscope ........................................................................................................ 4
BOARD LAYOUT ........................................................................................................... 5
6.1
EVM Layout Flexibility ............................................................................................. 5
BENCH TEST SETUP CONDITIONS .................................................................................. 11
7.1
Headers Description and Jumper Placement ................................................................. 11
7.2
Testing ............................................................................................................. 12
POWER-UP PROCEDURE .............................................................................................. 12
8.1
IOUT and VOUT Measurements .................................................................................... 12
8.2
Output Current Limiting .......................................................................................... 13
8.3
High Side Current Sense ........................................................................................ 13
8.4
Power Good ....................................................................................................... 15
8.5
Dropout Voltage .................................................................................................. 15
8.6
Transient Response .............................................................................................. 16
8.7
Current Sharing ................................................................................................... 19
8.8
Soft-Start ........................................................................................................... 19
8.9
Enable/Disable .................................................................................................... 19
8.10 Turn-Off ............................................................................................................ 20
8.11 Output Noise ...................................................................................................... 21
SCHEMATIC AND BILL OF MATERIALS .............................................................................. 22
List of Figures
1
Component Placement (Top Side)
.......................................................................................
5
2
Component Placement (Bottom Side) ....................................................................................
6
3
PCB Layout (Top Layer) ...................................................................................................
7
4
Board Layout - Second Layer (Mid Layer 1) ............................................................................
8
5
Board Layout - Third Layer (Mid Layer 2) ...............................................................................
9
6
Board Layout - Fourth Layer (Bottom Layer) ..........................................................................
10
7
Headers Description and Jumper Placement ..........................................................................
11
8
IOUT (A) vs IPCL (A) ..........................................................................................................
13
9
VCS (V) vs IOUT (A) ..........................................................................................................
13
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
1
www.ti.com
10
IOUT (A) vs ICS (A) ...........................................................................................................
14
11
IOUT (A) vs ICS (A) ...........................................................................................................
14
12
Vdo vs IOUT ...................................................................................................................
15
13
Load Transient Response: Step Load 0 A to 250 mA ................................................................
16
14
Expanded View Overshoot ...............................................................................................
17
15
Expanded View Undershoot
.............................................................................................
Current Sharing LDO_1 and LDO_2 ....................................................................................
Disabling the LDO via Soft-Start Pin ....................................................................................
Turn-Off .....................................................................................................................
RMS Noise (10 Hz - 100 kHz) = 19.4113538 µVrms, VIN = 2 V, VOUT = 1.8 V at 0 A. ............................
RMS Noise (10 Hz - 100 kHz) = 20.12 µVrms, VIN = 2 V, VOUT = 1.8 V at 0.25 A. ................................
RMS Noise (10 Hz - 100 kHz) = 20.26 µVrms, VIN = 2 V, VOUT = 1.8 V at 0.5 A. .................................
TPS7H1201HTEVM Schematic .........................................................................................
18
16
17
18
19
20
21
22
2
TPS7H1201HTEVM User’s Guide
19
20
20
21
21
21
23
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
INTRODUCTION
www.ti.com
1
INTRODUCTION
This user’s guide describes the characteristics, operation, and use of the TPS7H1201HT evaluation
module (EVM). This EVM demonstrates the Texas Instruments TPS7H1201HT ultra-low Dropout LDO
regulator. It is rated for 0.5-A ultra low-dropout (LDO) voltage regulator. This user’s guide includes setup
instructions, a schematic diagram, a bill of materials (BOM), and PCB layout drawings for the EVM.
1.1
Related Documentation
1. TPS7H1201-HT Datasheet (SLVSAS4)
2
BACKGROUND
The TPS7H1201HTEVM helps designers evaluate the operation and performance of the TPS7H1201HT
ultra low drop out regulator.
Table 1. Summary of Performance
TEST CONDITIONS
OUTPUT CURRENT RANGE
VIN = 1.5 V to 7 V
Max 0.5 A
The evaluation module is designed to provide access to the features of the TPS7H1201. Some
modifications can be made to this module to test performance at different input and output voltages,
current and switching frequency. Please contact TI Field Applications Group for advice on these matters.
3
SAFETY
3.1
Eye Protection
Safety glasses are to be worn while performing all testing on the EVM.
3.2
General Risks
This test must be performed by qualified personnel trained in electronics theory and understand the risks
and hazards of the assembly to be tested.
3.3
Electrostatic Discharge
ESD precautions must be followed while handling electronic assemblies.
3.4
Thermal/Shock Hazards
Precautions should be observed to avoid touching areas of the assembly that may get hot or present a
shock hazard during testing.
4
APPAREL
•
•
•
•
Electrostatic smock
Electrostatic gloves or finger cots
Safety glasses
Ground ESD wrist strap
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
3
EQUIPMENT
5
EQUIPMENT
5.1
Power Supplies
www.ti.com
Power Supply #1 (PS#1): a power supply capable of supplying 7-V at 1-A or higher is required.
5.2
Load #1
Electronic load, i.e. Chroma 63640-80-80 module along with 63600-2 DC electronic load Mainframe or
Decade Resistor Box.
5.3
Meters
Four (4) Fluke 75, (equivalent or better) or two (2) equivalent voltage meters and two (2) equivalent
current meters.
The current meters must be able to measure 3 A current. Note: Shunt along with DVM can be used to
monitor output current.
5.4
Oscilloscope
An Tektronix Oscilloscope, i.e. DPO 7104CCurrent Probe Tektronix TCP202 or equivalent.
4
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
BOARD LAYOUT
www.ti.com
6
BOARD LAYOUT
6.1
EVM Layout Flexibility
The EVM is layed out to provide flexibility for the customer evaluation thus providing test points and or
cold nose probes to monitor various critical nodes of the design as highlighted in the schematic.
Additionally, placeholder is provided thus one can add esr in series with the output capacitor (R47 in
series with C39) thus making it easier to evaluate performance with increased capacitor esr.
Figure 1. Component Placement (Top Side)
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
5
BOARD LAYOUT
www.ti.com
Figure 2. Component Placement (Bottom Side)
6
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
BOARD LAYOUT
www.ti.com
Figure 3. PCB Layout (Top Layer)
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
7
BOARD LAYOUT
www.ti.com
Figure 4. Board Layout - Second Layer (Mid Layer 1)
8
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
BOARD LAYOUT
www.ti.com
Figure 5. Board Layout - Third Layer (Mid Layer 2)
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
9
BOARD LAYOUT
www.ti.com
Figure 6. Board Layout - Fourth Layer (Bottom Layer)
10
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
BENCH TEST SETUP CONDITIONS
www.ti.com
7
BENCH TEST SETUP CONDITIONS
7.1
Headers Description and Jumper Placement
Figure 7. Headers Description and Jumper Placement
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
11
POWER-UP PROCEDURE
7.2
www.ti.com
Testing
Table 2. Power Connectors
NO.
FUNCTION
J19
VIN input voltage connector (see for VIN range)
J24
VIN input voltage connector to ground
J27
VOUT output voltage connector
J28
VOUT output connector to ground
J7
Vin_SMA
J22
EN_SMA
J20
SS_Probe
J5
LDO_OUT_Probe
TP8
LDO Vout measure point (+)
TP9
LDO Vout measure point (GND)
J6
8
LDO_OUT_SMA
TP7
LDO Vin measure point (+)
TP12
LDO Vin measure point (GND)
TP10
PCL
J21
CS_SMA
TP13
PGOOD
TP11
SS
JMP10
VIN alternative connection: 1,2 (+) and 3,4 (GND)
JMP8
VOUT alternative connection 3,4 (+) and 1,2 (GND)
POWER-UP PROCEDURE
Table 3. Test Results
VOUTMIN
VOUT = 1.8 V
1.76 V
IOUT = 0.5 A
8.1
VOUTMAX
CURRENT LIMIT
1.836 V
< 0.7 A
OUTPUT SET POINT
0.6 A
CURRENT LIMIT
1.8166 V
IOUT and VOUT Measurements
1.
2.
3.
4.
5.
6.
7.
8.
9.
Make sure all power supplies in workstation are OFF.
Locate connectors J19 and J24.
Connect VIN(+) to J19 and V(GND) to J24. Set it to 2.3 V.
Locate measure points TP7 and TP12.
Connect voltmeter: VIN(+) to TP7 and V(GND) to TP12.
Locate connectors J27 and J28 and connect load here (be aware of polarities).
Locate measure points TP8 and TP9.
Connect voltmeter: VOUT(+) to TP8 and V(GND) to TP9.
Output voltage should be per Table 1. This is done by setting R27 = 19.8 kΩ and R28 = 10 kΩ.
VOUT can be determined by equation highlighted below or per equation 1 in the datasheet.
(R27 + R28) · VREF
VOUT = ¾
R28
(1)
Where VREF = 0.605 V.
12
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
POWER-UP PROCEDURE
www.ti.com
8.2
Output Current Limiting
A resistor value R30 connected from PCL pin to GND determines the output current limit set point based
on Equation 2.
Maximum programmable current limit is 700 mA.
CSR(Vref )
¾
Rpcl = R30 = PCL
cl - 0.0216
(2)
Where VREF = 0.605 V, PCLcl = programmabe current limit (A), CSR = Current sense ratio (typical value =
51436).
CSR between Ics pin and IOUT can be measured as shown in Figure 8.
• Make sure all power supplies in workstation are OFF.
• Connect VIN(+) to J19 & V(GND) to J24 and set it to 2.3 V.
• Set VOUT to 1.8V. (R27 = 19.8 kΩ and R28 = 10 kΩ)
• Connect load as previously instructed, set it to zero.
• Increase Iload (steps of 0.100 A are suggested) until Vload starts to drop.
• Current limit trip point < 0.7 A.
0.66
Output Current (A)
0.64
0.62
0.6
0.58
0.56
y = 51436x - 0.0216
0.54
0.000011 0.0000115 0.000012 0.0000125 0.000013 0.0000135
PCL Pin Current (A)
C001
Figure 8. IOUT (A) vs IPCL (A)
8.3
High Side Current Sense
Monitoring the voltage at the CS pin will indicate voltage proportional to the output current. Figure 9 shows
typical curve VCS vs IOUT for Vin = 2.28 V and R23 = 3.65 kΩ.
2.290
y = -0.0732x + 2.2804
CS Pin Voltage (V)
2.280
2.270
2.260
2.250
2.240
2.230
0
0.1
0.2
0.3
0.4
0.5
0.6
Output Current (A)
0.7
C002
Figure 9. VCS (V) vs IOUT (A)
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
13
POWER-UP PROCEDURE
www.ti.com
Monitoring current in CS pin (ICS vs IOUT) indicates the current sense ratio between the main PMosFET and
the current sense Mosfet as shown in Figure 10.
0.7
Output Current (A)
0.6
0.5
0.4
0.3
0.2
0.1
y = 49917x - 0.2466
0
0.00E+00
5.00E-06
1.00E-05
1.50E-05
2.00E-05
CS Pin Current (A)
C003
Figure 10. IOUT (A) vs ICS (A)
Figure 11 shows IOUT vs ICS when the voltage on CS pin is varied from 0.3 V to 7 V.
0.6
VIN = 2.3V
VOUT = 1.8V
Output Current (A)
0.5
0.4
0.3
0.2
0.3V
2.3V
5V
7V
0.1
0.0
0
2
4
6
8
10
12
14
16
CS Pin Current ( A)
Figure 11. IOUT (A) vs ICS (A)
14
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
POWER-UP PROCEDURE
www.ti.com
8.4
Power Good
Power good pin is an open drain connection, connect it high via pull up resistor to external voltage source.
Power Good pin indicates the status of the output voltage.
8.5
Dropout Voltage
Drop out voltage (Vdo) is the difference between the input voltage and output voltage needed to maintain
regulation. Vdo vs IOUT is highlighted in Figure 12.
80
210 °C
70
Dropout Voltage (mV)
125 °C
60
25 °C
50
-55 °C
40
30
20
10
0
0.0
0.1
0.2
0.3
0.4
IOUT (A)
0.5
C001
Figure 12. Vdo vs IOUT
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
15
POWER-UP PROCEDURE
8.6
www.ti.com
Transient Response
Waveforms below indicate the transient response behavior of the LDO for 50% step load change.
Channel 1: Output voltage overshoot / undershoot
Channel 2 : Step load in current
Channel 3: Input voltage
Figure 13. Load Transient Response: Step Load 0 A to 250 mA
16
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
POWER-UP PROCEDURE
www.ti.com
Figure 14. Expanded View Overshoot
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
17
POWER-UP PROCEDURE
www.ti.com
Figure 15. Expanded View Undershoot
18
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
POWER-UP PROCEDURE
www.ti.com
8.7
Current Sharing
For demanding load requirements, multiple LDOs can be paralleled.
• In parallel mode CS pin of LDO#1 must be connected to PCL pin of LDO#2 via a series resistor
(41.5 kΩ) and CS pin of LDO#2 must be connected to PCL pin of LDO#1 via series resistor (41.5 kΩ).
• In parallel configuration R30 (resistor from PCL to GND) and R23 (resistor from CS pin to VIN) must be
left open (unpopulated).
54
53
Shared Current %
52
51
50
49
LDO_1 (%)
48
LDO_2 (%)
47
46
45
44
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
1.1 1.2
Output Current
Figure 16. Current Sharing LDO_1 and LDO_2
8.8
Soft-Start
Connecting a capacitor on CS pin to GND (C35) slows down the output voltage ramp rate. The soft-start
capacitor will charge up to 1.2 V.
tss · Iss
C35 = ¾
VREF
(3)
Where:
tss = Soft-start time
Iss = 2.5 µA
VREF = 0.605 V
8.9
Enable/Disable
EVM can be disabled via pulling the enable pin low via shorting JMP7-1 (Enable) to JMP7-2 (GND).
Enable pin is tied high to VIN via R24 ( 20 kΩ) resistor, thus keeping the EVM enabled.
Alternately, EVM can also be disabled via pulling SS pin (U6 pin 1) low via an external circuit comprising
of 2N7002 MOSFET as shown in Figure 17. A high signal at the gate of Q100 will discharge the SS pin
and disable the device.
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
19
POWER-UP PROCEDURE
www.ti.com
Figure 17. Disabling the LDO via Soft-Start Pin
8.10 Turn-Off
Figure 18. Turn-Off
20
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
POWER-UP PROCEDURE
www.ti.com
8.11 Output Noise
Output noise is measured using HP3495A. For details on the setup see “Output Noise Measurement
Setup” document. Plots below shows noise in µV/√Hz vs Frequency.
1RLVH X9¥+]
1
0.1
0.01
10
100
1k
10k
Frequency (Hz)
100k
C004
Figure 19. RMS Noise (10 Hz - 100 kHz) = 19.4113538 µVrms, VIN = 2 V, VOUT = 1.8 V at 0 A.
1RLVH X9¥+]
10
1
0.1
0.01
10
100
1k
10k
Frequency (Hz)
100k
C005
Figure 20. RMS Noise (10 Hz - 100 kHz) = 20.12 µVrms, VIN = 2 V, VOUT = 1.8 V at 0.25 A.
1RLVH X9¥+]
10
1
0.1
0.01
10
100
1k
10k
Frequency (Hz)
100k
C006
Figure 21. RMS Noise (10 Hz - 100 kHz) = 20.26 µVrms, VIN = 2 V, VOUT = 1.8 V at 0.5 A.
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
21
SCHEMATIC AND BILL OF MATERIALS
9
www.ti.com
SCHEMATIC AND BILL OF MATERIALS
The following pages contain the TPS7H1201HTEVM schematic and bill of materials.
22
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
SCHEMATIC AND BILL OF MATERIALS
www.ti.com
1
2
3
4
5
6
TP S7H1201HTEVM
Vin = 2.3V
A
Vin range= 1.5V to 7V
J19 IN_BJ
V
Vout can beadjusted such that Vin > Vout + Vdo
TP7
VIN
U5
LDO_TOP
TPS7H1101_6
6
VIN
TPS7H1101_5 5
VIN
TPS7H1101_4 4
VIN
TPS7H1101_3 3
VIN
TPS7H1101_2 2
EN
TPS7H1101_
10 PS7H1
1
CS 0
101_7
T
7
PCL
TPS7H1101_1 1
J21
CS_SMA
AGND
J24
AGND_BJ
1
SS
2
3
4
5
B
AGND
C1
10uF
DNL
C2
10uF
DNL
C3
10uF
DNL
C4
220uF
TP10
PCL
C60
0.1uF
TP11
SS
LDO_OUT
PG
COMP
VOUT
VOUT
VOUT
VOUT
FB
5
1
2
3
4
6
9
1
1
1
1
1
1
TPS7H1101_9
TPS7H1101_
15
101_11
T
101_12
T
101_13
T
101_14
T
101_16
T
PS7H1
PS7H1
PS7H1
PS7H1
PS7H1
R55
0
R25
50
C34
33uF
DNL
C38
220uF
C56
3.3uF
C39
3.3uF
DNL
J5
B
JMP8
LDO_OUT_CONN
LDO_OUT_PROBE
1
1
2
3
4
1
2
R28
10K
JMP16
RSNS_CONN
C35
2000pF
1
2
3
4
5
C33
47uF
DNL
AGND
2
3
4
5
J2
EN_SMA
C65
3.3uF
DNL
2
3
4
5
R30
49.9K
J27 OU
V T_BJ
1
C57
3.3uF
R27
19.8K
J20
SS_PROBE
1
2
LDO_OUT
J6
LDO_OUT_SMA
C59
0.1uF
AGND
JMP7
TP8 GND
L
LDO_OUT
LDO_OUT_S
DNL
EN_CONN
Vout = 1.8V
Iout = 0.5A (Max)
2
3
4
5
C61
10nF
1
2
C58
1000pF
I2
1
2
3
4
R23
3.65K
E2
R24
20K
R22
20K
C32
10pF
R47
20m
DNL
LDO_RSNS+
LDO_RSNS-
R32
50
R29
DNL
E1
JMP10
VIN_CONN
GND
PAD
2
3
4
5
TP13 DO_OUT
PGOOD
LDO_VIN
1
I1
J7
VIN_SMA
8
17
A
R56
0
TP12 GND
A
J28
AGND_BJ
R26
60.4
DNL
AGND
TP9
A
AGND
C
C
RAD IATION
TESTIN G BOARD M ATTIN G
TPS7H1101_6
6
VIN
TPS7H1101_5 5
VIN
TPS7H1101_4 4
VIN
TPS7H1101_3 3
VIN
TPS7H1101_2 2
EN
TPS7H1101_
10 PS7H1
1
CS 0
101_7
T
7
PCL
TPS7H1101_1 1
PG
COMP
VOUT
VOUT
VOUT
VOUT
FB
5
1
2
3
4
6
9
1
1
1
1
1
1
TPS7H1101_9
TPS7H1101_
15
101_11
T
101_12
T
101_13
T
101_14
T
101_16
T
TPS7H1101_2
PS7H1
PS7H1
PS7H1
PS7H1
PS7H1
TPS7H1101_7
TPS7H1101_1
TPS7H1101_9
TPS7H1101_
16
8
SS
GND
U6
LDO_BOT
CUSTOMER SUPP
LIED
R45
0
R46
0
R49
0
R48
0
R50
0
R51
0
LDO_VIN
1
2
LDO_OUT
3
R52
0
R53
0
R54
0
4
6
8
3
5
6
7
AGND
2
4
AGND
5
AGND
1
7
J1
HDR_1X8_100MIL
DNL
J2
HDR_1X8_100MIL
DNL
8
D
D
Texas Instruments and/or its licensors do notwarrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet thespecifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do notwarrant that the designis production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
1
2
3
4
Number: HREL008
Rev: SVN Rev: Version control disabled
Drawn By:
Engineer: 5
Mod. Date: 9/10/2013
Designed for: PRJ_Customer
Project Title: TPS7H1201HTEVM
SheetTitle: TPS7H1201HTEVM
Assembly Variant: Variant name not interpreted Sheet: 1 of 1
File: TPS7H1201HTEVM.SchDoc
Size: B
Contact: TechSupport
http://www.ti.com
© Texas Instruments
CopyrightYear
6
Figure 22. TPS7H1201HTEVM Schematic
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
TPS7H1201HTEVM User’s Guide
Copyright © 2013, Texas Instruments Incorporated
23
SCHEMATIC AND BILL OF MATERIALS
www.ti.com
Table 4. TPS7H1201HTEVM Bill of Materials
24
Item No.
Qty
Designator
Value
Footprint
Manufacturer
Part No.
Description
1
1
C4
220uF
7260-38
Kemet
T543X227M016ATE035
CAP TANT 220UF 16V 20%
2917
2
2
C32,C61
10nF
0805
Kemet
C0805C103K3RACTU
CAP CER 10000PF 25V 10%
X7R 0805
3
1
C35
2000pF
0805
Kemet
C0805C202J3GACTU
CAP CER 2000PF 25V 5%
NP0 0805
4
1
C38
220uF
7260-38
Kemet
T543X227M016ATE035
CAP TANT 220UF 16V 20%
2917
5
2
C56,C57
3.3uF
2225
MURATA
GRM55DR71H335KA01L
CAP CER 3.3UF 50V 10%
X7R 2220
6
1
C58
1000pF
0805
Kemet
C0805C102J3GACTU
CAP CER 1000PF 25V 5%
NP0 0805
7
2
C59,C60
0.1uF
0805
Kemet
C0805C104K3RACTU
CAP CER 0.1UF 25V 10%
X7R 0805
8
1
J5
Tektronix
131-5031-00
Compact Probe Tip Circuit
Board Test Points, TH
9
1
J6
Emerson
142-0701-231
Connector, TH, SMA, 50 ohms
10
1
J7
Emerson
142-0701-231
Connector, TH, SMA, 50 ohms
11
1
J19
DEM
Manufacturing
571-0500
Standard Banana Jack,
insulated, 10A, red
12
1
J27
DEM
Manufacturing
571-0500
Standard Banana Jack,
insulated, 10A, red
13
1
J20
Tektronix
131-5031-00
Compact Probe Tip Circuit
Board Test Points, TH
14
1
J21
Emerson
142-0701-231
Connector, TH, SMA, 50 ohms
15
1
J22
Emerson
142-0701-231
Connector, TH, SMA, 50 ohms
16
2
J24,J28
DEM
Manufacturing
571-0100
Standard Banana Jack,
insulated, 10A, black
17
1
JMP7
HDR_1X2_TSW
Samtec
TSW-102-07-G-S
CONN HEADER 2POS .100
SGL GOLD"
18
1
JMP8
HDR_1X4_39544
Molex
39544-3004
CONN TERMINAL BLOCK
4POS 5.08MM
19
1
JMP10
HDR_1X4_39544
Molex
39544-3004
CONN TERMINAL BLOCK
4POS 5.08MM
20
1
JMP16
HDR_1X2_TSW
Samtec
TSW-102-07-G-S
CONN HEADER 2POS .100
SGL GOLD"
21
1
R22
20kΩ
1206
Stackpole
RNCP1206FTD20K0
RES 20K OHM 1/2W 1% 1206
SMD
22
1
R23
3.65kΩ
1206
Panasonic
ERJ-8ENF3651V
RES 3.65k, 1/4W, 1%,
100ppm/C 1206
23
1
R24
20kΩ
0805
Stackpole
RNCP0805FTD20K0
RES 20K OHM 1/4W 1% 0805
SMD
24
2
R25,R32
50Ω
0603
Panasonic
ERJ-3EKF49R9V
RES 49.9 OHM 1/10W 1%
0603 SMD
25
1
R27
19.8kΩ
1206
Stackpole
RNCF1206BTE19K8
RES 19.8K OHM 1/8W 0.1%
1206
26
1
R28
10kΩ
1206
Stackpole
RNCS1206BKE10K0
RES 1/8W 10K OHM 0.1%
1206
27
1
R30
49.9kΩ
0805
Stackpole
RMCF0805FT49K9
RES 49.9K OHM 1/8W 1%
0805 SMD
28
11
R45,R46,R48,
R49,R50,R51,
R52,R53,R54,
R55,R56
0Ω
0603
Panasonic
ERJ-3GEY0R00V
RES 0.0 OHM 1/10W 0603
SMD
29
1
TP7
Keystone
5000
Test Point, TH, Miniature, Red
30
1
TP8
Keystone
5000
Test Point, TH, Miniature, Red
31
2
TP9,TP12
Keystone
5001
Test Point, TH, Miniature,
Black
32
1
TP10
Keystone
5000
Test Point, TH, Miniature, Red
33
1
TP11
Keystone
5000
Test Point, TH, Miniature, Red
34
1
TP13
Keystone
5000
Test Point, TH, Miniature, Red
TPS7H1201HTEVM User’s Guide
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
SCHEMATIC AND BILL OF MATERIALS
www.ti.com
Table 4. TPS7H1201HTEVM Bill of Materials (continued)
Item No.
Qty
Designator
35
1
U6
Value
Footprint
Manufacturer
Part No.
Description
CFP (HKS)
Texas
Instruments
TPS7H1201SHKS
IC installed as lid down at the
back of the board
36
37
4
Keystone
2029K-ND
Standoffs
4
Pencom
4-40X1/4PH-PN-MS-SS
38
1
Screws for standoffs
Any
HREL008
39
1
PCB
Brady
THT-13-457-10
Label on the EVM under TI
logo = TPS7H1201HTEVM
40
0
C1,C2,C3
10uF
7260-38_1
Vishay
T95R106K050LSAL
CAP TANT 10UF 50V 10%
2824
41
0
C33
47uF
7260-38
Kemet
T491X476M035AT
CAP TANT 47UF 35V 20%
2917
42
0
C34
33uF
7260-38
Kemet
T491X336K035AT
CAP TANT 33UF 35V 10%
2917
43
0
C39,C65
3.3uF
2225
MURATA
GRM55DR71H335KA01L
CAP CER 3.3UF 50V 10%
X7R 2220
44
0
J1,J2
HDR_1X8_1
00MIL
HDR_1X8_BCS
SAMTEC
BCS-108-F-S-TE
SKT 8 POS 2.54mm Solder ST
Thru-Hole
45
0
R29
DNL
1206
TBD
TBD
TBD
46
0
R26
60.4Ω
2010
Rohm
MCR50JZHF60R4
RES 60.4 OHM 1/2W 1% 2010
SMD
47
0
R47
20mΩ
RES_Y14870R020
00B0R
VISHAY
Y14870R02000B0R
Current sensing chip resistor,
20m OHM, 0.1%
48
0
U5
CFP (HKR)
Texas
Instruments
TPS7H1201SHKR
IC installed as lid up at the top
of the board
HREL008
HREL008-001
SLVU943A – August 2013 – Revised September 2013
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
TPS7H1201HTEVM User’s Guide
25
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS
Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions:
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims
arising from the handling or use of the goods.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from
the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO
BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF
MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH
ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
DAMAGES.
Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This
notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety
programs, please visit www.ti.com/esh or contact TI.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and
therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design,
software performance, or infringement of patents or services described herein.
REGULATORY COMPLIANCE INFORMATION
As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal
Communications Commission (FCC) and Industry Canada (IC) rules.
For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT,
DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer
use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency
interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will
be required to take whatever measures may be required to correct this interference.
General Statement for EVMs including a radio
User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and
power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local
laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this
radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and
unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory
authorities, which is responsibility of user including its acceptable authorization.
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant
Caution
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause
harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the
equipment.
FCC Interference Statement for Class A EVM devices
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to
cause harmful interference in which case the user will be required to correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment
generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause
harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If
this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and
on, the user is encouraged to try to correct the interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
For EVMs annotated as IC – INDUSTRY CANADA Compliant
This Class A or B digital apparatus complies with Canadian ICES-003.
Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the
equipment.
Concerning EVMs including radio transmitters
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this
device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired
operation of the device.
Concerning EVMs including detachable antennas
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain
approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should
be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication.
This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum
permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain
greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.
Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada.
Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de
l'utilisateur pour actionner l'équipement.
Concernant les EVMs avec appareils radio
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est
autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout
brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain
maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à
l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente
(p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante.
Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel
d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans
cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur.
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
【Important Notice for Users of EVMs for RF Products in Japan】
】
This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan
If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product:
1.
2.
3.
Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and
Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of
Japan,
Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this
product, or
Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with
respect to this product. Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note
that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan.
Texas Instruments Japan Limited
(address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan
http://www.tij.co.jp
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】
本開発キットは技術基準適合証明を受けておりません。
本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。
日本テキサス・インスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
http://www.tij.co.jp
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
EVALUATION BOARD/KIT/MODULE (EVM)
WARNINGS, RESTRICTIONS AND DISCLAIMERS
For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished
electrical equipment and not intended for consumer use. It is intended solely for use for preliminary feasibility evaluation in
laboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risks
associated with handling electrical mechanical components, systems and subsystems. It should not be used as all or part of a finished end
product.
Your Sole Responsibility and Risk. You acknowledge, represent and agree that:
1.
2.
3.
4.
You have unique knowledge concerning Federal, State and local regulatory requirements (including but not limited to Food and Drug
Administration regulations, if applicable) which relate to your products and which relate to your use (and/or that of your employees,
affiliates, contractors or designees) of the EVM for evaluation, testing and other purposes.
You have full and exclusive responsibility to assure the safety and compliance of your products with all such laws and other applicable
regulatory requirements, and also to assure the safety of any activities to be conducted by you and/or your employees, affiliates,
contractors or designees, using the EVM. Further, you are responsible to assure that any interfaces (electronic and/or mechanical)
between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to
minimize the risk of electrical shock hazard.
Since the EVM is not a completed product, it may not meet all applicable regulatory and safety compliance standards (such as UL,
CSA, VDE, CE, RoHS and WEEE) which may normally be associated with similar items. You assume full responsibility to determine
and/or assure compliance with any such standards and related certifications as may be applicable. You will employ reasonable
safeguards to ensure that your use of the EVM will not result in any property damage, injury or death, even if the EVM should fail to
perform as described or expected.
You will take care of proper disposal and recycling of the EVM’s electronic components and packing materials.
Certain Instructions. It is important to operate this EVM within TI’s recommended specifications and environmental considerations per the
user guidelines. Exceeding the specified EVM ratings (including but not limited to input and output voltage, current, power, and
environmental ranges) may cause property damage, personal injury or death. If there are questions concerning these ratings please contact
a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the
specified output range may result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or
interface electronics. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the
load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures
greater than 60°C as long as the input and output are maintained at a normal ambient operating temperature. These components include
but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors which can be identified using the
EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during normal operation, please
be aware that these devices may be very warm to the touch. As with all electronic evaluation tools, only qualified personnel knowledgeable
in electronic measurement and diagnostics normally found in development environments should use these EVMs.
Agreement to Defend, Indemnify and Hold Harmless. You agree to defend, indemnify and hold TI, its licensors and their representatives
harmless from and against any and all claims, damages, losses, expenses, costs and liabilities (collectively, "Claims") arising out of or in
connection with any use of the EVM that is not in accordance with the terms of the agreement. This obligation shall apply whether Claims
arise under law of tort or contract or any other legal theory, and even if the EVM fails to perform as described or expected.
Safety-Critical or Life-Critical Applications. If you intend to evaluate the components for possible use in safety critical applications (such
as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, such as devices
which are classified as FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate
Assurance and Indemnity Agreement.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated
工商网监
湘ICP备2023018690号
