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TPS82740ASIPR

TPS82740ASIPR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    µSIP9

  • 描述:

    用于低功耗应用的360 nA IQ MicroIPTM降压转换器模块

  • 数据手册
  • 价格&库存
TPS82740ASIPR 数据手册
Order Now Product Folder Technical Documents Support & Community Tools & Software TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 TPS82740x 360-nA IQ MicroSIPTM Step Down Converter Module for Low Power Applications 1 Features • • • • • • • • • • • • • 1 360-nA Typical Quiescent Current Up to 90% Efficiency at 10-µA Output Current Pin-Selectable Output Voltages in 100-mV Steps Integrated Slew Rate Controlled Load Switch Up to 200-mA Output Current Input Voltage Range VIN from 2.2 V to 5.5 V RF Friendly DCS-Control™ Low Output Voltage Ripple Automatic Transition to No Ripple 100% Mode Discharge Function on VOUT and LOAD Sub 1.1-mm Profile Solution Total Solution Size < 6.7mm2 Small 2.3 mm × 2.9 mm MicroSIP™ Package 2 Applications • • • Bluetooth® Low Energy, RF4CE, Zigbee Wearable Electronics Energy Harvesting TPS82740 DC/DC Converter VIN SW VOUT CIN VSEL2 VSEL3 EN VSEL1 VSEL2 VSEL3 LOAD CTRL Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TPS82740A µSIP 2.30 mm × 2.90 mm TPS82740B µSIP 2.30 mm × 2.90 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. TPS82740B L VOUT up to 200mA COUT GND VSEL1 The output voltage is user selectable by three voltage select pins (VSEL), within a range from 1.8 V to 2.5 V (TPS82740A) and 2.6 V to 3.3 V (TPS82740B) in 100-mV steps. The TPS82740 features low output voltage ripple and low noise. Once the battery voltage comes close to the output voltage (close to 100% duty cycle), the device enters no ripple 100% mode operation preventing an increase of output voltage ripple. In this case the device stops switching and the output is connected to the input voltage. The TPS82740 is available in a small 9-bump 6.7 mm2 MicroSiP™ package. The TPS82740 is the industry's first step-down converter module featuring typically 360-nA quiescent current consumption. It is a complete MicroSIPTM DC/DC step-down power solution intended for ultra low-power applications. The module includes the switching regulator, inductor and input/output capacitors. The integration of all required passive components enables a tiny solution size of only 6.7 mm2. Figure 1. Typical Application ENABLE The device operates from rechargeable Li-Ion batteries, Li-primary battery chemistries such as LiSOCl2, Li-MnO2 and two or three cell alkaline batteries. The input voltage range up to 5.5 V also allows operation from an USB port and thin-film solar modules. The integrated slew rate controlled load switch with a typical ON-resistance of 0.6Ω distributes the selected output voltage to a temporarily used sub-system. 3 Description VIN 2.2 V to 5.5 V This new DCS-Control™ based device extends the light load efficiency range below 10-µA load currents. It supports output currents up to 200 mA. Switched Supply RON = 0.6Ω Control for Switched Supply Rail TPS82740 extends light load efficiency range down to 10mA output current Current TM DCS-Control topology VIN = 3.6V VOUT = 3.3V GND 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 9 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 4 7.1 Absolute Maximum Ratings ..................................... 7.2 ESD Ratings ............................................................ 7.3 Recommended Operating Conditions...................... 7.4 Thermal Information .................................................. 7.5 Electrical Characteristics.......................................... 7.6 Typical Characteristics .............................................. 4 4 4 5 5 6 Parameter Measurement Information ................ 14 Detailed Description ............................................ 15 9.1 Overview ................................................................. 15 9.2 Functional Block Diagram ....................................... 15 9.3 Feature Description................................................. 15 9.4 Device Functional Modes........................................ 17 10 Application and Implementation........................ 20 10.1 Application Information.......................................... 20 10.2 Typical Application ............................................... 20 11 Power Supply Recommendations ..................... 23 12 Layout................................................................... 23 12.1 Layout Guidelines ................................................. 23 12.2 Layout Example .................................................... 23 12.3 Surface Mount Information.................................... 24 13 Device and Documentation Support ................. 25 13.1 13.2 13.3 13.4 Documentation Support ....................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 25 25 25 25 14 Mechanical, Packaging, and Orderable Information ........................................................... 25 14.1 Tape and Reel Information ................................... 26 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (June 2014) to Revision A • 2 Page Added 150 mA Typical current specification for ILIM_softstart, Low side MOSFET switch current limit...................................... 6 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 5 Device Comparison Table PART NUMBER OUTPUT VOLTAGE SETTINGS (VSEL1, VSEL2, VSEL3) PACKAGE MARKING TPS82740A 1.8V to 2.5V in 100mV steps E7 TPS82740B 2.6V to 3.3V in 100mV steps E8 6 Pin Configuration and Functions MicroSIP™ 9 Bump (TOP VIEW) (BOTTOM VIEW) VSEL2 VSEL2 VSEL3 A1 LOAD B1 VOUT C1 VSEL1 A3 VSEL1 B2 B3 EN EN C2 C3 VIN VIN A2 GND CTRL A2 A1 VSEL3 B3 B2 B1 LOAD C3 C2 C1 VOUT A3 CTRL GND Pin Functions PIN I/O DESCRIPTION NAME NO VIN C3 IN GND C2 - CTRL B2 IN CTRL pin controls the LOAD output pin. With CTRL = low, the LOAD output is disabled. This pin must be terminated and not left floating. VOUT C1 OUT Output voltage pin of the module. An internal load switch is connected between VOUT pin and LOAD pin. LOAD B1 OUT Load switch output pin controlled by the CTRL pin. With CTRL = high, an internal load switch connects the LOAD pin to the VOUT pin. The LOAD pin allows connect / disconnect other system components to the output of the DC/DC converter. This pin is pulled to GND with the CTRL pin = low. The LOAD pin features soft switching. If not used, leave the pin open. VSEL3 A1 IN VSEL2 A2 IN Output voltage selection pins. See Table 1 and Table 2 for VOUT selection. These pins must be terminated and can be changed during operation. VSEL1 A3 IN EN B3 IN Input voltage supply pin of the module. Ground terminal. High level enables the devices and low level turns the device into shutdown mode. This pin must be terminated and not left floating. Table 1. Output Voltage Setting TPS82740A Device TPS82740A VOUT VSEL3 VSEL2 VSEL1 1.8 0 0 0 1.9 0 0 1 2.0 0 1 0 2.1 0 1 1 2.2 1 0 0 2.3 1 0 1 2.4 1 1 0 2.5 1 1 1 Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com Table 2. Output Voltage Setting TPS82740B Device TPS82740B VOUT VSEL3 VSEL2 VSEL1 2.6 0 0 0 2.7 0 0 1 2.8 0 1 0 2.9 0 1 1 3.0 1 0 0 3.1 1 0 1 3.2 1 1 0 3.3 1 1 1 7 Specifications Absolute Maximum Ratings (1) 7.1 Over operating free-air temperature range (unless otherwise noted) VALUE UNIT MIN MAX VIN –0.3 6 V EN, CTRL, VSEL1, VSEL2, VSEL3 –0.3 VIN +0.3V V VOUT, LOAD –0.3 3.7 V -40 85 °C Operating junction temperature TJ -40 125 °C Storage temperature, Tstg –55 125 Pin voltage (2) Operating ambient temperature range, TA (3) (1) (2) (3) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal GND. In applications where ambient temperature (TA) constantly stays above 70°C, the product life time might degrade. MLCC capacitor reliability and lifetime is depending on temperature and applied voltage conditions. At higher temperatures, MLCC capacitors are subject to stronger stress. The most critical parameter is the Insulation Resistance (IR) resulting in leakage current. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN VIN Supply voltage VIN IOUT + ILOAD Device output current (sum of IOUT and ILOAD) 2.2 NOM MAX V VOUTnom + 0.7V ≤ VIN ≤ 5.5V 200 mA VOUTnom ≤ VIN ≤ VOUTnom +0.7V 100 ILOAD Load current (current from LOAD pin) COUT Additional output capacitance connected to VOUT pin (not including LOAD pin) 10 CLOAD Capacitance connected to LOAD pin 10 TJ Operating junction temperature range -40 90 TA Operating ambient temperature range -40 85 4 Submit Documentation Feedback UNIT 5.5 100 µF °C Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 7.4 Thermal Information TPS82740 THERMAL METRIC (1) µSIP UNIT 9 PINS RθJA Junction-to-ambient thermal resistance 83 RθJC(top) Junction-to-case (top) thermal resistance 53 RθJB Junction-to-board thermal resistance - ψJT Junction-to-top characterization parameter - ψJB Junction-to-board characterization parameter - RθJC(bot) Junction-to-case (bottom) thermal resistance - (1) °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 7.5 Electrical Characteristics VIN = 3.6V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VIN Input voltage range Operating quiescent current IQ ISD Shutdown current 2.2 360 EN = VIN, IOUT = 0mA, CTRL = GND, VOUT = 1.8V device switching 460 EN = VIN, IOUT = 0mA, CTRL = GND, VOUT = 2.6V, device switching 500 EN = VIN, IOUT = 0mA., CTRL = VIN, VOUT = 1.8V, device not switching 12.5 EN = VIN, IOUT = 0mA., CTRL = VIN, VOUT = 2.6V, device not switching 13.5 VTH_UVLO- Undervoltage lockout threshold V 2300 nA µA EN = GND, shutdown current into VIN 70 EN = GND, shutdown current into VIN, TA = 60°C VTH_UVLO+ 5.5 EN = VIN, CTRL = GND, IOUT = 0µA, VOUT = 1.8V / 2.6V, device not switching nA 150 Rising VIN 2.075 2.15 Falling VIN 1.925 2 V INPUTS EN, CTRL, VSEL 1-3 High level input threshold 2.2V ≤ VIN ≤ 5.5V VIL TH Low level input threshold 2.2V ≤ VIN ≤ 5.5V IIN Input bias Current TA = 25°C 10 TA = –40°C to 85°C 25 VIH TH 1.1 0.4 V V nA POWER SWITCHES ILIMF High side MOSFET switch current limit Low side MOSFET switch current limit 430 mA 2.2V ≤ VIN ≤ 5.5V mA 430 OUTPUT DISCHARGE SWITCH (VOUT) RDSCH_VOUT MOSFET onresistance EN = GND, IOUT = -10mA into VOUT pin 30 IIN_VOUT Bias current into VOUT pin EN = VIN, VOUT = 2V / 2.8V, CTRL = GND RLOAD High side MOSFET on-resistance ILOAD = 50mA, CTRL = VIN, VOUT = 2.0V / 2.8V, 2.2 V ≤ VIN ≤ 5.5V RDSCH_LOAD Low side MOSFET on-resistance CTRL = GND, 2.2V ≤ VIN ≤ 5.5V, ILOAD = - 10mA TA = 25°C 40 TA = –40°C to 85°C 65 660 1570 Ω nA LOAD OUTPUT (LOAD) VLOAD rise time tRise_LOAD Copyright © 2014, Texas Instruments Incorporated Starting with CTRL low to high transition, time to ramp VLOAD from 0V to 95%, VOUT = 1.8V / 2.6V, 2.2V ≤ VIN ≤ 5.5V, ILOAD = 1mA, TA = 25°C 0.6 1.25 30 65 315 800 Submit Documentation Feedback Ω µs 5 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com Electrical Characteristics (continued) VIN = 3.6V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 170 250 340 mV 110 200 280 10 25 ms 400 1200 µs 150 200 AUTO 100% MODE TRANSITION VTH_100+ Auto 100% Mode exit detection threshold (1) Rising VIN,100% Mode is left with VIN = VOUT + VTH_100+ , max value at TJ = 85°C VTH_100- Auto 100% Mode enter detection threshold (1) Falling VIN, 100% Mode is entered with VIN = VOUT + VTH_100-, max value at TJ = 85°C OUTPUT tStartup_delay Regulator start up delay time From transition EN = low to high until device starts switching tSoftstart Softstart time with reduced switch current limit 2.2V ≤ VIN ≤ 5.5V, EN = VIN High side MOSFET switch current limit ILIM_softstart Low side MOSFET switch current limit VVOUT (1) 80 Reduced switch current limit during softstart mA 150 Output voltage range Output voltages are selected with pins VSEL1, VSEL2, VSEL3 TPS82740A 1.8 2.5 TPS82740B 2.6 3.3 Output voltage accuracy IOUT = 10mA, VOUT = 1.8V / 2.6V -2.5 0 2.5 IOUT = 100mA, VOUT = 1.8V / 2.6V –2 0 2 DC output voltage load regulation VOUT = 1.8V / 2.6V, CTRL = VIN DC output voltage line regulation VOUT = 1.8V / 2.6V, CTRL = VIN, IOUT = 10 mA, 2.5V ≤ VIN ≤ 5.5V 0.001 V % %/mA 0 %/V VIN is compared to the programmed output voltage (VOUT). When VIN–VOUT falls below VTH_100- , the device enters 100% Mode by turning the high side MOSFET on. 100% Mode is exited when VIN–VOUT exceeds VTH_100+ and the device starts switching. The hysteresis for the 100% Mode detection threshold VTH_100+ - VTH_100- is always positive and 50 mV(typ.) 7.6 Typical Characteristics TABLE OF GRAPHS FIGURE η Efficiency vs Output Current Figure 4, Figure 5, Figure 6, Figure 7 η Efficiency vs Input Voltage Figure 8, Figure 9, Figure 10, Figure 11 VOUT Output voltage vs Output curent Figure 12, Figure 13, Figure 14, Figure 15 IQ Operating quiescent current vs Input voltage Figure 2 ISD Shutdown current vs Input voltage Figure 3 Automatic Transition into 100% Mode FSW Switching frequency Line and Load Transient Performance AC load regulation performance LOAD 6 Figure 19, Figure 20, Figure 21 vs Output current Figure 16, Figure 17, Figure 18 Figure 22, Figure 23, Figure 24, Figure 25, Figure 26, Figure 27, Figure 28, Figure 29, Figure 30, Figure 31 Figure 32, Figure 33 LOAD Output Behavior Figure 34, Figure 35, Figure 36 Input Voltage Ramp up / down Figure 37, Figure 38, Figure 39, Figure 40 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 Typical Characteristics (continued) 200 1000 TA = -40C TA = 25C TA = 60C TA = 85C 800 TA = -40C TA = 25C TA = 60C TA = 85C 180 Shutdown Current ISD (nA) Quiescent Current IQ (nA) 900 700 600 500 400 300 200 160 140 120 100 80 60 40 20 100 0 2.0 2.5 EN = VIN Device not switching 3.0 3.5 4.0 4.5 Input Voltage VIN (V) 5.0 0 2.0 5.5 2.5 D019 CTRL = GND 3.0 3.5 4.0 4.5 Input Voltage VIN (V) 5.0 5.5 D020 EN = GND Figure 2. TPS82740 Quiescent Current IQ 95 90 90 85 85 80 80 Efficiency (%) Efficiency (%) Figure 3. TPS82740 Shutdown current ISD 95 75 70 65 60 VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V 55 50 45 40 0.001 0.01 0.1 1 Output Current (mA) 10 75 70 65 60 50 45 40 0.001 100 300 0.1 1 Output Current (mA) 10 100 300 D009 CTRL = GND Figure 4. TPS82740A Efficiency VOUT = 1.8V Figure 5. TPS82740A Efficiency VOUT = 2.1V 100 100 95 95 90 90 85 85 80 Efficiency (%) Efficiency (%) 0.01 D008 CTRL = GND 75 70 65 VIN = 3.0V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V 60 55 50 45 0.001 VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V 55 0.01 0.1 1 Output Current (mA) 10 Figure 6. TPS82740B Efficiency VOUT = 2.6V Copyright © 2014, Texas Instruments Incorporated 75 70 65 60 55 VIN = 3.6V VIN = 4.2V VIN = 5.0V 50 100 300 CTRL = GND 80 45 0.001 0.01 D001 0.1 1 Output Current (mA) 10 100 300 D002 CTRL = GND Figure 7. TPS82740B Efficiency VOUT = 3.3V Submit Documentation Feedback 7 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) Typical Characteristics (continued) 60 50 IOUT = 1PA IOUT = 2PA IOUT = 5PA IOUT = 10PA IOUT = 100PA IOUT = 1mA IOUT = 10mA IOUT = 200mA 40 30 20 10 0 2.0 2.5 3.0 3.5 4.0 4.5 Input Voltage VIN (V) 60 50 IOUT = 1PA IOUT = 2PA IOUT = 5PA IOUT = 10PA IOUT = 100PA IOUT = 1mA IOUT = 10mA IOUT = 200mA 40 30 20 10 5.0 0 2.0 5.5 CTRL = GND 90 90 80 80 70 70 60 IOUT = 1PA IOUT = 2PA IOUT = 5PA IOUT = 10PA IOUT = 100PA IOUT = 1mA IOUT = 10mA IOUT = 200mA 30 20 10 0 2.5 5.0 5.5 D011 3.0 3.5 4.0 4.5 Input Voltage VIN (V) 60 50 IOUT = 1PA IOUT = 2PA IOUT = 5PA IOUT = 10PA IOUT = 100PA IOUT = 1mA IOUT = 10mA IOUT = 200mA 40 30 20 10 5.0 0 3.5 5.5 4.0 D004 CTRL = GND 4.5 Input Voltage VIN (V) 5.0 5.5 D003 CTRL = GND Figure 10. TPS82740B Efficiency VOUT = 2.6V Figure 11. TPS82740B Efficiency VOUT = 3.3V 1.85 2.16 1.84 2.15 2.14 1.83 Output Voltage VOUT (V) Output Voltage VOUT (V) 3.5 4.0 4.5 Input Voltage VIN (V) Figure 9. TPS82740A Efficiency VOUT = 2.1V 100 Efficiency (%) Efficiency (%) Figure 8. TPS82740A Efficiency VOUT = 1.8V 40 3.0 CTRL = GND 100 50 2.5 D010 1.82 1.81 1.80 1.79 1.78 VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V 1.77 1.76 1.75 0.001 0.01 0.1 1 10 Output Current IOUT (mA) 2.13 2.12 2.11 2.10 2.09 2.08 VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V 2.07 2.06 2.05 100 300 D012 2.04 0.001 0.01 0.1 1 10 Output Current IOUT (mA) 100 300 D013 CTRL = GND Figure 12. TPS82740A Output voltage VOUT = 1.8V 8 Submit Documentation Feedback Figure 13. TPS82740A Output voltage VOUT = 2.1V Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 3.40 2.67 2.66 2.65 2.64 2.63 2.62 2.61 2.60 2.59 2.58 2.57 2.56 2.55 2.54 2.53 2.52 0.001 3.38 Output Voltage VOUT (V) Output Voltage VOUT (V) Typical Characteristics (continued) VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5.0V 0.01 3.36 3.34 3.32 3.30 3.28 3.26 3.24 3.20 0.001 0.1 0.2 0.5 1 2 3 5 10 20 50 100 300 Output Current IOUT (mA) D014 CTRL = GND 0.1 1 10 Output Current IOUT (mA) 100 300 D015 Figure 15. TPS82740B Output voltage VOUT = 3.3V 1800 1800 1600 1600 Switching Frequency (kHz) Switching Frequency (kHz) 0.01 CTRL = GND Figure 14. TPS82740B Output voltage VOUT = 2.6V 1400 1200 1000 800 600 VIN = 2.5V VIN = 3.0V VIN = 3.6V VIN = 4.2V VIN = 5.0V 400 200 1400 1200 1000 800 600 VIN = 2.7V VIN = 3.0V VIN = 3.6V VIN = 4.2V VIN = 5.0V 400 200 0 0 0 20 40 60 80 100 120 140 Output Current (mA) 160 180 200 0 2.50 1600 2.45 Output Voltage VOUT (V) 1400 1200 1000 800 600 VIN = 3.6V VIN = 4.2V VIN = 5.0V 200 20 40 60 80 100 120 140 Output Current (mA) 160 180 200 D018 Figure 18. TPS82740B switching frequency VOUT = 3.0V Copyright © 2014, Texas Instruments Incorporated 60 80 100 120 140 Output Current (mA) 160 180 200 D017 IOUT = 10mA, rising V IN IOUT = 10mA, falling V IN IOUT = 50mA, rising V IN IOUT = 50mA, falling V IN IOUT = 100mA, rising V IN IOUT = 100mA, falling V IN 2.40 2.35 2.30 2.25 2.20 2.15 2.10 2.05 0 0 40 Figure 17. TPS82740A Switching frequency VOUT = 2.1V 1800 400 20 D016 Figure 16. TPS82740A Switching frequency VOUT = 1.8V Switching Frequency (kHz) VIN = 3.6V VIN = 4.2V VIN = 5.0V 3.22 2.00 2.20 2.25 2.30 2.35 2.40 2.45 Input Voltage V IN (V) 2.50 2.55 D005 Figure 19. TPS82740A 100% Mode Transition VOUT = 2.1V Submit Documentation Feedback 9 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com Typical Characteristics (continued) 2.90 2.80 2.75 3.65 Output Voltage VOUT (V) Output Voltage VOUT (V) 2.85 3.70 IOUT = 10mA, rising V IN IOUT = 10mA, falling V IN IOUT = 50mA, rising V IN IOUT = 50mA, falling V IN IOUT = 100mA, rising V IN IOUT = 100mA, falling V IN 2.70 2.65 2.60 2.55 3.55 3.50 3.45 3.40 3.35 3.30 2.50 3.25 2.45 2.45 3.20 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60 3.65 3.70 Input Voltage V IN (V) D007 2.50 2.55 2.60 2.65 2.70 2.75 Input Voltage V IN (V) 2.80 2.85 2.90 D006 Figure 20. TPS82740A 100% Mode Transition VOUT = 2.5V VIN = 3.6V VOUT = 1.8V CTRL = GND Load step at VOUT IOUT = 50mA to 10mA Figure 22. TPS82740A Load Transient Response VOUT = 1.8V VIN = 3.6V VOUT = 2.6V CTRL = GND Load step at VOUT IOUT = 50mA to 10mA Figure 24. TPS82740B Load Transient Response VOUT = 2.6V 10 3.60 IOUT = 10mA, rising V IN IOUT = 10mA, falling V IN IOUT = 50mA, rising V IN IOUT = 50mA, falling V IN IOUT = 100mA, rising V IN IOUT = 100mA, falling V IN Submit Documentation Feedback Figure 21. TPS82740B 100% Mode Transition VOUT = 3.3V VIN = 3.6V VOUT = 1.8V CTRL = VIN Load step at VOUT IOUT = 0.5mA to 150mA Figure 23. TPS82740A Load Transient Response VOUT = 1.8V VIN = 3.6V VOUT = 2.6V CTRL = VIN Load step at VOUT IOUT = 0.5mA to 150mA Figure 25. TPS82740B Load Transient Response VOUT = 2.6V Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 Typical Characteristics (continued) VIN = 3.6V VOUT = 1.8V CTRL = GND Load step at VOUT IOUT = 0mA to 100mA 1ms rise/fall time 70ms / 10ms Figure 26. TPS82740A Load Transient Response VOUT = 1.8V VIN = 3.6V VOUT = 2.6V CTRL = GND Load step at VOUT 0mA to 100mA 1ms rise/fall time 70ms / 10ms Figure 28. TPS82740B Load Transient Response VOUT = 2.6V VIN = 3.6V / 4.2V VOUT = 2.1 V IOUT = 10mA CTRL = GND Figure 30. TPS82740A Line Transient Response IOUT = 10mA Copyright © 2014, Texas Instruments Incorporated VIN = 3.6V VOUT = 1.8V CTRL = VIN Load step at VOUT 0mA to 100mA 1ms rise/fall time 70ms / 10ms Figure 27. TPS82740A Load Transient Response VOUT = 1.8V VIN = 3.6V VOUT = 2.6V CTRL = VIN Load step at VOUT 0mA to 100mA 1ms rise/fall time 70ms / 10ms Figure 29. TPS82740B Load Transient response VOUT = 2.6V VIN = 3.6V / 4.2V VOUT = 2.1 V IOUT = 100mA CTRL = GND Figure 31. TPS82740A Line Transient Response IOUT = 100mA Submit Documentation Feedback 11 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com Typical Characteristics (continued) VIN = 3.6V VOUT = 2.6V IOUT = 50mA to 200mA CTRL = GND VIN = 3.6V VOUT = 1.8V IOUT = 50mA to 200mA CTRL = GND Figure 32. TPS82740A AC Load Sweep VOUT = 1.8V VIN = 3.6V VOUT = VLOAD = 1.8 V ILOAD = 0 to 50mA IOUT = 0mA CTRL = VIN VIN = 3.6V VOUT = VLOAD = 2.6V ILOAD = 0 to 50mA IOUT = 0mA CTRL = VIN Figure 34. TPS82740A Load Step at LOAD Output VIN = 3.6V VOUT = 2.6V IOUT = 0mA ILOAD = 0mA CLOAD = 10mF controlled slew rate Submit Documentation Feedback Figure 35. TPS82740B Load Step at LOAD Output VIN ramp up/down 0V to 5V in 150ms VOUT = 1.8V ROUT = 50W CTRL = GND VLOAD discharged Figure 36. TPS82740B Load Output ON / OFF 12 Figure 33. TPS82740B AC Load Sweep VOUT = 2.6V Figure 37. TPS82740A Input Voltage Ramp Up / Down Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 Typical Characteristics (continued) VIN ramp up/down 0V to 5V in 150ms VOUT = 2.6V ROUT = 50W CTRL = GND VIN ramp up/down 0V to 5V in 150ms VOUT = 3.3V ROUT = 50W CTRL = GND 100% mode operation High side MOS-FET turned on 100% mode operation High side MOS-FET turned on Figure 38. TPS82740B Input Voltage Ramp Up / Down Figure 39. TPS82740B Input Voltage Ramp Up / Down VIN ramp up/down 2.8V to 3.7V VOUT = 3.0V ROUT = 50W CTRL = GND High side MOSFET turned on 100% Mode Exit / Enter Figure 40. TPS82740B Enter / Exit 100% Mode Operation Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 13 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com 8 Parameter Measurement Information TPS82740 DC/DC Converter VIN 2.2 V to 5.5 V VIN SW VOUT L VOUT up to 200mA GND ENABLE LOAD EN VSEL1 VSEL1 VSEL2 VSEL2 VSEL3 VSEL3 Switched Supply Rail CLOAD 10mF CTRL Control for Switched Supply Rail GND 14 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 9 Detailed Description 9.1 Overview The TPS82740 is the first fully integrated step down converter module with an ultra low quiescent current consumption (360nA typ.) while maintaining a regulated output voltage and featuring TI's DCS-Control™ topology. The device extends high efficiency operation to output currents down to a few micro amperes. 9.2 Functional Block Diagram CTRL ENABLE Ultra Low Power Reference VREF = 1.2V UVLO Softstart VOUT VSEL1 Load Switch Internal UVLO VFB feedback Comp divider network VIN (typ. 50MW) VTH_UVLO VSEL2 VSEL3 UVLO VIN VOUT Min. On CTRL Auto 100% Mode Comp 100% Mode Slew Rate Control LOAD EN VIN UVLO Discharge VTH_100 Current Limit Comparator Timer DCS Control VOUT Discharge EN UVLO Limit High Side Power Stage VIN PMOS Min. OFF VOUT Direct Control & Compensation EN Control Logic L Gate Driver Anti Shoot-Through VOUT VFB VREF Error amplifier Main Comparator Limit Low Side NMOS Current Limit Comparator GND 9.3 Feature Description 9.3.1 DCS-Control™ TI's DCS-Control™ (Direct Control with Seamless Transition into Power Save Mode) is an advanced regulation topology, which combines the advantages of hysteretic and voltage mode control. Characteristics of DCSControl™ are excellent AC load regulation and transient response, low output ripple voltage and a seamless transition between PFM and PWM mode operation. DCS-Control™ includes an AC loop which senses the output voltage (VOUT pin) and directly feeds the information to a fast comparator stage. This comparator sets the switching frequency, which is constant for steady state operating conditions, and provides immediate response to dynamic load changes. In order to achieve accurate DC load regulation, a voltage feedback loop is used. The DCS-Control™ topology supports PWM (Pulse Width Modulation) mode for medium and high load conditions and Power Save Mode at light loads. During PWM mode, it operates in continuous conduction. The switching frequency goes up to 1.7MHz with a controlled frequency variation depending on the input voltage. If the load current decreases, the converter seamlessly enters Power Save Mode to maintain high efficiency down to very light loads. In Power Save Mode, the switching frequency varies nearly linearly with the load current. Since DCS-Control™ supports both operation modes within one single building block, the transition from PWM to Power Save Mode is seamless without effects on the output voltage. The TPS82740 offers both excellent DC Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 15 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com Feature Description (continued) voltage and superior load transient regulation, combined with very low output voltage ripple, minimizing interference with RF circuits. At high load currents, the converter operates in quasi fixed frequency PWM mode operation and at light loads in PFM (Pulse Frequency Modulation) mode to maintain highest efficiency over the full load current range. In PFM Mode, the device generates a single switching pulse to ramp up the inductor current and recharge the output capacitor, followed by a sleep period where most of the internal circuits are shutdown to achieve the lowest quiescent current. During this time, the load current is supported by the output capacitor. The duration of the sleep period depends on the load current and the inductor peak current. During the sleep periods, the quiescent current of the TPS82740 is reduced to 360nA. This low quiescent current consumption is achieved by an ultra low power voltage reference, an integrated high impedance (typ. 50MΩ) feedback divider network and an optimized DCS-Control™ block. 9.3.2 LOAD Switch The LOAD pin can be used to power an additional, temporarily used sub-system. If the CTRL pin is set high, the LOAD pin is connected to the VOUT pin via an integrated load switch. The load switch is slew rate controlled to support soft switching and not impacting the regulated output VOUT. If the CTRL pin is set to low, the LOAD pin is disconnected from the VOUT pin and internally connected to GND by an internal discharge switch. The CTRL pin can be controlled by a micro controller and must be terminated. With CTRL pin high, the quiescent current is increased to improve the transient response. 9.3.3 Output Voltage Selection (VSEL1, VSEL2, VSEL3) The TPS82740 provides an integrated, high impedance (typ. 50MΩ) feedback resistor divider network which is programmed by the pins VSEL1-3. The TPS82740A supports an output voltage range of 1.8V to 2.5V in 100mV steps, while the TPS82740B supports an output voltage range from 2.6V to 3.3V in 100mV steps. The output voltage can be changed during operation and supports a simple dynamic output voltage scaling, shown in Figure 46. The output voltage is programmed according to Table 1 and Table 2. 9.3.4 Output Discharge Function (VOUT and LOAD) Both the VOUT pin and the LOAD pin feature a discharge circuit to connect each rail to GND, once they are disabled. This feature prevents residual charge voltages on capacitors connected to these pins, which may impact proper power up of the main- and sub-system. With the CTRL pin pulled low, the discharge circuit at the LOAD pin activates. With the EN pin pulled low, the discharge circuit at the pin VOUT activates. 9.3.5 Internal Current Limit The TPS82740 integrates a current limit in the high side, as well as in the low side MOSFETs to protect the device against overload or short circuit conditions. The peak current in the switches is monitored cycle by cycle. If the high side MOSFET current limit is reached, the high side MOSFET is turned off and the low side MOSFET is turned on until the current decreases below the low side MOSFET current limit. Table 3. Load Pin Condition Table Pin condition Operating condition Remark LOAD EN CTRL VIN Connected to VOUT high high > VUVLO load switch enabled and slew rate controlled high low > VUVLO load switch turned off low high or low > VUVLO device and load switch disabled high high < VUVLO device disabled due to UVLO Connected to GND 16 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 9.3.6 CTRL / DVS (Dynamic Voltage Scaling TPS62741) In TPS62741, the CTRL pin controls beside the load switch as well Dynamic Voltage Scaling. The CTRL pin selects between two different voltage setting banks. The voltage of each bank are set with the VSEL pins 1-4 according to . The output LOAD is controlled with the CTRL pin. The pin is internally connected either to VOUT pin or GND and can be used to power up/down temporarily used external circuits to reduce leakage current consumption of the system. 9.4 Device Functional Modes 9.4.1 Enable / Shutdown The TPS82740 is activated when the EN pin is set high. For proper operation, the pin must be terminated and must not be left floating. With the EN pin set low, the device enters shutdown mode with less than typ. 70nA current consumption. 9.4.2 Soft Start When the device is enabled, the internal reference is powered up and after the startup delay time tStartup_delay has expired, the device enters softstart, starts switching and ramps up the output voltage. During softstart, the device operates with a reduced current limit, ILIM_softstart, of typ. 1/3 of the nominal current limit. This reduced current limit is active during the time tSoftstart. The current limit is increased to its nominal value, ILIMF, once this time has expired or the nominal output voltage is reached. 9.4.3 POWER GOOD OUTPUT (PG) The Power Good comparator features an open drain output. The PG comparator is active with EN pin set to high and VIN is above the threshold VTH_UVLO+. It is driven to high impedance once VOUT trips the threshold VTH_PG+ for rising VOUT. The output is pulled to low level once VOUT falls below the PG hysteresis, VPG_hys. The output is also pulled to low level in case the input voltage VIN falls below the undervoltage lockout threshold VTH_UVLO- or the device is disabled with EN = low. The power good output (PG) can be used as an indicator for the system to signal that the converter has started up and the output voltage is in regulation. Table 4. PG condition table Pin condition Operating condition EN CTRL hiz high high don't care > VUVLO VOUT > VTH_PG+ PG comparator active, pull up resistor pulls PG to high hiz high low medium load (> 1mA) > VUVLO VOUT > VTH_PG+ PG comparator active, pull up resistor pulls PG to high VOUT light load (< 1mA) > VUVLO VOUT > VTH_PG+ don't care 0mA < IOUT < 100mA > VUVLO VOUT < VTH_PG- startup, overload or ramp down don't care output disabled VIN > 1.2V high low low high low low high VIN PG comparator disabled for low Iq operation, pull up resistor pulls PG to high hiz low IOUT / ILOAD Remark PG don't care output disabled < VUVLO VOUT = 0 VOUT not present device disabled device disabled, due to UVLO Table 5. VOUT Output Discharge Condition Table EN VIN condition connected to GND, output discharged VOUT pin low 1.5V < VIN < VUVLO connected to GND, output discharged high < VUVLO Copyright © 2014, Texas Instruments Incorporated remark Submit Documentation Feedback 17 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com Table 5. VOUT Output Discharge Condition Table (continued) VOUT pin hiz, discharge switch disabled 18 Submit Documentation Feedback EN high VIN condition remark > VUVLO during regulator start up, the discharge switch is enabled and VOUT pulled to low, until the regulator start up time tStart expires. During the softstart time and later, the discharge switch is disabled. Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 9.4.4 Automatic Transition into 100% Mode Once the input voltage comes close to the output voltage, the TPS82740 stops switching and enters 100% duty cycle operation. It connects the output VOUT via the inductor and the internal high side MOSFET switch to the input VIN, once the input voltage VIN falls below the 100% mode enter threshold, VTH_100-. In 100% mode switching stops eliminating output voltage ripple. Because the output is connected to the input, the output voltage tracks the input voltage minus the voltage drop across the internal high side switch and the inductor caused by the output current. Once the input voltage increases and trips the 100% mode exit threshold, VTH_100+ , the TPS82740 turns on and starts switching again. See Figure 41, Figure 19, Figure 20 and Figure 21. VIN VIN, VOUT 100% Mode 100% Mode VTH_100+ VTH_100VOUT tracks VIN Step Down Operation VOUT tracks VIN VUVLO+ VUVLOVOUT discharge tsoftstart Figure 41. Automatic Transition into 100% Mode Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 19 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com 10 Application and Implementation 10.1 Application Information The device is designed to operate from an input voltage supply range between 2.2V and 5.5V with a maximum output current of 200mA. Once the input voltage comes close to the output voltage, the DC/DC converter stops switching and enters 100% duty cycle operation. The integrated slew rate controlled load switch can distribute the selected output voltage to a temporarily used sub-system. The TPS82740 module operates in PWM mode for medium and high load conditions and in power save mode at light load currents. At high load currents, the converter operates in quasi fixed frequency PWM mode operation. The switching frequency is up to 1.7MHz with a controlled frequency variation depending on the input voltage. If the load current decreases, the converter seamlessly enters Power Save Mode by varying the switching frequency linearly to maintain high efficiency over the full load current range. At very light load conditions the device generates a single switching pulse to ramp up the inductor current and recharge the output capacitor, followed by a sleep period where most of the internal circuits are shutdown to achieve 360nA quiescent current consumption. 10.2 Typical Application TPS82740 DC/DC Converter VIN 2.2 V ... 5.5 V VIN L LCD Display + Driver Main Supply SW VOUT GND ENABLE ADC Control Subsystem CTRL EN VSEL1 VSEL1 VSEL2 VSEL2 VSEL3 VSEL3 MCU Switched Supply LOAD Radio SOC GND Acceleration Sensor Electronic Compass Temperature Sensor Figure 42. Example of Implementation in a SOC Based System 10.2.1 Design Requirements TPS82740 is a complete step-down converter module including all passive components (inductor, input and output capacitor). For most applications no additional input / output capacitors are required. Use the following typical application design procedure to select additional external components in case further performance improvement of the module is desired. 10.2.2 Detailed Design Procedure 10.2.2.1 Input Capacitor Selection For most applications, the integrated input capacitor at the VIN pin is sufficient. 20 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 Typical Application (continued) TPS82740 uses a tiny ceramic input capacitor. When a ceramic capacitor is combined with trace or cable inductance, such as that from a wall adapter, a load step at the output can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or can even damage the module. In this circumstance, additional ceramic 'bulk" capacitance, such as electrolytic or tantalum, should be placed between the input of the module and the power source lead to reduce ringing that occurs between the inductance of the power source leads and the module. 10.2.2.1.1 Input Buffer Capacitor Selection In addition to the small ceramic input capacitor a larger buffer capacitor CBuf is recommended to reduce voltage drops and ripple voltage. When using battery chemistries like Li-SOCl2, Li-SO2, Li-MnO2, the impedance of the battery has to be considered. These battery types tend to increase their impedance depending on discharge status and often can support output currents of only a few mA. Therefore a buffer capacitor is recommended to stabilize the battery voltage during DC/DC operations e.g. for a RF transmission. A voltage drop on the input of the TPS82740 during DC/DC operation impacts the advantage of the step down conversion for system power reduction. Furthermore the voltage drops can fall below the minimum recommended operating voltage of the device and leads to an early system cut off. Both effects reduce the battery life time. To achieve best performance and to extract the most energy out of the battery a good procedure is to select the buffer capacitor value for an voltage drop below 50mVpp during DC/DC operation. The capacitor value strongly depends on the used battery type, as well the current consumption during a RF transmission as well the duration of the transmission. 10.2.2.2 Output Capacitor Selection For most applications, the integrated output capacitor at the VOUT pin is sufficient. In order to further reduce the output voltage ripple and improve the load transient performance an additional external output capacitance may be used. For most applications an additional 4.7µF or 10µF capacitor will be sufficient. Care should be taken that the total effective capacitance present at the output does not exceed 10µF in order to guarantee loop stability. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. At the LOAD output pin, no additional output capacitor is required. For applications demanding external capacitance connected to the LOAD pin, the total capacitance should not exceed 10µF. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 21 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com Typical Application (continued) 10.2.3 Application Curves VIN = 3.6V VOUT = 2.6V ROUT = 100W CTRL = GND VIN = 3.6V VOUT = 2.6V ROUT = 100W CTRL = GND Figure 43. TPS82740B Device Enable and Start up VIN = 3.6V, VOUT = VLOAD = 2.6V CTRL = VIN ROUT = 100W ILOAD = 0mA CLOAD = 10mF Figure 45. TPS82740B VOUT Ramp with activated LOAD Switch 22 Submit Documentation Feedback Figure 44. TPS82740B VOUT Ramp after Enable VIN = 3.6V, VOUT = 1.8V / 2.5V ramp up / down IOUT = 5mA VSEL 2+3 toggled, VSEL1 = GND CTRL = GND Figure 46. TPS82740A Dynamic Output Voltage Scaling: VOUT = 1.8V / 2.5V Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 11 Power Supply Recommendations The TPS82740 device is a complete and optimized power supply module working within the given specification range without additional components. Please use the information given in the Application Information section to connect the input and output circuitry appropriately. 12 Layout 12.1 Layout Guidelines In making the pad size for the uSiP LGA balls, it is recommended that the layout use a non-solder-mask defined (NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the opening size is defined by the copper pad width. Figure 47 shows the appropriate diameters for a MicroSiPTM layout. Figure 48 shows a suggestion for the PCB layout. 12.2 Layout Example Figure 47. Recommended Land Pattern Image and Dimensions SOLDER PAD DEFINITIONS (1) (2) (3) (4) COPPER PAD Non-solder-mask defined (NSMD) 0.30mm (1) (2) (3) (4) (5) (6) SOLDER MASK OPENING 0.360mm (5) COPPER THICKNESS STENCIL (6) OPENING STENCIL THICKNESS 1oz max (0.032mm) 0.34mm diameter 0.1mm thick Circuit traces from non-solder-mask defined PWB lands should be 75μm to 100μm wide in the exposed area inside the solder mask opening. Wider trace widths reduce device stand off and affect reliability. Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the intended application. Recommend solder paste is Type 3 or Type 4. For a PWB using a Ni/Au surface finish, the gold thickness should be less than 0.5mm to avoid a reduction in thermal fatigue performance. Solder mask thickness should be less than 20 μm on top of the copper circuit pattern. For best solder stencil performance use laser cut stencils with electro polishing. Chemically etched stencils give inferior solder paste volume control. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 23 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com GND LOAD Pin A1 VIN VOUT GND Figure 48. PCB Layout Suggestion 12.3 Surface Mount Information The TPS82740 MicroSIP™ module uses an open frame construction for a fully automated assembly process and provides a large surface area for pick and place operations. See the "Pick Area" in the package drawing. Package height and weight have been kept to a minimum, allowing MicroSIP™ device handling similar to a 0805 footprint component. For reflow recommendations, see document J-STD-20 from the JEDEC/IPC standard. 24 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 13 Device and Documentation Support 13.1 Documentation Support 13.1.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 6. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TPS82740A Click here Click here Click here Click here Click here TPS82740B Click here Click here Click here Click here Click here 13.2 Trademarks DCS-Control, MicroSIP, MicroSiP are trademarks of Texas Instruments. Bluetooth is a registered trademark of Bluetooth SIG, Inc.. 13.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 13.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 25 TPS82740A, TPS82740B SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 www.ti.com 14.1 Tape and Reel Information REEL DIMENSIONS TAPE DIMENSIONS K0 P1 B0 W Reel Diameter Cavity A0 B0 K0 W P1 A0 Dimension designed to accommodate the component width Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Sprocket Holes Q1 Q2 Q1 Q2 Q3 Q4 Q3 Q4 User Direction of Feed Pocket Quadrants 26 Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) TPS82740ASIPR uSIP SIP 9 3000 178 9.0 TPS82740ASIPT uSIP SIP 9 250 178 9.0 TPS82740BSIPR uSIP SIP 9 3000 178 9.0 TPS82740BSIPT uSIP SIP 9 250 178 9.0 Submit Documentation Feedback A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant 2.5 3.1 1.35 4.0 8.0 Q2 2.83 3.18 1.2 4.0 8.0 Q2 2.5 3.1 1.35 4.0 8.0 Q2 2.83 3.18 1.2 4.0 8.0 Q2 Copyright © 2014, Texas Instruments Incorporated TPS82740A, TPS82740B www.ti.com SLVSCE3A – JUNE 2014 – REVISED JUNE 2014 TAPE AND REEL BOX DIMENSIONS Width (mm) W L H Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS82740ASIPR uSIP SIP 9 3000 223 194 35 TPS82740ASIPT uSIP SIP 9 250 223 194 35 TPS82740BSIPR uSIP SIP 9 3000 223 194 35 TPS82740BSIPT uSIP SIP 9 250 223 194 35 Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 27 PACKAGE OUTLINE SIP0009F MicroSiP TM - 1.1 mm max height SCALE 5.500 MICRO SYSTEM IN PACKAGE 2.95 2.85 B A PIN A1 INDEX AREA 2.35 2.25 PICK AREA NOTE 3 1.1 MAX C SEATING PLANE 0.10 0.06 0.05 C 2 TYP 1 TYP C 0.8 TYP 9X 0.015 C A 0.35 0.25 B 1.6 TYP B A 1 2 3 4221589/A 06/2014 MicroSiP is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. For pick and place nozzle recommendation, see product datasheet. 4. Location, size and quantity of each component are for reference only and may vary. www.ti.com EXAMPLE BOARD LAYOUT SIP0009F MicroSiP TM - 1.1 mm max height MICRO SYSTEM IN PACKAGE SYMM 1 9X ( 0.3) SEE DETAILS 3 2 A SYMM B (0.8) TYP C (1) TYP LAND PATTERN EXAMPLE NOT TO SCALE 0.05 MIN ( 0.3) METAL 0.05 MAX ( 0.3) SOLDER MASK OPENING SOLDER MASK OPENING METAL UNDER MASK SOLDER MASK DEFINED NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4221589/A 06/2014 NOTES: (continued) 5. For more information, see Texas Instruments literature number SBVA017 (www.ti.com/lit/sbva017). www.ti.com EXAMPLE STENCIL DESIGN SIP0009F MicroSiP TM - 1.1 mm max height MICRO SYSTEM IN PACKAGE SYMM 1 ( 0.34) TYP SEE DETAIL 3 2 A SYMM B (0.8) TYP C (1) TYP SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:20X ( 0.34) METAL UNDER PASTE SOLDER PASTE DETAIL TYPICAL 4221589/A 06/2014 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS82740ASIPR ACTIVE uSiP SIP 9 3000 RoHS & Green NIAU Level-2-260C-1 YEAR -40 to 85 E7 TPS82740ASIPT ACTIVE uSiP SIP 9 250 RoHS & Green NIAU Level-2-260C-1 YEAR -40 to 85 E7 TPS82740BSIPR ACTIVE uSiP SIP 9 3000 RoHS & Green NIAU Level-2-260C-1 YEAR -40 to 85 E8 TPS82740BSIPT ACTIVE uSiP SIP 9 250 RoHS & Green NIAU Level-2-260C-1 YEAR -40 to 85 E8 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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TPS82740ASIPR
  •  国内价格 香港价格
  • 1+22.588501+2.72560
  • 10+19.8131010+2.39070
  • 100+16.53610100+1.99530
  • 250+16.45450250+1.98540
  • 500+14.77520500+1.78280
  • 1000+12.431301000+1.50000
  • 3000+11.754903000+1.41840
  • 6000+11.335106000+1.36770

库存:6228

TPS82740ASIPR
  •  国内价格
  • 1+8.44675

库存:100

TPS82740ASIPR
    •  国内价格
    • 1000+10.45000

    库存:15140