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TPS92560
SNVS900B – DECEMBER 2012 – REVISED DECEMBER 2015
TPS92560 Simple Led Driver for MR16 and AR111 Applications
1 Features
3 Description
•
The TPS92560 is a simple LED driver designed to
drive high-power LEDs by drawing constant current
from the power source. The device is ideal for MR16
and AR111 applications, which require good
compatibility to DC and AC voltages and electronic
transformers. The hysteretic control scheme does not
need control loop compensation while providing the
benefits of fast transient response and high power
factor. The patent pending feedback control method
allows the output power to be determined by the
number of LED used without component change. The
TPS92560 supports both boost and SEPIC
configurations for the use of different LED modules.
1
•
•
•
•
•
•
•
•
•
•
•
Controlled peak input current to prevent overstressing of the electronic transformer
Allows Either Step-Up or Step-Up/Down Operation
Compatible to Generic Electronic Transformers
Compatible to Magnetic Transformers and DC
Power Supplies
Integrated Active Low-Side Input Rectifiers
Compact and Simple Circuit
>85% Dfficiency (12-VDC Input)
Power Factor > 0.9 (Full Load With AC input)
Hysteretic Control Scheme
Output Overvoltage Protection
Overtemperature Shutdown
10-pin Thermally Enhanced Very-Thin Fine Pitch
Small-Outline Package
Device Information(1)
PART NUMBER
TPS92560
PACKAGE
BODY SIZE (NOM)
HVSSOP (10)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
MR16/AR111 LED Lamps
Lighting System Using Electronic Transformer
General Lighting Systems That Require a Boost /
SEPIC LED Driver
Typical Application Schematic
L1
D3
LED
CIN
RADJ1
COUT
Q1
TPS92560
GATE
RADJ2 CADJ
CVCC
RSEN
R1
D1
D2
AC1
SRC
PGND
VCC
AC2
SEN
VP
GND
ADJ
Power
Source
CVP
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS92560
SNVS900B – DECEMBER 2012 – REVISED DECEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 14
8
Application and Implementation ........................ 15
8.1 Application Information............................................ 15
8.2 Typical Applications ................................................ 16
9 Power Supply Recommendations...................... 21
10 Layout................................................................... 21
10.1 Layout Guidelines ................................................. 21
10.2 Layout Example .................................................... 21
11 Device and Documentation Support ................. 22
11.1
11.2
11.3
11.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
22
22
22
22
12 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (January 2013) to Revision B
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
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SNVS900B – DECEMBER 2012 – REVISED DECEMBER 2015
5 Pin Configuration and Functions
DGQ Package
10-Pin HVSSOP
Top View
GATE
AC1
PA
D
SRC
AC2
Po
w
er
VCC
PGND
SEN
VP
GND
ADJ
Package Number MUC10A
Pin Functions
PIN
NO.
NAME
1
GATE
2
3
I/O
DESCRIPTION
APPLICATION INFORMATION
O
Gate driver output pin
Connect to the Gate terminal of the low-side N-channel Power FET
SRC
I
Gate driver return
Connect to the Source terminal of the low-side N-channel Power FET
VCC
O
VCC regulator output
Connect 0.47-μF decoupling capacitor from this pin to SRC pin
4
SEN
I
Current sense pin
Kelvin-sense current sensing input. Should connect to the current
sensing resistor, RSEN.
5
GND
—
Analog ground
Reference point for current sensing.
6
ADJ
I
LED current adjust pin
Connect to resistor divider from LED top voltage rail to set LED current
7
VP
I
Power supply of the IC
Connect it to the LED top voltage rail (for boost) or Connect it through
a diode from LED top voltage rail (for SEPIC)
Power return terminal
Connect to AC or DC input terminal
Power ground
Connect to system ground plane
Power return terminal
Connect to AC or DC input terminal
Thermal DAP
Connect to system ground plane for heat dissipation
8
AC2
I
9
PGND
—
10
AC1
I
PowerPAD™
—
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SNVS900B – DECEMBER 2012 – REVISED DECEMBER 2015
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6 Specifications
6.1 Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for
availability and specifications. (1)
SRC, SEN, ADJ
AC1, AC2
MIN
MAX
UNIT
–0.3
5
V
–1
45
V
VP
–0.3
45
V
VCC
–0.3
12
V
TJ
Junction temperature
–40
125
°C
Tstg
Storage temperature
–65
150
°C
(1)
Absolute Maximum Ratings are limits which damage to the device may occur. Operating ratings are conditions under which operation of
the device is intended to be functional. For specified specifications and test conditions, see the electrical characteristics.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±1500
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VP
Supply voltage
6.5
42
V
TJ
Junction temperature
–40
125
°C
6.4 Thermal Information
TPS92560
THERMAL METRIC (1)
DGQ (HVSSOP)
UNIT
10 PINS
RθJA
Junction-to-ambient thermal resistance
55.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
43.7
°C/W
RθJB
Junction-to-board thermal resistance
32.1
°C/W
ψJT
Junction-to-top characterization parameter
1.3
°C/W
ψJB
Junction-to-board characterization parameter
31.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
5.0
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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SNVS900B – DECEMBER 2012 – REVISED DECEMBER 2015
6.5 Electrical Characteristics
Over recommended operating conditions with -40°C ≤ TJ ≤ 125°C. Unless otherwise stated the following conditions apply: VVP
= 12V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0.7
1.4
1.95
mA
ICC ≤ 10 mA, CVCC =0.47 µF
12 V < VVP < 42 V
7.82
8.45
9.08
ICC = 10 mA, CVCC =0.47 µF
VVP = 6.5 V
5.22
5.8
6.18
ICC = 0 mA, CVCC =0.47 µF
VVP = 2 V
1.96
2
VCC = 0 V 6.5 V < VVP < 42
V
21
30
39
SUPPLY
IIN
VIN Operating current
6.5 V < VVP < 42 V
VCC REGULATOR
VCC Regulated voltage (1)
VCC
V
ICC-LIM
VCC Current limit
mA
VCC-UVLO-UPTH
VCC UVLO upper threshold
5
5.38
5.76
VCC-UVLO-LOTH
VCC UVLO lower threshold
4.63
4.98
5.33
V
VCC-UVLO-HYS
VCC UVLO hysteresis
190
400
640
mV
V
MOSFET GATE DRIVER
VGATE-HIGH
Gate driver output high
w.r.t. SRC
Sinking 100mA from GATE
Force VCC = 8.5 V
7.61
8.1
8.5
V
VGATE-LOW
Gate driver output low
w.r.t. SRC
Sourcing 100 mA to GATE
100
180
290
mV
tRISE
VGATE Rise time
CGATE = 1 nF across GATE
and SRC
22
ns
tFALL
VGATE Fall time
CGATE = 1 nF across GATE
and SRC
14
ns
tRISE-PG-DELAY
VGATE Low-to-high propagation delay
CGATE = 1 nF across GATE
and SRC
68
ns
tFALL-PG-DELAY
VGATE High-to-low propagation delay
CGATE = 1 nF across GATE
and SRC
84
ns
CURRENT SOURCE AT ADJ PIN
IADJ-STARTUP
Output current of ADJ pin at start-up
VADJ = 0 V
16
20
24
µA
IADJ-ELEC-XFR
Output current of ADJ pin for
electronic transformers
An Electronic transformer is
detected
8
11.5
15
µA
IADJ-MAG-XFR
Output current of ADJ pin for
inductive transformers
A magnetic transformer is
detected
7
9.5
12
µA
CURRENT SENSE COMPARATOR
VSEN-UPPER-TH
VSEN Upper threshold over VADJ
VSEN-VADJ, VADJ=0.2 V,
VGATE at falling edge
8.9
14.9
20.9
mV
VSEN-LOWER-TH
VSEN Lower threshold over VADJ
VSEN-VADJ, VADJ=0.2 V
VGATE at rising edge
-20.6
–14.9
-8.8
mV
VSEN-HYS
VSEN Hysteresis
(VSEN-UPPER-TH - VSEN-LOWERTH)
22.5
29.8
37.5
mV
VSEN-OFFSET
VSEN Offset w.r.t. VADJ
(VSEN-UPPER-TH + VSENLOWER-TH)/2
-3.5
0.02
3.5
mV
300
570
mΩ
ACTIVE LOW-SIDE INPUT RECTIFIERS
RACn-ON
In resistance of AC1 and AC2 to
GND
IACn = 200 mA
VACn-ON-TH
Turn ON voltage threshold of AC1
and AC2
VACn Decreasing, TJ = 25°C
36
52
67
mV
VACn-OFF-TH
Turn OFF voltage threshold of AC1
and AC2
VACn Increasing, TJ = 25°C
77
90
104
mV
VACn-TH-HYS
Hysteresis voltage of AC1 and AC2
VACn-OFF-TH - VACn-ON-TH
(1)
39
mV
VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.
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Electrical Characteristics (continued)
Over recommended operating conditions with -40°C ≤ TJ ≤ 125°C. Unless otherwise stated the following conditions apply: VVP
= 12V
PARAMETER
IACn-OFF
TEST CONDITIONS
Off current of AC1 and AC2
MIN
VACn = 45 V
TYP
MAX
21
32
UNIT
µA
OUTPUT OVERVOLTAGE-PROTECTION (OVP)
VADJ-OVP-UPTH
Output overvoltage-detection upper
threshold
VADJ Increasing, VGATE at
falling edge
0.353
0.384
0.415
V
VADJ-OVP-LOTH
Output overvoltage-detection lower
threshold
VADJ Decreasing, VGATE at
rising edge
0.312
0.339
0.366
V
VADJ-OVP-HYS
Output overvoltage-detection
hysteresis
VADJ-OVP-UPTH - VADJ-OVP-
25
46
67
mV
LOTH
THERMAL SHUTDOWN
TSD
Thermal shutdown temperature
TJ Rising
165
°C
TSD-HYS
Thermal shutdown temperature
hysteresis
TJ Falling
30
°C
6
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SNVS900B – DECEMBER 2012 – REVISED DECEMBER 2015
6.6 Typical Characteristics
All curves taken for the boost circuit are with 500-mA nominal input current and 6 serial LEDs. All curves taken for the SEPIC
circuit are with 500-mA nominal input current and 3 serial LEDs.TA = –40°C to 125°C, unless otherwise specified.
8.45
VVP=42V
1.5
8.4
VVP=42V
1.4
8.35
1.3
VCC (V)
Operation Current, IIN (mA)
1.6
VVP=12V
1.2
8.3
VVP=6.5V
1.1
8.2
1
8.15
-40
-20
0
20
40
60
80
100
120
Ambient Temperature, TA (ƒC)
140
-40
0
20
40
60
80
100
120
Ambient Temperature, TA (ƒC)
Figure 1. Operation Current vs Temperature
140
C002
Figure 2. VCC vs Temperature (IVCC = 0 mA)
5.02
VCC UVLO Falling Threshold (V)
VCC UVLO Rising Threshold (V)
-20
C001
5.42
5.4
5.38
5.36
5.34
5.32
5.3
5
4.98
4.96
4.94
4.92
-40
-20
0
20
40
60
80
100
120
Ambient Temperature, TA (ƒC)
140
-40
-20
0
20
40
60
80
100
120
Ambient Temperature, TA (ƒC)
C003
Figure 3. VCC UVLO Rising Threshold vs Temperature
VVP = 12 V, GATE = Hi
140
C004
Figure 4. VCC UVLO Falling Threshold vs Temperature
VVP = 12 V, GATE = Low
80
ACn Turn ON Threshold (mV)
140
ACn Turn OFF Threshold (mV)
VVP=12V
8.25
120
100
80
60
40
70
60
50
40
30
-40
-20
0
20
40
60
80
Temperature, TA (ƒC)
100
120
140
-40
Figure 5. ACn Turn Off Threshold vs Temperature
-20
0
20
40
60
80
100
120
Ambient Temperature, TA (ƒC)
C005
140
C006
Figure 6. ACn Turn On Threshold vs Temperature
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Typical Characteristics (continued)
All curves taken for the boost circuit are with 500-mA nominal input current and 6 serial LEDs. All curves taken for the SEPIC
circuit are with 500-mA nominal input current and 3 serial LEDs.TA = –40°C to 125°C, unless otherwise specified.
0.7
0.9
0.8
Output Current, IOUT (A)
Output Current, IOUT (A)
0.6
0.5
VIN=12V
0.4
0.3
0.2
0.1
0.7
0.6
0.4
0.3
0.2
0.1
0
0
-40
-20
0
20
40
60
80
100
120
140
Ambient Temperature, TA (ƒC)
-40
20
40
60
80
100
120
140
C008
Figure 8. Output Current (SEPIC) vs Temperature
10
Output Power, POUT (W)
10
Output Power, POUT (W)
0
Ambient Temperature, TA (ƒC)
Figure 7. Output Current (BOOST) vs Temperature
8
VIN=12V
6
4
2
0
8
6
VIN=12V
4
2
0
-40
-20
0
20
40
60
80
100
120
140
Ambient Temperature, TA (ƒC)
-40
-20
0
20
40
60
80
100
120
140
Ambient Temperature, TA (ƒC)
C009
Figure 9. Output Power (BOOST) vs Temperature
C010
Figure 10. Output Power (SEPIC) vs Temperature
100
100
VIN=18V
VIN=15V
VIN=18V
VIN=15V
90
Efficiency (%)
90
Efficiency (%)
-20
C007
12
80
VIN=12V
70
VIN=9V
80
VIN=12V
70
VIN=6V
VIN=9V
60
VIN=6V
60
50
50
-40
-20
0
20
40
60
80
100
120
Ambient Temperature, TA (ƒC)
140
-40
-20
0
20
40
60
80
100
120
Ambient Temperature, TA (ƒC)
C011
Figure 11. Efficiency (BOOST) vs Temperature
8
VIN=12V
0.5
140
C012
Figure 12. Efficiency (SEPIC) vs Temperature
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SNVS900B – DECEMBER 2012 – REVISED DECEMBER 2015
7 Detailed Description
7.1 Overview
The TPS92560 is a simple hysteretic control switching LED driver for MR16 or AR111 lighting applications. The
device accepts DC voltage, AC voltage and electronic transformer as an input power source. The compact
application circuit can fit into a generic case of MR16 lamps easily. The hysteretic inductor current control
scheme requires no small signal control loop compensation and maintains constant average input current to
secure high compatibility to different kinds of input power source. The TPS92560 can be configured to either a
step-up or step-up/down LED driver for the use of different number of LEDs. The patent pending current control
mechanism allows the use of a single set of component and PCB layout for serving different output power
requirements by changing the number of LEDs. The integrating of the active low-side input rectifiers reduces the
power loss for voltage rectification and saves two external diodes of a generic bridge rectifier to aim for a simple
end application circuit. When the driver is used with an AC voltage source or electronic transformer, the current
regulation level increases accordingly to maintain an output current close to the level that when it is used with a
DC voltage source. With the output overvoltage protection and over-temperature shutdown functions, the
TPS92560 is specifically suitable for the applications that are space limited and need wide acceptance to
different power sources.
7.2 Functional Block Diagram
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7.3 Feature Description
7.3.1 VCC Regulator
The VCC pin is the output of the internal linear regulator for providing an 8.45V typical supply voltage to the
MOSFET driver and internal circuits. The output current of the VCC pin is limited to 30mA typical. A low ESR
ceramic capacitor of 0.47-μF or higher capacitance should be connected across the VCC and SRC pins to
supply transient current to the MOSFET driver.
7.3.2 MOSFET Driver
The GATE pin is the output of the gate driver which referenced to the SRC pin. The gate driver is powered
directly by the VCC regulator which the maximum gate driving current is limited to 30 mA (typical). To prevent
hitting the VCC current limit, TI suggests using a low gate charge MOSFET when high switching frequency is
needed.
7.3.3 ADJ Pin
The voltage on the ADJ pin determines the reference voltage for the input current regulation. Typically, the ADJ
pin voltage is divided from the output voltage of the circuit by a voltage divider, thus the average input current is
adjusted with respect to the number of LEDs used. The voltage of the ADJ pin determines the input current
following the expression:
(1)
7.3.3.1 Output OVP
In the TPS92560, a function of output overvoltage protection (OVP) is provided to prevent damaging the circuit
due to an open circuit of the LED. The OVP function is implemented to the ADJ pin. When the voltage of the ADJ
pin exceeds 0.384V typical, the OVP circuit disables the MOSFET driver and turns off the main switch to allow
the output capacitor to discharge. As the voltage of the ADJ pin decreases to below 0.353 V (typical), the
MOSFET driver is enabled and the TPS92560 returns to normal operation. The triggering threshold of the output
voltage is determined by the value of the resistors RADJ1 and RADJ2, which can be calculated using the following
equation:
VVP x
RADJ2
≤ 0.384V
RADJ1 + RADJ2
(2)
When defining the OVP threshold voltage, it is necessary to certain that the OVP threshold voltage does not
exceed the rated voltage of the output rectifier and capacitor to avoid damaging of the circuit.
7.3.4 AC1 and AC2 Pins
The TPS92560 provides two internal active rectifiers for input voltage rectification. Each internal rectifier connects
across the ACn pin to GND. These internal active rectifiers function as the low-side diode rectifiers of a generic
bridge rectifier. The integrating of the active rectifiers helps in saving two external diodes of a bridge rectifier
along with an improvement of power efficiency. For high power applications, for instance, 12-W output power,
external diode rectifiers can be added across the ACn pin to GND to reduce heat dissipation on the TPS92560.
10
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Feature Description (continued)
7.3.5 Detection of Power Source
12V × 2
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Figure 13. Inherent Dead Time of the Output Voltage of an Electronic Transformer
Both the voltages of a generic AC source (50/60Hz) and an electronic transformer carry certain amount of dead
time inherently, as shown in Figure 13. The existing of the dead time leads to a drop of the RMS input power to
the driver circuit. In order to compensate the drop of the RMS input power, the ADJ pin sources current to the
resistor, RADJ2 to increase the reference voltage for the current regulation loop and in turn increase the RMS
input power accordingly when an AC voltage source or electronic transformer is detected. The output current of
the ADJ pin for an AC input voltage and electronic transformer are 9.5μA and 11.5μA typical respectively.
Practically the amount of the power for compensating the dead time of the input power source differs case to
case depending on the characteristics of the power source, the value of the RADJ1 and RADJ2 might need a fine
adjustment in accordance to the characteristics of the power source. The additional output power for
compensating the dead time of the power sources (ΔPLED) are calculated using the following Equation 3 and
Equation 4.
For 50/60Hz AC power source:
R
´ 9.5 mA
DPLED -50/60 Hz = VIN ´ ADJ2
´h
RSEN
(3)
For electronic transformer:
DPLED-ELECT - XFR = VIN ´
R ADJ2 ´ 11.5 mA
´h
RSEN
(4)
7.3.6 Current Regulation
In the TPS92560, the input current regulation is attained by limiting the peak and valley of the inductor current.
Practically the inductor current sensing is facilitated by detecting the voltage on the resistor, RSEN. Because the
current flows through the RSEN is a sum total of the currents of the main switch and LEDs, the voltage drop on
the RSEN reflects the current of the inductor that is identical to the input current to the LED driver circuit.
Figure 14 shows the waveform of the inductor current ripple with the peak and valley values controlled.
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Feature Description (continued)
IL
tON
IL(peak)
tOFF
Switch off
VSEN-UPPER-TH
RSEN
Time
VSEN-LOWER-TH
RSEN
IL(valley)
Switch on
tFALL-PG-DELAY
tRISE-PG-DELAY
SVA-30207404
Figure 14. Inductor Current Ripple in Steady State
The voltage of the ADJ pin is determined by the forward voltage of the LED and divided from the VVP by a
resistor divider. The equation for calculating the VADJ as shown in Equation 5.
R ADJ2
VADJ = VVP ´
R ADJ1 + R ADJ2
(5)
In steady state, the voltage drop on the RADJ1 is identical to the forward voltage of the LED (VLED) and the voltage
across the RADJ2 is identical to the voltage across the RSEN. The LED current, ILED is then calculated following the
equations:
In steady state:
(6)
(7)
(8)
Since
PLED = PIN x η
where η is the conversion efficiency
(9)
Thus,
VLED x ILED = VIN x IIN(nom) x η
(10)
Put the expressions (2) to (4) into (5):
IADJ2 x RADJ2
x η
ILED = VIN x
IADJ1 x RADJ1 x RSEN
(11)
Due to the high input impedance of the ADJ pin, the current flows into the ADJ pin can be neglected and thus
IRADJ1 equals IRADJ2. The LED current is then calculated following the expressions below:
RADJ2
x η
ILED = VIN x
RADJ1 x RSEN
(12)
Practically, the conversion efficiency of a boost circuit is almost a constant around 85%. Being assumed that the
efficiency term in the ILED expression is a constant, the LED current depends solely on the magnitude of the input
voltage, VIN. Without changing a component, the output power of the typical application circuits of the TPS92560
is adjustable by using different number of LEDs.
The output power is calculated by following the expression:
12
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Feature Description (continued)
PLED = VLED x VIN x
RADJ2
RADJ1 x RSEN
x η
(13)
7.3.7 Switching Frequency (Boost Configuration)
In the following sections, the equations and calculations are limited to the boost configuration only (that is, the
LED forward voltage higher than the input voltage), unless otherwise specified. The application information for
the SEPIC and other circuit topologies are available in separate application notes and reference designs. In the
boost configuration, including the propagation delay of the control circuit, the ON and OFF times of the main
switch are calculated using Equation 14 and Equation 15.
(14)
(15)
In the previous equations, the VD is the forward voltage of D3, RL is the DC resistance of L1, RDS(ON) is the ON
resistance of Q1 and RAC-FET is the turn ON resistance of the internal active rectifier with respect to the typical
application circuit diagram.
Practically the resistance of the RL, RDS(on) and RAC-FET is in the order if several tenth of mΩ, by assuming a 0.5-V
diode forward voltage and the sum total of the RL, RDS(ON) and RAC-FET is close to 1 Ω, the on and off times of Q1
can be approximated using the Equation 16 and Equation 17.
tON ≈
tOFF ≈
14.9mV x L
RSEN x [VIN – 0.5V IIN(nom) x (1 + RSEN)]
+ 84ns
14.9mV x L
RSEN x [VLED VIN 1V IIN(nom) x (1 + RSEN)]
x 2
(16)
+ 68ns
x 2
(17)
With the switching on and OF times determined, the switching frequency can be calculated using Equation 18.
1
fSW =
t ON + t OFF
(18)
Because of the using of hysteretic control scheme, the switching frequency of the TPS92560 in steady state is
dependent on the input voltage, output voltage and inductance of the inductor. Generally a 1-MHz to 1.5-MHz
switching frequency is suggested for applications using an electronic transformer as the power source.
7.3.8 Inductor Selection (Boost Configuration)
Because of the using of the hysteretic control scheme, the switching frequency of the TPS92560 in a boost
configuration can be adjusted in accordance to the value of the inductor being used. Derived from the equations
(12) and (13), the value of the inductor can be determined base on the desired switching frequence by using
Equation 19.
1
− 304ns × R SEN
fSW
L=
1
1
× 29 .8mV
+
VIN − 0.5 V − IIN(nom) × (1 + R SEN ) VLED − VIN − 1V − IIN(nom) × (1 + R SEN )
(19)
When selecting the inductor, it is essential to ensure the peak inductor current does not exceed the the factory
suggested saturation current of the inductor. The values of the peak and valley inductor current are calculated
using the following equations:
Peak inductor current:
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Feature Description (continued)
(20)
Valley inductor current:
(21)
Assume the total resistance of the RL, RDS(on) and RAC-FET is 1 Ω and the diode drop, VD equal to 1 V, the peak
and valley currents of the inductor can be approximated using Equation 22 and Equation 23.
[VIN – 0.5V IIN(nom) x (1 + RSEN)] x tON
IL(peak) ≈
+ IIN(nom)
2L
(22)
[VLED VIN 1V IIN(nom) x (1 + RSEN)] x tOFF
IL(valley) ≈ IIN(nom)
2L
(23)
In order not to saturate the inductor, an inductor with a factory guranteed saturation current (ISAT) 20% higher
than the IL(peak) is suggested. Thus the ISAT of the inductor should fulfill the following requirement:
ISAT ≥ IL(peak) x 1.2
(24)
7.3.9 Input Surge Voltage Protection
When use with an electronic transformer, the surge voltage across the input terminals can be sufficiently high to
damage the TPS92560 depending on the characteristics of the electronic transformer. To against potential
damaging due to the input surge voltage, a 36-V Zener diode can be connected across the input bridge rectifier
as shown in Figure 15.
Figure 15. Input Surge Voltage Protection Using an External Zener Diode
7.4 Device Functional Modes
7.4.1 Thermal Shutdown
The TPS92560 includes a thermal shutdown circuitry that ceases the operation of the device to avoid permanent
damage. The threshold for thermal shutdown is 165°C with a 30°C hysteresis typical. During thermal shutdown
the VCC regulator is disabled and the MOSFET is turned off.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
In the applications that need true regulation of the LED current, the intrinsic input current control loop can be
changed to monitor the LED current by adding an external LED current sensing circuit. Figure 18 and Figure 23
show the example circuits for true LED current regulation in boost and SEPIC configurations respectively. In the
circuits, the U3 (TL431) maintains a constant 2.5-V voltage drop on the resistors, R3 and R7. Because the U2
(TL431) maintains a constant voltage drop on the R3, the power dissipation on the output current sensing
resistor, R7 can be minimized by setting a low voltage drop on the R7. Because the change of the current flowing
through the R7 reflects in the change of the cathode current of U3 and eventually adjusts the ADJ pin voltage of
the TPS92560, the LED current is regulated independent of the change of the input voltage.
D3
L1
C1
LED
CIN
RADJ1
COUT
L2
Q1
TPS92560
GATE
RADJ2 CADJ
CVCC
RSEN
R1
D1
D2
AC1
SRC
PGND
VCC
AC2
SEN
VP
GND
ADJ
Power
Source
CVP
D4
Figure 16. Typical Application Circuit of the TPS92560 Using SEPIC Configuration
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Application Information (continued)
L1
D3
LED
CIN
RADJ1
COUT
GATE
RADJ2 CADJ
CVCC
RSEN
D1
R1
TPS92560
Q1
D2
AC1
SRC
PGND
VCC
AC2
SEN
VP
GND
ADJ
Power
Source
CVP
Figure 17. Typical Application Circuit of the TPS92560 Using Boost Configuration
8.2 Typical Applications
8.2.1 Boost Application Design Example
L1
D3
LED
CIN
RADJ1
COUT
Q1
TPS92560
GATE
RADJ2 CADJ
CVCC
RSEN
R1
D1
D2
AC1
SRC
PGND
VCC
AC2
SEN
VP
GND
ADJ
Power
Source
CVP
Figure 18. TPS92560 in Boost Configuration With Input Current Regulation
16
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Typical Applications (continued)
8.2.1.1 Design Requirements
The specifications of the boost application circuit in Figure 18 are as listed as follows:
• Input Voltage: VIN = 12 V
• LED Stack Voltage: VLED = 21 V
• Input Current: IIN(nom) = 500 mA
• Input Power = 6 W
• overvoltage Level: VVP(OVP) = 40 V
• Switching Frequency: fSW = 1.4 MHz
8.2.1.2 Detailed Design Procedure
8.2.1.2.1 Calculate Values for the ADJ Resistors
First choose a value for RADJ2 in the range of 1 kΩ and 10 kΩ. For this example RADJ2 = 1 kΩ is chosen. Then
calculate RADJ1 for the desired OVP level using Equation 25.
RADJ1 =
VVP(OVP) - 0.384V
40V - 0.384V
=
= 103k
0.384
0.384
l
p
p
l
RADJ2
1k
(25)
Choose the nearest standard resistor value of RADJ1 = 102 kΩ.
8.2.1.2.2 Calculate the Sense Voltage and Sense Resistor Value
Given the calculated ADJ resistor values the sense voltage (VSEN) can be calculated using Equation 26.
VSEN = VADJ = RADJ2 ×
VLED
21V
= 1k ×
RADJ1
102k
= 206mV
(26)
Given a current sense voltage of 206 mV the current sense resistor value (RSEN) can be calculated using
Equation 27.
RSEN =
VSEN
IIN(nom)
=
206mV
500mA
(27)
The nearest standard value if 0.412Ω so choose RSEN = 0.412Ω.
8.2.1.2.3 Calculate the Inductor Value
Given a desired switching frequency of 1.4 MHz the inductor value can be calculated using Equation 28.
(
L=
1
- 304ns) × RSEN
fSW
1
1
29.8mV × l
+
p
VIN - 0.5V - IIN(nom) ×(1 + RSEN) VLED - VIN - 1V - IIN(nom) ×(1 + RSEN)
(28)
1
(
- 304ns) ×
1.4MHz
L=
1
1
29.8mV × l
+
p
12V - 0.5V - 500mA ×(1 + 0.412) 21V - 12V - 1V - 500mA ×(1 + 0.412)
H
(29)
Choose the closest standard inductor value of L = 22 µH.
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Typical Applications (continued)
8.2.1.3 Application Curve
100
VIN=18V
VIN=15V
Efficiency (%)
90
80
VIN=12V
70
VIN=9V
VIN=6V
60
50
-40
-20
0
20
40
60
80
100
120
140
Ambient Temperature, TA (ƒC)
C012
Figure 19. Efficiency
8.2.2 Boost Application Circuit With LED Current Regulation
"&
!
(
"#
%
!$
%
"#
"#
!
!
!
! $ %
!
!
!$
%
"#
%
!$ "#
"#
$
! '#
Figure 20. Using the TPS92560 in Boost Configuration With LED Current Regulation
8.2.2.1 Design Requirements
The specifications of the boost application circuit in Figure 18 are as as follows:
• Objective input voltage: 3 VDC to 18 VDC / 12 VAC( 50 Hz or 60 Hz) / Generic MR16 electronic transformer
• LED forward voltage: 20 VDC typical
• Output current: 300 mA typical (at 12-VDC input)
• Output power: 6 W typical (at 12-VDC input)
18
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Typical Applications (continued)
8.2.2.2 Application Curves
350
100
300
90
80
250
Efficiency (%)
LED Current, ILED (mA)
All curves taken at VIN = 3 V to 18 VDC in boost configuration, with 300mA nominal output current, 6 serial LEDs.
TA = 25°C.
200
150
70
60
50
100
40
50
30
0
2
4
6
8
10
12
14
16
18
Input Voltage, VIN (V)
20
0
2
4
6
8
10
12
14
16
18
20
Input Voltage, VIN (V)
C017
Figure 21. LED Current vs Input Voltage
C018
Figure 22. Efficiency vs Input Voltage
8.2.3 SEPIC Application Circuit With LED Current Regulation
!
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)
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$& %
!$
%
!$ "#
"#
"'
!
!
!
$ %
!
!
!$
%
"#
%
!$ "#
"#
(#
$
!
* !
Figure 23. Using the TPS92560 in SEPIC Configuration With LED Current Regulation
8.2.3.1 Design Requirements
The specifications of the SEPIC application circuit in Figure 18 are as listed as follows:
• Objective input voltage: 3 VDC to 18 VDC / 12 VAC (50 Hz or 60 Hz) / Generic MR16 electronic transformer
• LED forward voltage: 13 VDC typical
• Output current: 300 mA typical (at 12-VDC input)
• Output power: 4 W typical (at 12-VDC input)
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Typical Applications (continued)
8.2.3.2 Application Curves
350
100
300
90
80
250
Efficiency (%)
LED Current, ILED (mA)
All curves taken at VIN = 3 V to 18 VDC in SEPIC configuration, with 300-mA nominal output current, 4 serial
LEDs. TA = 25°C.
200
150
70
60
50
100
40
50
30
0
2
4
6
8
10
12
14
16
18
Input Voltage, VIN (V)
20
0
C019
Figure 24. LED Current vs Input Voltage
20
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2
4
6
8
10
12
14
16
Input Voltage, VIN (V)
18
20
C020
Figure 25. Efficiency vs Input Voltage
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9 Power Supply Recommendations
Use any AC or DC power supply capable of the supply voltage required for the application and a power output
capability greater than the total circuit input power.
10 Layout
10.1 Layout Guidelines
The VP input capacitor and ADJ resistors/capacitor should be placed as close to the IC as possible. The VCC
capacitor should also be placed close to the device. Minimize the switching node area (connection between Q1,
L1, and D3) and keep the discontinuous current switching path as short as possible. This includes the loop
formed by Q1, COUT, and the diode D3 (designated by the red arrows). The ground connections for the TPS92560
and RSEN should be tide closely together with a solid ground plane. The node connecting the SEN pin, SRC pin,
the source of Q1, CVCC, and COUT should be small with all components connected closely together.
10.2 Layout Example
D3
LED+
L1
+
Q1
GATE
COUT
AC1
SRC
PGND
VCC
AC2
SEN
VP
GND
ADJ
VIN
CVCC
LED-
-
GND
VIA
Figure 26. TPS92560 Layout Example
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS92560DGQ/NOPB
ACTIVE
HVSSOP
DGQ
10
1000
RoHS & Green
SN
Level-3-260C-168 HR
-40 to 125
SN3B
TPS92560DGQR/NOPB
ACTIVE
HVSSOP
DGQ
10
3500
RoHS & Green
SN
Level-3-260C-168 HR
-40 to 125
SN3B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of