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TPS92638-Q1
SLVSCK5C – SEPTEMBER 2014 – REVISED JANUARY 2020
TPS92638-Q1 8-Channel Linear LED Driver With PWM Dimming
1 Features
3 Description
•
The TPS92638-Q1 is an eight-channel linear LED
driver with PWM dimming control. Its design is ideal
for driving multiple strings of LEDs up to a medium
power range.
1
•
•
•
•
•
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
– Device Temperature Grade 1: –40°C to 125°C
Ambient Operating Temperature Range
– Device HBM ESD Classification Level H2
– Device CDM ESD Classification Level C3B
Functional safety capable
– Documentation available to aid functional
safety system design
8-Channel LED Driver With Analog and PWM
Dimming
Wide Input-Voltage Range: 5 V–40 V
Adjustable Constant Output Current Set by
Reference Resistor
– Maximum Current: 70 mA per Channel
– Maximum Current: 560 mA in Parallel
Operation Mode
– Accuracy: ±3% per Channel
– Accuracy: ±4% per Device
PWM Dimming Input (PWM)
– Turn ON/OFF Delay Time: 25 µs (typ.), 45 µs
(max.)
4-Bank PWM Dimming to Control 8 Channels
Open- and Shorted-LED Detection With Deglitch
Fault Pin for Open, Short, and Thermal-Shutdown
Failure Reporting, Allowing Parallel Bus
Connection of up to 15 Devices
Temperature-Current Foldback to Prevent
Thermal Shutdown, With Programmable
Threshold
Single Resistor for Stop-Current Set Point
Single Resistor for Tail-Current Set Point
Operating Junction Temperature Range –40°C to
150°C
Package: 20-Pin Thermally Enhanced PWP
Package (PDSO)
This device can drive up to eight strings with one to
three LEDs in each string, at a total current up to
70 mA per channel. Outputs can be in parallel to
provide higher-current drive up to 560 mA.
In multiple-string applications, the device offers the
advantage of having common-cathode connection of
the LED stings. So, there is only a single return wire
needed instead of one per LED string that a system
with low-side current sense would need.
The device has the capability for switching LED
current between high current and low current for stop
and tail applications. Two reference resistors set the
two LED current levels from each output.
The included temperature monitor reduces the LED
drive current if the IC junction temperature exceeds a
thermal threshold. The temperature threshold is
programmable through an external resistor. One can
disable the thermal current-monitor feature by
connecting the TEMP pin to ground. Output of the
junction temperature as an analog voltage is available
as a factory program option.
Device Information(1)
PART NUMBER
TPS92638-Q1
LED Lighting Applications (for example, daytime
running light, position light, fog light, rear light,
stop or tail light, interior lighting)
BODY SIZE (NOM)
6.50 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Typical Application Schematic
Tail
SUPPLY
EN
PWM1
PWM2
Stop
Stop
PWM3
PWM4
STOP
FAULT
V (bat)
2 Applications
PACKAGE
HTSSOP (20)
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
TPS92638-Q1
REFHI
REF
TEMP
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS92638-Q1
SLVSCK5C – SEPTEMBER 2014 – REVISED JANUARY 2020
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Typical Application Schematic.............................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
2
3
4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
4
4
4
4
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 12
Detailed Description ............................................ 13
9.1 Overview ................................................................. 13
9.2 Functional Block Diagram ....................................... 13
9.3 Feature Description................................................. 14
9.4 Device Functional Modes........................................ 20
10 Application and Implementation........................ 21
10.1 Application Information.......................................... 21
10.2 Typical Applications .............................................. 21
11 Power Supply Recommendations ..................... 28
12 Layout................................................................... 28
12.1 Layout Guidelines ................................................. 28
12.2 Layout Example .................................................... 28
12.3 Thermal Information .............................................. 29
13 Device and Documentation Support ................. 30
13.1 Trademarks ........................................................... 30
13.2 Electrostatic Discharge Caution ............................ 30
13.3 Glossary ................................................................ 30
14 Mechanical, Packaging, and Orderable
Information ........................................................... 30
5 Revision History
Changes from Revision B (March 2015) to Revision C
•
Page
Added functional safety link to the Features section ............................................................................................................. 1
Changes from Revision A (November 2014) to Revision B
Page
•
Changed values for channel accuracy and device accuracy ................................................................................................ 1
•
Deleted text from the fourth paragraph of the Description section ........................................................................................ 1
Changes from Original (September 2014) to Revision A
Page
•
Changed some items on the Features list ............................................................................................................................. 1
•
Changed the items in the Applications section ..................................................................................................................... 1
•
Changed the paragraphs of the Description section with new text ........................................................................................ 1
•
Deleted the existing Pin Functions table and replaced with new one ................................................................................... 3
•
Added new sections and subsections to the data sheet beginning with the Specifications section ...................................... 4
2
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SLVSCK5C – SEPTEMBER 2014 – REVISED JANUARY 2020
6 Pin Configuration and Functions
20-Pin PDSO With PowerPAD Package
PWP Package
(Top View)
SUPPLY
1
20
IOUT1
EN
2
19
IOUT2
STOP
3
18
IOUT3
PWM1
4
17
IOUT4
PWM2
5
16
IOUT5
PWM3
6
15
IOUT6
PWM4
7
14
IOUT7
FAULT
8
13
IOUT8
TEMP
9
12
GND
REFHI
10
11
REF
Thermal
Pad
Pin Functions
PIN
NAME
EN
NO.
I/O
DESCRIPTION
2
I
Enable and shutdown
FAULT
8
I/O
Fault pin
GND
12
—
Ground
IOUT1
20
O
Current output pin
IOUT2
19
O
Current output pin
IOUT3
18
O
Current output pin
IOUT4
17
O
Current output pin
IOUT5
16
O
Current output pin
IOUT6
15
O
Current output pin
IOUT7
14
O
Current output pin
IOUT8
13
O
Current output pin
PWM1
4
I
PWM input and channel ON-OFF for CH1 and CH2
PWM2
5
I
PWM input and channel ON-OFF for CH3 and CH4
PWM3
6
I
PWM input and channel ON-OFF for CH5 and CH6
PWM4
7
I
PWM input and channel ON-OFF for CH7 and CH8
REF
11
I
Reference resistor terminal for normal current setting
REFHI
10
I
Reference resistor pin for stop light current setting
STOP
3
I
Signal input for the stop light
SUPPLY
1
I
Input pin – VBAT supply
TEMP
9
I
Temperature foldback threshold programming
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SLVSCK5C – SEPTEMBER 2014 – REVISED JANUARY 2020
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
–0.3
45
V
See (2)
–0.3
22
V
REF, REFHI, TEMP
See (2)
–0.3
7
V
TJ
Virtual junction temperature range
–40
150
°C
TA
Operating ambient temperature range
–40
125
°C
Tstg
Storage temperature range
–65
150
°C
SUPPLY, IOUTx, PWMx, EN,
STOP
Unregulated input
FAULT
(1)
(2)
(3)
(2) (3)
UNIT
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to GND.
Absolute maximum voltage 45 V for 200 ms
7.2 ESD Ratings
VALUE
Human body model (HBM), per AEC Q100-002 (1)
V(ESD)
(1)
Electrostatic discharge
Charged device model
(CDM), per AEC Q100-011
UNIT
±2000
Corner pins (SUPPLY,
IOUT1, REF and REFHI)
±750
Other pins
±500
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VIH
VIL
TJ
NOM
MAX
UNIT
SUPPLY
5
40
EN, STOP
2
40
FAULT
2
20
PWMx
2
40
EN, STOP
0
0.7
FAULT
0
0.7
PWMx
0
0.7
REF, REFHI, TEMP
0
5
V
–40
150
°C
Operating junction temperature range
V
V
V
7.4 Thermal Information
TPS92638-Q1
THERMAL METRIC
(1)
PWP (HTSSOP)
UNIT
20 PINS
RθJA
Junction-to-ambient thermal resistance
37.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
25.2
°C/W
RθJB
Junction-to-board thermal resistance
21.7
°C/W
ψJT
Junction-to-top characterization parameter
0.8
°C/W
ψJB
Junction-to-board characterization parameter
21.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
2.1
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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SLVSCK5C – SEPTEMBER 2014 – REVISED JANUARY 2020
7.5 Electrical Characteristics
V(VIN) = 14 V, TJ = –40°C to 150°C (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0.5
0.6
0.9
mA
10
µA
SUPPLY VOLTAGE AND CURRENT (SUPPLY)
I(Quiescent)
Quiescent current
V(PWMx), V(EN) = high, I(IOUTx) = 40 mA
I(Shutdown)
Shutdown current
V(PWMx) = 0 V, V(EN) = 0 V
I(fault)
Shutdown current in fault mode
(device to GND)
Shutdown current in fault mode
(from SUPPLY)
0.5
V(PWMx), V(EN) = high, V(FAULT) = low,
V(SUPPLY) = 5 V to 40 V, I(IOUTx) = 30 mA
0.75
1
mA
1.15
PWM, EN, STOP
I(EN-pd)
EN internal pulldown
V(EN) = 0 V to 40 V
5
µA
VIH(PWMx)
Logic input, high level (1)
PWMx rising from a low state, IOUTx disabled
1.161
1.222
1.283
V
VIL(PWMx)
Logic input, low level (1)
PWMx falling from a high state, IOUTx enabled
1.119
1.178
1.237
V
V(PWM-hys)
Hysteresis
I(PWM-pd)
PWMx internal pulldown current
I(STOP-PD)
STOP internal pulldown
0.5
44
mV
V(PWMx) = 0 V to 20 V
180
300
nA
V(PWMx) = 20 V to 40 V
0.2
2
µA
0.1
1
µA
2
70
mA
16
560
mA
5 mA ≤ I(IOUTx) < 10 mA, V(SUPPLY) = 5 V–40 V
Channel accuracy = (I(IOUTx) – I(avg)) / I(avg) (2)
–7%
7%
10 mA ≤ I(IOUTx) ≤ 70 mA, V(SUPPLY) = 5 V–40 V
Channel accuracy = (I(IOUTx) – I(avg)) / I(avg) (2)
–3%
3%
–18%
18%
5 mA ≤ I(IOUTx) < 10 mA, V(SUPPLY) = 5 V to 20 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting) (3)
–8%
8%
10 mA ≤ I(IOUTx) ≤ 70 mA, V(SUPPLY) = 5 V to 20 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting) (3)
–4%
4%
2 mA ≤ I(IOUTx) < 5 mA, V(SUPPLY) = 5 V to 20 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting) (3)
–20%
20%
5 mA ≤ I(IOUTx) < 10 mA, V(SUPPLY) = 20 V to 40 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting) (3)
–10%
10%
10 mA ≤ I(IOUTx) ≤ 70 mA, V(SUPPLY) = 20 V to 40 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting) (3)
–8%
8%
2 mA ≤ I(IOUTx) < 5 mA, V(SUPPLY) = 20 V to 40 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting) (3)
–20%
20%
I(IOUTx) = 20 mA
1.198
1.222
1.246
V
1.198
1.222
1.246
V
V(STOP) = 0 V to 40 V
CURRENT REGULATION (IOUTx)
I(IOUTx)
Regulated output current range
I(IOUT_TOTAL)
ΔIO(channel)
Channel accuracy
Each channel, V(PWMx) = high, V(EN) = high
V(SUPPLY) > 5 V, V(IOUTx) > 0.9 V
8 channels in parallel mode, V(PWMx) = high, V(EN)
= high, V(SUPPLY) > 5 V, V(IOUTx) > 0.9 V
2 mA ≤ I(IOUTx) < 5 mA, V(SUPPLY) = 5 V–40 V
Channel accuracy = (I(IOUTx) – I(avg)) / I(avg) (2)
ΔIO(device)
Device accuracy
V(REF)
Reference voltage
V(REFHI)
STOP reference voltage
G(I)
Ratio of I(IOUTx) to reference
current
I(IOUTx) / I(REF) or I(IOUTx) / ( I(REF)
+ I(REFHI))
V(DROP_IOUTx)
V(DROP)
(1)
(2)
(3)
Dropout voltage
200
mA/mA
I(IOUTx) = 70 mA
0.71
0.9
V
I(IOUTx) = 35 mA
0.28
0.45
V
VIH and VIL track each other. That is, both are simultaneously at MAX, MIN, or the same intermediate point. Therefore, there can be no
overlap of the VIH and VIL values during normal operation.
I(AVG) = [I(IOUT1) + I(IOUT2) + I(IOUT3) + I(IOUT4) + I(IOUT5) + I(IOUT6) + I(IOUT7) + I(IOUT8)] / 8
I(setting) is the target current set by R(REF).
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Electrical Characteristics (continued)
V(VIN) = 14 V, TJ = –40°C to 150°C (unless otherwise stated)
PARAMETER
Current slew-rate rise and fall
times
I(slew)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Current rising from 10% to 90% or falling from
90% to 10% at I(IOUTx) = 35 mA. (4)
1.5
6
12
mA/µs
Current rising from 10% to 90% or falling from
90% to 10% at I(IOUTx) = 70 mA. (4)
3
6
12
mA/µs
0.4
V
FAULT (FAULT)
VOL
Logic output low level
500-µA external pullup
VOH
Logic output high level
1-µA external pulldown
I(pulldown)
Strong pulldown current
I(pullup)
Pullup current
2
V
600
780
1000
µA
4
8
12
µA
PROTECTION
V(OL_th)
Open-load detection voltage
V(OL_TH) = V(SUPPLY) – V(IOUTx)
50
100
150
mV
V(OL_hys)
Open-load detection hysteresis
100
200
300
mV
V(SHORT_th)
Short-detection voltage
0.846
0.89
0.935
V(SHORT_hys)
Short-detection hysteresis
318
335
352
N(SHORT_deg)
Open-load detection PWM
deglitch cycle number
7
8
R(REF_th),
R(REFHI_th)
REF and REFHI pins, parallelresistor short detection
1400
2300
V
mV
Cycles
Ω
THERMAL MONITOR
T(shutdown)
Thermal shutdown
T(hys)
Thermal shutdown hysteresis
T(th)
Thermal foldback activation
temperature
I(TFC-min)
Minimum foldback current, ratio
of I(setting)
V(T-disable)
Thermal-foldback-function
disable threshold of V(TEMP)
K(temp1)
Change of V(TEMP) relative to
T(J)
(4)
155
I(IOUTx) = 90% × I(setting), TEMP terminal floating
170
°C
15
°C
95
110
125
40%
50%
60%
0
°C
0.2
V
25
mV/°C
See Parameter Measurement Information for the load model for the slew-rate test and delay-time test.
7.6 Switching Characteristics
PARAMETER
TEST CONDITION
MIN
t(startup)
Start-up time
V(SUPPLY) > 5 V, I(IOUTx) = 15 mA, I(setting) = 30 mA (1)
td(on)
Delay time between PWM rising
edge to 10% of I(IOUTx)
Two LEDs in series, 10-kΩ resistor in parallel
td(off)
Delay time between PWM falling
edge to 90% of I(IOUTx)
Two LEDs in series, 10-kΩ resistor in parallel
1.2
Open-load detection deglitch
During PWM, count the number of continuous cycles
when V(SUPPLY) – V(IOUTx) < V(OL_th)
Short-detection deglitch
During PWM, count the number of continuous cycles
when V(IOUTx) < V(SHORT_th)
6
MAX
UNIT
150
µs
20
45
µs
20
45
µs
2.2
3.2
ms
7
1.2
(1)
TYP
7
8
2.2
3.2
8
Cycles
ms
Cycles
Start-up is complete when I(setting) is 30 mA and I(IOUTx) increases from 0 to 15 mA.
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SLVSCK5C – SEPTEMBER 2014 – REVISED JANUARY 2020
7.7 Typical Characteristics
2%
2%
Ch1
Ch2
Ch3
Ch4
1.5%
Ch1
Ch2
Ch3
Ch4
1%
Channel Accuracy
Channel Accuracy
1%
Ch5
Ch6
Ch7
Ch8
0.5%
0
-0.5%
Ch5
Ch6
Ch7
Ch8
0
-1%
-1%
-1.5%
-2%
-50
-2%
0
5
10
15
20
25
30
Supply Voltage (V)
35
40
45
0
D005
50
100
Ambient Temperature (qC)
150
D002
V(SUPPLY) = 12 V
Figure 1. I(IOUTx) Accuracy vs V(SUPPLY)
Figure 2. I(IOUTx) Accuracy vs Ambient Temperature
2%
2%
Ch1
Ch2
Ch3
Ch4
0
-1%
Ch5
Ch6
Ch7
Ch8
0
-1%
-2%
-50
0
50
100
Ambient Temperature (qC)
-2%
-50
150
Figure 3. I(IOUTx) Accuracy vs Ambient Temperature
150
D004
Figure 4. I(IOUTx) Accuracy vs Ambient Temperature
35.05
35
35
34.95
34.95
34.9
Current (mA)
34.9
34.85
34.8
34.75
34.7
34.6
50
100
Ambient Temperature (qC)
V(SUPPLY) = 40 V
35.05
34.65
0
D003
V(SUPPLY) = 5 V
Current (mA)
Ch1
Ch2
Ch3
Ch4
1%
Channel Accuracy
Channel Accuracy
1%
Ch5
Ch6
Ch7
Ch8
Ch1
Ch2
Ch3
Ch4
34.55
-50
34.8
34.75
34.7
34.65
Ch5
Ch6
Ch7
Ch8
0
34.85
Ch1
Ch2
Ch3
Ch4
34.6
34.55
50
100
Ambient Temperature (qC)
V(SUPPLY) = 12 V
150
34.5
-50
Ch5
Ch6
Ch7
Ch8
0
D009
50
100
Ambient Temperature (qC)
150
D010
V(SUPPLY) = 5 V
Figure 5. I(IOUTx) Current vs Temperature
Figure 6. I(IOUTx) Current vs Temperature
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Typical Characteristics (continued)
36
4%
Ch1
Ch2
Ch3
Ch4
35.9
35.8
35.7
Channel Accuracy
2%
Current (mA)
35.6
35.5
35.4
35.3
35.2
35.1
35
34.9
Ch1
Ch2
Ch3
Ch4
0
-2%
Ch5
Ch6
Ch7
Ch8
34.8
-50
-4%
0
50
100
Ambient Temperature (qC)
150
0
Figure 7. I(IOUTx) Current vs Temperature
300
400
500
R(REF) (:)
600
700
800
D001
TA = 25ºC
Figure 8. I(IOUTx) Channel Accuracy vs R(REF)
2%
Ch1
Ch2
Ch3
Ch4
35
Ch5
Ch6
Ch7
Ch8
Ch1
Ch2
Ch3
Ch4
1.5%
1%
Channel Accuracy
30
Current (mA)
200
V(SUPPLY) = 12 V
40
25
20
15
Ch5
Ch6
Ch7
Ch8
0.5%
0
-0.5%
10
-1%
5
-1.5%
-2%
0
0
100
200
300
400
500
R(REF) (:)
600
700
0
800
20
D008
Figure 9. I(IOUTx) Current vs R(REF)
40
60
Duty Cycle
80
100
D006
Figure 10. I(IOUTx) Accuracy vs PWM Duty Cycle
40
1.4
30
Ch5
Ch6
Ch7
Ch8
1.2
Reference Voltage (V)
Ch1
Ch2
Ch3
Ch4
35
Current (mA)
100
D011
V(SUPPLY) = 40 V
25
20
15
10
1
0.8
0.6
0.4
0.2
5
0
0
20
40
60
Duty Cycle
80
100
0
80
90
D007
Figure 11. I(IOUTx) Current vs PWM Duty Cycle
8
Ch5
Ch6
Ch7
Ch8
100
110
120
130
Junction Temperature (qC)
140
150
D012
Figure 12. Reference Voltage vs Junction Temperature
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Typical Characteristics (continued)
CH1: V(IOUT1)
CH4: FAULT
CH2: I(IOUT1)
CH3: V(SUPPLY)
Figure 13. Cold Cranking Behavior
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
I(IOUTx) = 35 mA
CH3: V(IOUT8)
CH1: V(IOUT1)
CH4: FAULT
CH2: I(IOUT1)
CH3: V(SUPPLY)
Figure 14. Jump Start From 13.5 V to 26 V
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
I(IOUTx) = 35 mA
CH3: V(IOUT8)
Figure 15. Superimposed Alternating Voltage, 12 V–18 V,
15 Hz
Figure 16. Superimposed Alternating Voltage, 12 V–18 V,
200 Hz
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
I(IOUTx) = 35 mA
CH3: V(IOUT8)
Figure 17. Superimposed Alternating Voltage, 12 V–18 V,
2 kHz
CH2: V(REF)
I(IOUTx) = 35 mA
CH3: V(IOUT8)
Figure 18. Superimposed Alternating Voltage, 12 V–18 V,
10 kHz
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Typical Characteristics (continued)
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
I(IOUTx) = 35 mA
CH3: V(IOUT8)
Figure 19. Superimposed Alternating Voltage, 12 V–18 V,
20 kHz
CH1: V(IOUT1)
CH4: I(FAULT)
CH2: I(IOUT1)
CH3: V(SUPPLY)
Figure 21. Transient Overvoltage (16 V – 18 V – 17 V – 16 V)
CH1: V(IOUT1)
CH4: I(FAULT)
CH2: I(IOUT1)
CH3: V(SUPPLY)
Figure 23. Slow Decrease and Quick Increase
10
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
I(IOUTx) = 35 mA
CH3: V(IOUT8)
Figure 20. Superimposed Alternating Voltage, 12 V–18 V,
30 kHz
CH1: V(IOUT1)
CH4: I(FAULT)
CH2: I(IOUT1)
CH3: V(SUPPLY)
Figure 22. Transient Undervoltage (10.8 V – 9 V – 10.8 V)
CH1: V(IOUT1)
CH4: I(FAULT)
CH2: I(IOUT1)
CH3: V(SUPPLY)
Figure 24. Slow Decrease and Slow Increase
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Typical Characteristics (continued)
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(FAULT)
CH3: V(REF)
Figure 25. Slow Power Up (V(SUPPLY), V(EN), V(PWMx) Rise
Together From 0 V to 14 V by 0.2 V/s)
CH1: V(PWM3)
CH4: I(IOUT8)
CH2: V(PWM4)
Duty cycle = 50%
CH3: V(REF)
V(SUPPLY), V(EN) = 14 V
Figure 27. PWM Dimming, Dimming Frequency = 1000 Hz
CH1: V(REFHI)
CH4: I(IOUT8)
CH2: V(REF)
CH3: I(IOUT1)
Figure 29. Load Transient, I(IOUTx) Decreases From 70 mA to
35 mA
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(FAULT)
CH3: V(REF)
Figure 26. Slow Power Down (V(SUPPLY), V(EN), V(PWMx) Fall
Together From 14 V to 0 V by 0.2 V/s)
CH1: V(REFHI)
CH4: I(IOUT8)
CH2: V(REF)
CH3: I(IOUT1)
Figure 28. Load Transient, I(IOUTx) Increases From 35 mA to
70 mA
CH1: V(SUPPLY)
CH2: V(REF)
I(IOUTx) = 35 mA
CH3: V(FAULT)
Figure 30. Line Transient, V(SUPPLY), V(EN), V(PWMx) Ramp
From 9 V to 16 V to 9 V by 0.1 V/µs
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8 Parameter Measurement Information
SUPPLY
IOUTx
EN
ton
PWM1
PWM2
PWM3
PWM4
0.7 V
TPS92638-Q1
V(ba t)
STOP
FAULT
REFHI
10
kΩ
toff
PWMX
17 Ω at 70 mA
40 Ω at 30 mA
I2
5.5 V
90%
IOUTX
REF
GND TEMP
10%
I1
t1
t2
t3
t4
t5
t6
Figure 31. TPS92638-Q1 Test Circuit and Waveforms
12
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9 Detailed Description
9.1 Overview
The TPS92638-Q1 device is an 8-channel constant-current regulator with PWM dimming, designed for highbrightness red or white LEDs in automotive lighting applications. Each channel has up to 70-mA current
capability and 560 mA when paralleled. The device provides excellent current matching between channels and
devices. The high-side current source allows LED common-cathode connection. The advanced control loop
allows high accuracy between channels even with different numbers of LEDs connected on the output.
The design of the TPS92638-Q1 device is specifically for use in STOP-and-TAIL applications where the LED
current switches between a high current (indicating stop or brake) and a lower current (for normal taillight
operation).
The TPS92638-Q1 device monitors fault conditions on the output and reports its status on the FAULT pin. The
device features output short-to-ground detection, open-load detection, and thermal shutdown. The FAULT pin
allows maximum flexibility for determining the fault mode and reporting to the MCU in case of an error. For
applications lacking an MCU, connecting multiple TPS92638-Q1 devices in a bus is an option.
Integrated thermal foldback protects the device from thermal shutdown by reducing the output current linearly
when reaching a preset threshold. Provision for programming the temperature foldback threshold is through an
external resistor. Tying the TEMP pin to ground disables this function.
9.2 Functional Block Diagram
V(bat)
SUPPLY
TEMP
Thermal
Control
Current Regulator
REF
IOUT1
R(REF)
IOUT2
Current
Reference
IOUT3
REFHI
IOUT4
IOUT5
R(REF 1)
IOUT6
IOUT7
PWMx
IOUT8
EN
FAULT
Control Logic
STOP
GND
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9.3 Feature Description
9.3.1 LED Current Setting
Independent linear current regulators control the eight LED output channels. Global external resistors set the
current of each channel. The device also features two current levels, intended for stop and tail applications.
The internal current reference, I(REF), has two possible values depending on the state of the STOP input: When
STOP is low, REF, the current drawn from the REF pin, controls the output current. When STOP is high, the sum
of the currents drawn from the REFHI pin and REF pin controls the output current.
Equations Equation 1 and Equation 2 calculate values for the current-setting resistors:
when STOP = low
I(OUTx-TAIL) =
R(REF) =
Vref ´ G(I)
R(REF)
Vref ´ G(I)
I(OUTx-TAIL)
(1)
when STOP = high
I(IOUTx-STOP) =
Vref ´ G(I)
R (REFHI)
+
Vref ´ G(I)
R (REF)
Vref ´ G(I)
R (REFHI) =
I(IOUTx-STOP) -
Vref ´ G(I)
R (REF)
(2)
where
Vref is the internal reference voltage
G(I) is the ratio of output current to reference current
9.3.2 PWM Control
The device features four independent PWM-bank dimming-control pins, each of which controls one bank
consisting of two channels. A PWM input can also function as a shutdown pin for an unused bank. Tying PWM to
ground disables the corresponding outputs. The PWM signal has a precise threshold, which a designer can use
to define the start-up voltage of an LED as an undervoltage-lockout (UVLO) function with a divider resistor from
SUPPLY. Table 1 shows the PWM bank mapping.
Table 1. PWM Bank Mapping
PWM INPUT
CONTROLLED OUTPUTS
PWM1
OUT1, OUT2
PWM2
OUT3, OUT4
PWM3
OUT5, OUT6
PWM4
OUT7, OUT8
9.3.3 Fault Diagnostics
The TPS92638-Q1 device has a fault pin, FAULT, which is for the short, open, and thermal-shutdown general
faults. This arrangement allows the maximum flexibility based on all requirements and application conditions.
Connection the device FAULT pin to the MCU allows for fault reporting. The FAULT pin is an open-drain
transistor with a weak internal pullup.
The device releases the FAULT bus when external circuitry toggles the FAULT bus, or on a power cycle of the
device. In an application that has no MCU, only cycling power clears the fault.
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The following faults result in the FAULT pin going low: thermal shutdown, open load, or output short circuit. For
thermal shutdown and open LED, release of the FAULT pin occurs when the thermal shutdown or open-LED
condition no longer exists. For other faults, the FAULT pin remains low even after the condition does not exist,
and clearing is only possible by toggling FAULT or by power cycling of the device.
Fault removed
SUPPLY
and EN
FAULT
Faulty
Channel
LED
Open
2 ms
LED
Short
to GND
2 ms
LED Open
7-PWM Cycles
LED Short
7 PWM Cycles
Other
Channels
PWM
Figure 32. TPS92638-Q1 Device Fault-Handling Behavior, FAULT Bus Floating
The design of an application with no MCU allows the connecting together of up to 15 TPS92638-Q1 FAULT̅ pins.
When one or more devices have errors, their corresponding FAULT̅ pins go low, thus pulling down the connected
FAULT bus and shutting down all device outputs. Figure 33 illustrates the FAULT line bus connection.
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TPS92638-Q1
SUPPLY
Internal
Pullup
FAULT
Fault
Logic
GND
Up to 13 ICs
TPS92638-Q1
SUPPLY
Internal
Pullup
FAULT
Fault
Logic
GND
Figure 33. Connection of FAULT Line Bus
The device releases the FAULT bus by external circuitry pulling the FAULT bus high, by toggling of the EN pin,
or by a power cycle of the device. In an application without an MCU, only a power cycle clears the fault.
Figure 34 is a detailed timing diagram.
16
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Fault removed
SUPPLY
and EN
FAULT
Faulty
Channel
Current
LED
Open
2 ms
LED
Short
to GND
2 ms
LED Open
7-PWM Cycles
LED Short
7 PWM Cycles
Other
Channel
Current
PWM
Figure 34. TPS92638-Q1 Device Fault-Handling Behavior, FAULT Bus Externally Pulled High
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Table 2. Fault Table
JUDGMENT CONDITION
FAILURE MODE
Short Circuit:
1 or several LED
strings
Open Load:
1 or several LED
strings
DETECTION
VOLTAGE
CHANNEL
STATUS
DETECTION
MECHANISM
V(SUPPLY) > 5 V
On
V(IOUTx) < 0.9 V
V(SUPPLY) > 5 V
Short to Battery:
1 or several LED
strings
V(SUPPLY) > 5 V
Thermal Shutdown
V(SUPPLY) > 5 V
On
On or off
On or off
V(SUPPLY) – V(IOUTx)
< 100 mV
V(SUPPLY) – V(IOUTx)
< 100 mV
> 170°C
DIAGNOSTIC
OUTPUT PIN (1)
ACTION
FAULT
Pulled low
FAULT
FAULT
FAULT
FAULT
DEVICE REACTION
FAILURE
REMOVED
Externally
pulled high
Failing strings turned off,
other CHs on
Toggle EN,
power cycle
Floating
All strings turned OFF
Toggle EN,
power cycle
Externally
pulled high
All strings stay ON
Failure
condition
removed
Floating
Failing strings stay ON,
other CHs turned OFF
Failure
condition
removed
Externally
pulled high
All strings stay ON
Failure
condition
removed
Floating
Failing strings stay ON,
other CHs turned OFF
Failure
condition
removed
All strings turned OFF
Temperature
< 155°C
Yes
No
Pulled low
Yes
Pulled low
Pulled low
SELF
CLEARING
Yes
Externally
pulled high
Floating
Thermal Foldback
V(SUPPLY) > 5 V
On or off
> 110°C
N/A
None
N/A
Reduced current to all
strings
Temperature
< 100°C
Yes
Reference Resistor
Short
V(SUPPLY) > 5 V
On or off
R(ref) < 1400 Ω
FAULT
Pulled low
N/A
All strings turned off
Toggle EN,
power cycle
No
(1)
If tying the diagnostic FAULT pin high externally, the pullup must be strong enough to override the internal pulldown.
9.3.3.1 Open-Load Detection
The device detects an open-load condition when the voltage across the channel, V(SUPPLY) – V(IOUTx), is less than
the open-load detection voltage, V(olv). When this condition is present for more than the open-load-detection
deglitch time, 2 ms when PWM is 100% on or 7 continuous PMW duty cycles when in the PWM dimming mode,
the device pulls FAULT low and turns off the faulted channel. With the FAULT pin tied high, all channels shut
down. The channel recovers on removal of the open condition. Note that the device may also detect an open
load if the sum of the forward voltages of the LEDs in a string is close to or greater than the supply voltage on
the SUPPLY pin.
9.3.4 Thermal Foldback
The TPS92638-Q1 device integrates thermal shutdown protection to prevent the IC from overheating. In addition,
to prevent LEDs from flickering due to rapid thermal changes, the device includes a programmable thermal
current foldback feature to reduce power dissipation at high junction temperatures.
The TPS92638-Q1 device reduces the LED current as the silicon junction temperature of the TPS92638-Q1
device increases (see Figure 35). Mounting the TPS92638-Q1 device on the same thermal substrate as the
LEDs allows use of this feature to limit the dissipation of the LEDs. As its junction temperature increases, the
TPS92638-Q1 device reduces the regulated current level, thereby reducing the dissipated power in the
TPS92638-Q1 and in the LEDs. The current reduction from the 100% level is typically 2% per degree Celsius
until the point where the current drops to 50% of the full value, which occurs at T(th) + 20ºC.
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Output Current in an LED String
I(setting)
90%
2% of I(setting)
per ºC
50%
T(th)
T(th) + 20°C
T(shutdown)
Figure 35. Thermal Foldback
Above this temperature, the device maintains the current at the 50% current level until the junction temperature
reaches the overtemperature shutdown threshold, T(shutdown). Changing the voltage on the TEMP pin adjusts the
temperature at which the current reduction begins. With TEMP left open, the definition of thermal monitor
activation temperature is the temperature at which the current reduction begins, T(th). The specification of T(th) in
the Electrical Characteristics table is at the 90% current level. T(th) increases as the voltage at the TEMP pin,
V(TEMP), decreases. Equation 3 provides an approximate calculation of T(th).
T(th) = - 121.7 °C/ V ´ V(TEMP) + 228.32°C
(3)
2
1.8
TEMP Pin Voltage (V)
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
Thermal Foldback Temperature (qC)
150
D004
Figure 36. TEMP Pin Voltage vs Thermal Foldback Temperature
A resistor connected between TEMP and GND reduces V(TEMP) and increases T(th). A resistor connected between
TEMP and a reference supply greater than 1 V increases V(TEMP) and reduces T(th).
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Pullup or Pulldown Resistor (k:)
100
V(res)
0V
3.3 V
5V
80
60
40
20
0
20
40
60
80
100
120
140
Thermal Foldback Temperature (ºC)
160
D005
Figure 37. Pullup and Pulldown Resistors vs T(th)
Figure 37 shows how the nominal value of the thermal monitor activation temperature varies with the voltage at
TEMP and with a resistor R(TEMP), either connected to GND or pulled up to 3 V or to 5 V.
In extreme cases, if the junction temperature exceeds the overtemperature limit, T(shutdown), the device disables all
regulators. Temperature monitoring continues, and the device re-activates the regulators, when the temperature
drops below the specified hysteresis threshold.
Note that it is possible for the TPS92638-Q1 device to transition rapidly between thermal shutdown and normal
operation. This can happen if the thermal mass attached to the exposed thermal pad is small and T(th) is too
close to the shutdown temperature. The period of oscillation depends on T(th), the dissipated power, the thermal
mass of any heatsink present, and the ambient temperature.
9.4 Device Functional Modes
The functional modes of the TPS92638-Q1 device are operational and non-operational. The device operates
normally when V(SUPPLY) is at least 5 V and not greater than 40 V.
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The following discussion includes several applications showing how to implement the TPS92638-Q1 device for
automotive lighting such as stop lights and taillights. Some of the examples demonstrate implementation of the
fault bus function or detail use of the device for higher-current applications.
10.2 Typical Applications
10.2.1 PWM Dimming by Bank
The TPS92638-Q1 device provides four PWM banks for output dimming. A TLC555-Q1 PWM generator can be
used on the to avoid the use of an MCU.
Battery
Tail
SUPPL Y
EN
PWM1
PWM2
IOUT1
IOUT2
IOUT3
PWM3
IOUT4
IOUT5
PWM4
IOUT6
STOP TPS92638-Q1 IOUT7
IOUT8
FAULT
VDD
TLC555-Q1
OUT
REFHI
REF
V(bat)
R(REF)
TEMP
R(TEMP)
GND
Figure 38. Schematic for PWM Dimming by Bank
10.2.1.1 Design Requirements
(1)
DESIGN PARAMETER
EXAMPLE VALUE
I(TAIL) (1)
20 mA
I(STOP) (1)
40 mA
I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.1.2 Detailed Design Procedure
The design uses the R(REF) reference resistor to set the maximum output current, and the TLC555-Q1 sets the
PWM duty cycle to control the dimming ratio.
G (I)
200
R (REF) = V(REF) ´
= 1.222 ´
= 6.11 kW
I(STOP)
0.04
(4)
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Duty cycle =
I(TAIL)
I(STOP)
=
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0.02
= 0.5 = 50%
0.04
(5)
10.2.1.3 Application Performance Plots
SUPPLY = EN = 14 V
CH1: PWM1
CH4: IOUT8
PWM freq. = 1 kHz
CH2: PWM2
Duty cycle = 50%
CH3: Vref
SUPPLY = EN = 14 V
CH1: PWM3
CH4: IOUT8
Figure 39. PWM Dimming by Bank, PWM1, PWM2, Analog
Reference and Output Current
PWM freq. = 1 kHz
CH2: PWM4
Duty cycle = 50%
CH3: Vref
Figure 40. PWM Dimming by Bank, PWM3, PWM4, Analog
Reference and Output Current
10.2.2 Two Brightness Levels for TAIL and STOP Lights
For a typical TAIL and STOP application, implementation using the TPS92638-Q1 device with an integrated
STOP and TAIL function is easy. The following schematic depicts the application circuit. In a typical application,
two independent sources, namely Tail and Stop, power the stop and tail lights. Using blocking diodes D0 and D1
with the TPS92638-Q1 device allows merging the STOP and TAIL functions, powered by a single supply.
Blocking diode D2 protects the STOP pin during a reverse battery scenario. The STOP pin has an internal
pulldown resistor to ensure a low state when STOP is not active.
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Tail
D0
Stop
SUPPL Y
D1
IOUT1
IOUT2
IOUT3
IOUT4
P WM3
IOUT5
IOUT6
P WM4
STOP TPS92638-Q1 IOUT7
IOUT8
FAULT
EN
P WM1
P WM2
Stop
D2
V(bat)
REFHI
REF
R(REFHI)
R(REF)
TEMP
R(TEMP)
GND
Figure 41. Schematic for Two Brightness Levels for TAIL and STOP Lights
10.2.2.1 Design Requirements
DESIGN PARAMETER
10 mA
I(STOP) (1)
40 mA
I(TAIL)
(1)
EXAMPLE VALUE
(1)
I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.2.2 Detailed Design Procedure
Designing the application consists in calculating the values of resistors to be used for the desired output currents.
G (I)
200
R (REF) = V(REF) ´
= 1.222 ´
= 24.44 kW
I(TAIL)
0.01
(6)
R (REFHI) = V(REFHI) ´
G (I)
I(STOP) - I(TAIL)
= 1.222 ´
200
= 8.146 kW
0.04 - 0.01
(7)
The recommended value for R(STOP) is 10 kΩ.
10.2.3 PWM Dimming by Modulated Supply
The TPS92638-Q1 device supports PWM dimming from the supply as depicted below. A high-side switch in the
body control module (BCM) usually implements supply dimming. Due to the nature of the high-side switch,
TPS92638-Q1 supply voltage is not strongly pulled down to ground, but depends on the decoupling capacitor
and total current consumption. The TPS92638-Q1 device keeps the output current constant as long as supply
voltage is adequate to overcome the LED forward voltage and dropout voltage.
When supply voltage drops too low to drive LEDs, the device shuts down the output channels on open-load
detection. Therefore, TI recommends ensuring channel shutdown using the PWM or EN inputs. Thus a resistor
string of R1 and R2 is recommended to ensure the lowest divided voltage is lower than PWM threshold.
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BCM
High-Side
Switch
TPS1H100-Q1
SUPPL Y
R1
EN
P WM1
P WM2
IOUT1
IOUT2
IOUT3
P WM3
IOUT4
IOUT5
P WM4
IOUT6
STOP TPS92638-Q1 IOUT7
IOUT8
FAULT
R2
REFHI
REF
V(bat)
R(REF)
TEMP
R(TEMP)
GND
Figure 42. Schematic for PWM Dimming by Modulated Supply
10.2.3.1 Design Requirements
(1)
DESIGN PARAMETER
EXAMPLE VALUE
I(TAIL) (1)
30 mA
I(STOP) (1)
50 mA
I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.3.2 Design Procedure
The R(REF) reference resistor sets the current.
G (I)
200
R (REF) = V(REF) ´
= 1.222 ´
= 4.888 kW
I(STOP)
0.05
Duty cycle =
I(TAIL)
I(STOP)
V(SUPPLY) min ´
(8)
0.03
=
= 0.6 = 60%
0.05
R2
R1 + R 2
(9)
< V(PWM _ threshold)
(10)
10.2.4 Driving LEDs From a Single Device With Channels in Parallel
The TPS92638-Q1 device the parallel driving of LED strings supports by combining multiple channels in parallel
to achieve better thermal performance and higher current-driving capability.
24
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Battery
SUPPLY
IOUT1
IOUT2
IOUT3
IOUT4
PWM3
IOUT5
IOUT6
PWM4
STOP TPS92638-Q1 IOUT7
IOUT8
FAULT
EN
PWM1
PWM2
Stop
V(bat)
REFHI
REF
R(REFHI)
R(REF)
TEMP
R(TEMP)
GND
Figure 43. Schematic for Driving With a Single Device Using Parallel Channels
10.2.4.1 Design Requirements
DESIGN PARAMETER
(1)
EXAMPLE VALUE
I(TAIL) (1)
30 mA
I(STOP) (1)
100 mA
I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.4.2 Design Procedure
The R(REF) and R(REFHI) reference resistors set the current. R(REF) sets the tail current, and R(REF) and R(REFHI) set
the stop current.
G (I)
200
R (REF) = V(REF) ´
= 1.222 ´
= 16.29 kW
I(TAIL) / N(channel)
0.03 / 2
(11)
(12)
10.2.5 Driving LEDs From Multiple Devices With Channels in Parallel
For design flexibility, there is also support for using multiple TPS92638-Q1 devices in parallel driving between
different devices. The following diagram shows a combination that uses both devices and channels in parallel to
drive high-current loads.
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Battery
SUPPL Y
EN
PWM1
PWM2
PWM3
PWM4
STOP TPS92638-Q1
FAULT
Stop
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
REFHI
REF
R(REFH)
V(bat)
R(REF)
TEMP
R(TEMP)
GND
SUPPL Y
EN
PWM1
PWM2
PWM3
PWM4
STOP TPS92638-Q1
FAULT
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
REFHI
REF
R(REFHI)
R(REF)
R(TEMP)
TEMP
GND
Figure 44. Schematic for Driving With Multiple Devices Using Parallel Channels
10.2.5.1 Design Requirements
DESIGN PARAMETER
(1)
EXAMPLE VALUE
I(TAIL) (1)
60 mA
I(STOP) (1)
200 mA
I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.5.2 Design Procedure
The R(REFHI) and R(REF) reference resistors set the current. R(REF) by itself sets the tail current. R(REF) and R(REFHI)
together set the stop current. In different applications, reference resistors can be set to different values for
different devices to achieve current flexibility. In this document, for simplicity, the application sets the same
reference current in both devices.
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R (REF) = V(REF) ´
SLVSCK5C – SEPTEMBER 2014 – REVISED JANUARY 2020
G (I)
I(TAIL) / N(channel)
R (REFHI) = V(REFHI) ´
= 1.222 ´
200
= 16.29 kW
0.06 / 4
G (I)
(I(STOP) - I(TAIL) ) / N(channel)
= 1.222 ´
(13)
200
= 6.98 kW
(0.2 - 0.06) / 4
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(14)
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11 Power Supply Recommendations
The TPS92638-Q1 device is qualified for automotive applications. The normal power supply connection is
therefore to an automobile electrical system that provides a voltage within the range specified in Recommended
Operating Conditions.
12 Layout
12.1 Layout Guidelines
In order to prevent thermal shutdown, TJ must be less than 150°C. If the input voltage is very high, the power
dissipation might be large. Currently there is the TSSOP-EP package which has good thermal impedance, but at
the same time, the PCB layout is also very important. Good PCB design can optimize heat transfer, which is
absolutely essential for the long-term reliability of the device.
• Maximize the copper coverage on the PCB to increase the thermal conductivity of the board, because the
major heat-flow path from the package to the ambient is through the copper on the PCB. Maximum copper is
extremely important when there are not any heat sinks attached to the PCB on the other side of the package.
• Add as many thermal vias as possible directly under the package ground pad to optimize the thermal
conductivity of the board.
• All thermal vias should be either plated shut or plugged and capped on both sides of the board to prevent
solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.
12.2 Layout Example
Power ground
on both top and
bottom layers
VIN
1
20
IOUT1
TPS92638-Q1
EN
2
19
IOUT2
STOP
3
18
IOUT3
PWM1
4
17
IOUT4
PWM2
5
16
IOUT5
PWM3
6
15
IOUT6
PWM4
7
14
IOUT7
FAULT
8
13
IOUT8
TEMP
9
12
GND
REFH
10
11
REF
VIA to Ground
Thermal pad
Figure 45. TPS92638-Q1 Layout Diagram
28
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12.3 Thermal Information
This device operates a thermal shutdown (TSD) circuit as a protection from overheating. For continuous normal
operation, the junction temperature should not exceed the thermal-shutdown trip point. If the junction temperature
exceeds the thermal-shutdown trip point, the output turns off. When the junction temperature falls below the
thermal-shutdown trip point minus hysteresis, the output turns on again.
Calculate the power dissipated by the device according to the following formula:
8
P(IC) = V(SUPPLY) ´ I(SUPPLY) -
å
n k ´ V(LEDk) ´ I(LEDk) -
V(REF)2
R (REF)
-
V(REFHI)2
R (REFHI)
(15)
k =1
where:
nk = Number of LEDs for x channel
V(LEDk)= Voltage drop across one LED for x channel
V(REF) = Reference voltage, typically 1.24 V
I(LEDk) = Average LED current for channel k
After determining the power dissipated by the device, calculate the junction temperature from the ambient
temperature and the device thermal impedance.
TJ = TA + R qJA ´ P(IC)
(16)
where:
TA = Ambient temperature
RθJA = Junction-to-ambient thermal impedance
P(IC) = Dissipated power
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13 Device and Documentation Support
13.1 Trademarks
All trademarks are the property of their respective owners.
13.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and without
revision of this document. For browser-based versions of this data sheet, see the left-hand navigation pane.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS92638QPWPRQ1
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 125
TPS92638
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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