TRF1122IRTMT

Not Recommended For New Designs TRF1122 www.ti.com SLWS173B – APRIL 2005 – REVISED SEPTEMBER 2006 2.5-GHz Integrated Up-Converter FEATURES • • • • • • • • • Performs Up-Conversion in 2.5-GHz Radios MDS/MMDS/WCS Integrated IF Amplifier, Mixer and LO Buffer Amplifier Provision for External Image Reject / Band-Pass Filter TTL Switched Attenuator For Gain Control TTL Controlled Amplifier Power Down RF Frequency Range: 2100 - 2700 MHz 20 dB of Gain with 16-dB Switched Attenuator Output P-1 dB: +14 dBm, Typical Output IP3: +24 dBm, Typical LO Drive Level = 0 dBm, Typical DESCRIPTION DEVICE INFORMATION TRF1122 (TOP VIEW) GND VDD1 GND GND GND RFI VDDIF IFADJ • 32 31 30 29 28 27 26 25 IADJ VDD2 GND UCATTN 1 24 2 23 MXRADJ UCEN 22 MXRO 21 GND GND RFO LOADJ1 VNEG 5 20 6 19 7 18 3 4 8 17 IFIN IFIP VDDIFP VDDIFN 9 10 11 12 13 14 15 16 The TRF1122 is designed to complete the second up-conversion in Texas Instruments complete 2.5-GHz chip set. The linear nature of the up-converter makes it ideal for complex modulations schemes such as high order QAM or OFDM. GND LOADJ2 GND LOP LON VDDLO GND GND The TRF1122 up-converts a UHF IF signal to an RF signal in the 2100-MHz to 2700-MHz range for 2.5-GHz radio applications. The TRF1122 has 20 dB of gain and an output P-1 dB of +14 dBm, typical. A TTL compatible, 1-bit 16-dB switched attenuator is provided for gain control and the IF and RF amplifiers can be shut off via a TTL control signal for power critical or TDD applications. In order to provide system requirements for LO/spurious rejection, the TRF1122 offers a signal path to an off-chip band-pass filter. Specifications are provided assuming an in-band 2-dB insertion loss filter. P0042-01 Figure 1. TRF1122 Pin Out BPF RFI MXRO RF Amplifier Mixer RFO VGA IFIP IFIN BALUN Power Supply LOP LON LO Buffer UCATTN UCEN VDD –VNEG B0084-02 Figure 2. Functional Block Diagram Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2006, Texas Instruments Incorporated Not Recommended For New Designs TRF1122 www.ti.com SLWS173B – APRIL 2005 – REVISED SEPTEMBER 2006 ABSOLUTE MAXIMUM RATINGS VDD Positive DC Supply Voltage, VDD –VDD Negative DC Supply Voltage, –VDD Pin VALUE UNIT 0.0 to +5.50 V –5.5 to 0 V RF Input Power 10 dBm TJ Junction Temperature 200 °C Pd Power Dissipation 1 W Digital Input Pins –0.3 to 5.5 V θJC Thermal Resistance Junction to 9.01 °C/W Tstg Storage Temperature –40 to 105 °C Top Operating Temperature –40 to 85 °C 260 °C Case (1) Lead Temperature (1) Thermal resistance is junction to ambient assuming thermal pad with 16 thermal vias under package metal base. See Recommended PCB layout. DC SPECIFICATIONS PARAMETER 2 TEST CONDITIONS MIN 4.75 TYP MAX UNIT VDD Positive Supply Voltage IDD Positive Supply Current (Total) VNEG Negative Supply Voltage –5.25 INEG Negative Supply Current -6 IVDD2 Supply Current RF 2, pin 2 48 mA ILO Supply Current, LO, pin 14 50 mA IIF Supply Current, IF 44 mA IVDD1 Supply Current RF1, pin 31 VIH Input High Voltage VIL Input Low Voltage IIH Input High Current IIL Input Low Current Pins 17, 18, and 26 combined. 5 5.25 V 170 185 mA –5 –4.75 3 6 V mA 28 2.5 -50 Submit Documentation Feedback 5 V 0.8 V 300 µA µA Not Recommended For New Designs TRF1122 www.ti.com SLWS173B – APRIL 2005 – REVISED SEPTEMBER 2006 ELECTRICAL CHARACTERISTICS (1) Unless otherwise stated VDD = 5.0 V, VNEG = –5 V, External Filter loss = 2 dB, TA = 25°C PARAMETER TEST CONDITIONS MIN FIF IF input frequency FRF RF output frequency G Gain UCATTN = TTL High, Input IF Impedance is 100 Ω differential 20 Switched attenuator range Valid at 2.5 GHz 15 TYP MAX UNIT 2700 MHz 325 2100 MHz dB 16 17 0.2 dB GNB Gain flatness / 6 MHz OP-1dB Output power at 1 dB compression, high gain UCATTN = TTL High 14 dBm dB OIP3 Output third order intercept point, high gain UCATTN = TTL High 24 dBm Gain: IF to MXRO UCATTN = TTL High 1 dB dB Gain: RFI to RFO UCATTN = TTL High 19 ZRF RF output impedance Differential 50 Ω RLRF RF output: return loss Z = 50 Ω, PLO = 3 dBm, FRF = 2100-2700 MHz –10 dB ZLO LO input impedance Differential PLO LO input power Referenced to 100 Ω differential RLLO LO input return loss Referenced to 100 Ω differential, LO input = 3 dBm –10 ZIF IF input impedance Differential 100 Ω RLIF IF1 input return loss Referenced to 100 Ω differential –10 dB LO to RFO: leakage (1) LO input = 0 dBm –20 dBm (1) Ω 100 –3 0 3 dB dB Performance is sensitive to impedance termination and board layout. Submit Documentation Feedback 3 Not Recommended For New Designs TRF1122 www.ti.com SLWS173B – APRIL 2005 – REVISED SEPTEMBER 2006 TERMINAL FUNCTIONS TERMINAL NO. 4 NAME 1 IADJ 2 VDD2 3, 5, 9, 11, 15, 16, 21, 28–30, 32 GND I/O TYPE DESCRIPTION Not connected for normal operation. Amplifier Bias Adjustment. Do not ground this pin or connect to any other pin. I Power RF amplifier bias +5 V Ground 4 UCATTN I Digital Logic high is high gain, Logic low reduces gain by 16 dB. Normally set high. 6 RFO O Analog RF output from RF amplifier 7 LOADJ1 8 VNEG 10 LOADJ2 12 LOP I Analog LO input, Positive, Internally ac coupled 13 LON I Analog LO input, Negative, Internally ac coupled. 14 VDDLO I Power Positive power for LO amplifier, +5 V. 17 VDDIFN I Analog VDD supply for IF amplifier, negative, +5 V 18 VDDIFP I Analog VDD supply for IF amplifier, positive, +5 V 19 IFIP I Analog IF input, positive, dc coupled, Typical dc voltage is 1.2 V. 20 IFIN I Analog IF input, negative, dc coupled Typical dc voltage is 1.2 V. 22 MXRO O Analog Output of mixer (after balun) 50 Ω impedance with high impedance DC ground. 23 UCEN Digital Set HIGH to enable IF amplifier and RF amplifiers 24 MXRADJ I Analog Normally grounded. Provide 0 Ω jumper to ground. 25 IFADJ I 26 VDDIF I Power Positive supply for IF bias circuitry +5 V Not connected for normal operation. LO common gate bias adjustment. Do not ground this pin or connect to any other pin. I Power Negative bias used for enable circuitry -5 V. This pin can be grounded if the user does not use the UCEN pin to turnoff the amplifier. If the VNEG is grounded the UCEN pin should be tied high. Not connected for normal operation. LO amplifier bias adjustment. Do not ground this pin or connect to any other pin. Not connected for normal operation. IF amplifier bias adjustment. Do not ground this pin or connect to any other pin. 27 RFI I Analog Input to RF amplifier, 50 Ω impedance, Internally AC coupled 31 VDDI I Power RF amplifier bias +5 V Back GND Back of package has metal base that must be grounded for thermal and RF performance. Submit Documentation Feedback Not Recommended For New Designs TRF1122 www.ti.com SLWS173B – APRIL 2005 – REVISED SEPTEMBER 2006 RECOMMENDED PCB LAYOUT 0.60 TYP 3.75 0.23 TYP 0.50 TYP PIN 1 1.00 TYP 1.00 TYP 3.75 3.50 DIA 0.38 TYP 0.25 TYP 3.50 Solder Mask. No Solder Mask Under Chip, On Lead Pads or On Ground Connections. Notes: 9 Via Holes, Each 0.38 mm. DIMENSIONS in mm M0022-03 A. Four layer Board, Starting material: two: 10 mil core FR4 with 1 oz copper, both sides, pressed with 8 mil thick prepreg. Via plating ½ oz copper plate, final plate White immersion tin. Final thickness: 0.033” to 0.037” thick. Submit Documentation Feedback 5 Not Recommended For New Designs TRF1122 www.ti.com SLWS173B – APRIL 2005 – REVISED SEPTEMBER 2006 APPLICATION SCHEMATIC VDD 0.01 mF Z = 50 W BPF 100 pF 0.01 mF IFADJ VDDIF RFI GND GND GND GND IFIN GND RFO IFIP LOADJ1 VDDIFP VNEG 100 pF 9 VDDIFN 10 11 12 13 14 24 0W 23 UCEN 22 21 20 1000 pF 19 1000 pF IF IN N IF IN P 18 33 nH 17 33 nH (1) VDD (1) 100 pF GND 8 UCATTN GND 7 (2) MXRO VDDLO 6 RF OUT 25 GND LON 5 26 UCEN LOP 4 UCATTN 27 VDD2 GND 3 100 pF 28 MXRADJC GND 0.01 mF 29 IADJ LOADJ2 2 30 VDD1 Base 1 31 GND 32 100 pF 15 100 mF 16 0.01 mF LO IN P –VNEG 100 pF 0.01 mF LO IN N S0196-01 6 Submit Documentation Feedback Not Recommended For New Designs TRF1122 www.ti.com SLWS173B – APRIL 2005 – REVISED SEPTEMBER 2006 APPLICATION INFORMATION Figure 3. Package Outline: 5 mm x 5 mm LPCC 32-Pin Leadless Package Submit Documentation Feedback 7 PACKAGE OPTION ADDENDUM www.ti.com 25-Feb-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TRF1122IRTMR LIFEBUY VQFN RTM 32 2500 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR TRF 1122 TRF1122IRTMT LIFEBUY VQFN RTM 32 250 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR TRF 1122 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Feb-2015 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TRF1122IRTMR VQFN RTM 32 2500 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 TRF1122IRTMT VQFN RTM 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRF1122IRTMR VQFN RTM 32 2500 338.1 338.1 20.6 TRF1122IRTMT VQFN RTM 32 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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