TRF3765EVM-F

User's Guide SLWU076A – November 2011 – Revised July 2012 TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module This document describes usage and features of the TRF3765 evaluation module (EVM) for wideband frequency synthesis applications. The synthesizer uses an integer/fractional-N PLL with integrated VCOs to generate local oscillator signals from 300 MHz to 4800 MHz. This document describes rapid-start setup procedures, detailed descriptions of circuit blocks and available options, schematics and printed-circuit board layout, and a common start-up problem troubleshooting guide. 1 2 3 4 5 Contents Quick-Start Operating Procedures ........................................................................................ 2 Circuit Block Descriptions .................................................................................................. 2 2.1 Test Points .......................................................................................................... 2 2.2 Power Supply ....................................................................................................... 3 2.3 Loop Filter ........................................................................................................... 3 2.4 SPI Communication ................................................................................................ 4 2.5 Reference Clock ................................................................................................... 4 Configuration Options ...................................................................................................... 4 Physical Description ........................................................................................................ 5 4.1 Schematic ........................................................................................................... 5 4.2 Layout ............................................................................................................... 8 4.3 Bill of Materials .................................................................................................... 12 Troubleshooting FAQs .................................................................................................... 15 List of Figures 1 Loop Filter Reference Designators ....................................................................................... 4 2 TRF3765EVM Schematic, Page 1 of 3 5 3 TRF3765EVM Schematic, Page 2 of 3 6 10 .................................................................................. .................................................................................. TRF3765EVM Schematic, Page 3 of 3 .................................................................................. Silkscreen, Top .............................................................................................................. Top Layer and Drill Map ................................................................................................... Layer 2, Ground ........................................................................................................... Layer 3, Power ............................................................................................................. Bottom Layer and Silkscreen ............................................................................................ Fabrication Drawing ....................................................................................................... 1 Test Point Color Codes 4 5 6 7 8 9 7 8 9 10 11 12 12 List of Tables 2 3 4 5 .................................................................................................... Integer and Fractional Mode Configurations ............................................................................ Fractional Board Bill of Materials ........................................................................................ Integer Board Bill of Materials, Differences from Fractional Board ................................................. Troubleshooting Sequences ............................................................................................. SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module Copyright © 2011–2012, Texas Instruments Incorporated 2 5 12 14 15 1 Quick-Start Operating Procedures 1 www.ti.com Quick-Start Operating Procedures The TRF3765 evaluation module (EVM) is preconfigured to use a 3.3-Vdc power supply on TP2. The supply must be capable of supplying 250 mA. SPI communication is required for configuring the TRF3765 device. J7 accepts a mini-USB connector that can be driven through the device graphical user interface (GUI). Local oscillator (LO) outputs are available in four differential pairs on SMA coaxial connectors J1, J3-J6, and J9-J11. The following steps describe the EVM setup for basic operation with the default hardware configuration. 1. Connect the mini-USB connector. LED D1 draws power through the mini-USB connector and illuminates immediately. 2. Power the device by supplying TP2 with 3.3 V. Use TP3 for the ground connection. Board revisions prior to Revision D may require additional power supply connections. 3. Connect the LO output to measurement equipment. 4. Install and start the GUI software. 5. Initiate a communication link with the device by using the GUI Connect button. Follow on-screen instructions to load a register configuration file. Select file TRF3765.FracMode.3p3Vtank.2600MHz.txt for a fractional mode board and TRF3765.IntMode.3p3Vtank.2600MHz.txt for an integer mode board. 6. Verify lock-detect on LED D2 and the signal on measurement equipment. If D2 is not illuminated, no signal is present or the signal is at the incorrect frequency. Check GUI settings on any of the High Level tabs and recalibrate. 7. Using default hardware and configuration settings, fractional mode integrate phase noise is –47 dBc to –48 dBc/Hz, whereas integer mode integrated phase is –44 dBc/Hz. 2 Circuit Block Descriptions This section describes each of the major circuit blocks and their configuration options. 2.1 Test Points Test points are used throughout the board for control and monitoring. These test points are color-coded for quick reference. The color codes are described in Table 1. Table 1. Test Point Color Codes 2 Color Group Reference Designators Black Ground TP1, TP3, TP4, TP11, TP14, TP27-TP30 White Unregulated supply TP2, TP24 Red Unregulated supply TP5 Purple Regulated supply TP25, TP26 Green VCC and SPI monitor TP6-TP10, TP12, TP13, TP19-TP23 Blue VCC1 monitor TP15-TP18 TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Circuit Block Descriptions www.ti.com 2.2 Power Supply The TRF3765 uses three primary power supplies: VCC1, VCC2, and VCC3. In the default configuration, VCC1 and VCC2 are connected onboard by R41 and VCC3 is unused. The entire board can be supplied through 3.3 V on TP2 or Revision D boards. Earlier board revisions require multiple power connections. A clean power supply is critical to optimal phase noise performance of the synthesizer. The impact of the power supply is discussed in detail in the application report Supply Noise Effect on Oscillator Phase Noise (SLWA066). Linear power supplies are the best sources available. Switching power supplies degrade inband phase noise by 10 dB compared to linear laboratory supplies. Onboard regulators U3 and U4 are ultra-clean TPS74201 linear regulators that also provide excellent performance when they are driven by most laboratory power supply equipment. These regulators provide performance comparable to a clean linear supply. To use these regulated 3.3-V supplies, disconnect power from TP2 and remove R41. Connect 5 V to TP26, using TP27 for ground. Place jumpers on JP4 and JP5 to shunt jumper pins 1 and 2. VCC3 can be used to drive VCC_TK, a 3.3-V/5-V tolerant supply on the TRF3765. VCC_TK is normally driven by the 3.3-V VCC2 supply, but some applications perform better with a 5-V supply on VCC_TK. To use VCC3 to drive VCC_TK at 5 V, move FB2 onto FB11. Populate R12 with a short. Then drive VCC3 through TP5 with a clean linear laboratory supply at 5 V. VCC3 can also be driven at 5 V by onboard regulator U5. However, this regulator is not as clean as a linear laboratory supply, and some phase noise performance loss occurs. To use the VCC3 onboard 5-V regulator, drive TP25 with 6 V using TP28 for ground and place a jumper on JP1 to shunt jumper pins 1 and 2. The TRF3765EVM includes a power supply filter. This filter can be used to reduce in-band frequency noise from a switching power supply so that an external supply can drive 5 V on VCC_TK. Phase noise performance using a high-quality laboratory switching power supply to drive VCC3 through TP5 is similar to performance measured using a linear supply. The filter is integrated on Rev. E and later boards. Rev. D and earlier boards include an external filter that is equipped with BNC connectors for a convenient connection with power supply banana jacks. Each VCC pin on the TRF3765 connects to an individual test point. The test point may be used for monitoring. Because each supply pin is isolated through a ferrite bead, by lifting the ferrite bead these test points may also be used to drive single-device supply pins. Spurs occurring in the LO signal at 60 kHz and 100 kHz offset from the carrier are usually the result of ground loops in power supply cabling. 2.3 Loop Filter Loop-filter components are also critical to optimal phase noise performance. The loop filter must be matched to the selected phase frequency detector (PFD) frequency. TRF3765 boards are shipped with components matched to the onboard reference clock and configuration file. However, to use a different PFD frequency, the loop-filter components must be updated. The Loop Filter Design Tool available at ti.com in the TRF3765EVM product folder is an intuitive software package that identifies proper component values. Loop filter reference designators are shown in Figure 1. The assembly layout of these components is shown in a silkscreen blow-up on the EVM. SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module Copyright © 2011–2012, Texas Instruments Incorporated 3 Configuration Options www.ti.com TP12 R20 R5 R4 VTUNE_IN CP_OUT C1 R13 C2 C3 C4 R6 R15 CP_REF VTUNE_REF R46 R45 VCC2 Figure 1. Loop Filter Reference Designators VTune may be monitored on TP12 without disrupting circuit operation, because R20 is a high-value resistance. TP12 can also be used to drive VTune for open-loop VCO measurements when the TRF3765 charge pump is in 3-state logic. A 1-µF capacitor on C4 is also recommended for open-loop measurements to help stabilize the applied voltage. By default, reference is tied to ground through shorts on R13, R15, and R45, with R46 open. 2.4 SPI Communication SPI communication from the TRF3765 GUI passes through mini-USB connector J7. The USB interface is decoded and encoded by U2 into SPI lines DATA, STROBE, CLK, and RDBK. U2 is powered through the USB connection instead of the board supply, and LED D1 indicates USB power is applied. Test points TP6–TP10 can be used to monitor SPI communication with laboratory equipment. The laboratory equipment must be set to high impedance so that it does not load the communication lines. When the USB cable is disconnected, U2 I/Os are high impedance. In this case, TP6–TP10 can be used to directly drive the SPI lines. The power-on reset default register settings in the TRF3765 do not correspond to a valid operational state. SPI initialization is required to operate the device. Once the registers have been initialized, the mini-USB cable may be disconnected without disrupting device operation. However, once the mini-USB has been reconnected, the link must be reestablished through the GUI Connect button on the Start Up tab. The link exists between the GUI computer and U2, so loss of power to the TRF3765 device does not require reestablishing the link. Loss of device power, however, does require re-initialization of the registers. 2.5 Reference Clock An oscillator is installed on the TRF3765EVM to provide a reference clock to the device. JP2 installed provides supply voltage to the oscillator, whereas JP3 installed connects the oscillator output to the TRF3765. The oscillator frequency drifts over temperature and is not rated for the full TRF3765 temperature operating range, so temperature testing must use an external reference clock. An external reference clock can be supplied through the SMA connector J8. When using an external reference clock, remove jumpers on JP2 and JP3. The external reference is ac-coupled to the TRF3765 input pin. An external reference can also be used to frequency-lock the device to laboratory equipment. Verify that any supplied reference clock has low phase noise. 3 Configuration Options The TRF3765 evaluation module ships configured for either integer mode or fractional mode. Each configuration is designed to use different reference and PFD frequencies and also has the corresponding loop-filter components. Differences in integer mode and fractional mode boards are listed in Table 2. 4 TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Physical Description www.ti.com Table 2. Integer and Fractional Mode Configurations Item Oscillator Integer Mode Y1 frequency 61.44 MHz Y1 frequency 40 MHz Typical PFD frequency 30.72 MHz 1.6 MHz Loop filter components C20 = 2200 pF C19 = 22000 pF R6 = 475 Ω R5 = 475 Ω C14 = 220 pF R4 = 475 Ω C15 = 220 pF C20 = 47 pF C19 = 560 pF R6 = 10 kΩ R5 = 5 kΩ C14 = 4.7 pF R4 = 0 Ω C15 = open TRF3765.FracMode.3p3Vtank.2600MHz.txt TRF3765.IntMode.3p3Vtank.2600MHz.txt Configuration file 4 Fractional Mode Physical Description The TRF3765EVM is designed to be a high-performance platform for the TRF3765 device. This section describes the schematic, layout and stackup, and bill of materials corresponding to Revision D boards. Schematic FB4 1K C24 4.7pF C37 1uF GND D2 LD C8 4.7pF GRN R19 1 DNI C72 0.1uF C16 .1uF DNI C9 1uF TP22 VCC_CP GRN GND C17 47pF DNI RF_CP_OUT SH2 15K GND TP20 VCC_DIG GRN VCC2 FB5 1K GND GND SH2 C18 10nF C50 1uF GND GND RF_CP_REF REFIN C22 4.7pF C27 27pF U1 TRF3765 GND GND GND SH2 SH2 SH2 SH2 TP19 VCC_DIV GRN VCC1 FB13 1K C53 1uF 1 2 3 4 5 6 7 8 DATA CLK STROBE RDBK GND_DIG VCC_DIG DATA CLOCK STROBE READBACK VCC_DIV GND_BUFF1 C51 4.7pF C52 10nF TP23 VCC_OSC GRN GND FB8 1K C56 10nF VCC2 TP13 VCC_TK GRN C40 1uF C57 4.7pF 33 32 31 30 29 28 27 26 25 2 LED AMBER C44 47pF DNI PWRPAD LD GND REF_IN GND VCC_PLL VCC_CP CP_OUT CP_REF GND FB12 1K VCC2 TP8 LD C43 .1uF DNI TP21 GND VCC_PLL GRN GND GND 24 23 22 21 20 19 18 17 FB2 1K VCC2 VCC3 C39 1uF GND GND VTUNE_REF VTUNE_IN GND_OSC VCC_OSC VCC_TK EXTVCO_CTRL EXTVCO_IN GND_BUFF2 C21 10nF RF_VTUNE_REF RF_VTUNE SH2 GND GND DNI SJP1 EXTVCO_CTRL_OUT 1 2 3 EXT_VCO R12 0 DNI FB11 1K VCC2 SHUNT 2-3 GND GND J2 EXT_VCO 1 SMA 9 10 11 12 13 14 15 16 GND TP15 VCC_LO1 BLU C10 LO1_P LO1_M LO4_P LO4_M LO2_M LO2_P LO3_M LO3_P C11 R21 100 R2 0 LO1P J5 LO1_OUTP 1 SMA VCC1 FB1 1K GND GND C7 27pF 47pF R39 0 DNI C6 100 R3 GND C13 10nF GND C49 27pF 47pF 0 LO3P R30 0 DNI 0 LO1M C38 R25 100 R31 0 LO3M R32 0 DNI GND C47 R24 C45 1uF GND C12 10nF GND 100 R7 0 LO2M J11 LO2_OUTM 1 SMA VCC1 FB14 1K 47pF R10 0 DNI GND GND C46 100 GND C59 10nF GND 100 R11 47pF 0 LO4M R34 0 DNI GND 0 LO2P J10 LO2_OUTP 1 SMA C31 R27 100 R35 0 LO4P J4 LO4_OUTP 1 SMA END 47pF R36 0 DNI 4 3 2 5 R37 0 DNI J3 LO4_OUTM 1 SMA GND END 47pF R33 END C48 27pF GND GND R23 C32 R28 C23 1uF END C55 27pF 4 3 2 5 FB6 1K TP18 VCC_LO4 BLU 4 3 2 5 VCC1 J9 LO3_OUTM 1 SMA GND GND GND TP16 VCC_LO2 BLU GND GND END 47pF 4 3 2 5 R40 0 DNI J6 LO3_OUTP 1 SMA GND GND J1 LO1_OUTM 1 SMA END 47pF R29 GND GND R22 C41 100 END C28 1uF GND GND END R26 4 3 2 5 C3 10nF EXTVCO R1 49.9 DNI TP17 VCC_LO3 BLU END C54 1uF 4.7pF 4 3 2 5 FB15 1K GND 4 3 2 5 VCC1 GND 4 3 2 5 GND 4 3 2 5 VCC2 LO1_OUTP LO1_OUTM LO2_OUTM LO2_OUTP LO3_OUTP LO3_OUTM LO4_OUTM LO4_OUTP 4.1 GND GND GND GND Figure 2. TRF3765EVM Schematic, Page 1 of 3 SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module Copyright © 2011–2012, Texas Instruments Incorporated 5 Physical Description www.ti.com FB7 120 SERIAL INTERFACE GND VBUS DD+ ID GND 1 2 3 4 R38 5 2 LED AMBER GND GND J7 GND1 GND2 GND3 GND4 1 15K C36 .1uF C25 .01uF 6 7 8 9 D1 USB_PWR R8 TP10 DATA C29 47pF C35 47pF 20 16 GND GND TP7 STROBE GRN GRN TP6 RDBK GRN U2 USB_SUPER-MINI_AB GND TP9 CLK GRN 0 15 GND 4 8 19 24 27 28 17 25 7 18 21 26 C34 .1uF VCC D0 USBDM D1 USBDP D2 VCCIO D3 NC1 D4 RESET D5 NC2 D6 OSCI D7 OSCO RXF 3V3OUT TXE AGND GND GND GND TEST RD WR PWREN 1 DATA SH1 5 CLK SH1 3 STROBE 11 RDBK 2 SH1 SH1 TP11 GND 9 BLK 10 6 GND 23 22 13 14 12 FT245RL GND GND JP2 2 1 VCC2 FB10 1K 1 RF/IF FREQ REF R17 1K INTERFACE GND OUT JP3 4 3 TABLE 1 C26 22pF 2 TSM75-1148-40.000M 2 R18 0 DNI 1 .1uF C30 .1uF DNI R14 10K DNI C14 R9 0 2 2 1 1 C33 GND GND GND C15 DNI C19 560pF 22000pF C20 47pF 2200pF GND R4 J8 EXT_REF SMA 1 INTEGER FRACTIONAL 4.7pF 220pF REFIN SH1 1 VCC 2 1 2 2 2 EN 220pF 0 TP12 VTUNE 470pF R5 4.99K 470pF R6 10K 470pF GRN 1 Y1 1 GND 1 C67 100pF R20 1M EXT_REF RF_CP_OUT R4 1 2 2 2 RF_VTUNE 2 2 2 1 1 C20 C15 C14 560pF 1 47pF SH1 0 C19 R16 49.9 DNI 1 1 GND R5 4.99K 2 SH1 1 4.7pF 1 2 4 3 2 5 END 2.2pF DNI R6 10K SH1 RF_CP_REF 1 R13 0 2 GND 2 1 R15 2 RF_VTUNE_REF SH1 0 VCC2 R46 0 R45 0 DNI GND Figure 3. TRF3765EVM Schematic, Page 2 of 3 6 TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Physical Description www.ti.com TP2 VCC1_+3.3V WHT 10 C2 1uF C42 100uF C70 10uF 15 11 GND GND GND GND C65 1uF 14 17 12 21 GND IN1 IN2 IN3 IN4 VCC1_+3.3V OUT1 OUT2 OUT3 OUT4 BIAS FB/SNS 1 18 19 20 C80 10uF 16 R48 TP30 GND R52 31.6K C81 10uF SS +5.0V EN PG NC5 NC6 GND PAD NC1 NC2 NC3 NC4 9 R54 10K TP28 GND BLK GND R53 10.2K TP4 GND BLK GND GND TP29 GND TP27 GND TP3 GND BLK GND GND TP1 GND BLK GND BLK 2 3 4 13 BLK GND TP14 GND BLK GND BLK GND GND VCC2 VCC1 VCC1 2 1 5 6 7 8 VCC1 C1 .1uF NO SHUNT JP5 U4 TPS74201RGW +5.0V 0 GND GND BOARD HARDWARE TP26 +5.0V VCC2 C66 .1uF C68 1uF 5 6 7 8 PURPLE C58 100uF 10 C63 10uF GND GND 15 11 GND GND C62 1uF 14 17 12 21 GND IN1 IN2 IN3 IN4 MT1 VCC2_+3.3V OUT1 OUT2 OUT3 OUT4 1 18 19 20 VCC2 1 2 1 TP24 VCC2_+3.3V WHT NO SHUNT JP4 U3 TPS74201RGW +5.0V SCREW PHIL 4-40 X 3/8" C78 10uF MT2 R50 31.6K C79 10uF 1 SCREW PHIL 4-40 X 3/8" BIAS FB/SNS 16 GND MT3 SS +5.0V EN PG NC5 NC6 GND PAD NC1 NC2 NC3 NC4 9 R48 1 10K R51 10.2K SCREW PHIL 4-40 X 3/8" 2 3 4 13 MT4 1 SCREW PHIL 4-40 X 3/8" GND GND GND GND RF FENCE AND COVER QTY 1 SH1 NO SHUNT JP1 TP5 VCC3_+5V RED U5 TPS7A8001 TP25 +6.0V 8 7 6 5 PURPLE C4 .1uF GND C5 1uF GND C69 100uF C73 10uF GND IN1 IN2 NR EN OUT1 OUT2 FB/SNS GND PAD C64 1uF 1 2 3 4 9 R49 52.3K SH2 C75 10uF C76 10uF RF SHIELD R47 10K RF SHIELD 1 SH5 C82 4.7uF GND SH4 1 RF SHIELD C74 160pF 1 RF SHIELD VCC3 2 1 VCC3 SH3 1 RF SHIELD VCC3_+5V +6.0V GND 1 BARE BOARD, TRF3765 GND GND GND GND GND Figure 4. TRF3765EVM Schematic, Page 3 of 3 SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module Copyright © 2011–2012, Texas Instruments Incorporated 7 Physical Description 4.2 www.ti.com Layout Figure 5. Silkscreen, Top 8 TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Physical Description www.ti.com Figure 6. Top Layer and Drill Map SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module Copyright © 2011–2012, Texas Instruments Incorporated 9 Physical Description www.ti.com Figure 7. Layer 2, Ground 10 TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Physical Description www.ti.com Figure 8. Layer 3, Power SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module Copyright © 2011–2012, Texas Instruments Incorporated 11 Physical Description www.ti.com Figure 9. Bottom Layer and Silkscreen Figure 10. Fabrication Drawing 4.3 Bill of Materials Table 3. Fractional Board Bill of Materials Item No. Qty 1 12 Note Part Reference Value PCB Footprint Manufacturer Manufacturer Part No. 6 C1, C4, C33, C34, C36, C66 0.1uF 0402 PANASONIC ECJ-0EB1C104K 2 13 C2, C5, C9, C23, C28, C37, C39, C40, C45, C50, C53, C54, C68 1uF 0402 PANASONIC ECJ-0EB1A105M 3 8 C3, C12, C13, C18, C21, C52, C56, C59 10nF 0402 MURATA GRM155R71E103KA01D 4 8 C6, C11, C31, C32, C38, C41, C46, C47 47pF 0402 AVX CORP GRM1555C1H470JZ01 5 5 C7, C27, C48, C49, C55 27pF 0402 AVX 04025A270JAT2A 6 6 C8, C10, C22, C24, C51, C57 4.7pF 0402 MURATA GRM1555C1H4R7CZ01D 7 2 C14, C15 220pF 0402 AVX 04023A221JAT2A 8 1 C82 4.7uF 0805 TDK CORP C2012X5R1A475K/0.86 9 0 DNI C16, C30, C43 0.1uF 0402 PANASONIC ECJ-0EB1A104K_DNI 10 0 DNI C17, C44 47pF 0603 MURATA GRM1885C1H470JA01D_DNI TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Physical Description www.ti.com Table 3. Fractional Board Bill of Materials (continued) Item No. Qty 11 12 Note Part Reference Value PCB Footprint Manufacturer Manufacturer Part No. 1 C19 22000pF 0402 MURATA GRM155R71C223KA01D 1 C20 2200pF 0402 AVX 04025C222JAT2A 13 2 C29, C35 47pF 0402 PANASONIC ECJ-0EC1H470J 14 1 C25 0.01uF 0402 PANASONIC ECJ-0EB1E103K 15 1 C26 22pF 0402 PANASONIC ECJ-0EC1H220J 16 3 C42, C58, C69 100uF 1210 PANASONIC ECJ-4YB0J107M 17 3 C62, C64, C65, 1uF 0805 TDK CORP C2012X5R1E105K 18 9 C63, C70, C73, C75, C76, C78, C79, C80, C81 10uF 0603 MURATA GRM188R60J106ME47D 19 1 C67 100pF 0402 MURATA GRM1555C1H101JZ01D 20 0 C72 0.1uF 0402 PANASONIC ECJ-0EB1A104K_DNI 21 1 C74 160pF 0603 TDK Corp C1608C0G1H161J 22 2 D1, D2 LED AMBER LED_0805 PANASONIC LNJ406K54RX 23 11 FB1, FB2, FB4-FB6, FB8, FB10, FB12-FB15 1K IND_0402 MURATA BLM15AG102SN1 24 1 FB7 120 IND_0402 MURATA BLM15AG121SNIB 25 0 FB11 1K IND_0402 MURATA BLM15AG102SN1_DNI 26 10 J1-J6, J8-J11 SMA_END_JACK SMA_SMEL_250x215 Johnson Components 142-0711-821 DNI DNI 7 1 J7 USB_SUPER-MINI_AB CON_SMRT_USBMNE20_F ACON MNE20-5G5P10 28 5 JP1-JP5 JUMPER_1X2_100 HDR_THVT_1X2_100_M SAMTEC TSW-102-07-L-S 29 4 MT1-MT4 STANDOFF 4-40 X 0.500" ALUM mfg125_plated KEYSTONE 3480 30 0 R1 R16 49.9 0402 PANASONIC ERJ-2RKF49R9X_DNI 31 12 DNI R2, R3, R7, R9, R11, R13, R15, R29, R31, R33, R35, R45 0 0402 PANASONIC ERJ-2GE0R00X 32 3 R4, R5, R6 470 0402 PANASONIC ERJ-2RKF4700X 33 2 R8, R19 15K 0402 PANASONIC ERJ-2GEJ153X 34 0 DNI R10, R12, R18, R30, R32, R34, R36, R37, R39, R40, R46 0 0402 PANASONIC ERJ-2GE0R00X_DNI 35 0 DNI R14 10K 0402 PANASONIC ERJ-2GEJ103X_DNI 36 1 R17 1K 0402 PANASONIC ERJ-2GEJ102X 37 1 R20 1M 0402 PANASONIC ERJ-2RKF1004X 38 8 R21, R22-R28 100 0402 PANASONIC ERJ-2RKF1000X 39 2 R38, R41 0 0603 Panasonic ERJ-3GEY0R00V 40 3 R47, R48, R54 10K 0603 PANASONIC ERJ-3EKF1002V 41 1 R49 52.3K 0603 PANASONIC ERJ-3EKF5232V 42 2 R50, R52 31.6K 0603 PANASONIC ERJ-3EKF3162V 43 2 R51, R53 10.2K 0603 PANASONIC ERJ-3EKF1022V 44 0 DNI SH1-SH5 RF SHIELD MFG053_PTH LEADER TECH SL-10797 45 0 DNI SJP1 SOLDER JUMPER, 0603 SJP3_JUMPER DNI DNI 46 8 TP1, TP4, TP11, TP14, TP27- TP30 BLK TP_THVT_100_RND KEYSTONE 5001K 47 1 TP3 BLK TESTPOINT_62DIA KEYSTONE 5011K 48 2 TP2, TP24 WHT TESTPOINT_62DIA KEYSTONE 5012K 49 1 TP5 RED TESTPOINT_62DIA KEYSTONE 5010K 50 12 TP6-TP10, TP12, TP13, TP19-TP23 GRN TP_THVT_100_RND KEYSTONE 5116K 51 4 TP15-TP18 BLU TP_THVT_100_RND KEYSTONE 5117K 52 2 TP25, TP26 PURPLE TP_THVT_100_RND KEYSTONE 5119K 53 1 U1 TRF3765 QFN_32_197X197_20_PWRPAD TI TRF3765 54 1 U2 FT245RL ssop_28_413x220_26 FTDI Chip FT245RL 55 2 U3, U4 TPS74201RGW QFN_20_199X199_0P65MM TI TPS74201RGW 56 1 U5 TPS7A8001 SON_8_3MMX3MM_0P65MM TI TPS7A8001DRB 57 1 Y1 TSM75-1148-61.440M OSC_4_SM_295x197 Transko TSM75-1148-61.440M 58 4 PHIL 4-40 X 3/8" Building Fasteners PMSSS 440 0038 PH 59 2 SHUNT KELTRON MJ-5.97-G OR EQUIVALENT pins 1-2 FOR JP2 AND JP3 SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module Copyright © 2011–2012, Texas Instruments Incorporated 13 Physical Description www.ti.com Table 3. Fractional Board Bill of Materials (continued) Item No. Qty 60 1 Note Part Reference Value pins 2-3 FOR SJP1 SHUNT-JUMPER-0603 PCB Footprint Manufacturer Manufacturer Part No. PANASONIC ERJ-3GE0R00X Table 4. Integer Board Bill of Materials, Differences from Fractional Board Item No. Qty 7 1 8 0 11 14 Note Part Reference Value PCB Footprint Manufacturer Manufacturer Part No. C14 4.7pF 0402 PANASONIC ECD-G0E4R7B C15 2.2pF 0402 PANASONIC ECD-G0E2R2B 1 C19 560pF 0402 MURATA GRM155R71H561KA01D 12 3 C20 47pF 0402 PANASONIC ECJ-0EC1H470J 30 13 R4 0 0402 PANASONIC ERJ-2GE0R00X 31 1 R5 4.99K 0402 PANASONIC ERJ-2RKF4991X 32 1 R6 10K 0402 PANASONIC ERJ-2RKF1002X 56 1 Y1 TSM75-1148-40.000M OSC_4_SM_295x197 Transko TSM75-1148-40.000M DNI TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Troubleshooting FAQs www.ti.com 5 Troubleshooting FAQs This section provides troubleshooting sequences in Table 5 to resolve several of the most frequently asked questions. Table 5. Troubleshooting Sequences Problem Response Verify that the loop filter components correspond to the programmed PFD frequency. Check power on device pin test points: TP12. TP13.TP19-TP23 Verify that one refclk is applied, generated either onboard or offboard. Registers 1 to 6 must be initialized. Reload the start-up macro. Execute VCO calibration after initialization is complete. Fractional mode operation must set LD_ANA_PREC* at low precision (1). LD diode D2 won't light up Verify GUI communication with the device. Readback value fields display nonzero hexadecimal values after a register is written. The GUI Low Level display allows direct register readback. Using the GUI Low Level tab, read registers. Verify that read ADDR bits are correct and that no N.U. bits have been initialized. Reset the device by removing power if a faulty address has been sent to the device or if any N.U. bits have been set. Measure voltage on TP8. Multimeter measurements below 2 V but above 0.5 V indicate toggling LD. Verify Cal_Clk frequency. High Level tab readback is supported on GUI revision 6 or later. Low Level readback is supported on all GUI releases. No readback from registers Prerelease device revisions may not support readback. Verify the device markings do not include a P prefix on the first line. On the GUI Start Up tab, Disconnect, verify that Simulate Connection is not selected, then Connect. Verify that the buffer is configured to be powered on by reading back register 4 on the GUI Low Level tab. 0 = on, and 1 = off. No LO output Verify that registers are successfully reading back from the device to confirm communication. Check power on device pin test points: TP12, TP13, TP19-TP23 Verify that one refclk is applied, generated either onboard or offboard. Remove any monitoring equipment from the VTune tap on TP12. Spurs or unstable output frequency Verify that EN_DITH, EN_ISOURCE are set properly for integer or fractional mode. Verify VCO_BIAS is set properly for the applied VCC_TK voltage level. In fractional mode, verify that MOD_ORD is third (2) and DITH_SEL is Random (0). Eliminate ground loops in power supplies. Verify that the installed loop filter corresponds to the applied refclk and PFD frequency. Poor phase noise Verify that the power supply is clean and is not an unfiltered switching power supply. Revert the board to shipping hardware configuration, load a factory-supplied, start-up file, and verify phase noise against data sheet measurements. SLWU076A – November 2011 – Revised July 2012 Submit Documentation Feedback TRF3765 Integer/Fractional-N PLL With Integrated VCO Evaluation Module Copyright © 2011–2012, Texas Instruments Incorporated 15 EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety programs, please visit www.ti.com/esh or contact TI. No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. REGULATORY COMPLIANCE INFORMATION As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal Communications Commission (FCC) and Industry Canada (IC) rules. For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. General Statement for EVMs including a radio User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization. For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant Caution This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • Reorient or relocate the receiving antenna. • Increase the separation between the equipment and receiver. • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. • Consult the dealer or an experienced radio/TV technician for help. For EVMs annotated as IC – INDUSTRY CANADA Compliant This Class A or B digital apparatus complies with Canadian ICES-003. Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. Concerning EVMs including radio transmitters This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concerning EVMs including detachable antennas Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada. Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de l'utilisateur pour actionner l'équipement. Concernant les EVMs avec appareils radio Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER 【Important Notice for Users of this Product in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product, or Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product. Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp 【ご使用にあたっての注】 本開発キットは技術基準適合証明を受けておりません。 本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。 1. 2. 3. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。 実験局の免許を取得後ご使用いただく。 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 　　　上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・インスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル http://www.tij.co.jp SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use. It is intended solely for use for preliminary feasibility evaluation in laboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems and subsystems. It should not be used as all or part of a finished end product. Your Sole Responsibility and Risk. You acknowledge, represent and agree that: 1. 2. 3. 4. You have unique knowledge concerning Federal, State and local regulatory requirements (including but not limited to Food and Drug Administration regulations, if applicable) which relate to your products and which relate to your use (and/or that of your employees, affiliates, contractors or designees) of the EVM for evaluation, testing and other purposes. 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It is important to operate this EVM within TI’s recommended specifications and environmental considerations per the user guidelines. Exceeding the specified EVM ratings (including but not limited to input and output voltage, current, power, and environmental ranges) may cause property damage, personal injury or death. If there are questions concerning these ratings please contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures greater than 60°C as long as the input and output are maintained at a normal ambient operating temperature. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors which can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during normal operation, please be aware that these devices may be very warm to the touch. As with all electronic evaluation tools, only qualified personnel knowledgeable in electronic measurement and diagnostics normally found in development environments should use these EVMs. Agreement to Defend, Indemnify and Hold Harmless. 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