TRS232DR

TRS232 www.ti.com............................................................................................................................................ SLLS861A – AUGUST 2007 – REVISED SEPTEMBER 2008 DUAL RS-232 DRIVER/RECEIVER WITH IEC61000-4-2 PROTECTION FEATURES 1 • Meets or Exceeds TIA/RS-232-F and ITU Recommendation V.28 • Operates From a Single 5-V Power Supply With 1.0-µF Charge-Pump Capacitors • Operates up to 120 kbit/s • Two Drivers and Two Receivers • ±30-V Input Levels • Low Supply Current . . . 8 mA Typical • ESD Protection Exceeds JESD22 – 2000-V Human-Body Model (HBM) (A114-A) • Upgrade With Improved ESD (15-kV HBM) and 0.1-µF Charge-Pump Capacitors Is Available With the TRS202 2 D, DW, N, NS, OR PW PACKAGE (TOP VIEW) C1+ VS+ C1− C2+ C2− VS− T2OUT R2IN 1 16 2 15 3 14 4 13 5 12 6 7 11 10 8 9 VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT APPLICATIONS • • • • • TIA/RS-232-F Battery-Powered Systems Terminals Modems Computers DESCRIPTION/ORDERING INFORMATION The TRS232 is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/RS-232-F voltage levels from a single 5-V supply. Each receiver converts TIA/RS-232-F inputs to 5-V TTL/CMOS levels. This receiver has a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept ±30-V inputs. Each driver converts TTL/CMOS input levels into TIA/RS-232-F levels. The driver, receiver, and voltage-generator functions are available as cells in the Texas Instruments LinASIC™ library. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinASIC is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2008, Texas Instruments Incorporated TRS232 SLLS861A – AUGUST 2007 – REVISED SEPTEMBER 2008............................................................................................................................................ www.ti.com ORDERING INFORMATION TA PACKAGE PDIP – N SOIC – D 0°C to 70°C SOIC – DW SOP – NS TSSOP – PW PDIP – N SOIC – D –40°C to 85°C SOIC – DW SOP – NS TSSOP – PW (1) (2) 2 (1) (2) ORDERABLE PART NUMBER Tube of 25 TRS232CN Tube of 40 TRS232CD Reel of 2500 TRS232CDR Tube of 40 TRS232CDW Reel of 2000 TRS232CDWR Reel of 2000 TRS232CNSR Tube of 25 TRS232CPW Reel of 2000 TRS232CPWR Tube of 25 TRS232IN Tube of 40 TRS232ID Reel of 2500 TRS232IDR Tube of 40 TRS232IDW Reel of 2000 TRS232IDWR Reel of 2000 TRS232INSR Tube of 25 TRS232IPW Reel of 2000 TRS232IPWR TOP-SIDE MARKING TRS232CN TRS232C TRS232C TRS232C TRS232C TRS232IN TRS232I TRS232I TRS232I TRS232I Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 TRS232 www.ti.com............................................................................................................................................ SLLS861A – AUGUST 2007 – REVISED SEPTEMBER 2008 FUNCTION TABLES ABC Each Driver (1) (1) INPUT TnIN OUTPUT TnOUT L H H L H = high level, L = low level Each Receiver (1) (1) INPUT RnIN OUTPUT RnOUT L H H L H = high level, L = low level LOGIC DIAGRAM (POSITIVE LOGIC) 11 14 T1IN T1OUT 10 7 T2IN T2OUT 12 13 R1OUT R1IN 9 8 R2OUT R2IN Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 3 TRS232 SLLS861A – AUGUST 2007 – REVISED SEPTEMBER 2008............................................................................................................................................ www.ti.com Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC Input supply voltage range (2) VS+ Positive-output supply voltage range VS– Negative-output supply voltage range VI Input voltage range VO Output voltage range Driver Operating virtual junction temperature Tstg Storage temperature range (1) (2) (3) (4) 6 V VCC – 0.3 15 V –0.3 –15 V –0.3 VCC + 0.3 UNIT V ±30 T1OUT, T2OUT VS– – 0.3 VS+ + 0.3 R1OUT, R2OUT –0.3 VCC + 0.3 T1OUT, T2OUT Package thermal impedance (3) (4) TJ MAX Receiver Short-circuit duration θJA MIN –0.3 V Unlimited D package 73 DW package 57 N package 67 NS package 64 PW package 108 –65 °C/W 150 °C 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to network GND. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions MIN NOM MAX 4.5 5 5.5 UNIT VCC Supply voltage VIH High-level input voltage T1IN, T2IN VIL Low-level input voltage T1IN, T2IN 0.8 V Receiver input voltage R1IN, R2IN ±30 V TA TRS232C Operating free-air temperature TRS232I V 2 V 0 70 –40 85 °C Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4) PARAMETER ICC (1) (2) 4 TEST CONDITIONS Supply current VCC = 5.5 V, All outputs open, TA = 25°C MIN TYP (2) MAX 8 10 UNIT mA Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 5 V and TA = 25°C. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 TRS232 www.ti.com............................................................................................................................................ SLLS861A – AUGUST 2007 – REVISED SEPTEMBER 2008 DRIVER SECTION abc Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature range PARAMETER TEST CONDITIONS MIN VOH High-level output voltage T1OUT, T2OUT RL = 3 kΩ to GND VOL Low-level output voltage (3) T1OUT, T2OUT RL = 3 kΩ to GND ro Output resistance T1OUT, T2OUT VS+ = VS– = 0, VO = ±2 V IOS (4) Short-circuit output current T1OUT, T2OUT VCC = 5.5 V, VO = 0 IIS T1IN, T2IN VI = 0 (1) (2) (3) (4) Short-circuit input current 5 TYP (2) MAX 7 –7 UNIT V –5 V Ω 300 ±10 mA 200 µA Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 5 V and TA = 25°C. The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. Not more than one output should be shorted at a time. Switching Characteristics (1) VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS SR Driver slew rate RL = 3 kΩ to 7 kΩ, See Figure 2 SR(t) Driver transition region slew rate See Figure 3 Data rate One TnOUT switching (1) MIN TYP MAX UNIT 30 V/µs 3 V/µs 120 kbit/s Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 5 TRS232 SLLS861A – AUGUST 2007 – REVISED SEPTEMBER 2008............................................................................................................................................ www.ti.com RECEIVER SECTION abc Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature range PARAMETER TEST CONDITIONS VOH High-level output voltage R1OUT, R2OUT IOH = –1 mA VOL Low-level output voltage (3) R1OUT, R2OUT IOL = 3.2 mA VIT+ Receiver positive-going input threshold voltage R1IN, R2IN VCC = 5 V, TA = 25°C VIT– Receiver negative-going input threshold voltage R1IN, R2IN VCC = 5 V, TA = 25°C Vhys Input hysteresis voltage R1IN, R2IN VCC = 5 V ri Receiver input resistance R1IN, R2IN VCC = 5 V, (1) (2) (3) MIN TYP (2) MAX 3.5 TA = 25°C UNIT V 1.7 0.4 V 2.4 V 0.8 1.2 0.2 0.5 1 V V 3 5 7 kΩ Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 5 V and TA = 25°C. The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. Switching Characteristics (1) VCC = 5 V, TA = 25°C (see Figure 1) TYP UNIT tPLH(R) Receiver propagation delay time, low- to high-level output PARAMETER 500 ns tPHL(R) Receiver propagation delay time, high- to low-level output 500 ns (1) 6 Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 TRS232 www.ti.com............................................................................................................................................ SLLS861A – AUGUST 2007 – REVISED SEPTEMBER 2008 PARAMETER MEASUREMENT INFORMATION VCC RL = 1.3 kΩ R1OUT or R2OUT R1IN or R2IN Pulse Generator (see Note A) See Note C CL = 50 pF (see Note B) TEST CIRCUIT ≤10 ns Input 10% ≤10 ns 90% 50% 90% 50% 3V 10% 0V 500 ns tPLH tPHL VOH Output 1.5 V 1.5 V VOL WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%. B. CL includes probe and jig capacitance. C. All diodes are 1N3064 or equivalent. Figure 1. Receiver Test Circuit and Waveforms for tPHL and tPLH Measurements Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 7 TRS232 SLLS861A – AUGUST 2007 – REVISED SEPTEMBER 2008............................................................................................................................................ www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) Pulse Generator (see Note A) T1OUT or T2OUT T1IN or T2IN RS-232 Output CL = 10 pF (see Note B) RL TEST CIRCUIT ≤10 ns ≤10 ns 90% 50% Input 10% 3V 90% 50% 10% 0V 5 µs tPLH tPHL 90% Output VOH 90% 10% 10% VOL tTLH tTHL 0.8 (V SR + –V ) 0.8 (V –V ) OH OL OL OH or t t TLH THL WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%. B. CL includes probe and jig capacitance. Figure 2. Driver Test Circuit and Waveforms for tPHL and tPLH Measurements (5-µs Input) Pulse Generator (see Note A) T1OUT or T2OUT T1IN or T2IN RS-232 Output 3 kΩ CL = 2.5 nF TEST CIRCUIT ≤10 ns ≤10 ns Input 90% 1.5 V 10% 90% 1.5 V 10% 20 µs tTLH tTHL Output 3V 3V −3 V −3 V SR + VOH VOL 6V tTHL or t TLH WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%. Figure 3. Test Circuit and Waveforms for tTHL and tTLH Measurements (20-µs Input) 8 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 TRS232 www.ti.com............................................................................................................................................ SLLS861A – AUGUST 2007 – REVISED SEPTEMBER 2008 APPLICATION INFORMATION 5V CBYPASS = 1 µF + − 16 1 C1 C1+ 1 µF 3 1 µF 5 From CMOS or TTL To CMOS or TTL 8.5 V VS+ VS− C2+ 1 µF 2 C1− 4 C2 C3† VCC 6 −8.5 V C4 + C2− 11 14 10 7 12 13 9 8 0V 1 µF RS-232 Output RS-232 Output RS-232 Input RS-232 Input 15 GND † C3 can be connected to VCC or GND. A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. In addition to the 1-µF capacitors shown, the TRS202 can operate with 0.1-µF capacitors. Figure 4. Typical Operating Circuit Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 9 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TRS232D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TRS232 TRS232DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TRS232 TRS232DWR ACTIVE SOIC DW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TRS232 TRS232ID ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TRS232I TRS232IN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 TRS232IN TRS232NSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TRS232 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of