TRS3232E
SLLS790D – JUNE 2007 – REVISED JUNE 2021
TRS3232E 3-V to 5.5-V Multichannel RS-232 Line Driver and Receiver
With ±15-kV IEC ESD Protection In Small Package
1 Features
3 Description
•
The TRS3232E device consists of two line drivers,
two-line receivers, and a dual charge-pump circuit
with ±15-kV IEC ESD protection pin to pin (serial-port
connection pins, including GND).
•
•
•
•
•
•
•
•
•
ESD protection for RS-232 bus pins
– ±15 kV (HBM)
– ±8 kV (IEC61000-4-2, Contact discharge)
– ±15 kV (IEC61000-4-2, Air-gap discharge)
Meets or exceeds the requirements of TIA/
EIA-232-F and ITU V.28 standards
Operates with 3-V to 5.5-V VCC supply
– Interoperable with RS-232 down to 2.7-V VCC
Operates up to 250 kbps
Two drivers and two receivers
Low supply current: 300 μA (typical)
External capacitors: 4 × 0.1 μF
Accepts 5-V logic input with 3.3-V supply
Available in near chip-scale package (QFN-16, 3
mm x 3 mm), 85% smaller than SOIC-16
Pin compatible to alternative high-speed devices
(1 Mbps)
– SN65C3232E (–40°C to +85°C)
– SN75C3232E (0°C to 70°C)
The device meets the requirements of TIA/EIA-232F and provides the electrical interface between
an asynchronous communication controller and the
serial-port connector. The charge pump and four small
external capacitors allow operation from a single 3-V
to 5.5-V supply. The devices operate at data signaling
rates up to 250 kbps and a maximum of 30-V/μs
driver output slew rate.
Device Information(1)
PART NUMBER
TRS3232E
2 Applications
•
•
•
•
•
•
•
Industrial PCs
Wired networking
Data center and enterprise computing
Battery-powered systems
Notebooks
Palmtop PCs
Hand-held equipment
(1)
5V
BODY SIZE (NOM)
SOIC (D) 16
9.90 mm × 3.91 mm
SSOP (DB) 16
6.20 mm × 5.30 mm
SOIC (DW) 16
10.30 mm × 7.50 mm
TSSOP (PW) 16
5.00 mm × 4.40 mm
VQFN (RGT) 16
3.00 mm x 3.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
POWER
2
2
TOUT
RS232
2
RIN
RS232
TX
TIN
2
ROUT
PACKAGE
RX
Simplified Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TRS3232E
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SLLS790D – JUNE 2007 – REVISED JUNE 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 ESD Ratings - IEC Specifications............................... 4
6.4 Recommended Operating Conditions.........................5
6.5 Thermal Information....................................................5
6.6 Electrical Characteristics — Device............................ 6
6.7 Electrical Characteristics — Driver............................. 6
6.8 Electrical Characteristics — Receiver.........................7
6.9 Switching Characteristics............................................7
7 Parameter Measurement Information.......................... 10
8 Detailed Description...................................................... 11
8.1 Overview................................................................... 11
8.2 Functional Block Diagram......................................... 11
8.3 Feature Description...................................................11
8.4 Device Functional Modes..........................................12
9 Application and Implementation.................................. 13
9.1 Application Information............................................. 13
9.2 Typical Application.................................................... 13
10 Power Supply Recommendations..............................14
11 Layout........................................................................... 15
11.1 Layout Guidelines................................................... 15
11.2 Layout Example...................................................... 15
12 Device and Documentation Support..........................16
12.1 Receiving Notification of Documentation Updates..16
12.2 Support Resources................................................. 16
12.3 Trademarks............................................................. 16
12.4 Electrostatic Discharge Caution..............................16
12.5 Glossary..................................................................16
13 Mechanical, Packaging, and Orderable
Information.................................................................... 16
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (June 2021) to Revision D (June 2021)
Page
• Added Applications: Industrial PCs, Wired networking, and Data center and enterprise computing..................1
• Changed the table note in the ESD Ratings - IEC Specifications to make it applicable to D, DB and PW
packages. .......................................................................................................................................................... 4
• Changed the thermal paramater values for D, DB and PW packages in the Thermal Information table............5
Changes from Revision B (October 2017) to Revision C (June 2021)
Page
• Added RGT package to the Device Information ................................................................................................ 1
• Added the RGT Pin Configuration ..................................................................................................................... 3
• Added the ESD Ratings - IEC Specifications .................................................................................................... 4
• Added RGT to the Thermal Information .............................................................................................................5
• Added RGT package to the Switching Characteristics ...................................................................................... 7
• Changed the capacitor value From: 1 µf To: 0.1 µf in the Layout Diagram ..................................................... 15
Changes from Revision A (July 2015) to Revision B (October 2017)
Page
• Added Feature: Interoperable with RS-232 down to 2.7-V VCC .........................................................................1
• Added Driver Output Voltage vs. Supply Voltage, Both Drivers Loaded ........................................................0
Changes from Revision * (April 2007) to Revision A (July 2015)
Page
• Deleted Ordering Information table.....................................................................................................................1
• Added Device Information table, Pin Configuration and Functions section, ESD Ratings table, Thermal
Information table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support
section, and Mechanical, Packaging, and Orderable Information section ......................................................... 1
2
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SLLS790D – JUNE 2007 – REVISED JUNE 2021
5 Pin Configuration and Functions
C1+
V+
C1−
C2+
C2−
V−
DOUT2
RIN2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
GND
DOUT1
RIN1
ROUT1
DIN1
DIN2
ROUT2
C1-
1
C2+
2
C1+
V+
VCC
GND
16
15
14
13
12
DOUT1
11
RIN1
Thermal Pad
C2-
3
10
ROUT1
V-
4
9
DIN1
Figure 5-1. D, DW, DB or PW Package, 16-Pin SOIC,
SSOP or TSSOP, Top View
5
6
7
8
DOUT2 RIN2 ROUT2 DIN2
Figure 5-2. RGT package, 16 Pin VQFN, Top View
Table 5-1. Pin Functions
PIN
NAME
I/O
DESCRIPTION
NO.
RGT
C1+
1
16
—
Positive lead of C1 capacitor
C1–
3
1
—
Negative lead of C1 capacitor
C2+
4
2
—
Positive lead of C2 capacitor
C2–
5
3
—
Negative lead of C2 capacitor
DIN1
11
9
I
Logic data input (from UART)
DIN2
10
8
I
Logic data input (from UART)
DOUT2
7
5
O
RS232 line data output (to remote RS232 system)
DOUT1
14
12
O
RS232 line data output (to remote RS232 system)
GND
15
13
—
Ground
RIN1
13
11
I
RS232 line data input (from remote RS232 system)
RIN2
8
6
I
RS232 line data input (from remote RS232 system)
ROUT2
9
7
O
Logic data output (to UART)
ROUT1
12
10
O
Logic data output (to UART)
V+
2
15
O
Positive charge pump output for storage capacitor only
V–
6
4
O
Negative charge pump output for storage capacitor only
VCC
16
14
—
Supply voltage, connect to external 3-V to 5.5-V power supply
Yes
—
Thermal pad for improving heat dissipation. Can be connected to GND or left
floating.
Thermal Pad
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Supply voltage(2)
VCC
voltage(2)
V+
Positive output supply
V–
Negative output supply voltage(2)
V+ – V–
VI
Supply voltage
Drivers
Input voltage
UNIT
6
V
–0.3
7
V
0.3
–7
V
13
V
6
V
–0.3
Receivers
Output voltage
TJ
Operating virtual junction temperature
Tstg
Storage temperature
(2)
MAX
difference(2)
VO
(1)
MIN
–0.3
–25
25
V
Drivers
–13.2
13.2
V
Receivers
–0.3
VCC + 0.3
V
150
°C
150
°C
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to network GND.
6.2 ESD Ratings
VALUE
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC
specification JESD22-C101(2)
(1)
(2)
All pins except RIN1, RIN2,
DOUT1 and DOUT2
±2000
Pins RIN1, RIN2, DOUT1 and
DOUT2
±15000
All pins
±1500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 ESD Ratings - IEC Specifications
VALUE
IEC 61000-4-2, Contact Discharge(1)
V (ESD)
Electrostatic discharge
IEC 61000-4-2, Air-Gap Discharge(1)
(1)
4
Pins RIN1, RIN2, DOUT1,
DOUT2
UNIT
±8000
V
Pins RIN1, RIN2, DOUT1,
DOUT2
±15000
For RGT, D, DB and PW packages only: Minimum of 1-µF capacitor between VCC and GND is required to meet the specified IEC
61000-4-2 rating.
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6.4 Recommended Operating Conditions
See Typical Operating Circuit and Capacitor Values.(1)
NOM
MAX
3
3.3
3.6
4.5
5
5.5
VCC = 3.3 V
Supply voltage
VCC = 5 V
V
2
5.5
5.5
DIN
0
0.8
V
RIN
–25
25
V
0
70
–40
85
Driver high-level input voltage
DIN
VIL
Driver low-level input voltage
VI
Receiver input voltage
TA
Operating free-air temperature
VCC = 3.3 V
UNIT
2.4
VIH
(1)
MIN
VCC = 5 V
TRS3232EC
TRS3232EI
V
°C
C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.5 Thermal Information
TRS3232E
THERMAL METRIC(1)
PW
(TSSOP)
D (SOIC)
DW (SOIC) DB (SSOP)
RGT
(VQFN)
UNIT
16 PINS
16 PINS
16 PINS
16 PINS
16 PINS
RθJA
Junction-to-ambient thermal resistance
108.2
85.9
72.3
103.1
48.8
°C/W
RθJCtop
Junction-to-case (top) thermal resistance
39.0
43.1
33.5
49.2
55.8
°C/W
RθJB
Junction-to-board thermal resistance
54.4
44.5
37.1
54.8
23.2
°C/W
ψJT
Junction-to-top characterization parameter
3.3
10.1
7.5
12.0
1.7
°C/W
ψJB
Junction-to-board characterization parameter
53.8
44.1
37.1
54.1
23.2
°C/W
RθJCbot
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
N/A
9.0
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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SLLS790D – JUNE 2007 – REVISED JUNE 2021
6.6 Electrical Characteristics — Device
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Typical
Operating Circuit and Capacitor Values).(1)
PARAMETER
ICC
(1)
(2)
Supply current
TEST CONDITIONS
MIN
No load, VCC = 3.3 V or 5 V
TYP(2)
MAX
0.3
1
UNIT
mA
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
6.7 Electrical Characteristics — Driver
over operating free-air temperature range (unless otherwise noted) (see Typical Operating Circuit and Capacitor Values).(1)
PARAMETER
MIN
TYP(2)
5.4
VOH
High-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = GND
5
VOL
Low-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = VCC
–5
IIH
High-level input current
VI = VCC
IIL
Low-level input current
VI at GND
IOS (3)
Short-circuit output current
rO
Output resistance
(1)
(2)
(3)
6
TEST CONDITIONS
VCC = 3.6 V,
VO = 0 V
VCC = 5.5 V,
VO = 0 V
VCC, V+, and V– = 0 V,
VO = ±2 V
300
MAX
UNIT
V
–5.4
V
±0.01
±1
μA
±0.01
±1
μA
±35
±60
mA
10M
Ω
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
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6.8 Electrical Characteristics — Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Typical
Operating Circuit and Capacitor Values).(2)
PARAMETER
VOH
High-level output voltage
IOH = –1 mA
VOL
Low-level output voltage
IOL = 1.6 mA
VIT+
Positive-going input threshold voltage
VIT–
Negative-going input threshold voltage
Vhys
Input hysteresis (VIT+ – VIT–)
ri
Input resistance
(1)
(2)
MIN
TYP(1)
VCC – 0.6
VCC – 0.1
TEST CONDITIONS
MAX
UNIT
V
0.4
VCC = 3.3 V
1.5
2.4
VCC = 5 V
1.8
2.4
VCC = 3.3 V
0.6
1.2
VCC = 5 V
0.8
1.5
V
V
V
0.3
VI = ±3 V to ±25 V
3
5
V
7
kΩ
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.9 Switching Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Typical
Operating Circuit and Capacitor Values)(1)
PARAMETER
Maximum data rate
Driver pulse skew(3)
tsk(p)
SR(tr)
TEST CONDITIONS
RL = 3 kΩ,
CL = 1000 pF,
see Driver Slew Rate
One DOUT switching,
MIN
TYP(2)
RGT package
250
500
D, DB, DW and
PW
packages
150
250
RL = 3 kΩ, CL = 1000 pF, VCC =
5 V Driver Pulse Skew
RGT package
50
RL = 3 kΩ to 7 kΩ, CL = 150
pF to 2500 pF see Driver Pulse
Skew
D, DB, DW and
PW packages
300
Driver slew rate, transition region RL = 3 kΩ to 7 kΩ,
(see Driver Slew Rate)
VCC = 3.3 V
UNIT
kbps
ns
CL = 150 pF to
1000 pF
6
30
CL = 150 pF to
2500 pF
4
30
V/μs
tPLH
RGT package
CL = 150 pF,
Receiver propagation delay time,
see Receiver Propagation Delay D, DB, DW and
low- to high-level output
Times
PW packages
RGT package
CL = 150 pF,
Receiver propagation delay time,
see Receiver Propagation Delay D, DB, DW and
high- to low-level output
Times
PW packages
100
tPHL
tsk(p)
Receiver pulse skew(3)
RGT package
20
D, DB, DW and PW packages
300
(1)
(2)
(3)
MAX
90
300
300
ns
ns
ns
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
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6
0
5
±1
DOUT Voltage (V)
DOUT Voltage (V)
Typical Characteristics
4
3
2
±2
±3
±4
1
±5
VOH
VOL
0
±6
0
5
10
15
20
25
DOUT Current (mA)
0
10
15
20
25
DOUT Current (mA)
VCC = 3.3 V
C001
VCC = 3.3 V
Figure 6-1. DOUT VOH vs Load Current, Both Drivers Loaded
Figure 6-2. DOUT VOL vs Load Current, Both Drivers Loaded
6
200
CL=150 pF
CL=250 pF
CL=1000 pF
CL=2500 pF
180
Driver Pulse Skew (ns)
4
Transmitter Output (V)
5
C001
2
TxOUT+
TxOUT-
0
-2
-4
160
140
120
100
80
60
40
-6
2.7
3
3.3
3.6
3.9
4.2
Supply Voltage (V)
4.5
4.8
5
20
3
3.25
3.5
3.75
4
D001
TX1 at 250
TX2 at 15.6
kbps
kbps
Both TX loaded 3 kΩ and
1000 pF
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
D001
D001_tx_skew.grf
Figure 6-4. Driver Pulse Skew (RGT Package)
Figure 6-3. Driver Output Voltage vs. Supply Voltage, Both
Drivers Loaded
130
120
-45 qC
25 qC
85 qC
110
-45 qC
25 qC
85 qC
126
122
Receiver Path tPHL (ns)
Receiver Path tpLH (ns)
115
105
100
95
90
85
118
114
110
106
102
98
80
94
75
90
3
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
3
D002
D002_rx_tpLH.grf
Figure 6-5. Receiver Path Low-to-High Propagation Delay (RGT
Package)
8
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
D003
D003_rx_tpHL.grf
Figure 6-6. Receiver Path High-to-Low Propagation Delay (RGT
Package)
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Typical Characteristics
50
-45 qC
25 qC
85 qC
Receiver Path Skew (ns)
45
40
35
30
25
20
15
10
5
0
3
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
D004
D004_rx_skew.grf
Figure 6-7. Receiver Path Skew (|tpHL-tpLH|) (RGT Package)
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SLLS790D – JUNE 2007 – REVISED JUNE 2021
7 Parameter Measurement Information
3V
Input
Generator
(see Note B)
1.5 V
RS-232
Output
50 Ω
RL
1.5 V
0V
tPTHL
CL
(see Note A)
tPTLH
−3 V
TEST CIRCUIT
SR(tr) =
t
PTHL
6V
or t
VOH
3V
−3 V
3V
Output
VOL
VOLTAGE WAVEFORMS
PTLH
A. CL includes probe and jig capacitance
B. The pulse generator has the following characteristics: PRR = 250 kbps, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns
Figure 7-1. Driver Slew Rate
3V
Input
Generator
(see Note B)
1.5 V
RS-232
Output
50 Ω
RL
1.5 V
0V
tPTHL
CL
(see Note A)
tPTLH
3V
Output
3V
−3 V
−3 V
TEST CIRCUIT
SR(tr) =
t
PTHL
6V
or t
VOH
VOL
VOLTAGE WAVEFORMS
PTLH
A. CL includes probe and jig capacitance
B. The pulse generator has the following characteristics: PRR = 250 kbps, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns
Figure 7-2. Driver Pulse Skew
3V
Generator
(see Note B)
RS-232
Output
50 Ω
RL
1.5 V
Input
1.5 V
0V
CL
(see Note A)
tPHL
tPLH
VOH
50%
Output
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
A. CL includes probe and jig capacitance
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns
Figure 7-3. Receiver Propagation Delay Times
10
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8 Detailed Description
8.1 Overview
The TRS3232E device consists of two line drivers, two-line receivers, and a dual charge-pump circuit with
IEC61000-4-2 ESD protection terminal to terminal (serial-port connection terminals, including GND). The device
meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous
communication controller and the serial-port connector. The charge pump and four small external capacitors
allow operation from a single 3-V to 5.5-V supply. The device operates at data signaling rates up to 250 kbps
and a maximum of 30-V/μs driver output slew rate. Outputs are protected against shorts to ground.
8.2 Functional Block Diagram
5V
POWER
2
2
ROUT
2
TOUT
RS232
2
RIN
RS232
TX
TIN
RX
8.3 Feature Description
8.3.1 Power
The power block increases, inverts, and regulates voltage at V+ and V– pins using a charge pump that requires
four external capacitors.
8.3.2 RS232 Driver
Two drivers interface standard logic level to RS232 levels. Both DIN inputs must be valid high or low.
8.3.3 RS232 Receiver
Two receivers interface RS232 levels to standard logic levels. An open input will result in a high output on ROUT.
Each RIN input includes an internal standard RS232 load.
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8.4 Device Functional Modes
Table 8-1 and Table 8-2 list the functional modes of the drivers and receivers of TRS3232E.
Table 8-1. Each Driver(1)
INPUT
DIN
(1)
OUTPUT
DOUT
L
H
H
L
H = high level, L = low level
Table 8-2. Each Receiver(1)
INPUT
RIN
(1)
OUTPUT
ROUT
L
H
H
L
Open
H
H = high level, L = low level,
Open = input disconnected or connected driver off
11
14
DIN1
DOUT1
10
7
DIN2
DOUT2
12
13
ROUT1
RIN1
9
8
ROUT2
RIN2
Figure 8-1. Logic Diagram
8.4.1 VCC Powered by 3 V to 5.5 V
The device is in normal operation.
8.4.2 VCC Unpowered, VCC = 0 V
When TRS3232E is unpowered, it can be safely connected to an active remote RS232 device.
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The TRS3232E interfaces logic lines from a UART or microcontroller to the voltage and current levels needed for
RS232 communication. The TIN inputs will accept 5-V logic with 3.3-V VCC supply. All baud rates up to 250-kbps
are supported.
It is important to use the correct capacitors for the VCC voltage. This will reduce ripple voltage on the TOUT
outputs. If only one driver is needed, the unused driver input should be connected to VCC or ground.
9.2 Typical Application
ROUT and DIN connect to UART or general-purpose logic lines. RIN and DOUT lines connect to a RS232
connector or cable. For proper operation, add capacitors as shown in Table 9-1.
1
−
16
+ CBYPASS
− = 0.1µF
+
C1
VCC
C1+
2
(1) +
C3
V+
GND
15
−
3
4
14
DOUT1
C1−
13
C2+
+
C2
RIN1
5 kΩ
−
5 C2−
12
6
C4
−
V−
11
ROUT1
DIN1
+
DOUT2
RIN2
7
10
8
9
DIN2
ROUT2
5 kΩ
A.
C3 can be connected to VCC or GND
Resistor values shown are nominal.
Nonpolorized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as
shown.
Figure 9-1. Typical Operating Circuit and Capacitor Values
Table 9-1. VCC vs Capacitor Values
VCC
C1
C2, C3, C4
3.3 V ± 0.3 V
0.1 µF
0.1 µF
5 V ± 0.5 V
0.047 µF
0.33 µF
3 V ± 5.5 V
0.1 µF
0.47 µF
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9.2.1 Design Requirements
The recommended VCC is 3.3 V or 5 V. 3 V to 5.5 V is also possible.
The maximum recommended bit rate is 250 kbps.
9.2.2 Detailed Design Procedure
All DIN inputs must be connected to valid low or high logic levels.
Select capacitor values based on VCC level for best performance.
9.2.3 Application Curve
Voltage (V)
Figure 9-2 curves are for 3.3-V VCC and 250-kbps alternative bit data stream.
6
5
4
3
2
1
0
±1
±2
±3
±4
±5
±6
±7
±8
±9
DIN
DOUT to RIN
ROUT
0
1
2
3
4
5
6
7
Time ( s)
8
9
10
C001
Figure 9-2. 250 kbps Driver to Receiver Loopback Timing Waveform, VCC= 3.3 V
10 Power Supply Recommendations
The supply voltage, VCC, should be between 3 V and 5.5 V. Select the values of the charge-pump capacitors
using Table 9-1.
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11 Layout
11.1 Layout Guidelines
Keep the external capacitor traces short, specifically on the C1 and C2 nodes that have the fastest rise and fall
times.
11.2 Layout Example
Ground
1 C1+
0.1 µF
0.1 µF 2
VS+
VCC 16
GND 15
3 C1-
T1OUT 14
4 C2+
R1IN 13
5 C2-
R1OUT 12
6 VS-
T1IN 11
7 T2OUT
T2IN 10
VCC
0.1 µF
Ground
0.1 µF
Ground
0.1 µF
8 R2IN
R2OUT 9
Figure 11-1. Layout Diagram
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
15-Jul-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TRS3232ECDR
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
TRS3232EC
Samples
TRS3232ECDW
ACTIVE
SOIC
DW
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
TRS3232EC
Samples
TRS3232ECDWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
TRS3232EC
Samples
TRS3232ECPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
RS32EC
Samples
TRS3232EIDBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RS32EI
Samples
TRS3232EIDR
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TRS3232EI
Samples
TRS3232EIDW
ACTIVE
SOIC
DW
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TRS3232EI
Samples
TRS3232EIDWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TRS3232EI
Samples
TRS3232EIPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RS32EI
Samples
TRS3232EIPWRG4
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RS32EI
Samples
TRS3232EIRGTR
ACTIVE
VQFN
RGT
16
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
3232
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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