TRSF3243E
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
TRSF3243E 3-V to 5.5-V Multichannel RS-232 Compatible Line Driver and Receiver
with ±15-kV IEC ESD protection
Discharge) protection on serial-port connection pins.
This device provides the electrical interface between
an asynchronous communication controller and the
serial-port connector. The charge pump and four small
external capacitors allow operation from a single 3-V
to 5.5-V supply. In addition, this device includes an
always-active noninverting output (ROUT2B), which
allows applications using the ring indicator to transmit
data while the device is powered down. The device
operates at data signaling rates up to 1 Mbit/s and an
increased slew-rate range of 18 V/μs to 150 V/μs.
1 Features
•
•
•
•
•
•
•
•
•
•
ESD protection for RS-232 bus pins
– ±15-kV Human-body model (HBM)
– ±8-kV IEC61000-4-2, Contact discharge
– ±15-kV IEC61000-4-2, Air-gap discharge
Operates with single 3-V to 5.5-V VCC supply
Always-active noninverting receiver output
(ROUT2B)
Low standby current: 1 μA typical
External capacitors: 4 × 0.1 μF
Accepts 5-V logic input with 3.3-V supply
Serial-mouse driveability
Supports operation up to 1 Mbit/s
Auto-powerdown feature to disable driver outputs
when no valid RS-232 signal is sensed
Available in space-saving RHB (5 mm x 5 mm
QFN-32) package
Flexible control options for power management are
available when the serial port is inactive. The autopowerdown feature functions when FORCEON is
low and FORCEOFF is high. During this mode of
operation, if the device does not sense a valid
RS-232 signal, the driver outputs are disabled. If
FORCEOFF is set low, both drivers and receivers
(except ROUT2B) are shut off, and the supply current
is reduced to 1 μA. Disconnecting the serial port
or turning off the peripheral drivers causes the autopowerdown condition to occur.
2 Applications
•
•
•
•
•
Industrial PCs
Wired networking
Data center and networking equipment
Notebooks
Hand-held equipment
Packaging Information
PART NUMBER
3 Description
TRSF3243E
The TRSF3243E consists of three line drivers,
five line receivers, and a dual charge-pump circuit
with ±15-kV ESD (HBM and IEC61000-4-2, Air-Gap
Discharge) and ±8-kV ESD (IEC61000-4-2, Contact
spacer
3.3 V, 5 V
(1)
PACKAGE(1)
BODY SIZE (NOM)
VQFN (RHB) (32)
5,00 mm × 5,00 mm
TSSOP (PW) (28)
9,70 mm × 4,40 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
POWER
FORCEOFF
AUTOPOWERDOWN
FORCEON
3
DIN
3
DOUTx
RS-232
TX
5
5
ROUT
RX
RIN
RS-232
ROUT2B
RX
RIN2
RS-232
STATUS
INVALID
Simplified Circuit
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings............................................................... 5
6.3 ESD Ratings - IEC Specifications............................... 5
6.4 Recommended Operating Conditions.........................6
6.5 Thermal Information....................................................6
6.6 Electrical Characteristics.............................................6
6.7 Electrical Characteristics: Driver................................. 7
6.8 Switching Characteristics: Driver................................ 7
6.9 Electrical Characteristics: Receiver............................ 7
6.10 Switching Characteristics: Receiver..........................8
6.11 Electrical Characteristics: Auto-Powerdown............. 8
6.12 Switching Characteristics: Auto-Powerdown............ 8
Parameter Measurement Information............................... 9
7 Detailed Description......................................................12
7.1 Overview................................................................... 12
Functional Block Diagram............................................... 12
7.2 Feature Description...................................................13
7.3 Device Functional Modes..........................................13
8 Application and Implementation.................................. 14
8.1 Application Information............................................. 14
8.2 Typical Application.................................................... 14
8.3 Design Requirements............................................... 16
8.4 Detailed Design Procedure....................................... 16
9 Power Supply Recommendations................................16
10 Layout...........................................................................17
10.1 Layout Guidelines................................................... 17
10.2 Layout Example...................................................... 17
11 Mechanical, Packaging, and Orderable
Information.................................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (November 2021) to Revision A (September 2022)
Page
• Deleted the Product Preview note from TSSOP (PW) in the Package Information table................................... 1
2
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
5 Pin Configuration and Functions
C2+
1
28
C1+
C2-
2
27
V+
V-
3
26
VCC
RIN1
4
25
GND
RIN2
5
24
C1-
RIN3
6
23
FORCEON
RIN4
7
22
FORCEOFF
RIN5
8
21
INVALID
DOUT1
9
20
ROUT2B
DOUT2
10
19
ROUT1
DOUT3
11
18
ROUT2
DIN3
12
17
ROUT3
DIN2
13
16
ROUT4
DIN1
14
15
ROUT5
Not to scale
Figure 5-1. PW (TSSOP) Packages, 28 Pin, Top View
Table 5-1. Pin Functions
PIN
NO.
(1)
NAME
TYPE(1)
DESCRIPTION
1
C2+
—
Positive terminal of the charge-pump capacitor
2
C2-
—
Negative terminal of the charge-pump capacitor
3
V-
4
RIN1
5
RIN2
6
RIN3
7
RIN4
8
RIN5
Negative charge-pump rail
I
RS-232 receiver inputs
O
RS-232 driver outputs
I
Driver logic inputs
O
Receiver logic outputs
9
DOUT1
10
DOUT2
11
DOUT3
12
DIN3
13
DIN2
14
DIN1
15
ROUT5
16
ROUT4
17
ROUT3
18
ROUT2
19
ROUT1
20
ROUT2B
—
Always-active non-inverting receiver logic output
21
INVALID
O
Invalid Output Pin
22
FORCEOFF
I
Auto Powerdown Control input (Refer to Truth Table)
23
FORCEON
I
Auto Powerdown Control input (Refer to Truth Table)
24
C1-
—
Negative terminal of the charge-pump capacitor
25
GND
—
Ground
26
VCC
—
3-V to 5.5-V supply voltage
27
V+
—
Positive charge-pump rail
28
C1+
—
Positive terminal of the charge-pump capacitor
Signal Types: I = Input, O = Output, I/O = Input or Output.
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
3
TRSF3243E
www.ti.com
NC
V-
C2-
C2+
C1+
V+
VCC
NC
32
31
30
29
28
27
26
25
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
RIN1
1
24
GND
RIN2
2
23
C1-
RIN3
3
22
FORCEON
RIN4
4
21
FORCEOFF
13
14
15
16
ROUT4
ROUT3
NC
ROUT2
12
ROUT1
17
DIN1
18
8
ROUT5
7
DOUT3
11
DOUT2
DIN2
ROUT2B
10
INVALID
19
9
20
6
NC
5
DIN3
RIN5
DOUT1
Not to scale
Figure 5-2. RHB (VQFN) Package, 32 Pin, Top View
Table 5-2. Pin Functions
PIN
NO.
4
NAME
1
RIN1
2
RIN2
3
RIN3
4
RIN4
5
RIN5
6
DOUT1
7
DOUT2
8
DOUT3
9
NC
10
DIN3
11
DIN2
12
DIN1
13
ROUT5
14
ROUT4
15
ROUT3
16
NC
17
ROUT2
18
ROUT1
19
20
TYPE
DESCRIPTION
I
RS-232 receiver inputs
O
RS-232 driver outputs
—
No internal connection
I
Driver logic inputs
O
Receiver logic outputs
—
No internal connection
O
Receiver outputs
ROUT2B
O
Always-active non-inverting receiver output
INVALID
O
Invalid Output Pin
21
FORCEOFF
I
Auto Powerdown Control input (Refer to Truth Table)
22
FORCEON
I
Auto Powerdown Control input (Refer to Truth Table)
23
C1-
—
Negative terminal of the charge-pump capacitor
24
GND
—
Ground
25
NC
—
No internal connection
26
VCC
—
3-V to 5.5-V supply voltage
27
V+
—
Positive charge-pump rail
28
C1+
—
29
C2+
—
30
C2-
—
Negative terminal of the charge-pump capacitor
31
V-
—
Negative charge-pump rail
32
NC
—
No internal connection
Positive terminal of the charge-pump capacitor
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Supply voltage range(2)
VCC
range(2)
V+
Positive-output supply voltage
V–
Negative-output supply voltage range(2)
V+ – V–
Supply voltage
Input voltage range
VO
Output voltage range
TJ
Operating virtual junction temperature
Tstg
Storage temperature range
(2)
MAX
6
V
–0.3
7
V
0.3
–7
V
13
V
difference(2)
VI
(1)
MIN
–0.3
UNIT
Driver ( FORCEOFF, FORCEON)
–0.3
6
Receiver
–25
25
–13.2
13.2
V
150
°C
150
°C
Driver
–65
V
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
All voltages are with respect to network GND.
6.2 ESD Ratings
VALUE
V (ESD)
Electrostatic
discharge
Human-body model (HBM), per ANSI/
ESDA/JEDEC JS-001(1)
Charged device model (CDM), per ANSI/
ESDA/JEDEC JS-002(2)
(1)
(2)
All pins except RIN1, RIN2, RIN3, RIN4,
RIN5, DOUT1, DOUT2 and DOUT3 pins
±3000
RIN1, RIN2, RIN3, RIN4, RIN5, DOUT1,
DOUT2 and DOUT3 pins to GND
±15000
All pins
±1500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 ESD Ratings - IEC Specifications
VALUE
V (ESD)
(1)
Electrostatic
discharge
IEC 61000-4-2 Contact Discharge
(1)
IEC 61000-4-2 Air-gap Discharge (1)
RIN1, RIN2, RIN3, RIN4, RIN5, DOUT1,
DOUT2 and DOUT3 pins
±8,000
±15,000
UNIT
V
A minimum of 1-µF capacitor between VCC and GND is required to meet the specified IEC 61000-4-2 rating.
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
5
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
6.4 Recommended Operating Conditions
see (1)
NOM
MAX
3
3.3
3.6
4.5
5
5.5
VCC = 3.3 V
Supply voltage
VCC = 5 V
VIH
Driver and control high-level input voltage DIN, FORCEOFF, FORCEON
VIL
Driver and control low-level input voltage
DIN, FORCEOFF, FORCEON
VI
Driver and control input voltage
DIN, FORCEOFF, FORCEON
VI
TA
(1)
MIN
VCC = 3.3 V
2
VCC = 5 V
UNIT
V
V
2.4
0.8
V
0
5.5
V
Receiver input voltage
–25
25
V
Operating free-air temperature
–40
85
°C
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.5 Thermal Information
TRSF3243E
THERMAL METRIC(1)
VQFN (RHB)
TSSOP (PW)
UNIT
32 PINS
28 PINS
RθJA
Junction-to-ambient thermal resistance
34.1
70.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
25.9
21.0
°C/W
RθJB
Junction-to-board thermal resistance
14.6
29.2
°C/W
ψJT
Junction-to-top characterization parameter
0.5
1.3
°C/W
ψJB
Junction-to-board characterization parameter
14.6
28.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
5.1
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.6 Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(2)
PARAMETER
II
Input leakage current
FORCEOFF, FORCEON
No load,
Auto-powerdown disabled
FORCEOFF and FORCEON = VCC
ICC
(1)
(2)
6
MIN
TYP(1)
MAX
±0.01
±1
μA
0.3
1.2
mA
Powered off
No load, FORCEOFF = GND
1
10
Auto-powerdown enabled
No load, FORCEOFF = VCC,
FORCEON = GND,
All RIN are open or grounded,
All DIN are grounded
1
10
Supply current
UNIT
μA
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
6.7 Electrical Characteristics: Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(3)
PARAMETER
VOH
High-level output
voltage
All DOUT at RL = 3 kΩ to GND
VOL
Low-level output
voltage
All DOUT at RL = 3 kΩ to GND
VO
Output voltage
(mouse driveability)
DIN1 = DIN2 = GND, DIN3 = VCC, 3-kΩ to GND at DOUT3,
DOUT1 = DOUT2 = 2.5 mA
IIH
High-level input current VI = VCC
IIL
Low-level input current
VI = GND
IOS
Short-circuit output
current(2)
VCC = 3.6 V,
VO = 0 V
VCC = 5.5 V,
VO = 0 V
ro
Output resistance
VCC, V+, and V– = 0 V,
VO = ±2 V
Ioff
Output leakage current
FORCEOFF = GND
(1)
(2)
(3)
MIN
TYP(1)
5
5.4
MAX
UNIT
V
–5.4
-5
±5
V
V
±0.01
±1
μA
±0.01
±1
μA
±35
±60
mA
300
10M
Ω
VO = ±12 V,
VCC = 3 V to 3.6 V
±25
VO = ±10 V,
VCC = 4.5 V to 5.5 V
±25
μA
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.8 Switching Characteristics: Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(3)
PARAMETER
Maximum data rate
(see Figure 7-1)
RL = 3 kΩ,
One DOUT switching
MIN
CL = 1000 pF
MAX
UNIT
250
CL = 250 pF,
VCC = 3 V to 4.5 V
1000
CL = 1000 pF,
VCC = 4.5 V to 5.5 V
1000
tsk(p)
Pulse skew(2)
CL = 150 pF to 2500 pF,
RL = 3 kΩ to 7 kΩ,
See Figure 7-2
SR(tr)
Slew rate,
transition region
(see Figure 7-1)
CL = 150 pF to 1000 pF,
RL = 3 kΩ to 7 kΩ,
VCC = 3.3 V
(1)
(2)
(3)
TYP(1)
kbit/s
25
18
ns
150
V/μs
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.9 Electrical Characteristics: Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(2)
PARAMETER
VOH
High-level output voltage
IOH = –1 mA
VOL
Low-level output voltage
IOL = 1.6 mA
TYP(1)
VCC – 0.6
VCC – 0.1
MAX
0.4
1.6
2.4
VCC = 5 V
1.9
2.4
Positive-going input threshold voltage
VIT–
Negative-going input threshold voltage
Vhys
Input hysteresis (VIT+ – VIT–)
Ioff
Output leakage current (except ROUT2B)
FORCEOFF = 0 V
ri
Input resistance
VI = ±3 V to ±25 V
VCC = 3.3 V
0.6
1.1
VCC = 5 V
0.8
1.4
V
V
V
0.5
3
UNIT
V
VCC = 3.3 V
VIT+
(1)
(2)
MIN
V
±0.05
±10
μA
5
7
kΩ
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
7
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
6.10 Switching Characteristics: Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(3)
PARAMETER
TYP(1)
UNIT
tPLH
Propagation delay time, low- to high-level output
CL = 150 pF, See Figure 7-3
150
ns
tPHL
Propagation delay time, high- to low-level output
CL = 150 pF, See Figure 7-3
150
ns
ten
Output enable time
CL = 150 pF, RL = 3 kΩ, See Figure 7-4
200
ns
tdis
Output disable time
CL = 150 pF, RL = 3 kΩ, See Figure 7-4
200
ns
50
ns
tsk(p)
(1)
(2)
(3)
Pulse
skew(2)
See Figure 7-3
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.11 Electrical Characteristics: Auto-Powerdown
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 7-5)
PARAMETER
TEST CONDITIONS
MIN
VT+(valid)
Receiver input threshold
for INVALID high-level output voltage
FORCEON = GND, FORCEOFF = VCC
VT–(valid)
Receiver input threshold
for INVALID high-level output voltage
FORCEON = GND, FORCEOFF = VCC
–2.7
VT(invalid)
Receiver input threshold
for INVALID low-level output voltage
FORCEON = GND, FORCEOFF = VCC
–0.3
VOH
INVALID high-level output voltage
IOH = –1 mA, FORCEON = GND,
FORCEOFF = VCC
VOL
INVALID low-level output voltage
IOL = 1.6 mA, FORCEON = GND,
FORCEOFF = VCC
MAX
2.7
UNIT
V
V
0.3
VCC – 0.6
V
V
0.4
V
6.12 Switching Characteristics: Auto-Powerdown
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 7-5)
PARAMETER
tvalid
Propagation delay time, low- to high-level output
tinvalid
Propagation delay time, high- to low-level output
ten
Supply enable time
(1)
8
TYP(1)
UNIT
1
μs
30
μs
100
μs
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
Parameter Measurement Information
3V
Generator
(see Note B)
Input
RS-232
Output
50 Ω
RL
CL
(see Note A)
3V
FORCEOFF
TEST CIRCUIT
0V
Output
SR(tr) +
tTLH
tTHL
6V
t THL or tTLH
VOH
3V
3V
−3 V
−3 V
VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 1 Mbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-1. Driver Slew Rate
3V
Generator
(see Note B)
RS-232
Output
50 Ω
RL
Input
1.5 V
1.5 V
0V
CL
(see Note A)
tPLH
tPHL
VOH
3V
FORCEOFF
50%
50%
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 1 Mbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-2. Driver Pulse Skew
3 V or 0 V
FORCEON
3V
Input
1.5 V
1.5 V
−3 V
Output
Generator
(see Note B)
50 Ω
3V
FORCEOFF
tPHL
CL
(see Note A)
tPLH
VOH
50%
Output
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-3. Receiver Propagation Delay Times
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
9
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
3V
Input
VCC
3 V or 0 V
FORCEON
S1
1.5 V
0V
tPZH
(S1 at GND)
tPHZ
(S1 at GND)
RL
±3 V
1.5 V
GND
VOH
Output
50%
Output
CL
(see Note A)
FORCEOFF
Generator
(see Note B)
0.3 V
tPZL
(S1 at VCC)
tPLZ
(S1 at VCC)
50 Ω
0.3 V
Output
50%
VOL
TEST CIRCUIT
NOTES: A.
B.
C.
D.
VOLTAGE WAVEFORMS
CL includes probe and jig capacitance.
The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
Figure 7-4. Receiver Enable and Disable Times
10
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
2.7 V
2.7 V
0V
Receiver
Input
0V
−2.7 V
−2.7 V
ROUT
Generator
(see Note B)
3V
50 Ω
tinvalid
tvalid
50% VCC
50% VCC
−3 V
VCC
INVALID
Output
Autopowerdown
FORCEOFF
DIN
ten
INVALID
CL = 30 pF
(see Note A)
FORCEON
0V
V+
≈V+
0.3 V
VCC
0V
0.3 V
Supply
Voltages
DOUT
V−
TEST CIRCUIT
≈V−
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
VOLTAGE WAVEFORMS
Valid RS-232 Level, INVALID High
2.7 V
Indeterminate
0.3 V
0V
−0.3 V
If Signal Remains Within This Region
for More Than 30 µs, INVALID Is Low†
Indeterminate
−2.7 V
Valid RS-232 Level, INVALID High
†
Auto-powerdown disables drivers and reduces supply
current to 1 µA.
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 5 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-5. INVALID Propagation Delay Times and Supply Enabling Time
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
11
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
7 Detailed Description
7.1 Overview
The TRSF3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with
±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)
protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides the
electrical interface between an asynchronous communication controller and the serial-port connector.
The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In
addition, the device includes an always-active noninverting output (ROUT2B), which allows applications using
the ring indicator to transmit data while the device is powered down. The device operates at data signaling rates
up to 500 kbit/s and a maximum of 30-V/μs driver output slew rate.
Functional Block Diagram
DIN1
DIN2
DIN3
FORCEOFF
14
9
DOUT1
13
10
DOUT2
12
11
DOUT3
22
21
23
INVALID
Auto-Powerdown
FORCEON
ROUT1
19
4
RIN1
20
ROUT2B
ROUT2
18
5
RIN2
17
6
ROUT3
ROUT4
ROUT5
RIN3
7
16
RIN4
15
8
RIN5
Figure 7-1. Logic Diagram
12
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
7.2 Feature Description
Auto-powerdown can be disabled when FORCEON and FORCEOFF are high and should be done when driving
a serial mouse. With auto-powerdown enabled, the device is activated automatically when a valid signal is
applied to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at any
receiver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7
V or has been between –0.3 V and 0.3 V for less than 30 μs. INVALID is low (invalid data) if all receiver input
voltages are between –0.3 V and 0.3 V for more than 30 μs. Refer to Figure 7-5 for receiver input levels.
7.3 Device Functional Modes
Table 7-1 through Table 7-3 show the device functional modes.
Table 7-1. Each Driver
INPUTS(1)
DIN
(1)
FORCEON
OUTPUT
FORCEOFF
VALID RIN
RS-232 LEVEL
DRIVER STATUS
DOUT
X
X
L
X
Z
Powered off
L
H
H
X
H
H
H
H
X
L
Normal operation with
auto-powerdown disabled
L
L
H
Yes
H
H
L
H
Yes
L
X
L
H
No
Z
Normal operation with
auto-powerdown enabled
Powered off by auto-powerdown
feature
H = high level, L = low level, X = irrelevant, Z = high impedance
Table 7-2. Each Receiver
INPUTS(1)
(1)
OUTPUT
RIN
FORCEON
FORCEOFF
X
X
L
Z
L
X
H
H
H
X
H
L
Open
X
H
H
RECEIVER STATUS
ROUT
Powered off
Normal operation with
auto-powerdown disabled/enabled
H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
Table 7-3. ROUT2B And Outputs INVALID
INPUTS(1)
(1)
OUTPUTS
VALID RIN
RS-232 LEVEL
RIN2
FORCEON
FORCEOFF
INVALID
ROUT2B
Yes
L
X
X
H
L
Yes
H
X
X
H
H
Yes
Open
X
X
H
L
No
Open
X
X
L
L
OUTPUT STATUS
Always active
H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
13
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
For proper operation, add capacitors as shown in Figure 8-1. Pins 12 through 23 connect to UART or generalpurpose logic lines. RS-232 lines on Pins 4 through 11 connect to a connector or cable.
8.2 Typical Application
Three driver and five receiver channels are supported for full duplex transmission with hardware flow control.
The five 5-kΩ resistors are internal to the device.
14
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
TRSF3243E
www.ti.com
A.
B.
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
C3 can be connected to VCC or GND
Resistor values shown are nominal.
Figure 8-1. Typical Operating Circuit and Capacitor Values
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
15
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
8.3 Design Requirements
For this design example, use the values in VCC vs Capacitor Values.
• VCC minimum is 3 V and maximum is 5.5 V.
• Maximum recommended bit rate is 1 Mbps.
Table 8-1. VCC vs Capacitor Values
VCC
C1
C2, C3, and C4
3.3 V ± 0.3 V
0.1 µF
0.1 µF
5 V ± 0.5 V
0.047 µF
0.33 µF
3 V to 5.5 V
0.1 µF
0.47 µF
8.4 Detailed Design Procedure
TRSF3243E has integrated charge-pump that generates positive and negative rails needed for RS-232 signal
levels. Main design requirement is that charge-pump capacitor terminals must be connected with recommended
capacitor values. Charge-pump rail voltages and device supply pin must be properly bypassed with ceramic
capacitors.
9 Power Supply Recommendations
The VCC voltage must be connected to the same power source used for logic device connected to DIN and
ROUT pins. VCC must be between 3 V and 5.5 V.
16
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
10 Layout
10.1 Layout Guidelines
As shown in Layout Example, charge-pump and supply voltage capacitors must be located very close to device
pins. Non-polarized ceramic capacitors are recommended. If polarized tantalum or electrolytic capacitors are
used, they should be connected as per Typical Operating Circuit and Capacitor Values.
10.2 Layout Example
(GND)
1
C2+
C1+ 28
2
C2-
V+ 27
3
V-
4
RIN1
5
RIN2
C1- 24
6
RIN3
FORCEON 23
7
RIN4
FORCEOFF 22
8
RIN5
INVALID 21
9
DOUT1
ROUT2B 20
10 DOUT2
ROUT1 19
11 DOUT3
ROUT2 18
12 DIN3
ROUT3 17
13 DIN2
ROUT4 16
14 DIN1
ROUT5 15
Vcc 26
GND
25
Figure 10-1. Example Layout
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
17
TRSF3243E
www.ti.com
SLLSFO5A – NOVEMBER 2021 – REVISED SEPTEMBER 2022
Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: TRSF3243E
PACKAGE OPTION ADDENDUM
www.ti.com
10-Apr-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TRSF3243EIPWR
ACTIVE
TSSOP
PW
28
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
F3243
Samples
TRSF3243EIRHBR
ACTIVE
VQFN
RHB
32
5000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TRSF
3243
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
