TS2PCIE412
www.ti.com
SCDS269C – MARCH 2009 – REVISED APRIL 2010
4-CHANNEL 8:16 MULTIPLEXER/DEMULTIPLEXER PCI EXPRESS SWITCH
Check for Samples: TS2PCIE412
FEATURES
1
•
•
•
PCIe Bus Multiplexing and Expansion
Routing PCI Express Data and/or Display Port
Signals
Notebook PCs
Desktop PCs
Servers/Storage Area Networks
GND
VDD
GND
41
40
39
VDD
42
A0
2
37
1B1
A1
3
36
2B1
GND
4
35
3B1
VDD
5
34
0B2
A2
6
33
1B2
A3
7
32
2B2
VDD
8
SEL
9
Exposed
Center Pad
(GND)
31
3B2
30
VDD
29
4B1
A4
11
28
5B1
A5
12
27
6B1
VDD
13
26
7B1
GND 14
25
4B2
GND 10
A6
15
24
5B2
A7
16
23
6B2
GND 17
22
7B2
GND 21
•
•
0B1
20
APPLICATIONS
38
GND 19
•
1
GND
VDD
•
RUA PACKAGE
(TOP VIEW)
18
•
•
•
•
Compatible With PCI Express (PCIe) Standard
Wide Bandwidth of over 3 Gbps
Low Crosstalk (XTALK = –32 dB Typ at
1.25 GHz)
OIRR = –36.3 dB Typical at 1.25 GHz
Low Bit-to-Bit Skew (tsk(O) = 0.06 ns Typical)
VDD Operating Range: 1.5 V to 2 V
Ioff Supports Partial Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
VDD
•
•
•
2
If the exposed center pad is used, it must
be connected to ground.
DESCRIPTION/ ORDERING INFORMATION
The TS2PCIE412 is a 4-channel PCIe 2:1 multiplexer/demultiplexer switch that can be used to route one PCIe
data lane between two possible destinations or two PCIe data lanes to one destination. Each channel consists of
differential pairs of receive (RX) and transmit (TX) signals and operates at a signal-processing bandwidth speed,
which supports the PCIe standard of 2.5 Gbps. The device is controlled with one select input (SEL) pin, where
SEL controls the data path of the multiplexer/demultiplexer and can be connected to any GPIO in the system.
The unselected channel is set in a high-impedance state.
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
(1)
(2)
QFN – RUA
(2)
Tape and reel
ORDERABLE PART NUMBER
TS2PCIE412RUAR
TOP-SIDE MARKING
SH412
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2010, Texas Instruments Incorporated
TS2PCIE412
SCDS269C – MARCH 2009 – REVISED APRIL 2010
www.ti.com
FUNCTION TABLE
SEL
FUNCTION
L
An to nB1
H
An to nB2
FUNCTIONAL DIAGRAM
A0
A1
A2
A3
2
38
3
37
6
36
7
35
34
33
32
31
A4
A5
A6
A7
11
29
12
28
15
27
16
26
25
24
23
22
9
0B1
1B1
2B1
3B1
0B2
1B2
2B2
3B2
4B1
5B1
6B1
7B1
4B2
5B2
6B2
7B2
Control
Logic
SEL
TERMINAL FUNCTIONS
TERMINAL
2
I/O
DESCRIPTION
NAME
NO.
An,
2, 3, 6,
7, 11, 12,
15, 16
I/O
Data I/Os
nBm
22–29,
31–38
I/O
Data I/Os
SEL
9
I
Select input
VDD
5, 8, 13,
18, 20, 30,
40, 42
–
Power supply
GND
1, 4, 10,
14, 17, 19,
21, 39, 41,
Exposed
center pad
–
Ground
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SCDS269C – MARCH 2009 – REVISED APRIL 2010
ABSOLUTE MAXIMUM RATINGS (1)
(2)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
–0.5
2.5
V
(3)
–0.5
2.5
V
(3) (4)
–0.5
2.5
V
VIN < GND
–50
mA
VI/O < GND
–50
mA
100
mA
Continuous current through VDD
100
mA
Continuous current through GND
–100
mA
150
°C
VDD
Supply voltage range
VIN
Control input voltage range (2)
VI/O
Switch I/O voltage range (2)
IIK
Control input clamp current
II/OK
I/O port clamp current
II/O
ON-state switch current (5)
IDD
IGND
Tstg
Storage temperature range.
(1)
(2)
(3)
(4)
(5)
–65
UNIT
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to GND unless otherwise specifed.
The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
VI and VO are used to denote specific conditions for VI/O.
II and IO are used to denote specific conditions for II/O.
PACKAGE THERMAL IMPEDANCE
over operating free-air temperature range (unless otherwise noted)
UNIT
qJA
(1)
Package thermal impedance (1)
RUA package
51.2
°C/W
The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
TYP
MAX
1.5
1.8
2
UNIT
VDD
Supply voltage
VIH
High-level control input voltage (SEL)
VIL
Low-level control input voltage (SEL)
VIO
Switch input/output voltage
0
VDD
V
TA
Operating free air temperature
0
85
°C
0.65 × VDD
V
0.35 × VDD
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V
V
3
TS2PCIE412
SCDS269C – MARCH 2009 – REVISED APRIL 2010
www.ti.com
ELECTRICAL CHARACTERISTICS FOR 1.8-V SUPPLY (1)
VDD = 1.5 V to 2.0 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (2)
MAX
–0.7
–1.3
V
UNIT
VIK
SEL
VDD = 2.0 V,
IIN = –18 mA
IIH
SEL
VDD = 2.0 V,
VIN = VDD
±1
mA
IIL
SEL
VDD =2.0 V,
VIN = GND
±1
mA
Ioff
VDD = 0,
VO = 0 to 2 V,
VI = 0
1
mA
ICC
VDD = 2.0 V,
II/O = 0,
Switch ON or OFF
400
mA
CIN
SEL
f = 10 MHz, VIN = 0 V
COFF
B port
200
1
pF
VI = 0 V, f = 10 MHz,
Outputs open,
Switch OFF
1.5
1.5
pF
CON
VI = 0 V, f = 10 MHz,
Outputs open,
Switch ON
4.5
4.5
pF
rON
VDD = 1.8 V,
GND ≤ VI ≤ VDD,
IO = –40 mA
12
18
Ω
VDD = 1.8 V,
VI = 1.65 to 1.8 V,
IO = –40 mA
0.5
VDD = 1.8 V,
GND ≤ VI ≤ VDD,
IO = –40 mA
0.2
rON(flat)
(3)
ΔrON
(4)
Ω
Ω
0.8
Dynamic
RL = 100 Ω, f = 10 MHz
XTALK
RL = 100 Ω, f = 10 MHz
OIRR
–81
See Figure 9
RL = 100 Ω, f = 1.25 GHz
–74
See Figure 10
RL = 100 Ω, f = 1.25 GHz
dB
–32
dB
–36
BW
RL = 50 Ω,
See Figure 8
2.1
GHz
Max data rate
RL = 50 Ω,
See Figure 8
4.2
Gbps
(1)
(2)
(3)
(4)
VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs.
All typical values are at VDD = 1.8 V (unless otherwise noted), TA = 25°C.
rON(flat) is the difference of rON in a given channel at specific voltages.
ΔrON is the difference of ron from center ports to any other port.
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VDD = 1.5 V to 2.0 V, RL = 200 Ω, CL = 10 pF
(unless otherwise noted)
PARAMETER
tpd
(2) (3)
tPZH, tPZL
tPHZ, tPLZ
tsk(O)
tsk(p)
(1)
(2)
(3)
(4)
(5)
(6)
4
(4)
FROM
(INPUT)
An or nBn
TO
(OUTPUT)
TYP (1)
or An
0.28
SEL
An or nBn
7.8
SEL
An or nBn
An or nBn
nBn
MIN
nBn
or An
(5) (6)
MAX
UNIT
ns
9
ns
2.5
4
ns
0.06
0.1
ns
0.06
0.1
ns
All typical values are at VDD = 1.8 V (unless otherwise noted) TA = 25°C.
The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load
capacitance when driven by an ideal voltage source (zero output impedance).
See Figure 6
Output skew between center port to any other port
Skew between opposite transitions of the same output in a given device tPHL – tPLH
See Figure 7
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SCDS269C – MARCH 2009 – REVISED APRIL 2010
TYPICAL PERFORMANCE
0
–1
–3
Gain at –3 dB: 2.1 GHz
Magnitude (dB)
–5
–7
–9
–11
–13
1
10
100
1000
10000
Frequency (MHz)
Figure 1. Frequency Response (Insertion Loss)
–20
–30
OIRR at 1.25 GHz: –36.3 dB
–40
Magnitude (dB)
–50
–60
–70
OIRR at 10 MHz: –73.7 dB
–80
–90
–100
1
10
100
1000
10000
Frequency (MHz)
Figure 2. OFF Isolation vs Frequency
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TS2PCIE412
SCDS269C – MARCH 2009 – REVISED APRIL 2010
www.ti.com
TYPICAL PERFORMANCE (continued)
-20
-30
XTALK at 1.25 GHz: –31.9 dB
-40
Magnitude (dB)
-50
-60
-70
-80
XTALK at 10 MHz: –80.4 dB
-90
-100
1
10
100
1000
10000
Frequency (MHz)
Figure 3. Crosstalk vs Frequency
Eye Diagrams
10-inch trace board for real implementation, VDD = 1.8 V, f = 1.25 GHz, transitional signal and non-transitional signal eye from
Tektronix TDS6154C and Tektronix RT-Eye＝ software
Figure 4. Transitional Signal Eye for TS2PCIE412 Using a 10-inch Trace
6
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TS2PCIE412
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SCDS269C – MARCH 2009 – REVISED APRIL 2010
TYPICAL PERFORMANCE (continued)
10-inch trace board for real implementation, VDD = 1.8 V, f = 1.25 GHz, transitional signal and non-transitional signal eye from
Tektronix TDS6154C and Tektronix RT-Eye＝ software
Figure 5. Transitional Signal Eye (Left) and Non-Transitional Signal Eye (Right) for TS2PCIE412 Using a 10-inch Trace
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TS2PCIE412
SCDS269C – MARCH 2009 – REVISED APRIL 2010
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PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
VDD
Input Generator
VSEL
50 Ω
50 Ω
VG1
TEST CIRCUIT
DUT
Input Generator
VI
50 Ω
CL
(see Note A)
50 Ω
VDD
S1
RL
VI
CL
V∆
1.5 V to 2 V
2 × VDD
200 Ω
GND
10 pF
0.15 V
tPHZ/tPZH
1.5 V to 2 V
GND
200 Ω
VDD
10 pF
0.15 V
VO
VDD
Output Control
(VIN)
VDD/2
VDD/2
0V
Output
Waveform 1
S1 at 2 V CC
(see Note B)
tPZL
tPLZ
VOH
VCC/2
tPZH
VO
Open
RL
tPLZ/tPZL
VSEL
2 × VDD
GND
VG2
TEST
S1
RL
VO
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.15 V
VOL
tPHZ
VCC/2
VOH - 0.15 V
VOH
VOL
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
A.
CL includes probe and jig capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5
ns, tf ≤2.5 ns.
D.
The outputs are measured one at a time, with one transition per measurement.
E.
tPLZ and tPHZ are the same as tdis.
F.
tPZL and tPZH are the same as ten.
Figure 6. Test Circuit and Voltage Waveforms
8
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PARAMETER MEASUREMENT INFORMATION
(Skew)
VDD
Input Generator
VSEL
50 Ω
50 Ω
VG1
TEST CIRCUIT
DUT
2 × VDD
Input Generator
50 Ω
tsk(o)
VDD
tsk(p)
RL
S1
RL
VSEL
CL
1.5 V to 2 V
Open
200 Ω
VDD or GND
10 pF
1.5 V to 2 V
Open
200 Ω
VDD or GND
10 pF
VDD
Data In at
Ax or Ay
VDD/2
0
tPLHx
tPHLx
VOH
(VOH + V OL)/2
VOL
Data Out at
XB1 or XB2
tsk(o)
VO
CL
(see Note A)
50 Ω
TEST
VO
Open
GND
VG2
VI
RL
VO
VI
S1
VDD
VDD/2
Input
tsk(o)
VOH
(VOH + V OL)/2
VOL
Data Out at
YB1 or YB 2
tPLHy
tPHLy
tPLH
VOH
(VOH + V OL)/2
VOL
Output
tsk(p) = tPHL - t PLH
tsk(o) = tPLHy - t PLHx or tPHLy - t PHLx
VOLTAGE WAVEFORMS
OUTPUT SKEW (tsk(o))
tPHL
VOLTAGE WAVEFORMS
PULSE SKEW [tsk(p)]
A.
CL includes probe and jig capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5
ns, tf ≤2.5 ns.
D.
The outputs are measured one at a time, with one transition per measurement.
Figure 7. Test Circuit and Voltage Waveforms
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SCDS269C – MARCH 2009 – REVISED APRIL 2010
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PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
BIAS
VBIAS
Network Analyzer
(HP8753ES)
P1
P2
VCC
0B1
A0
SEL
DUT
VSEL
Figure 8. Test Circuit for Frequency Response (BW)
Frequency response is measured at the output of the ON channel. For example, when VSEL = 0 V and A0 is the
input, the output is measured at 0B1. All unused analog I/O ports are left open.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
10
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SCDS269C – MARCH 2009 – REVISED APRIL 2010
PARAMETER MEASUREMENT INFORMATION (continued)
EXT TRIGGER
BIAS
VBIAS
Network Analyzer
(HP8753ES)
P1
P2
VCC
A0
0B1
RL = 50 Ω
A1
1B1
0B2
DUT
A2
1B2
2B1
RL = 50 Ω
A3
3B1
2B2
3B2
SEL
VSEL
Figure 9. Test Circuit for Crosstalk (XTALK)
Crosstalk is measured at the input of the nonadjacent ON channel. For example, when VSEL = 0 V and A1 is the
input, the output is measured at A3. All unused analog input (A) ports are connected to GND, and output (B)
ports are connected to GND through 50-Ω pulldown resistors.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
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SCDS269C – MARCH 2009 – REVISED APRIL 2010
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PARAMETER MEASUREMENT INFORMATION (continued)
EXT TRIGGER
BIAS
VBIAS
Network Analyzer
(HP8753ES)
P1
P2
VCC
A0
0B1
RL = 50 Ω
A1
1B1
DUT
0B2
1B2
SEL
VSEL
Figure 10. Test Circuit for Off Isolation (OIRR)
OFF isolation is measured at the output of the OFF channel. For example, when VSEL = 0 V and A1 is the input,
the output is measured at 1B2. All unused analog input (A) ports are left open, and output (B) ports are
connected to GND through 50-Ω pulldown resistors.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
12
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TS2PCIE412RUAR
ACTIVE
WQFN
RUA
42
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
SH412
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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